JP6973749B2 - Drive device for power semiconductor devices - Google Patents

Description

The present invention relates to a drive device for a power semiconductor element, and more particularly to a drive device for a power semiconductor element that suppresses fluctuation of the threshold voltage of the power semiconductor element while driving the power semiconductor element using a wide band gap semiconductor.

Wideband gap semiconductor devices represented by silicon carbide (SiC) semiconductor devices as next-generation power semiconductor devices will be capable of higher withstand voltage, lower loss, higher speed switching, higher temperature operation, etc. than silicon (Si) semiconductor devices. Attention has been paid. However, it is known that the quality of the gate oxide film of the SiC semiconductor device is lower than that of the Si semiconductor device. This is a factor that fluctuates the threshold voltage in MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors) and IGBTs (Insulated Gate Bipolar Transistors). In a power semiconductor switching element, if the threshold voltage Vth, which is the boundary between the on state and the off state, fluctuates abnormally, there is a risk that a circuit failure may occur due to erroneous on or the like. In order to prevent such an abnormal fluctuation of the threshold voltage Vth, a method for manufacturing a SiC semiconductor device for improving the quality of a gate oxide film has been proposed (Patent Documents 1 and 2).

Further, there is also known a technique for suppressing an abnormal fluctuation of the threshold voltage Vth by devising a circuit (Patent Document 3). In Patent Document 3, when the gate voltage applied to the gate electrode of the power semiconductor element is positive, the threshold voltage Vth has a property of fluctuating in the positive direction, whereas the power semiconductor element has a negative gate during the non-conduction period. It is decided to suppress the fluctuation of the threshold voltage Vth by applying a voltage. When a negative gate voltage is applied during the non-conduction period of a power semiconductor device, if a recirculation current may flow in the power semiconductor element, the recirculation current will flow through the built-in diode. Since the built-in diode does not have good energization performance, the negative voltage is applied to the gate electrode of the power semiconductor element to suppress the fluctuation of the threshold voltage Vth during the period when the return current does not flow through the built-in diode. There is. As a result, the fluctuation of the threshold voltage of the transistor is suppressed while suppressing the deterioration of the conduction performance of the freewheeling diode.

Japanese Unexamined Patent Publication No. 2016-213141 International Publication No. 2011/074237 Japanese Unexamined Patent Publication No. 2013-207821

However, in the method of suppressing the fluctuation of the threshold voltage according to Patent Document 3, in order to detect that the return current does not flow in the built-in diode, a current detecting means for detecting the current flowing from the power conversion circuit toward the load is provided. ing. Further, since the fluctuation of the threshold voltage occurs when the power semiconductor element is driven for a certain period of time, the fluctuation of the threshold voltage is not always suppressed while the power semiconductor element is being driven.

The present invention has been made in view of such a point, and when a fluctuation of the threshold voltage occurs in the power semiconductor element, the power semiconductor element is designed to suppress the fluctuation of the threshold voltage according to the fluctuation. It is an object of the present invention to provide a drive device.

In the present invention, in order to solve the above problems, a drive device for a power semiconductor element is provided. The drive device of this power semiconductor element has a threshold detection unit that detects the threshold voltage of the power semiconductor element and a gate signal that suppresses the fluctuation of the threshold voltage according to the fluctuation of the threshold voltage detected by the threshold detection unit. It is provided with a threshold fluctuation suppressing unit to be applied to. Further, the threshold detection unit is a voltage detection unit that detects the voltage between the main electrodes of the power semiconductor element when the power semiconductor element is in the ON state, and a voltage detection unit based on the correlation between the voltage between the main electrodes and the threshold voltage. It has a conversion unit that estimates the threshold voltage from the detected voltage between the main electrodes.

According to such a power semiconductor element drive device, even if the threshold voltage fluctuates when driven for a certain period of time, the power semiconductor element is driven so that the threshold voltage fluctuates in the direction opposite to the fluctuation direction. The power semiconductor element does not malfunction due to the fluctuation of the threshold voltage.

Since the drive device of the power semiconductor element having the above configuration operates so as to suppress the fluctuation of the threshold voltage according to the fluctuation of the threshold voltage of the power semiconductor element, the power semiconductor element does not malfunction such as erroneous on. There is an advantage.

It is a figure which shows the output part of the switching regulator which applied the drive device of the power semiconductor element which concerns on 1st Embodiment. It is a figure which shows the drive device of the power semiconductor element which concerns on 2nd Embodiment. It is a figure which shows the relationship between the drain-source voltage and the threshold voltage when a power semiconductor element is on. It is a figure which shows the fluctuation of the threshold voltage when the reverse continuity test is performed when the SiC element is driven for a certain period of time. It is a flowchart which shows the flow | flow of the operation of the drive device of the power semiconductor element which concerns on 2nd Embodiment. It is a figure which shows the waveform example of the gate voltage of a power semiconductor element, (A) shows the case where synchronous rectification is not performed, (B) shows the case where synchronous rectification is performed. It is a figure which shows the waveform example of the gate voltage of the power semiconductor element at the time of the threshold voltage fluctuation suppression control. It is a figure which shows the drive device of the power semiconductor element which concerns on 3rd Embodiment. It is a figure which shows the gate resistance circuit at the time of turning off of a power semiconductor element. It is a figure which shows the waveform of the gate voltage at the time of off when a power semiconductor element is driven for a certain period of time. It is a figure which shows the tendency of the change of the threshold value when the power semiconductor element is driven for a certain period of time. It is a flowchart which shows the flow | flow of the operation of the drive device of the power semiconductor element which concerns on 3rd Embodiment.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings, taking as an example a case where the present invention is applied to a synchronous rectification type switching regulator using two power semiconductor elements of a wide bandgap semiconductor. In the figure, the parts indicated by the same reference numerals indicate the same components. In addition, each embodiment can be implemented by partially combining a plurality of embodiments within a consistent range.

[First Embodiment]
FIG. 1 is a diagram showing an output unit of a switching regulator to which a drive device for a power semiconductor element according to the first embodiment is applied.

In the output unit of the switching regulator, a power semiconductor element SW1 for the upper arm and a power semiconductor element SW2 for the lower arm are connected in series between the power supply and the ground. Here, the power semiconductor elements SW1 and SW2 are silicon carbide MOSFETs (SiC- MOSFETs), each of which has a built-in diode. The connection point between the source of the power semiconductor element SW1 and the drain of the power semiconductor element SW2 is connected to one terminal of the inductor L, and the other terminal of the inductor L is connected to one terminal of the capacitor C. The other terminal of the capacitor C is connected to the source of the power semiconductor element SW2.

The gate of the power semiconductor element SW1 is connected to the upper arm drive device 1U. The upper arm drive device 1U has a threshold value detection unit 2U for detecting the threshold voltage Vth of the power semiconductor element SW1 and a threshold value fluctuation suppression unit 3U for suppressing the fluctuation of the threshold voltage Vth of the power semiconductor element SW1. The gate of the power semiconductor element SW2 is connected to the lower arm drive device 1D. The lower arm drive device 1D has a threshold value detection unit 2D for detecting the threshold voltage Vth of the power semiconductor element SW2 and a threshold value fluctuation suppression unit 3D for suppressing the fluctuation of the threshold voltage Vth of the power semiconductor element SW2.

In the switching regulator having the above configuration, the power semiconductor elements SW1 and SW2 alternately perform switching operations, so that the input voltage Vin is converted into a voltage Vout and supplied to a load (not shown). That is, when the power semiconductor element SW1 is driven to turn on, the current flows through the inductor L to the load. Next, when the power semiconductor element SW1 is turned off, the current flowing through the inductor L tries to maintain the flow. At this time, when the power semiconductor element SW2 is turned on in synchronization with the off operation of the power semiconductor element SW1, a reverse conduction current path is formed by the power semiconductor element SW2, and a reverse current return current from the source to the drain of the power semiconductor element SW2 is formed. Flows. As a result, current in the same direction continuously flows through the load.

At this time, in the upper arm drive device 1U, the threshold value detection unit 2U monitors the threshold voltage Vth of the power semiconductor element SW1. Here, when the threshold value detection unit 2U detects an abnormal fluctuation of the threshold voltage Vth, the threshold fluctuation suppression unit 3U drives the gate of the power semiconductor element SW1 so as to suppress the fluctuation of the threshold voltage Vth of the power semiconductor element SW1. Similarly, in the lower arm drive device 1D, the threshold value detection unit 2D monitors the threshold voltage Vth of the power semiconductor element SW2. Here, when the threshold value detection unit 2D detects an abnormal fluctuation of the threshold voltage Vth, the threshold fluctuation suppression unit 3D drives the gate of the power semiconductor element SW2 so as to suppress the fluctuation of the threshold voltage Vth of the power semiconductor element SW2.

As described above, when the upper arm drive device 1U and the lower arm drive device 1D do not detect an abnormal fluctuation of the threshold voltage Vth, the power semiconductor elements SW1 and SW2 are driven by normal control. The upper arm drive device 1U and the lower arm drive device 1D move the drive method of the power semiconductor elements SW1 and SW2 in a direction in which the fluctuation of the threshold voltage Vth is suppressed only when an abnormal fluctuation of the threshold voltage Vth is detected. Switching.

In this embodiment, the power semiconductor elements SW1 and SW2 are composed of SiC- MOSFETs, but they may be configured by a combination of the SiC elements IGBT and FWD (Free Wheeling Diode).

[Second Embodiment]
FIG. 2 is a diagram showing a drive device of the power semiconductor element according to the second embodiment, FIG. 3 is a diagram showing the relationship between the drain-source voltage and the threshold voltage when the power semiconductor element is on, and FIG. 4 is a diagram. It is a figure which shows the fluctuation of the threshold voltage when the reverse continuity test is performed when the SiC element is driven for a certain period of time. FIG. 5 is a flowchart showing the operation flow of the drive device of the power semiconductor element according to the second embodiment. Since the upper arm drive device 1U and the lower arm drive device 1D shown in the first embodiment have the same configuration, in the second embodiment, only one of them is configured. Is shown, and the other configuration is omitted. Therefore, in the following, in particular, when the elements of the upper arm and the lower arm are described without distinction, the reference numerals indicating the elements are simplified. That is, the power semiconductor elements SW1 and SW2 are power semiconductor element SWs, and the upper arm drive device 1U and the lower arm drive device 1D are drive devices 1. Further, the threshold value detection unit 2U and the threshold value detection unit 2D are referred to as a threshold value detection unit 2, and the threshold value fluctuation suppression unit 3U and the threshold value fluctuation suppression unit 3D are referred to as a threshold value fluctuation suppression unit 3.

The drive device 1 of the power semiconductor element SW includes a voltage detection unit 11, a conversion unit 12, a comparison unit 13, a gate driver 14, and switching elements Tr1, Tr2, and Tr3. Here, the voltage detection unit 11 and the conversion unit 12 constitute the threshold value detection unit 2, and the comparison unit 13, the gate driver 14, and the switching elements Tr1, Tr2, and Tr3 constitute the threshold value fluctuation suppression unit 3.

The input of the voltage detection unit 11 of the threshold value detection unit 2 is connected to the drain and source of the power semiconductor element SW, and the output is connected to the input of the conversion unit 12. The output of the conversion unit 12 is connected to the input of the comparison unit 13 of the threshold value fluctuation suppression unit 3, and the output of the comparison unit 13 is connected to the input of the gate driver 14. The output of the gate driver 14 is connected to the gate of the switching elements Tr1, Tr2 and Tr3. The drain of the switching element Tr1 is connected to the power supply of the voltage VH, the drain of the switching element Tr2 is connected to the power supply of the voltage VL, and the drain of the switching element Tr3 is connected to the power supply of the voltage VM. The voltages VH, VL, and VM have a relationship of VH> VM> VL. The sources of the switching elements Tr1, Tr2, and Tr3 are connected to the gate of the power semiconductor element SW.

The voltage detection unit 11 connected to the drain and source of the power semiconductor element SW detects the voltage Von between the drain and the source (main electrode) when the power semiconductor element SW is on. Since it is difficult to directly detect the threshold voltage Vth of the power semiconductor element SW in operation, the detection of the voltage Von is for indirectly detecting the threshold voltage Vth from the voltage Von. That is, as shown in FIG. 3, the fluctuation of the voltage Von between the drain and the source when the power semiconductor device SW is on correlates with the fluctuation of the threshold voltage Vth. That is, the voltage Von and the threshold voltage Vth have a proportional relationship in which the threshold voltage Vth also rises when the voltage Von rises, and the threshold voltage Vth also falls when the voltage Von falls. Using this relationship, the threshold value detection unit 2 obtains the threshold voltage Vth that correlates with the voltage Von by detecting the voltage Von, and estimates the fluctuation of the threshold voltage Vth.

The voltage Von may be detected by stopping the operation of the switching regulator and then turning on the power semiconductor element SW, but it is preferable to perform real-time detection. The timing of detection may be performed for each switching or may be performed at regular time intervals. However, if the detection interval becomes too long, the voltage Von may fluctuate significantly during that period, so it is desirable to perform detection at regular intervals not exceeding 100 hours.

After that, in the conversion unit 12, the fluctuation of the threshold voltage Vth is estimated from the fluctuation of the detected voltage Von. The estimated threshold voltage Vth is sent to the comparison unit 13 of the threshold fluctuation suppression unit 3.

In the threshold fluctuation suppression unit 3, the comparison unit 13 grasps the electrical characteristics of the power semiconductor element SW corresponding to the estimated fluctuation of the threshold voltage Vth, and the gate driver 14 grasps the electrical characteristics of the power semiconductor element SW according to the estimated fluctuation of the threshold voltage Vth. The power semiconductor element SW is driven so as to suppress fluctuations. Further, in the comparison unit 13, it is necessary to set an allowable value of the threshold voltage Vth.

Since the electrical characteristics of the power semiconductor device SW and the allowable value of the threshold voltage Vth may vary depending on the semiconductor material, gate structure, device structure, device manufacturing process, etc., it is recommended to detect them in advance in a typical device. desirable.

Here, FIG. 4 shows the fluctuation of the threshold voltage Vth when a reverse continuity test is performed on a certain SiC element. In FIG. 4, the threshold voltage Vth is defined as the gate-source voltage Vgs when the drain current Ids = 18 mA and the drain-source voltage Vds = 20 V in this SiC element, and is about about in this SiC element. It is 2V. The reference current of the threshold voltage Vth is arbitrary, but it is desirable that the current is about 1/1000 of the rated current. According to FIG. 4, when the gate-source voltage Vgs is set to a negative value and a reverse conduction current is passed through the built-in diode, the threshold voltage Vth fluctuates in a direction of decreasing. Further, when the reverse conduction current flows when the gate-source voltage Vgs is set to + 2.5V to + 5V, the threshold voltage Vth rises. This voltage region is called an inversion region. Further, when the gate-source voltage Vgs is set to Vgs> +7.5 V, the channel completely becomes a strong inversion region, and at this time, the fluctuation of the threshold voltage Vth is almost eliminated. This strong inversion region is usually called reverse conduction, and is the region most used when reverse conduction is performed by synchronous rectification. Then, the allowable value of the threshold voltage Vth is determined in a range in which the occurrence of erroneous on and the increase in loss do not occur in the circuit with respect to the initial value, and is set to, for example, about ± 0.1 V as the initial value.

The comparison unit 13 determines a method for coping with the fluctuation of the threshold voltage Vth based on the electrical characteristics of the SiC element as described above. That is, the comparison unit 13 determines whether the fluctuation of the threshold voltage Vth is within the permissible value, whether the fluctuation of the threshold voltage Vth is higher than the permissible value, and whether the fluctuation of the threshold voltage Vth is higher than the permissible value. Compare and judge whether it is low or not. Here, when the threshold voltage Vth fluctuates in the direction of decreasing from the electrical characteristics of FIG. 4, the gate-source voltage Vgs may be set to the operating condition of fluctuating in the direction of increasing the threshold voltage Vth. I understand. On the contrary, when the threshold voltage Vth fluctuates in the direction of increasing, it can be seen that the gate-source voltage Vgs may be set to the operating condition of fluctuating in the direction of decreasing the threshold voltage Vth. That is, if the threshold voltage Vth fluctuates in a direction lower than the permissible value, the inversion region is reverse-conducted, and if the threshold voltage Vth fluctuates in a direction higher than the permissible value, the built-in diode is reverse-conducted.

The gate driver 14 changes the gate voltage Vg of the power semiconductor element SW based on the determination result of the comparison unit 13. That is, if the threshold voltage Vth fluctuates in a direction lower than the permissible value, the gate driver 14 turns on the switching element Tr3 and sets the gate voltage Vg of the power semiconductor element SW to, for example, 5V of the voltage VM. As a result, in the power semiconductor device SW, the inverting region becomes reverse conduction, and the operating condition is that the threshold voltage Vth rises. On the contrary, if the threshold voltage Vth fluctuates in a direction higher than the allowable value, the gate driver 14 turns on the switching element Tr2 and sets the gate voltage Vg of the power semiconductor element SW to, for example, -10V of the voltage VL. As a result, in the power semiconductor element SW, the built-in diode becomes reverse conduction, and the operating condition is that the threshold voltage Vth is lowered. Further, if the threshold voltage Vth is within the allowable value range and hardly fluctuates, the gate driver 14 turns on the switching element Tr1 and sets the gate voltage Vg of the power semiconductor element SW to, for example, 15V of the voltage VH. .. As a result, the power semiconductor device SW usually has reverse conduction, and the operating condition is such that the threshold voltage Vth does not change.

Although the gate driver 14 has been described here focusing on suppressing fluctuations in the threshold voltage Vth, it is also used in normal control for turning on / off the power semiconductor element SW. That is, the gate driver 14 turns on the switching element Tr1 when the power semiconductor element SW is turned on, and turns on the switching element Tr2 when the power semiconductor element SW is turned off, and also serves as a fluctuation suppression control of the threshold voltage Vth. doing.

Next, the overall operation of the drive device for the power semiconductor element SW described above will be described. In the drive device for the power semiconductor element SW, as shown in FIG. 5, the voltage detection unit 11 first detects the voltage Von between the drain and the source when the power semiconductor element SW is on (step S1). Next, using the relationship between the voltage Von and the threshold voltage Vth, the conversion unit 12 obtains the threshold voltage Vth corresponding to the detected voltage Von and estimates the fluctuation of the threshold voltage Vth (step S2). The comparison unit 13 compares the estimated threshold voltage Vth with the preset allowable value (step S3), and determines whether or not the estimated threshold voltage Vth is lower than the allowable value (step S4). When it is determined in step S4 that the threshold voltage Vth is lower than the allowable value, the gate driver 14 turns on the switching element Tr3 to bring the power semiconductor element SW into a state of reverse conduction in the inverting region (step S5).

If it is determined in step S4 that the threshold voltage Vth is not lower than the permissible value, the comparison unit 13 determines whether or not the threshold voltage Vth is within the permissible value (step S6). When it is determined in step S6 that the threshold voltage Vth is within the allowable value, the gate driver 14 turns on the switching element Tr1 to bring the power semiconductor element SW into a normal reverse conduction state (step S7). When it is determined in step S6 that the threshold voltage Vth is higher than the permissible value, the gate driver 14 turns on the switching element Tr2 and puts the power semiconductor element SW in a state of reverse conduction of the built-in diode (step S8).

When the drive of the power semiconductor element SW by the gate driver 14 and the switching elements Tr1, Tr2, Tr3 is completed, the drive device of the power semiconductor element SW continues to operate for a certain period of time (step S9). That is, the drive device of the power semiconductor element SW holds the determination result by the comparison unit 13, and uses the determination result to continue the fluctuation suppression control for a certain period of time. After a lapse of a certain period of time, the drive device of the power semiconductor element SW returns to step S1 and restarts the detection of the voltage Von between the drain and the source.

Next, the mutual operation of the two power semiconductor elements SW1 and SW2 when the drive device of the power semiconductor element SW is applied to the output unit of the switching regulator shown in FIG. 1 will be described.

6A and 6B are diagrams showing an example of a waveform of a gate voltage of a power semiconductor element, where FIG. 6A shows a case where synchronous rectification is not performed, and FIG. 6B shows a case where synchronous rectification is performed. FIG. 7 is a diagram showing an example of a waveform of the gate voltage of the power semiconductor element at the time of threshold voltage fluctuation suppression control.

The power semiconductor elements SW1 and SW2 are driven by a gate signal controlled by PWM (Pulse Width Modulation). Here, when synchronous rectification is not performed, as shown in FIG. 6A, during the period in which the PWM control gate signal is applied to one gate of the power semiconductor elements SW1 and SW2, the other gate is used. A gate voltage Vg of a constant voltage VL is applied. At this time, for example, the recirculation current flowing after the gate voltage Vg transitions from the voltage VH to the voltage VL during the period in which the PWM control gate signal is applied to the gate of the power semiconductor element SW1 of the upper arm is the power semiconductor. Only the built-in diode connected in antiparallel to the element SW2 will flow.

On the other hand, when synchronous rectification is performed, as shown in FIG. 6B, while the PWM control gate signal is applied to one gate of the power semiconductor elements SW1 and SW2, synchronous rectification is performed to the other gate. A PWM control gate signal for is applied. Here, the other of the power semiconductor elements SW1 and SW2 is normally in a reverse conduction state while the PWM control gate signal for synchronous rectification is applied.

Next, a case where the threshold voltage fluctuation suppression control shown in FIG. 7 is performed on the power semiconductor element SW1 or SW2 will be described. In the example shown in FIG. 7, only the power semiconductor element SW2 is controlled to suppress the threshold voltage fluctuation, and the power semiconductor element SW1 is not controlled to suppress the threshold voltage fluctuation.

In the power semiconductor device SW2, when the threshold voltage Vth is higher than the permissible value, the gate driver 14 keeps the switching element Tr2 on and the gate voltage remains the voltage VL during the period during which the power semiconductor device SW1 is PWM-controlled. However, synchronous rectification is not performed. In the power semiconductor element SW2, a gate voltage Vg that changes in the direction in which the threshold voltage Vth decreases is applied to the gate. Further, during the period during which the power semiconductor element SW2 is PWM controlled, a PWM control gate signal for synchronous rectification is applied to the gate of the power semiconductor element SW1.

When the threshold voltage Vth of the power semiconductor element SW2 is within the permissible value, the gate driver 14 uses the switching elements Tr1 and Tr2 to synchronously rectify the power semiconductor element SW2 during the period during which the power semiconductor element SW1 is PWM-controlled. PWM control is performed. That is, the gate driver 14 turns on the switching element Tr1 at the timing when the power semiconductor element SW2 is turned on, and turns on the switching element Tr2 at the timing when the power semiconductor element SW2 is turned off. As a result, in the power semiconductor element SW2, the gate voltage becomes the voltage VH when it is on, and the gate voltage becomes the voltage VL when it is off. That is, normal values of voltages VH and VL that do not require threshold voltage fluctuation suppression control are applied to the gate of the power semiconductor element SW2 at this time. Further, during the period during which the power semiconductor element SW2 is PWM controlled, a PWM control gate signal for synchronous rectification is applied to the gate of the power semiconductor element SW1.

When the threshold voltage Vth of the power semiconductor element SW2 is lower than the permissible value, the gate driver 14 uses the switching elements Tr2 and Tr3 to synchronously rectify the power semiconductor element SW2 during the period during which the power semiconductor element SW1 is PWM-controlled. PWM control is performed. That is, the gate driver 14 turns on the switching element Tr3 at the timing when the power semiconductor element SW2 is turned on, and turns on the switching element Tr2 at the timing when the power semiconductor element SW2 is turned off. As a result, in the power semiconductor element SW2, the gate voltage becomes the voltage VM when it is on, and the gate voltage becomes the voltage VL when it is off. As a result, in the power semiconductor device SW2, a gate voltage Vg that changes in the direction in which the threshold voltage Vth rises is applied to the gate. Further, during the period during which the power semiconductor element SW2 is PWM controlled, a PWM control gate signal for synchronous rectification is applied to the gate of the power semiconductor element SW1.

In the above example of FIG. 7, the case where the threshold voltage fluctuation suppression control is applied to the power semiconductor element SW2 of the lower arm is shown, but it can be similarly applied to the power semiconductor element SW1 of the upper arm. In this case, the threshold voltage fluctuation suppression control of the power semiconductor element SW1 of the upper arm is performed at a time zone different from the threshold voltage fluctuation suppression control of the power semiconductor element SW2 of the lower arm.

[Third Embodiment]
FIG. 8 is a diagram showing a driving device of the power semiconductor element according to the third embodiment, and FIG. 9 is a diagram showing a gate resistance circuit when the power semiconductor element is off. FIG. 10 is a diagram showing a waveform of the gate voltage when the power semiconductor element is driven for a certain period of time, and FIG. 11 is a diagram showing a tendency of a change in threshold value when the power semiconductor element is driven for a certain period of time. Is. FIG. 12 is a flowchart showing a flow of operation of the drive device of the power semiconductor element according to the third embodiment. In FIG. 8, the same or equivalent components as those shown in FIG. 2 are designated by the same reference numerals, and detailed description thereof will be omitted.

In the power semiconductor element drive device according to the third embodiment, the power semiconductor element drive device according to the second embodiment changes the gate voltage to suppress the threshold voltage fluctuation. The gate resistance is changed to suppress the threshold voltage fluctuation.

The drive device 1 of the power semiconductor element SW includes a voltage detection unit 11, a conversion unit 12, a comparison unit 13, switching elements Tr11, Tr12, a gate resistance Rg, an on-time gate resistance Rg (on), and an off-time gate resistance Rg (off). It is equipped with. Here, the voltage detection unit 11 and the conversion unit 12 constitute the threshold value detection unit 2, and the comparison unit 13 and the off-time gate resistance Rg (off) constitute the threshold value fluctuation suppression unit 3.

In this drive device 1, the gates of the switching elements Tr11 and Tr12 are connected to the input terminal 21 to which the gate signal is input via the gate resistor Rg. The drain of the switching element Tr11 is connected to the positive electrode gate voltage Vg (+), and the source of the switching element Tr11 is connected to one terminal of the on-time gate resistance Rg (on). The other terminal of the on-time gate resistance Rg (on) is connected to one terminal of the power semiconductor element SW gate and the off-time gate resistance Rg (off). The other terminal of the off gate resistance Rg (off) is connected to the source of the switching element Tr12, and the drain of the switching element Tr12 is connected to the negative electrode gate voltage Vg (−). Here, the off gate resistance Rg (off) is a variable resistance whose control terminal is connected to the output of the comparison unit 13 and whose resistance value changes depending on the control signal output by the comparison unit 13.

As illustrated in FIG. 9, the off gate resistance Rg (off) includes switching elements Tr13 and Tr14 and resistors Rg1 and Rg2. One terminal of the resistors Rg1 and Rg2 is connected to the other terminal of the gate resistance Rg (on) at ON. The other terminal of the resistor Rg1 is connected to the source of the switching element Tr13, and the other terminal of the resistor Rg2 is connected to the source of the switching element Tr14. The drains of the switching elements Tr13 and Tr14 are connected to the source of the switching element Tr12, and the gates of the switching elements Tr13 and Tr14 are connected to the output of the comparison unit 13. In this off-time gate resistance Rg (off), the values of the resistances Rg1 and Rg2 are in a relationship of Rg1> Rg2.

In the drive device of the power semiconductor element SW having the above configuration, the voltage detection unit 11 detects the voltage Von between the drain and the source when the power semiconductor element SW is on, and the conversion unit 12 detects the detected voltage Von. The fluctuation of the threshold voltage Vth is estimated from the fluctuation. The comparison unit 13 compares the estimated fluctuation of the threshold voltage Vth with the permissible value of the threshold voltage Vth, and either the fluctuation of the threshold voltage Vth is lower than the permissible value of the threshold voltage Vth or the fluctuation of the threshold voltage Vth is the threshold voltage Vth. Judge whether it is within the allowable value of. The allowable value of the threshold voltage Vth is determined within a range in which problems such as erroneous ON occurrence do not occur with respect to the initial value.

Here, the comparison unit 13 outputs a control signal for turning on the switching element Tr13 when the fluctuation of the threshold voltage Vth is within the allowable value of the threshold voltage Vth, and sets the gate resistance Rg (off) at the time of off to the resistance Rg1. do. When the fluctuation of the threshold voltage Vth is lower than the allowable value of the threshold voltage Vth, the comparison unit 13 outputs a control signal for turning on the switching element Tr14, and the off gate resistance Rg (off) has a smaller value than the resistance Rg1. Set the resistance Rg2.

This threshold fluctuation suppression control is based on the following electrical characteristics of the power semiconductor element SW. That is, when the power semiconductor element SW is driven for a certain period of time, the magnitude of the undershoot voltage UV changes depending on the value of the gate resistance Rg (off) when the power semiconductor element SW is turned off, as shown in FIG. do. The off gate resistance Rg (off) is shown in the case where the gate resistance Rg (off) is reduced in the order of A to D. Here, the undershoot voltage UV is defined by the size of the arrow portion in the figure (in the figure, the jump voltage when the gate resistance Rg (off) at off is set to D). On the other hand, as shown in FIG. 11, when the undershoot voltage UV when the power semiconductor device SW is turned off is increased, the increase width of the threshold voltage Vth tends to increase. From this, if the fluctuation of the threshold voltage Vth is within the allowable value range, the gate voltage Vg at the time of off can be increased by increasing the value of the gate resistance Rg (off) at the time of off (to a normal value). It can be seen that the generation of excessive undershoot voltage UV is suppressed. Further, when the threshold voltage Vth is lower than the permissible value, the threshold voltage Vth may be controlled in the increasing direction. For this purpose, by making the value of the gate resistance Rg (off) at the time of off smaller than the normal value, the gate voltage Vg at the time of off changes in the direction in which the undershoot voltage UV increases. As a result, since the increase width of the threshold voltage Vth becomes large, it is possible to suppress the threshold voltage Vth from deviating significantly from the permissible value, and it is possible to suppress the fluctuation of the threshold voltage Vth of the power semiconductor element SW.

In this threshold value fluctuation suppression control, the threshold voltage Vth can be detected in real time during the operation of the power semiconductor device SW, but the apparatus may be periodically stopped and individually detected. When the threshold voltage Vth at this time is within the allowable value range, it is desirable to determine the normal value of the off gate resistance Rg (off), that is, the value of the resistance Rg1 in consideration of switching loss and the like. .. Further, it is preferable to detect the threshold voltage Vth and switch the gate resistance Rg (off) at the time of off at regular time intervals.

Next, the overall operation of the drive device for the power semiconductor element SW described above will be described. In the drive device for the power semiconductor element SW, as shown in FIG. 12, the voltage detection unit 11 first detects the voltage Von between the drain and the source when the power semiconductor element SW is on (step S11). Next, using the relationship between the voltage Von and the threshold voltage Vth, the conversion unit 12 obtains the threshold voltage Vth corresponding to the detected voltage Von and estimates the fluctuation of the threshold voltage Vth (step S12).

The comparison unit 13 compares the estimated threshold voltage Vth with the preset allowable value (step S13), and determines whether or not the estimated threshold voltage Vth is within the allowable value (step S14). When it is determined in step S14 that the threshold voltage Vth is within the allowable value, the comparison unit 13 outputs a control signal for turning on the switching element Tr13, and sets the off gate resistance Rg (off) to the normal value resistance Rg1. Switching (step S15). When it is determined in step S14 that the threshold voltage Vth is lower than the permissible value, the comparison unit 13 outputs a control signal for turning on the switching element Tr14, and sets the off gate resistance Rg (off) to a resistance smaller than the normal value. Switch to Rg2 (step S16).

When the switching of the gate resistance Rg (off) at the time of off is completed, the drive device of the power semiconductor element SW continues to operate for a certain period of time (step S17). After a lapse of a certain period of time, the drive device of the power semiconductor element SW returns to step S11 and restarts the detection of the voltage Von between the drain and the source.

In this third embodiment, the off gate resistance Rg (off) is switched to two stages based on the detected threshold voltage Vth, but it may be switched to a plurality of stages of three or more as necessary. ..

1 Drive device 1D Lower arm drive device 1U Upper arm drive device 2 Threshold detection unit 2D Threshold detection unit 2U Threshold detection unit 3 Threshold fluctuation suppression unit 3D Threshold fluctuation suppression unit 3U Threshold fluctuation suppression unit 11 Voltage detection unit 12 Conversion unit 13 Comparison unit 14 Gate driver 21 Input terminal C Capacitor L Inductor Rg (off) Off gate resistance Rg (on) On gate resistance Rg Gate resistance Rg1, Rg2 resistance SW, SW1, SW2 Power semiconductor element Tr1, Tr2, Tr3, Tr11 , Tr12, Tr13, Tr14 Switching element

Claims (6)

A threshold detector that detects the threshold voltage of a power semiconductor device,
A threshold fluctuation suppressing unit that applies a gate signal that suppresses the fluctuation of the threshold voltage according to the fluctuation of the threshold voltage detected by the threshold detection unit to the power semiconductor element.
Equipped with
The threshold detection unit is based on the correlation between the voltage detection unit that detects the voltage between the main electrodes of the power semiconductor element when the power semiconductor element is in the ON state, the voltage between the main electrodes, and the threshold voltage. It has a conversion unit that estimates the threshold voltage from the voltage between the main electrodes detected by the voltage detection unit.
Drive of power semiconductor devices. The threshold fluctuation suppressing unit includes a comparison unit that compares the fluctuation of the threshold voltage estimated by the conversion unit with the allowable value of the fluctuation of the threshold voltage, and the comparison unit that causes the fluctuation of the threshold voltage to be the allowable value. The first switching element that applies a positive first voltage to the gate of the power semiconductor element when it is determined to be within the range, and the comparison unit indicate that the fluctuation of the threshold voltage is higher than the allowable value. When it is determined by the second switching element that applies a negative second voltage to the gate of the power semiconductor element and the comparison unit that the fluctuation of the threshold voltage is lower than the allowable value. drive of the third and a switching element, a power semiconductor device according to claim 1 for applying a third voltage of a low positive than the first voltage to the gate of the power semiconductor device. The drive device for a power semiconductor element according to claim 2 , wherein the first switching element, the second switching element, and the third switching element are turned on at the timing of performing synchronous rectification with respect to the power semiconductor element. .. Further, the first switching element that is turned on by receiving the gate signal that turns on the power semiconductor element, and the first switching element that is connected between the first switching element and the gate of the power semiconductor element. It comprises an on-time gate resistor that applies a positive gate voltage to the gate of the power semiconductor device when is turned on, and a second switching element that is turned on in response to a gate signal that turns off the power semiconductor device.
The threshold fluctuation suppressing unit compares the fluctuation of the threshold voltage estimated by the conversion unit with the permissible value of the fluctuation of the threshold voltage, and when the fluctuation of the threshold voltage is within the range of the permissible value, the first. Between the comparison unit that outputs the control signal of the above and outputs the second control signal when the fluctuation of the threshold voltage is lower than the allowable value range, and the gate of the power semiconductor element and the second switching element. When the resistance value is switched in response to the first control signal or the second control signal and the second switching element is turned on, a negative gate voltage is applied to the gate of the power semiconductor element. With off gate resistance to apply,
The drive device for a power semiconductor element according to claim 1. The off-gate resistance is a first resistor that is connected to a third switching element that is turned on by receiving the first control signal and has a first resistance value when the third switching element is turned on. And a fourth switching element that is turned on by receiving the second control signal, and a second resistance value that is connected when the fourth switching element is turned on and is smaller than the first resistance value. The driving device for a power semiconductor element according to claim 4 , which has a second resistor. The power semiconductor device according to claim 1, wherein the power semiconductor device is a semiconductor device using a wide bandgap semiconductor.

Images