JP6969931B2 - Circuit board evaluation package and circuit board evaluation method - Google Patents

Circuit board evaluation package and circuit board evaluation method Download PDF

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JP6969931B2
JP6969931B2 JP2017162216A JP2017162216A JP6969931B2 JP 6969931 B2 JP6969931 B2 JP 6969931B2 JP 2017162216 A JP2017162216 A JP 2017162216A JP 2017162216 A JP2017162216 A JP 2017162216A JP 6969931 B2 JP6969931 B2 JP 6969931B2
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power supply
circuit board
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package
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JP2019039816A (en
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朋広 林
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NEC Platforms Ltd
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Description

本発明は、回路基板評価用パッケージ、および回路基板評価方法に関するものである。 The present invention relates to a circuit board evaluation package and a circuit board evaluation method.

LSI(large-scale integrated circuit:大規模集積回路)を搭載する印刷回路基板において、電源変動(電源ノイズ)が大きい場合に、印刷回路基板上で電源ノイズ波形を測定して、キャパシタ(capacitor)等の部品を追加して対処することが一般的である。 In a printed circuit board equipped with an LSI (large-scale integrated circuit), when the power supply fluctuation (power supply noise) is large, the power supply noise waveform is measured on the printed circuit board to measure a capacitor, etc. It is common to add parts to deal with this.

この様な電源ノイズ対策には、電源線路の特性インピーダンスの周波数特性の把握が有効である。 As a countermeasure against such power supply noise, it is effective to grasp the frequency characteristics of the characteristic impedance of the power supply line.

電源線路の特性インピーダンスの周波数特性において、インピーダンスのピークが存在すると、インピーダンスのピークを生じる周波数で、電源ノイズが大きくなる。そこで、インピーダンスのピークの周波数を含む周波数帯域でノイズを低減する容量のキャパシタを選択することが可能となる。 In the frequency characteristic of the characteristic impedance of the power supply line, if the impedance peak is present, the power supply noise becomes large at the frequency at which the impedance peak occurs. Therefore, it becomes possible to select a capacitor having a capacity that reduces noise in the frequency band including the frequency of the peak impedance.

また、ピーク周波数近傍のインピーダンス特性に基づいて、ノイズ対策用のキャパシタの配置場所を決定することも行われる。 In addition, the location of the capacitor for noise suppression is also determined based on the impedance characteristics near the peak frequency.

特許文献1には、回路基板の線路の特性インピーダンス測定装置が提示されている。 Patent Document 1 presents a characteristic impedance measuring device for a circuit board line.

特開2002−148291号公報Japanese Unexamined Patent Publication No. 2002-148291

しかし、特許文献1による方法では、特性インピーダンスを測定することは可能であるが、LSIが発生するノイズがLSIの電源から回路基板の電源線に混入した状態を想定した測定は困難であった。 However, although it is possible to measure the characteristic impedance by the method according to Patent Document 1, it is difficult to measure the state in which the noise generated by the LSI is mixed from the power supply of the LSI to the power supply line of the circuit board.

本発明の目的は、上述した課題を鑑み、LSIの電源が発生するノイズが回路基板の電源線に混入した状態を模擬した電源線の特性を測定可能とする回路基板評価用パッケージ、および回路基板評価方法を提供することにある。 In view of the above-mentioned problems, an object of the present invention is a circuit board evaluation package capable of measuring the characteristics of a power supply line simulating a state in which noise generated by an LSI power supply is mixed in the power supply line of the circuit board, and a circuit board. The purpose is to provide an evaluation method.

上記の目的を達成するために、本発明の回路基板評価用パッケージは、集積回路のパッケージの接続ピンと同一に配置される複数の接続ピンを備える回路基板評価用パッケージであって、前記集積回路の電源ピンと同じ配置の少なくとも1つの電源供給ピンと前記集積回路の接地ピンと同じ配置の少なくとも1つの接地ピンとの間に接続される電流発生源と、前記電流発生源に接続されて前記電流発生源の電流を制御する信号が入力される制御信号入力端子と、前記電源供給ピンと前記接地ピンの間に接続される電源測定用端子とを備える。 In order to achieve the above object, the circuit board evaluation package of the present invention is a circuit board evaluation package including a plurality of connection pins arranged in the same manner as the connection pins of the integrated circuit package, and is the integrated circuit. A current source connected between at least one power supply pin in the same arrangement as the power supply pin and at least one ground pin in the same arrangement as the ground pin of the integrated circuit, and a current connected to the current source and the current of the current source. It is provided with a control signal input terminal into which a signal for controlling the current is input, and a power supply measuring terminal connected between the power supply pin and the grounding pin.

上記の目的を達成するために、本発明の回路基板評価方法は、回路基板に搭載する集積回路のパッケージの接続ピンと同一に配置される複数の接続ピンを備える回路基板評価用パッケージを用いる回路基板評価方法であって、前記集積回路の電源ピンと同じ配置の少なくとも1つの電源供給ピンと前記集積回路の接地ピンと同じ配置の少なくとも1つの接地ピンとの間に接続される電流発生源の電流を制御して、更に前記電源供給ピンと前記接地ピンの間の電圧を測定する。 In order to achieve the above object, the circuit board evaluation method of the present invention uses a circuit board evaluation package including a plurality of connection pins arranged in the same manner as the connection pins of the integrated circuit package mounted on the circuit board. In the evaluation method, the current of the current generation source connected between at least one power supply pin in the same arrangement as the power supply pin of the integrated circuit and at least one grounding pin in the same arrangement as the grounding pin of the integrated circuit is controlled. Further, the voltage between the power supply pin and the ground pin is measured.

本発明によれば、回路基板評価用パッケージ、および回路基板評価方法は、LSIの電源が発生するノイズが回路基板の電源線に混入した状態を模擬した電源線の特性を測定可能になる。 According to the present invention, the circuit board evaluation package and the circuit board evaluation method can measure the characteristics of the power supply line simulating the state in which the noise generated by the power supply of the LSI is mixed in the power supply line of the circuit board.

第1の実施形態の構成例を示す図である。It is a figure which shows the structural example of the 1st Embodiment. 第2の実施形態の回路基板評価用パッケージの使用例を示す図である。It is a figure which shows the use example of the circuit board evaluation package of 2nd Embodiment. 第2の実施形態の構成例を示す図である。It is a figure which shows the structural example of the 2nd Embodiment. 第2の実施形態の構成例を示す図である。It is a figure which shows the structural example of the 2nd Embodiment. 第2の実施形態の構成例を示す図である。It is a figure which shows the structural example of the 2nd Embodiment. 第3の実施形態の構成例を示す図である。It is a figure which shows the structural example of the 3rd Embodiment.

[第1の実施形態]
次に、本発明の実施の形態について図1を参照して詳細に説明する。
[First Embodiment]
Next, an embodiment of the present invention will be described in detail with reference to FIG.

本実施形態の回路基板評価用パッケージ10は、回路基板に搭載する集積回路のパッケージの接続ピンと同一に配置される複数の接続ピン20を備える。回路基板評価用パッケージ10は、前記集積回路の電源ピンと同じ配置の少なくとも1つの電源供給ピン21と前記集積回路の接地ピンと同じ配置の少なくとも1つの接地ピン22との間に接続される電流発生源11を備える。更に、回路基板評価用パッケージ10は、前記電流発生源11に接続されて前記電流発生源11の電流を制御する信号が入力される制御信号入力端子12を備える。また、回路基板評価用パッケージ10は、前記電源供給ピン21と前記接地ピン22の間に接続される電源測定用端子13とを備える。 The circuit board evaluation package 10 of the present embodiment includes a plurality of connection pins 20 arranged in the same manner as the connection pins of the package of the integrated circuit mounted on the circuit board. The circuit board evaluation package 10 is a current generation source connected between at least one power supply pin 21 having the same arrangement as the power supply pin of the integrated circuit and at least one grounding pin 22 having the same arrangement as the grounding pin of the integrated circuit. 11 is provided. Further, the circuit board evaluation package 10 includes a control signal input terminal 12 connected to the current generation source 11 and to which a signal for controlling the current of the current generation source 11 is input. Further, the circuit board evaluation package 10 includes a power supply measuring terminal 13 connected between the power supply pin 21 and the grounding pin 22.

回路基板に搭載される集積回路のパッケージを、上記の回路基板評価用パッケージ10に乗せかえて、電流発生源11が測定に必要な信号を電源供給ピン21に対して出力することを指示する信号を、外部機器から制御信号入力端子に入力する。そして、電源測定用端子13に現れる信号を外部の測定機によって測定する。 A signal instructing that the current generation source 11 outputs a signal necessary for measurement to the power supply pin 21 by replacing the package of the integrated circuit mounted on the circuit board with the above-mentioned circuit board evaluation package 10. Is input to the control signal input terminal from an external device. Then, the signal appearing at the power supply measuring terminal 13 is measured by an external measuring device.

この様にすることで、本実施形態の回路基板評価用パッケージ10は、集積回路が発生するノイズが回路基板の電源線に混入した状態を模擬した電源線の特性を測定可能とする。
[第2の実施形態]
次に、第2の実施形態について図2乃至図5を参照して説明する。
[構成の説明]
はじめに、図2を参照して本実施形態の回路基板評価用パッケージの使用方法について説明する。
By doing so, the circuit board evaluation package 10 of the present embodiment can measure the characteristics of the power supply line simulating the state in which the noise generated by the integrated circuit is mixed in the power supply line of the circuit board.
[Second Embodiment]
Next, the second embodiment will be described with reference to FIGS. 2 to 5.
[Description of configuration]
First, a method of using the circuit board evaluation package of the present embodiment will be described with reference to FIG.

図2は、例えばコンピュータ(computer)などのマザーボード(mother board)130を示している。 FIG. 2 shows a mother board 130, such as a computer.

マザーボード130には、電源コネクタ131、CPU(Central Processing Unit)の周辺チップセット132、メモリスロット133、拡張スロット134などが搭載されている。 The motherboard 130 is equipped with a power connector 131, a peripheral chipset 132 of a CPU (Central Processing Unit), a memory slot 133, an expansion slot 134, and the like.

更に、マザーボード130には、LSIによるCPU(Central Processing Unit)が搭載されている。CPUは、マザーボードの上のLSIソケットにはめ込んで、接続ピンを介して電気的接続を行う場合が多い。 Further, the motherboard 130 is equipped with a CPU (Central Processing Unit) by LSI. CPUs are often fitted into LSI sockets on the motherboard and electrically connected via connection pins.

本実施形態の回路基板評価用パッケージ100は、CPUに代えてLSIソケットにはめ込んで使用する。 The circuit board evaluation package 100 of this embodiment is used by being fitted into an LSI socket instead of a CPU.

図2は、CPUに代えて回路基板評価用パッケージ100を装着した様子を示している。 FIG. 2 shows a state in which the circuit board evaluation package 100 is mounted instead of the CPU.

尚、換装はしにくくなるが、回路基板評価用パッケージ100とマザーボード130を半田溶融で電気的接続をしても良い。 Although it is difficult to replace the circuit board, the circuit board evaluation package 100 and the motherboard 130 may be electrically connected by solder melting.

図3に第2の実施形態の構成を示す。 FIG. 3 shows the configuration of the second embodiment.

本実施形態の回路基板評価用パッケージ100は、基板101、複数の接続ピン120、電源供給ピン121、接地ピン122、電流発生器110、制御信号入力端子112、および電源測定用端子113を備える。 The circuit board evaluation package 100 of the present embodiment includes a substrate 101, a plurality of connection pins 120, a power supply pin 121, a grounding pin 122, a current generator 110, a control signal input terminal 112, and a power supply measurement terminal 113.

基板101は、本来実装されるLSI(以下、LSI)のパッケージの底面と同じ大きさのプリント基板などであって、回路基板評価用パッケージ100の各構成部品を取り付けて、電気配線を行う基台である。 The board 101 is a printed circuit board or the like having the same size as the bottom surface of the originally mounted LSI (hereinafter referred to as LSI) package, and is a base on which each component of the circuit board evaluation package 100 is attached and electrical wiring is performed. Is.

接続ピン120は、LSIのパッケージの底面におけるピンの配置と、同じ位置に基板101の底面に配置される。 The connection pin 120 is arranged on the bottom surface of the substrate 101 at the same position as the pin arrangement on the bottom surface of the LSI package.

電源供給ピン121は、接続ピン120のうち、LSIの電源ピンの位置に配置されているピンである。 The power supply pin 121 is a pin among the connection pins 120 that is arranged at the position of the power supply pin of the LSI.

接地ピン122は、接続ピン120のうち、LSIの接地ピンの位置に配置されているピンである。 The ground pin 122 is a pin of the connection pins 120 that is arranged at the position of the ground pin of the LSI.

ここで、基板101、接続ピン120の関係を説明する。 Here, the relationship between the substrate 101 and the connection pin 120 will be described.

図4は、基板101の断面の説明図である。 FIG. 4 is an explanatory view of a cross section of the substrate 101.

基板101は、多層基板であり、内層に電源電力が印加される電源層と、接地電位の接地層を有する。 The substrate 101 is a multilayer board, and has a power supply layer to which power supply power is applied to the inner layer and a grounding layer having a grounding potential.

接続ピン120のうち、電源供給ピン121は、内層で電源層にのみ接続されて接地層には接続されない。また、接地ピン122は、内層で接地層にのみ接続されて電源層には接続されない。 Of the connection pins 120, the power supply pin 121 is connected only to the power supply layer in the inner layer and not to the ground layer. Further, the ground pin 122 is connected only to the ground layer in the inner layer and is not connected to the power supply layer.

他の接続ピン120は、電源層にも接地層にも接続されない。ただし、他の接続ピン120は、測定の目的によっては接地層に接続する場合もある。 The other connection pins 120 are not connected to either the power supply layer or the ground layer. However, the other connection pin 120 may be connected to the ground layer depending on the purpose of measurement.

図3の電流発生器110は、電流発生源を有する電源回路であり、電流発生源は、制御信号が加えられることで、電流の振幅や周波数を変化して出力可能である。 The current generator 110 of FIG. 3 is a power supply circuit having a current generation source, and the current generation source can output by changing the amplitude and frequency of the current by applying a control signal.

制御信号入力端子112は、電流発生器の電流発生源に対して加える制御信号が、外部から入力される端子である。 The control signal input terminal 112 is a terminal in which a control signal applied to the current generation source of the current generator is input from the outside.

電源測定用端子113は2端子であり、外部の測定器に電源信号を出力可能な端子であって、片方の端子は電源供給ピン121に接続され、もう片方の端子は接地ピンに接続されている。 The power supply measurement terminal 113 has two terminals and is a terminal capable of outputting a power supply signal to an external measuring instrument. One terminal is connected to the power supply pin 121 and the other terminal is connected to the ground pin. There is.

図5は、回路基板評価用パッケージ100の各部品の接続の様子を説明する図である。 FIG. 5 is a diagram illustrating a state of connection of each component of the circuit board evaluation package 100.

電流発生器110は、内部に電流発生源111を有する。電流発生源111の出力は、基板101の電源層と接地層に接続されている。 The current generator 110 has a current generation source 111 inside. The output of the current generation source 111 is connected to the power supply layer and the ground layer of the substrate 101.

電流発生源111は、制御信号入力端子112に外部から加えられた制御信号に基づいて、出力する電力の周波数や振幅を変化する。 The current generation source 111 changes the frequency and amplitude of the power to be output based on the control signal applied from the outside to the control signal input terminal 112.

本実施形態の回路基板評価用パッケージ100は、電源供給ピン121と接地ピン122は、基板101の内層に接続される構造としている。これは、LSIの基板構造が電源層や接地層を有しており、回路基板評価用パッケージ100でもLSIの構造を模擬するために、この様に内層を使用する構成としている。 The circuit board evaluation package 100 of the present embodiment has a structure in which the power supply pin 121 and the grounding pin 122 are connected to the inner layer of the board 101. This is because the board structure of the LSI has a power supply layer and a ground layer, and the circuit board evaluation package 100 also uses the inner layer in order to simulate the structure of the LSI.

しかし、図1の様に電流発生源111、電源供給ピン121、接地ピン122、および電源測定用端子113を、内層を介さずに配線パターンや電線で接続してもよい。
[動作の説明]
次に、図2を参照して、回路基板評価用パッケージ100の動作を説明する。
However, as shown in FIG. 1, the current generation source 111, the power supply pin 121, the ground pin 122, and the power supply measurement terminal 113 may be connected by a wiring pattern or an electric wire without going through the inner layer.
[Explanation of operation]
Next, the operation of the circuit board evaluation package 100 will be described with reference to FIG.

マザーボードのLSIソケットに回路基板評価用パッケージ100を装着し、マザーボードの電源を投入する。ここで、マザーボードの電源は直流を想定している。 The circuit board evaluation package 100 is attached to the LSI socket of the motherboard, and the power of the motherboard is turned on. Here, the power supply of the motherboard is assumed to be direct current.

次に、電流発生器110が、電流変動量はΔI、周波数はfで変動する交流の負荷電流を出力する様に、制御信号入力端子112に外部から制御信号を加える。 Next, a control signal is applied to the control signal input terminal 112 from the outside so that the current generator 110 outputs an AC load current whose current fluctuation amount is ΔI and whose frequency is f.

そして、電源測定用端子113に出力される、周波数fで変動する電圧変動量ΔVを、電源測定用端子113に接続した外部測定器にて測定する。 Then, the voltage fluctuation amount ΔV that is output to the power supply measurement terminal 113 and fluctuates with the frequency f is measured by an external measuring instrument connected to the power supply measurement terminal 113.

この時、周波数fにおけるマザーボードの電源系のインピーダンスZは、Z=ΔV/ΔIで求めることが出来る。 At this time, the impedance Z of the power supply system of the motherboard at the frequency f can be obtained by Z = ΔV / ΔI.

電流発生器110が発生する交流の電流変動量ΔIは一定として、周波数fを変化して電圧変動量ΔVを測定し、各周波数のインピーダンスZをグラフに表すことで、インピーダンスの周波数特性を得られる。 The frequency characteristics of the impedance can be obtained by measuring the voltage fluctuation amount ΔV by changing the frequency f and displaying the impedance Z of each frequency in a graph, assuming that the AC current fluctuation amount ΔI generated by the current generator 110 is constant. ..

このインピーダンスの周波数特性のグラフで、特定の周波数にインピーダンスのピークが存在する場合、この特定の周波数(ピーク周波数)で電源ノイズが大きくなる。そこで、ピーク周波数を含む周波数帯域で共振特性を有するキャパシタを選択することで、電源ノイズの対策が可能となる。 In the graph of the frequency characteristic of this impedance, when the impedance peak exists at a specific frequency, the power supply noise becomes large at this specific frequency (peak frequency). Therefore, by selecting a capacitor having resonance characteristics in the frequency band including the peak frequency, it is possible to take measures against power supply noise.

更に、この様に選択したキャパシタをマザーボードに配置する場所は、ピーク周波数近傍のインピーダンス特性から判断することが一般的に可能である。 Further, it is generally possible to determine the location of the capacitor selected in this way on the motherboard from the impedance characteristics near the peak frequency.

以上説明した様に、本実施形態の回路基板評価用パッケージ100は、LSIの電源ピンから観測したマザーボードの電源系のインピーダンスが測定可能となる。 As described above, the circuit board evaluation package 100 of the present embodiment can measure the impedance of the power supply system of the motherboard observed from the power supply pin of the LSI.

即ち、本実施形態の回路基板評価用パッケージ100によって、LSIが発生するノイズがLSIの電源ピンを介して回路基板の電源線に混入した状態を模擬した電源線の特性が、測定可能となる。
[第3の実施形態]
次に、第3の実施形態について図6を参照して説明する。
[構成の説明]
図6に、本実施形態の回路基板評価用パッケージ200の断面の説明図を示す。
That is, the circuit board evaluation package 100 of the present embodiment makes it possible to measure the characteristics of the power supply line simulating a state in which noise generated by the LSI is mixed in the power supply line of the circuit board via the power supply pin of the LSI.
[Third Embodiment]
Next, the third embodiment will be described with reference to FIG.
[Description of configuration]
FIG. 6 shows an explanatory view of a cross section of the circuit board evaluation package 200 of the present embodiment.

本実施形態の回路基板評価用パッケージ200は、回路基板評価用パッケージ200と換装するLSIが、2系統の電源系を有している場合に対応するものである。 The circuit board evaluation package 200 of the present embodiment corresponds to a case where the LSI to be replaced with the circuit board evaluation package 200 has two power supply systems.

本実施形態の基板201では、第1の実施形態の基板101では1層だった電源層が、電源層1と電源層2の2層になっている。 In the substrate 201 of the present embodiment, the power supply layer, which was one layer in the substrate 101 of the first embodiment, becomes two layers, a power supply layer 1 and a power supply layer 2.

電源供給ピン121は電源層1に接続され、電源供給ピン123は電源層2に接続されている。電源供給ピン121と123は、LSIの底面の電源ピンの配置と同じ位置に配置される。 The power supply pin 121 is connected to the power supply layer 1, and the power supply pin 123 is connected to the power supply layer 2. The power supply pins 121 and 123 are arranged at the same positions as the power supply pins on the bottom surface of the LSI.

電流発生器210は、電流発生源111と電流発生源211を有し、電流発生源111は電源層1と接地層に接続され、電流発生源211は電源層2と接地層に接続される。 The current generator 210 has a current generation source 111 and a current generation source 211, the current generation source 111 is connected to the power supply layer 1 and the ground layer, and the current generation source 211 is connected to the power supply layer 2 and the ground layer.

そして、電流発生源111は制御信号入力端子112に接続され、電流発生源211は制御信号入力端子212に接続される。 Then, the current generation source 111 is connected to the control signal input terminal 112, and the current generation source 211 is connected to the control signal input terminal 212.

また、電源測定用端子113は、電源供給ピン121と接地ピン122に接続され、電源測定用端子213は、電源供給ピン123と接地ピン122に接続される。 Further, the power supply measuring terminal 113 is connected to the power supply pin 121 and the grounding pin 122, and the power supply measuring terminal 213 is connected to the power supply supply pin 123 and the grounding pin 122.

上記の各構成要素の機能は、第2の実施形態の回路基板評価用パッケージ100の各構成要素の機能と同様であるため、詳しい説明は省略する。
[動作の説明]
次に、本実施形態の回路基板評価用パッケージ200の動作について、図6を参照して説明する。
Since the functions of the above components are the same as the functions of the components of the circuit board evaluation package 100 of the second embodiment, detailed description thereof will be omitted.
[Explanation of operation]
Next, the operation of the circuit board evaluation package 200 of this embodiment will be described with reference to FIG.

第2の実施形態と同様に、マザーボードのLSIソケットに回路基板評価用パッケージ200を装着し、マザーボードの電源を投入する。
Similar to the second embodiment, the circuit board evaluation package 200 is mounted on the LSI socket of the motherboard, and the power of the motherboard is turned on.

次に、電流発生源111が、電流変動量はΔI、周波数はfで変動する交流の負荷電流を出力する様に、制御信号入力端子112に制御信号を加える。 Next, a control signal is added to the control signal input terminal 112 so that the current generation source 111 outputs an AC load current whose current fluctuation amount is ΔI and whose frequency is f.

そして、電源測定用端子213に出力され、周波数fで変動する電圧変動量ΔVを、電源測定用端子213に接続した外部測定器にて測定する。 Then, the voltage fluctuation amount ΔV that is output to the power supply measurement terminal 213 and fluctuates with the frequency f is measured by an external measuring instrument connected to the power supply measurement terminal 213.

この時、周波数fにおけるマザーボードの電源供給ピン121から電源供給ピン123への電源系の伝達インピーダンスZtは、Zt=ΔV/ΔIで求めることが出来る。 At this time, the transfer impedance Zt of the power supply system from the power supply pin 121 of the motherboard to the power supply pin 123 at the frequency f can be obtained by Zt = ΔV / ΔI.

電流発生源111が発生する交流の電流変動量ΔIは一定として、周波数fを変化して電圧変動量ΔVを測定し、各周波数のインピーダンスZtをグラフに表すことで、伝達インピーダンスの周波数特性を得られる。 The frequency characteristic of the transfer impedance is obtained by measuring the voltage fluctuation amount ΔV by changing the frequency f and displaying the impedance Zt of each frequency in a graph, assuming that the AC current fluctuation amount ΔI generated by the current generation source 111 is constant. Will be.

第2の実施形態の動作の説明と同様に、伝達インピーダンスのピーク周波数が存在する場合に、マザーボード上にキャパシタを配置することで、複数の電源系に起因するノイズの対策が可能となる。 Similar to the description of the operation of the second embodiment, when the peak frequency of the transmission impedance exists, by arranging the capacitor on the motherboard, it is possible to take measures against noise caused by a plurality of power supply systems.

以上説明した様に、本実施形態の回路基板評価用パッケージ200は、複数の電源系統を有するLSIの電源ピン同士の伝達インピーダンスが測定可能となる。 As described above, the circuit board evaluation package 200 of the present embodiment can measure the transfer impedance between the power supply pins of an LSI having a plurality of power supply systems.

以上、本発明の好適な実施形態を説明したが、上記実施形態に限定されるものではなく、次のように拡張または変形できる。 Although the preferred embodiment of the present invention has been described above, the present invention is not limited to the above embodiment and can be extended or modified as follows.

LSIの電源系が3系統以上の場合も、第3の実施形態と同様に電源供給ピンを追加して、電流発生源を追加することで、各電源同士の伝達インピーダンス特性を得ることが可能である。 Even when the LSI power supply system has three or more systems, it is possible to obtain the transfer impedance characteristics between each power supply by adding a power supply pin and adding a current generation source as in the third embodiment. be.

10 回路基板評価用パッケージ
11 電流発生源
12 制御信号入力端子
13 電源測定用端子
20 接続ピン
21 電源供給ピン
22 接地ピン
100 回路基板評価用パッケージ
101 基板
110 電流発生器
111 電流発生源
112 制御信号入力端子
113 電源測定用端子
120 接続ピン
121 電源供給ピン
122 接地ピン
123 電源供給ピン
130 マザーボード(mother board)
130 マザーボード
131 電源コネクタ
132 周辺チップセット
133 メモリスロット
134 拡張スロット
200 回路基板評価用パッケージ
201 基板
210 電流発生器
211 電流発生源
212 制御信号入力端子
213 電源測定用端子
10 Circuit board evaluation package 11 Current generation source 12 Control signal input terminal 13 Power supply measurement terminal 20 Connection pin 21 Power supply pin 22 Grounding pin 100 Circuit board evaluation package 101 Board 110 Current generator 111 Current generation source 112 Control signal input Terminal 113 Power supply measurement terminal 120 Connection pin 121 Power supply pin 122 Grounding pin 123 Power supply pin 130 Motherboard
130 Motherboard 131 Power connector 132 Peripheral chipset 133 Memory slot 134 Expansion slot 200 Circuit board evaluation package 201 Board 210 Current generator 211 Current source 212 Control signal input terminal 213 Power measurement terminal

Claims (6)

回路基板に搭載する集積回路のパッケージの接続ピンと同一に配置される複数の接続ピンを備える回路基板評価用パッケージは、
前記集積回路の電源ピンと同じ配置の少なくとも1つの電源供給ピンと前記集積回路の接地ピンと同じ配置の少なくとも1つの接地ピンとの間に接続される電流発生源と、
前記電流発生源に接続されて前記電流発生源が出力する交流の負荷電流の周波数と、前記電流発生源の電流変動量とを制御する信号が入力される制御信号入力端子と、
前記電源供給ピンと前記接地ピンに接続され、前記制御する信号によって制御された前記交流の負荷電流を出力する電源測定用端子とを備えることを特徴とする回路基板評価用パッケージ。
A circuit board evaluation package having a plurality of connection pins arranged in the same manner as the connection pins of the integrated circuit package mounted on the circuit board is available.
A current source connected between at least one power supply pin in the same arrangement as the power supply pin of the integrated circuit and at least one grounding pin in the same arrangement as the grounding pin of the integrated circuit.
Being connected to said current source, and the frequency of the alternating load current the current source is output, a control signal input terminal to which a signal for controlling the current variation amount of the current source is input,
The connected power supply pin and the ground pin, the circuit package board evaluation, characterized in that it comprises a power supply and measuring terminal you output load current of the controlled alternating current by a signal the control.
前記電源供給ピンは複数であって、それぞれの前記電源供給ピンと前記接地ピンとの間には異なる前記電流発生源が接続され、前記制御信号入力端子は前記異なる前記電流発生源のそれぞれに1つずつ接続されることを特徴とする請求項1に記載の回路基板評価用パッケージ。 There are a plurality of power supply pins, different current generation sources are connected between the power supply pins and the grounding pin, and one control signal input terminal is provided for each of the different current generation sources. The circuit board evaluation package according to claim 1, wherein the package is connected. 前記回路基板の電源は通電状態とすることを特徴とする請求項1または請求項2に記載の回路基板評価用パッケージ。 The circuit board evaluation package according to claim 1 or 2, wherein the power supply of the circuit board is energized. 回路基板に搭載する集積回路のパッケージの接続ピンと同一に配置される複数の接続ピンを備える回路基板評価用パッケージを用いる回路基板評価方法において、
前記回路基板評価用パッケージの制御信号入力端子に印加される制御信号により、前記集積回路の電源ピンと同じ配置の少なくとも1つの電源供給ピンと前記集積回路の接地ピンと同じ配置の少なくとも1つの接地ピンとの間に接続される、前記回路基板評価用パッケージにおける電流発生源が出力する交流の負荷電流の周波数と、前記電流発生源の電流変動量とを制御して、
外部測定器が、更に前記電源供給ピンと前記接地ピンの間の電圧変動量を測定することを特徴とする回路基板評価方法。
In a circuit board evaluation method using a circuit board evaluation package having a plurality of connection pins arranged in the same manner as the connection pins of the integrated circuit package mounted on the circuit board.
By the control signal applied to the control signal input terminal of the circuit board evaluation package, between at least one power supply pin having the same arrangement as the power supply pin of the integrated circuit and at least one grounding pin having the same arrangement as the grounding pin of the integrated circuit. By controlling the frequency of the AC load current output by the current generation source in the circuit board evaluation package connected to the circuit board and the amount of current fluctuation of the current generation source,
A circuit board evaluation method , wherein an external measuring instrument further measures a voltage fluctuation amount between the power supply pin and the ground pin.
前記電源供給ピンは複数であって、それぞれの前記電源供給ピンと前記接地ピンとの間に接続される異なる前記電流発生源の電流をそれぞれ別に制御することを特徴とする請求項4に記載の回路基板評価方法。 The circuit board according to claim 4, wherein the power supply pin is a plurality of pieces, and the currents of different current generation sources connected between the power supply pin and the grounding pin are individually controlled. Evaluation method. 前記回路基板の電源は通電状態とすることを特徴とする請求項4または請求項5に記載の回路基板評価方法。 The circuit board evaluation method according to claim 4 or 5, wherein the power supply of the circuit board is energized.
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