JP6849118B2 - Inverter device - Google Patents

Description

The present invention relates to an inverter device capable of suppressing a temperature rise of passive components in the closed housing even when the entire device is covered with the closed housing.

Conventionally, inverter devices for driving motors of various devices have been required to be smaller and lighter in order to reduce costs and to fit in an electric chamber in a limited space. Further, when the inverter device is used outdoors or in a factory environment where dust or the like exists, it is required to have high environmental resistance such as IP66 and high airtightness to obtain waterproofness.

On the other hand, in the inverter device, the power semiconductor element that controls the current flowing through the motor generates heat due to the conduction loss at the time of energization and the switching loss generated at the transition of on / off. Therefore, the inverter device is equipped with an air-cooled cooler or a water-cooled cooler in order to suppress heat generation from the power semiconductor element. However, for example, in an inverter device using an air-cooled cooler, the structural members of the air-cooled cooler occupy a large volume. Depending on the design conditions, the volume of the structural member of the air-cooled cooler may occupy 10 times or more the volume of the power semiconductor module.

Therefore, in order to reduce the size of the inverter device, it is necessary to reduce the size of the cooler. This miniaturization of the cooler can be realized by reducing the loss of the power semiconductor element and making the power semiconductor element usable at a higher temperature. The reduction of the loss of power semiconductor devices is made by the progress of power semiconductor devices. Further, in order to enable power semiconductor devices to be used at higher temperatures, advances in packaging technology such as higher reliability of bonding agents such as solder are largely responsible. Currently, the maximum junction temperature of a power semiconductor device is 175 ° C., and the continuous drive junction temperature of a power semiconductor device may be allowed up to 175 ° C.

Japanese Unexamined Patent Publication No. 2000-14169

By the way, when the inverter device is miniaturized, the distance between the high temperature power semiconductor module or cooler and the passive component such as the electrolytic capacitor becomes short in the inverter device, and the temperature of the passive component rises.

Here, the passive component does not have the same heat resistance as the power semiconductor module, and the temperature rise causes a decrease in reliability and a shortened life.

In particular, an electrolytic capacitor as a passive component is a component whose life is determined by the ambient temperature. The life is said to follow Arrhenius' law, and it is said that the life is halved when the temperature rises by 10 ° C.

Further, since an inverter device having a sealed housing that satisfies high airtightness such as IP66 cannot take in outside air, heat is trapped inside the housing due to heat generated by the inverter circuit including heat generated by the power semiconductor element. That is, the inverter device in the closed housing has a higher temperature inside the housing than the inverter device in the open housing.

Therefore, in Patent Document 1, in order to suppress the temperature rise in the inverter housing in which the inverter circuit including the electrolytic capacitor is installed except for the power semiconductor module, a cooler in which the power semiconductor module is installed and an inverter circuit are installed. A space is provided between the inside of the inverter housing and the outside air is positively flowed into this space by natural convection or forced air cooling.

However, what is described in Patent Document 1 is not premised on complete sealing like IP66, and is a space between the cooler in which the power semiconductor module is installed and the inside of the inverter housing in which the inverter circuit is installed. Since the outside air cannot flow into this space when the inverter is sealed, convection is generated in the internal air which has become hot due to the heat generation of the power semiconductor module in this space. Due to the convection heat conduction of the internal air, the heat of the cooler is transferred to the inside of the inverter housing, the temperature inside the inverter housing rises, and the life of the inverter circuit, which is a passive component such as an electrolytic capacitor, is shortened.

The present invention has been made in view of the above, and an inverter device capable of suppressing a temperature rise of a passive component in the closed housing even when the entire device is covered with the closed housing. The purpose is to provide.

In order to solve the above-mentioned problems and achieve the object, the inverter device according to the present invention is an inverter including the power semiconductor module and passive components on the cooling surface of the cooler to which the power semiconductor module is joined and the inverter housing. An inverter device in which an inverter circuit including a circuit module is sealed, characterized in that a sealed heat insulating layer is formed on the cooling surface of the cooler, and the thickness of the sealed heat insulating layer is set to be equal to or less than the maximum convection suppression distance. To do.

Further, the inverter device according to the present invention is characterized in that, in the above invention, the sealed heat insulating layer is an air layer.

Further, the inverter device according to the present invention is characterized in that, in the above invention, the hermetically sealed heat insulating layer has a plurality of the said hermetically sealed heat insulating layers arranged in multiple layers.

Further, the inverter device according to the present invention is characterized in that, in the above invention, the sealed heat insulating layer is formed so as to cover the power semiconductor module.

Further, the inverter device according to the present invention is characterized in that, in the above invention, the material of the member formed by sealing the sealed heat insulating layer is a foldable thickness or material.

Further, the inverter device according to the present invention is characterized in that, in the above invention, the material of the member formed by sealing the sealed heat insulating layer is resin.

Further, the inverter device according to the present invention is characterized in that, in the above invention, the material of the member formed by sealing the sealed heat insulating layer is aluminum and the surface is anodized.

Further, in the above invention, the inverter device according to the present invention has a surface emissivity of 0.8 or more for the material of the member forming the sealed heat insulating layer and the material forming the inverter housing. It is characterized by.

Further, the inverter device according to the present invention is characterized in that, in the above invention, the power semiconductor element in the power semiconductor module is a wide bandgap semiconductor element.

According to the present invention, the inverter device is an inverter device in which an inverter circuit including the power semiconductor module and an inverter circuit module including passive components is sealed by a cooling surface of a cooler to which a power semiconductor module is joined and an inverter housing. A closed heat insulating layer is formed on the cooling surface of the cooler, and the thickness of the closed heat insulating layer is set to be equal to or less than the maximum convection suppression distance so that convection does not occur in the closed heat insulating layer. The insulation performance of the inverter is maintained high, and it is possible to prevent the life of the passive component from being shortened due to heat.

FIG. 1 is a cross-sectional view of an inverter device according to an embodiment of the present invention. FIG. 2 is a diagram showing a change in the thermal resistance of the air layer with respect to the thickness of the air layer. FIG. 3 is a diagram showing a temperature distribution in the inverter device shown in FIG. FIG. 4 is a cross-sectional view of an inverter device which is a modification 1 of the embodiment of the present invention. FIG. 5 is a cross-sectional view of an inverter device which is a modification 2 of the embodiment of the present invention.

Hereinafter, embodiments for carrying out the present invention will be described with reference to the accompanying drawings.

FIG. 1 is a cross-sectional view of an inverter device according to an embodiment of the present invention. In FIG. 1, the inverter device 1 forms a closed space E that satisfies high airtightness such as IP66 by the inverter housing 10 and the cooling surface 11a of the cooler 11. The inverter housing 10 and the cooling surface 11a are sealed by the packing 12.

In the enclosed space E, a power semiconductor module 13 and an inverter circuit module 16 connected to the power semiconductor module 13 via wiring 14 and including a passive component such as an electrolytic capacitor 15 are arranged. The power semiconductor module 13 is strongly bonded to the cooling surface 11a by screwing or the like, and is cooled by heat dissipation from the cooling fins. The power semiconductor module 13 is a module having a heat generating element such as a rectifier diode or a semiconductor switching element in the inverter circuit, and is arranged so as to be separated from the inverter circuit module 16.

In FIG. 1, the direction of gravity is the −Z direction. Generally, most of the heat generated from the power semiconductor module 13 goes to the cooler 11, and the temperature of the cooler 11 rises. Convection is generated in the inverter housing 10 due to the temperature difference between the temperature of the cooling surface 11a of the cooler 11 and the air temperature in the inverter housing 10, and the temperature inside the inverter housing 10 rises.

In the present embodiment, the closed space E is divided into four closed spaces E1 to E4. The closed space E1 is a space surrounded by the cooling surface 11a, the substrate 13a of the power semiconductor module 13 arranged to face the cooling surface 11a, and the inverter housing 10. The closed space E1 is formed with an air layer as a heat insulating material, and functions as a closed heat insulating layer that suppresses heat conduction from the cooling surface 11a.

The closed space E2 is a space surrounded by the substrate 13a, the convection suppression plate 17, and the inverter housing 10. The closed space E2 is formed with an air layer as a heat insulating material, and functions as a closed heat insulating layer that suppresses heat conduction from the closed space E1. The convection suppression plate 17 is positioned by a positioning protrusion 17a attached to the inverter housing 10.

The closed space E3 is a space surrounded by the convection suppression plate 17, the convection suppression plate 18, and the inverter housing 10. The closed space E3 is formed with an air layer as a heat insulating material, and functions as a closed heat insulating layer that suppresses heat conduction from the closed space E2. The convection suppression plate 18 is positioned by a positioning protrusion 18a attached to the inverter housing 10.

The closed space E4 is a space surrounded by the convection suppression plate 18 and the inverter housing 10. The closed space E4 is the space most separated from the power semiconductor module 13, the closed space E1, and the cooler 11, and the inverter circuit module 16 is arranged. The inverter circuit module 16 has a substrate 16a. The substrate 16a and the substrate 13a are connected by wiring 14. The wiring 14 is connected through the convection suppression plates 17 and 18. The convection suppression plates 17 and 18 are provided with through holes through which the wiring 14 passes in advance, and the convection suppression plates 17 and 18 and the wiring 14 are adhered to each other at the time of assembly.

Here, the thicknesses d1 to d3 of the closed spaces E1 to E3 are equal to or less than the maximum convection suppression distance d at which convection does not occur in the closed spaces E1 to E3. When the power semiconductor module 13 which is a heat generation source is arranged in the inverter housing 10 on the lower side in the direction of gravity, the thermal resistance Rsa [m ² · K / W] of the air layer is thick as shown in FIG. It depends on d. The thermal resistance Rtha increases up to the point P where the thickness d is 10 mm as the thickness d increases, but when the thickness d exceeds the thickness d, it is saturated and does not increase. This is because when the thickness d exceeds 10 mm, the apparent heat conduction of air increases due to the generation of convection, and the thermal resistance Rtha does not increase. That is, when the thickness d is up to 10 mm, convection does not occur in the air layer, which means that the heat insulating performance is maintained high. Therefore, the thicknesses d1 to d3 of the enclosed spaces E1 to E3 have a maximum convection suppression distance d = 10 mm or less. The larger the thickness d1 to d3 of each of the closed spaces E1 to E3, the higher the heat insulating performance. Therefore, the thickness d1 to d3 is preferably 10 mm.

The substrate 13a and the convection suppression plates 17 and 18 have heat insulating performance. Since the convection inhibition plates 17 and 18 do not require strength, a bendable resin film that is easy to process is used. As this resin, engineering plastics having heat resistance and super engineering plastics are preferable.

Metal may be used for the convection inhibition plates 17 and 18. When aluminum is used as the convection inhibition plates 17 and 18, it is preferable that the surface is anodized to have a surface emissivity of 0.8 or more. Also, when other metals are used as the convection inhibition plates 17 and 18, it is preferable to perform surface treatment such as plating to set the surface emissivity to 0.8 or more. The surface emissivity of resin, wood, paper, etc. is 0.8 or more.

When the surface emissivity is 0.8 or more, the received heat is not transferred to the air layer, and the efficiency of dissipating heat by radiation becomes high. When the surface emissivity is 0.8 or more, heat is radiated to the inverter housing 10 and can be radiated directly from the inverter housing 10 to the outside. Therefore, it is preferable that the surface emissivity of the surface of the inverter housing 10 is 0.8 or more.

FIG. 3 is a diagram showing a temperature change in the closed space E with respect to a distance Z from the cooling surface 11a. In FIG. 3, the curve L1 shows the temperature change when the structure shown in FIG. 1 is provided, and the curve L2 shows the temperature change when the conventional structure does not have the closed spaces E1 to E3. The distances Z1 to Z3 correspond to the positions of the substrate 13a, the convection suppression plate 17, and the convection suppression plate 18, respectively. As shown in FIG. 3, the temperature in the vicinity of the cooling surface 11a is higher than the temperature T1 of the conventional structure in the present embodiment having the closed space E1 as the temperature T2. However, in the present embodiment, due to the heat insulating performance of the closed spaces E1 to E3, the temperature gradually drops toward the closed spaces E1 to E4, and finally the temperature in the closed space E4 becomes T2'. On the other hand, in the case of the conventional structure having no closed spaces E1 to E3, high temperature air is accumulated in the upper part in the Z direction due to the generation of convection, and the temperature inside the inverter housing 10 rises. The temperature at E4 is T1'. As described above, the temperature T2'of the present embodiment in the closed space E4 can be set to be lower than the temperature T1'of the conventional structure.

(Modification example 1)
FIG. 4 is a cross-sectional view of the inverter device of the first modification of the embodiment of the present invention. Also in FIG. 4, the gravitational direction is the −Z direction. In the above-described embodiment, the closed space E1 is formed by using the substrate 13a, but in the modified example 1, the insulating paper 21 is superposed on the space corresponding to the closed space E1. This modification 1 is effective when the power semiconductor module 13 does not have the substrate 13a, or when the substrate 13a does not extend to the inverter housing 10.

As shown in FIG. 4, the insulating paper 21 has a plurality of sealed heat insulating layers having a maximum convection suppression distance d or less formed in the space corresponding to the closed space E1. The insulating paper 21 is formed with holes that penetrate the power semiconductor module 13 arranged on the cooling surface 11a. If the material (insulating paper 21, convection suppression plates 17, 18) of the member forming the sealed heat insulating layer is formed with a foldable thickness and material, processing becomes easy.

It should be noted that a plurality of insulating papers 21 may not be provided, and only one insulating paper 21 corresponding to the substrate 13a may be provided. This is because the insulating paper 21, the cooling surface 11a, and the inverter housing 10 form a closed space E1 similar to that of the embodiment. In this case, the insulating paper 21 is adhered to the power semiconductor module 13 and the inverter housing 10.

(Modification 2)
FIG. 5 is a cross-sectional view of the inverter device of the second modification of the embodiment of the present invention. Also in FIG. 5, the gravitational direction is the −Z direction. In this modification 2, the sealed spaces E3 and E4 cover the power semiconductor module 13 and the cooling surface 11a. This configuration is suitable when the width of the inverter housing 10 is larger than that of the cooling surface 11a.

As shown in FIG. 5, a frame 10a corresponding to the width of the inverter housing 10 is attached around the cooling surface 11a of the inverter device 2. A packing 12 is provided between the inverter housing 10 and the frame 10a to seal the inverter housing 10. Further, a packing 22 is provided at the connecting portion between the cooling surface 11a and the frame 10a to be sealed. A lower surface case 23 is provided on the upper part of the packing 22. On the lower surface case 23, a convection suppression column 27a for forming the closed space E2 and a convection suppression column 28a for forming the closed space E3 are erected. Further, the upper end of the convection suppression column 27a is covered with the convection suppression plate 27. Further, the upper end of the convection suppression column 28a is covered with the convection suppression plate 28.

The closed space E1 is a space surrounded by the cooling surface 11a, the substrate 13a of the power semiconductor module 13, and a part of the lower part of the convection suppression column 27a. The closed space E2 is a space surrounded by the convection suppression plate 27, the substrate 13a, and a part of the upper part of the convection suppression column 27a. The closed space E3 is a space surrounded by a convective inhibition plate 28, a convective inhibition plate 27, a convective inhibition column 28a, and a convective inhibition column 27a, and has a U-shaped cross section with an open lower portion. Is. The closed space E4 is a space surrounded by an inverter housing 10, a convective inhibition plate 28, a convective inhibition column 28a, and a frame 10a, and has a U-shaped cross section with an open lower portion. ..

Here, the thicknesses d1 to d3 and d31 are equal to or less than the maximum convection suppression distance d. Therefore, since convection does not occur in the closed spaces E1 to E3, it has high heat insulating performance as in the embodiment.

The convection suppression column 28a is preferably provided on the outside of the cooling surface 11a. That is, it is preferable that the closed space E4 and the cooling surface 11a are not directly joined to each other.

Further, similarly to the first modification, the insulating paper 21 may be stacked in the sealed space E1, or the insulating paper 21 may be provided instead of the substrate 13a.

In the above-described embodiments, Modifications 1 and 2, each closed space E1 to E3 may be further divided. For example, the width direction and the height direction of the closed space E3 of the modification 2 may be divided.

Further, in the above-described embodiments, Modifications 1 and 2, the closed spaces E1 to E3, which are three closed heat insulating layers, are formed, but at least one closed space E1 is formed. Just do it. However, since the closed space E1 preferably covers the power semiconductor module 13, it is preferable to form the closed spaces E1 and E2. When the thickness of the power semiconductor module 13 is less than the maximum convective inhibition distance d, the closed space E1 may not be formed and the closed spaces E1 and E2 may be used as one closed space.

Further, the closed space E1 is preferably air having high heat insulating performance, but may be filled with a heat insulating material such as glass wool.

Further, the closed spaces E1 to E3 may be in a vacuum state. Since no convection occurs in a vacuum state, the heat insulating performance is improved. However, in consideration of deterioration in the vacuum state, it is preferable to set the thickness to be equal to or less than the above-mentioned maximum convection inhibition distance d.

Further, the installation direction of the inverter devices 1 and 2 is arbitrary. That is, the thickness direction of the closed spaces E1 to E3 may be the vertical direction or the horizontal direction. In either case, convection does not occur in the thickness direction, and as a result, convection does not occur in the closed spaces E1 to E3.

By the way, in recent years, wide bandgap semiconductors such as SiC power semiconductors have been attracting attention as next-generation devices. Wide bandgap semiconductors are made of silicon carbide, gallium nitride, diamond, etc., and have a higher potential for loss reduction than Si power semiconductors, which are reaching the limit of loss reduction, and can be used even at a junction temperature of 200 ° C or higher. There is. When a wide bandgap power semiconductor such as a SiC power semiconductor is applied, the size and weight of the inverter device can be dramatically reduced as compared with the case where the Si power semiconductor is used. Therefore, the power semiconductor element of the power semiconductor module 13 is preferably a wide bandgap power semiconductor element.

In the above-described embodiments and modifications 1 and 2, even when the power semiconductor module is used at a high temperature in the inverter device of the sealed housing to reduce the size of the cooler, the sealed space is a sealed heat insulating layer. E1 to E3 can suppress the temperature rise of the passive component such as the electrolytic capacitor, and as a result, the life of the passive component can be extended and the reliability of the passive component can be improved.

1, 2, Inverter device 10 Inverter housing 10a Frame 11 Cooler 11a Cooling surface 12, 22 Packing 13 Power semiconductor module 13a, 16a Board 14 Wiring 15 Electrolytic capacitor 16 Inverter circuit module 17, 18, 27, 28 Convective inhibition plate 17a, 18a Positioning protrusion 21 Insulating paper 23 Bottom case 27a, 28a Convective inhibition column d Maximum convective inhibition distance E, E1 to E4 Sealed space

Claims (2)

An inverter device in which an inverter circuit including the power semiconductor module and an inverter circuit module including passive components is sealed by a cooling surface of a cooler to which a power semiconductor module is joined and an inverter housing.
A closed heat insulating layer that is an air layer that is in direct contact with the cooling surface of the cooler and one or more closed heat insulating layers that are formed on the closed heat insulating layer and are not directly in contact with the cooling surface of the cooler are formed. A plurality of closed heat insulating layers are formed, and the thickness of each closed heat insulating layer is set to be equal to or less than the maximum convection suppression distance at which air convection does not occur.
An inverter device characterized in that the material of the member for partitioning the sealed heat insulating layer is insulating paper. An inverter device in which an inverter circuit including the power semiconductor module and an inverter circuit module including passive components is sealed by a cooling surface of a cooler to which a power semiconductor module is joined and an inverter housing.
A closed heat insulating layer that is an air layer that is in direct contact with the cooling surface of the cooler and one or more closed heat insulating layers that are formed on the closed heat insulating layer and are not directly in contact with the cooling surface of the cooler are formed. A plurality of closed heat insulating layers are formed, and the thickness of each closed heat insulating layer is set to be equal to or less than the maximum convection suppression distance at which air convection does not occur.
The inverter housing has a frame that has the same surface as the cooling surface of the cooler and is connected to the peripheral edge of the cooler.
The packing and the lower surface frame are sequentially arranged so as to straddle the cooler and the frame toward the inside of the inverter housing.
An inverter device characterized in that the sealed heat insulating layer is formed so as to cover the power semiconductor module via the packing and the lower surface frame.

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