JP6790477B2 - Semiconductor device test equipment and semiconductor device test method - Google Patents

Description

The present invention relates to a semi-conductor element testing apparatus and a semiconductor device testing method that is used in the dynamic characteristic test of the semiconductor device (chip).

A semiconductor device test apparatus for testing the dynamic characteristics of a semiconductor device is known, and generally includes a test circuit, a contact block, a contact pin, and a test table (see, for example, Patent Document 1). The contact block is a component used as a means for electrically connecting the test circuit and the semiconductor element on the test table, and has a set plate and a base unit. The set plate is located above the test table on which the semiconductor element is placed and holds a plurality of contact pins as contact probes that come into contact with the semiconductor element. The base unit holds a plurality of plunger pins that are connected to the wiring connected to the test circuit on the one hand and are contacted with the contact pins loaded on the other hand.

The semiconductor element has a gate pad, an emitter pad, and a collector pad in the case of a chip of a power device such as an IGBT (Insulated Gate Bipolar Transistor). When conducting a test, contact pins are brought into contact with the gate pad and emitter pad of the semiconductor element, and electrodes of a test circuit provided on a test table are brought into contact with the collector pad. When the semiconductor element is a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor), the contact pin is brought into contact with the gate pad and the source pad, and the electrode of the test table is brought into contact with the drain pad. Further, when the semiconductor element is an FWD (Free Wheeling Diode), the contact pin is brought into contact with the cathode pad, and the electrode of the test table is brought into contact with the anode pad.

Here, the contact pin is used as the contact probe because the melt of the semiconductor element (silicon or the like) adheres to the tip of the probe when the semiconductor element is broken, so that the probe needs to be replaced. Therefore, the set plate that holds the contact pin is detachably provided on the base unit. When the contact pin needs to be replaced, the set plate is removed from the base unit, the defective contact pin is replaced with a good contact pin, and the contact pin is reattached to the base unit.

In the semiconductor element test apparatus, when a test is performed, the semiconductor element is first arranged at a predetermined position on the test table, and the contact pin is brought into contact with the semiconductor element by lowering the contact block to an arbitrary position by the vertical movement mechanism. To. At this time, the contact pin applies a load to the semiconductor element according to the spring characteristics of the spring included in the plunger pin. The gate and emitter (source, cathode) pads of the semiconductor device are electrically connected to the test circuit through the contact pins, plunger pins and wiring, and the collector (drain, anode) pads are electrically connected to the test circuit through the electrodes and wiring of the test table. A specific characteristic test is performed.

At this time, in order to apply a uniform current and voltage to the semiconductor element, it is necessary that dozens of contact pins are evenly arranged on the semiconductor element. The number of contact pins arranged on the semiconductor element is increased or decreased according to the test current. The contact area of the contact probe with the semiconductor element is (πR ^ 2) as a whole because the cross-sectional area per one is (πR ^ 2) when the radius of the contact surface between the columnar contact pin and the semiconductor element is R. , (ΠR ^ 2) × Determined by the number.

Here, in semiconductor elements, cell integration and performance improvement (current rating increase) are accelerating in recent years, and the chip size tends to be smaller. Further, even if the chip size is small, the semiconductor element is required to be in contact with a low resistance and to be tested to pass a larger current. Therefore, the semiconductor device test apparatus is required to improve the energization performance of the contact probe. There are two methods to improve this energization performance, one is to select a material that reduces the contact resistance between the contact pin and the semiconductor element, and the other is the contact area between the contact pin and the semiconductor element. Is to increase.

So far, low resistance materials such as tungsten alloys, copper alloys, silver alloys, palladium alloys, gold alloys, and iridium alloys have been used as the materials for contact pins. Further, the contact area with the semiconductor element has been increased by narrowing the pitch between the contact pins and arranging a large number of contact pins.

As another method for increasing the contact area with the semiconductor element, it has been proposed to use a conductive resin as the contact probe, which is brought into contact with the emitter (source) pad of the semiconductor element by surface contact (see, for example, Patent Document 2). ). By forming the conductive resin in the size of the emitter (source) pad of the semiconductor element, the contact area can be significantly increased.

Japanese Unexamined Patent Publication No. 2012-068076 JP-A-2009-128189

However, the structure in which the emitter (source) pad of the semiconductor element and the conductive resin are brought into face-to-face contact with each other can increase the contact area, but the emitter (source) of the semiconductor element has a surface on which the conductive resin is not flat. It becomes difficult to apply a uniform load to the pad. Therefore, there is a problem that the contact resistance becomes non-uniform on the entire surface of the emitter (source) pad of the semiconductor element, the current is concentrated in the region where the contact resistance is low, and heat is generated locally, resulting in destruction of the semiconductor element. It was.

The present invention has been made in view of the above circumstances, and an object thereof is to provide a semi-conductor element testing apparatus and a semiconductor device testing how to achieve a low resistance contact with the pads of the semiconductor element.

In order to solve the above problems , the present invention has a test table on which a semiconductor element is placed and a plurality of devices that are brought into contact with a main electrode of the semiconductor element placed on the test table during the test of the semiconductor element. A plurality of plunger pins having the same pressing force as the contact probe, contacting the contact probe during the test of the semiconductor element , and pressing the contact probe toward the main electrode of the semiconductor element, and the semiconductor element. When the semiconductor element is not tested, the contact probe is lifted and held at a position away from the main electrode of the semiconductor element, and when the semiconductor element is tested, the contact probe is placed at a predetermined position of the main electrode of the semiconductor element by its own weight. The plunger pin is held at the same height apart from the contact probe when the semiconductor element is not tested, and the plunger pin is attached to the main electrode of the semiconductor element when the semiconductor element is tested. Provided is a semiconductor device test apparatus including a base unit that contacts and presses the mounted contact probe. The contact probe in this semiconductor device test device is in contact with the main electrode of the semiconductor element on a side opposite to the first contact surface to which the plurality of plunger pins are in contact and the first contact surface. The main body of the prism having the contact surface and the corresponding one of the plurality of plunger pins are first when the plurality of the plunger pins are projected from the center of the first contact surface and move toward the direction to be inspected. and a projecting portion that will be pressed in contact with.

The present invention further provides a semiconductor device test method for evaluating the electrical characteristics of a semiconductor device. The semiconductor device testing method, a Turkey emission tact probe having a collision detecting section in the center of the contact surface of the prismatic body on the side where a plurality of armature bolt comes into contact, is placed by its own weight to the main electrode of the semiconductor element , one corresponding to the protruding portion of the plurality of the plunger pin, said abutted on the protruding portion of the contact probe holds the parallelism between the main electrodes of said semiconductor element and said contact probe, before Symbol by a contact probe is brought into contact with the rest of the plunger pin in the first contact surface around the projecting portion while increasing the load of the contact to the protruding portion by the plunger pin, it has a step, the plunger pin Has a spring having the same load, and the difference between the load applied to the protruding portion and the load applied to the first contact surface around the protruding portion is the amount of protrusion of the protruding portion from the first contact surface. It is set.

Semiconductors element testing apparatus and a semiconductor device testing method of the above configuration, to provide different load a contact probe in the center and the periphery of the top, a low resistance contact while maintaining the parallelism with respect to the pad with a tilt of the semiconductor element It has the advantage of being feasible.

It is a figure which shows the structural example of the semiconductor element test apparatus which concerns on 1st Embodiment. It is an external perspective view which shows the contact probe. It is a top view which shows the arrangement relation of a semiconductor, a contact probe, and a plunger pin. It is explanatory drawing of the contact area of a contact probe, (A) shows the contact area in the case of a columnar contact probe, and (B) shows the contact area in the case of a pin-shaped contact probe. It is a figure explaining the outline of the procedure of contacting a plunger pin with a contact probe after contacting a contact probe with a semiconductor element. In the operation explanatory view of the semiconductor element test apparatus, (A) shows a standby state before the initial contact, (B) shows a contact state with a semiconductor element, and (C) shows a contact state with a protruding portion. , (D) indicate a complete contact state. It is a figure which shows the relationship between the pushing amount of a plunger pin and a load. It is a figure explaining the balance of the load applied to a contact probe. It is a figure which shows another embodiment of a contact probe. It is a figure which shows the structural example of the semiconductor element test apparatus which concerns on 2nd Embodiment. It is a top view which shows the arrangement relation of a semiconductor, a contact probe, and a plunger pin.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. First, the overall configuration of the semiconductor device test apparatus of the embodiment used for the dynamic characteristic test of the semiconductor device (chip) will be described.

FIG. 1 is a diagram showing a configuration example of the semiconductor device test apparatus according to the first embodiment, and FIG. 2 is an external perspective view showing a contact probe.
The semiconductor element test apparatus includes a test table 11 on which the semiconductor element 1 is placed in a chip state, contact probes 12 and 13 that are in electrical contact with the semiconductor element 1, and contacts that hold the contact probes 12 and 13. It includes a block 14 and a test circuit 15. Here, the semiconductor element 1 of the test object is an IGBT as an example. In the case of the IGBT, the semiconductor element 1 is placed on the test table 11 with the side with the gate pad 1a as the control electrode and the emitter pad 1b as the main electrode facing up and the side with the collector pad facing down. Become.

The contact block 14 includes a set plate 16 and a base unit 17. The set plate 16 is provided with probe holding holes 16a and 16b corresponding to positions where the contact probes 12 and 13 are arranged in the semiconductor element 1, and the contact probes 12 and 13 are bored in the probe holding holes 16a and 16b, respectively. Is inserted. The base unit 17 holds a plunger pin 18 that contacts and presses the contact probes 12 and 13. The plunger pin 18 has a spring that applies a predetermined load to the contact probes 12 and 13.

The set plate 16 is detachably provided on the base unit 17, and when the contact probes 12 and 13 need to be replaced, the set plate 16 is removed from the base unit 17 and the defective contact probes 12 and 13 are replaced with good ones. Replace with. Further, the set plate 16 lifts the contact probes 12 and 13 from the semiconductor element 1 and holds them apart from the plunger pin 18 when the semiconductor element 1 is not tested. At the time of testing the semiconductor element 1, first, the set plate 16 is lowered and the contact probes 12 and 13 are lowered onto the semiconductor element 1 and placed on the semiconductor element 1 by its own weight. After that, when the set plate 16 is further lowered, the contact probes 12 and 13 are lowered and come into contact with the plunger pin 18. Then, the plunger pin 18 applies a load to the contact probes 12 and 13 in response to the further lowering of the set plate 16 and presses the contact probes 12 and 13 against the semiconductor element 1.

The plunger pin 18 is connected to the test circuit 15 by wirings 19a and 19b. In the test table 11, one end has a wiring 19c connected to the lower surface of the semiconductor element 1, and the other end of the wiring 19c is connected to the test circuit 15.

Here, the contact probe 12 that comes into contact with the emitter pad 1b of the semiconductor element 1 has a prismatic main body 12a as shown in FIG. The upper end surface of the main body 12a constitutes a first contact surface 12b to which the plunger pin 18 is contacted, and the lower end surface constitutes a second contact surface 12c which is surface-contacted with the emitter pad 1b of the semiconductor element 1. The contact probe 12 also has a protruding portion 12d projecting near the center of the first contact surface 12b, and the plunger pin 18 is brought into contact with the upper surface of the protruding portion 12d. The contact probe 12 further has a flange portion 12e on the peripheral edge portion on the side where the first contact surface 12b is located. The flange portion 12e is locked in the probe holding hole 16a when the contact probe 12 is loosely fitted into the probe holding hole 16a formed through the set plate 16 to prevent the contact probe 12 from falling off from the set plate 16. To do. The contact probe 12 is further chamfered on the side of the second contact surface 12c, and the corner portion is cut off at an angle of 45 degrees.

FIG. 3 is a plan view showing the arrangement relationship between the semiconductor, the contact probe, and the plunger pin, FIG. 4 is an explanatory view of the contact area of the contact probe, (A) is a columnar contact probe, and (B) is a pin shape. The contact area in the case of the contact probe of is shown.

During the test of the semiconductor element 1, a number of contact probes 12 corresponding to the chip size are brought into contact with the emitter pad 1b. In the example shown in FIG. 3, five contact probes 12 are in contact with the emitter pad 1b. Each contact probe 12 is in contact with five plunger pins 18. Among them, one plunger pin 18 is in contact with the protruding portion 12d of the contact probe 12, and four plunger pins 18 are in contact with the first contact surface 12b of the contact probe 12 so as to surround the protruding portion 12d.

The contact area between the contact probe 12 and the emitter pad 1b of the semiconductor element 1 is equal to the area of the second contact surface 12c of the contact probe 12 as shown in FIG. 4A. That is, when the diameter (2R) of the contact probe 13 shown in FIG. 4B is four times (8R) as the horizontal (a) and vertical (b) dimensions of the second contact surface 12c, the second contact surface The contact area of 12c is 64R ^ 2. On the other hand, when five pin-shaped contact probes 13 are used, the contact area for the five is 5πR ^ 2 (πR ^ 2 × 5).

Here, the contact area differs by about 4 (= 64 ^ 2 / 5πR ^ 2) times between the case where five pin-shaped contact probes 13 are used and the case where one block-shaped contact probe 12 is used. That is, by changing the five pin-shaped contact probes 13 to one block-shaped contact probe 12, the contact area of the probe in contact with the emitter pad 1b of the semiconductor element 1 is quadrupled, and the resistance is lower. Contact can be achieved. In this way, by making surface contact with the emitter pad 1b of the semiconductor element 1 by utilizing the dead space of the pin-to-pin pitch due to the point contact of the existing pin-shaped contact probe 13, in some cases, the contact area is multiplied by several hundred times. It is possible to make it as large as possible.

Next, a procedure for performing a dynamic characteristic test of a semiconductor element (chip) using the above semiconductor element test apparatus will be described.
FIG. 5 is a diagram illustrating an outline of a procedure in which the contact probe is brought into contact with the semiconductor element and then the plunger pin is brought into contact with the contact probe. 6A and 6B are operational explanatory views of a semiconductor device test apparatus, in which FIG. 6A shows a standby state before initial contact, FIG. 6B shows a contact state with a semiconductor element, and FIG. 6C shows contact with a protruding portion. The state is shown, and (D) shows the perfect contact state. As the contact probe 12, the peripheral edge on the side with the second contact surface 12c is chamfered at an angle of 45 degrees in FIG. 5, and the peripheral edge on the side with the second contact surface 12c is used in FIG. The part chamfered into a curved shape (R shape) is used.

As shown in the upper part of FIG. 5, the set plate 16 has a recessed portion for holding the contact probe 12, and the block-shaped contact probe 12 held in the recessed portion is different from the plunger pin 18. Separated and in non-contact state. The set plate 16 also has a protruding portion for holding the contact probe 13, and the pin-shaped contact probe 13 held by the protruding portion is substantially in contact with the plunger pin 18. In this way, the set plate 16 is fixed to the base unit 17 in a state where the block-shaped contact probe 12 and the plunger pin 18 are not in contact with each other and the pin-shaped contact probe 13 is substantially in contact with the plunger pin 18, and the base unit 17 is formed. Works with.

When the contact block 14 of the semiconductor element test apparatus is lowered, the second contact surface 12c of the block-shaped contact probe 12 is placed on the emitter pad 1b of the semiconductor element 1, and the pin-shaped contact probe 13 is placed on the semiconductor element. It is placed on the gate pad 1a of 1.

When the set plate 16 is further lowered, as shown in the lower part of FIG. 5, the block-shaped contact probe 12 is left on the emitter pad 1b of the semiconductor element 1, and the pin-shaped contact probe 13 is placed on the semiconductor element 1. Leave it on the gate pad 1a. At this time, the pin-shaped contact probe 13 is loaded by the corresponding plunger pin 18 according to the descent of the contact block 14.

When the set plate 16 is further lowered, the tip of the corresponding plunger pin 18 comes into contact with the protruding portion 12d of the contact probe 12. Next, when the set plate 16 is further lowered, the tips of the four plunger pins 18 corresponding to the first contact surface 12b of the contact probe 12 come into contact with the first contact surface 12b. Then, when the set plate 16 is further lowered and stopped, the plunger pin 18 abutting on the protruding portion 12d and the first contact surface 12b of the contact probe 12 is brought into contact with the protruding portion 12d and the first contact surface of the contact probe 12. A predetermined load is applied to 12b.

In this way, the set plate 16 places the block-shaped contact probe 12 on the semiconductor element in a free state, and then the plunger pin 18 presses the protruding portion 12d of the contact probe 12 and the first contact surface 12b in this order. It is configured.

Next, the operation of the semiconductor device test apparatus will be described in detail. Since the pin-shaped contact probe 13 has the same configuration as the existing one, illustration and description thereof will be omitted here.

First, as shown in FIG. 6A, in the initial state at the start of the test, the main body 12a of the contact probe 12 is loosely fitted into the probe holding hole 16a of the set plate 16, and the flange portion 12e is the probe holding hole 16a. It is locked around. At this time, since the contact probe 12 is not in contact with any plunger pin 18, it is in a state of being lifted by the set plate 16 in a free state.

Next, when the set plate 16 is lowered, the contact probe 12 is first placed on the emitter pad 1b, which is the main electrode of the semiconductor element 1. When the set plate 16 is further lowered, as shown in FIG. 6 (B), the set plate 16 separates from the contact probe 12, and the contact probe 12 becomes self-supporting due to its own weight. That is, the contact probe 12 is placed in a state where its second contact surface 12c is parallel to the surface of the emitter pad 1b of the semiconductor element 1.

When the set plate 16 is further lowered, as shown in FIG. 6C, one of the plunger pins 18 eventually comes into contact with the protruding portion 12d of the contact probe 12, and the contact probe 12 is brought into contact with the emitter pad of the semiconductor element 1. It comes to be pressed against 1b. As a result, the contact probe 12 is pressed against the emitter pad 1b of the semiconductor element 1 without tilting while its second contact surface 12c remains parallel to the surface of the emitter pad 1b of the semiconductor element 1. In this way, the entire surface of the second contact surface 12c of the contact probe 12 is uniformly contacted with the emitter pad 1b of the semiconductor element 1, so that a large contact area can be obtained and the contact resistance becomes uniform, so that a local current can be obtained. It is possible to avoid causing destruction of the semiconductor element due to concentration and heat generation. Further, since the contact probe 12 does not push in a tilted state with respect to the emitter pad 1b of the semiconductor element 1, a deep probe mark may be formed on the surface of the emitter pad 1b or the quality may be impaired. It will be reduced.

When the set plate 16 is further lowered, the remaining plunger pins 18 come into contact with the first contact surface 12b of the contact probe 12, as shown in FIG. 6D. In the contact probe 12, the first contact surface 12b around the protruding portion 12d is the semiconductor element by the remaining plunger pin 18 in a state where the protruding portion 12d in the upper center is pushed vertically with respect to the emitter pad 1b of the semiconductor element 1. It is pressed against the emitter pad 1b of 1. At this time, the plunger pin 18 for urging the protruding portion 12d springs by the amount of protrusion (height) of the protruding portion 12d from the first contact surface 12b as compared with the plunger pin 18 for urging the periphery of the protruding portion 12d. Is shrunk more. Therefore, the contact probe 12 is subjected to a load stronger than that of the first contact surface 12b around the protruding portion 12d by a load corresponding to the protruding amount of the protruding portion 12d. As a result, the plunger pin 18 and the contact probe 12 are in complete contact with each other, and the semiconductor device test apparatus is in a state where the test circuit 15 can be used for testing. In this way, the contact probe 12 is suitable for a large current test because the second contact surface 12c and the emitter pad 1b of the semiconductor element 1 are parallel to each other, so that the contact area increases and the contact resistance becomes low. Become.

When the dynamic characteristic test of the semiconductor element 1 is completed, the operation of the semiconductor element test apparatus reverses the above process. That is, when the set plate 16 is raised from the testable state shown in FIG. 6D, the plunger pin 18 that has been in contact with the first contact surface 12b around the protrusion 12d first comes into contact with the first contact surface. Apart from 12b, it becomes the state shown in FIG. 6 (C). Further, when the set plate 16 is raised, the plunger pin 18 that has been in contact with the protruding portion 12d is separated from the protruding portion 12d, and is in the state shown in FIG. 6B. Then, when the set plate 16 is further raised, the set plate 16 lifts the contact probe 12 and returns to the standby state shown in FIG. 6 (A).

Next, the spring characteristics of the spring of the plunger pin 18 and the load applied to the contact probe 12 when urged by the plunger pin 18 will be described.
FIG. 7 is a diagram showing the relationship between the pushing amount of the plunger pin and the load, and FIG. 8 is a diagram for explaining the balance of the load applied to the contact probe. In FIG. 7, the horizontal axis represents the pushing amount of the plunger pin 18, and the vertical axis represents the load applied to the contact probe 12.

As shown in FIG. 7, the plunger pin 18 has a proportional relationship between the pushing amount with respect to the contact probe 12 and the load received by the contact probe 12, and the value of the load is determined by the spring constant of the plunger pin 18. Be done.

Here, the central plunger pin 18 that pushes the protruding portion 12d of the contact probe 12 has a larger pushing amount by the protruding amount of the protruding portion 12d than the peripheral plunger pin 18 that pushes the first contact surface 12b around the protruding portion 12d. Therefore, the load becomes high. Therefore, at the time of testing the semiconductor device test apparatus, the central plunger pin 18 pushes the contact probe 12 with a high load, and the peripheral plunger pins 18 push the contact probe 12 with a low load. This difference in load is realized by providing a protruding portion 12d near the center of the contact probe 12 and changing the pushing amount while keeping all the spring characteristics of the plunger pin 18 the same.

In this way, by first pressing the center of the upper part of the contact probe 12 and then pressing the periphery while increasing the load at the center, the contact probe 12 is the inclined emitter pad 1b of the semiconductor element 1. It is placed on the surface of the surface with a large contact area. That is, as shown in FIG. 8, when the surface of the emitter pad 1b of the semiconductor element 1 is inclined, the contact probe 12 is placed on the surface of the emitter pad 1b of the semiconductor element 1 by its own weight, which is inevitable. Therefore, it is erected in the vertical direction with respect to the surface of the emitter pad 1b.

Next, since the contact probe 12 is pushed by one central plunger pin 18 while being placed on the surface of the emitter pad 1b, the second contact surface 12c is kept parallel to the surface of the emitter pad 1b. In this state, the surface of the emitter pad 1b is pressed evenly. After that, the contact probe 12 is controlled so that the load of the central plunger pin 18 is high and the load of the peripheral plunger pins 18 is slightly lower than the load of the central plunger pin 18, so that the emitter pad 1b The posture is maintained according to the surface. By changing the load characteristics of the plunger pin 18, the pressing of the contact probe 12 into the surface of the emitter pad 1b of the semiconductor element 1 is not biased, and deep probe marks are not formed on the surface of the emitter pad 1b. Further, the formation of probe marks can also be suppressed by forming the peripheral edge portion of the contact probe 12 on the side with the second contact surface 12c into an R shape.

As described above, since the contact probe 12 does not push the surface of the emitter pad 1b to one side, the contact area increases and the contact resistance becomes low. However, in the following, the contact area with the electrode is further increased to reduce the contact resistance. The contact probe 12 will be described.

FIG. 9 is a diagram showing another embodiment of the contact probe.
The contact probe 12 has a comb shape with a plurality of grooves 12f formed on the second contact surface 12c. The groove 12f can be, for example, a V-groove formed in a grid pattern. As a result, when the emitter pad 1b of the semiconductor element 1 is made of a soft metal such as aluminum, when the contact probe 12 is pushed in, the repelled metal can escape into the space of the groove 12f. it can. As a result, the contact area between the contact probe 12 and the emitter pad 1b is increased to further reduce the contact resistance, and the contact probe 12 suitable for a higher current test can be realized.

The contact probe 12 appropriately adjusts the contact area between the contact probe 12 and the emitter pad 1b by changing the pitch and depth of the grooves 12f according to the hardness of the metal formed on the emitter pad 1b of the semiconductor element 1. Can be increased or decreased.

FIG. 10 is a diagram showing a configuration example of the semiconductor device test apparatus according to the second embodiment, and FIG. 11 is a plan view showing the arrangement relationship between the semiconductor, the contact probe, and the plunger pin. In FIGS. 10 and 11, the same or equivalent components as those shown in FIGS. 1 and 3 are designated by the same reference numerals, and detailed description thereof will be omitted.

In the semiconductor device test apparatus according to the second embodiment, a contact probe 20 having a flat first contact surface 12b to which the plunger pin 18 is contacted is used. Also in this contact probe 20, the area where the second contact surface 12b comes into surface contact with the emitter pad 1b is the same as the contact probe 12 used by the semiconductor device test apparatus according to the first embodiment. Therefore, even in the semiconductor device test apparatus according to the second embodiment, it is possible to increase the contact area between the contact probe 20 and the emitter pad 1b and reduce the current density. In the second embodiment, when the set plate 16 is attached to the base unit 17, the contact probe 20 held by the set plate 16 is brought into contact with the plunger pin held by the base unit 17. You may be.

At the time of testing the semiconductor element 1, in the example shown in FIG. 11, five contact probes 20 are in contact with the emitter pad 1b. Further, each contact probe 20 is in contact with the first contact surface 12b by five plunger pins 18. The number of contact probes 20 mounted on the emitter pad 1b of the semiconductor element 1 is determined according to the sizes of the contact probe 20 and the chip. The number of plunger pins 18 that come into contact with the contact probe 20 is determined according to the size of the first contact surface 12b and the installation interval of the plunger pins 18 held by the base unit 17.

1 Semiconductor element 1a Gate pad 1b Emitter pad 11 Test table 12 Contact probe 12a Main body 12b First contact surface 12c Second contact surface 12d Protruding part 12e Flange part 12f Groove 13 Contact probe 14 Contact block 15 Test circuit 16 Set plate 16a, 16b Probe holding hole 17 Base unit 18 Plunger pins 19a, 19b, 19c Wiring 20 Contact probe

Claims (5)

A test table on which semiconductor elements are placed and
A plurality of contact probes that come into contact with the main electrodes of the semiconductor element placed on the test table during the test of the semiconductor element, and
A plurality of plunger pins each having the same pressing force, which is in contact with the contact probe during the test of the semiconductor element and presses the contact probe toward the main electrode of the semiconductor element.
When the semiconductor element is not tested, the contact probe is lifted and held at a position away from the main electrode of the semiconductor element, and when the semiconductor element is tested, the contact probe is placed at a predetermined position of the main electrode of the semiconductor element by its own weight. With the set plate to be placed in
When the semiconductor element was not tested, the plunger pin was held at the same height apart from the contact probe, and when the semiconductor element was tested, the plunger pin was placed on the main electrode of the semiconductor element. A base unit that contacts and presses the contact probe,
With
The contact probe is a prism having a first contact surface with which the plurality of plunger pins are in contact and a second contact surface with a second contact surface in contact with the main electrode of the semiconductor element on a side opposite to the first contact surface. Protruding from the main body and the center of the first contact surface, when the plurality of plunger pins move toward the inspection target, the corresponding one of the plurality of plunger pins is first contacted and pressed. A semiconductor device test apparatus having a protruding portion. The set plate has a through hole into which the contact probe is loosely fitted.
The contact probe has a flange portion on a peripheral edge portion on a side having the first contact surface to prevent the contact probe from falling off from the through hole.
The semiconductor device test apparatus according to claim 1 . The contact probe, said groove for increasing the contact area between the main electrodes of the semiconductor element to the second contact surface is formed, the semiconductor device testing apparatus according to claim 1. The set plate, the attached detachably to liftable the base unit to the test table, the semiconductor device testing apparatus according to claim 1. In a semiconductor device test method for evaluating the electrical characteristics of a semiconductor device,
The benzalkonium emissions tact probe having a collision detecting section in the center of the contact surface of the body of the prism on the side where a plurality of armature bolt comes into contact, is placed by its own weight to the main electrode of said semiconductor element,
One corresponding to the protruding portion of the plurality of the plunger pin, said abutted on the protruding portion of the contact probe holds the parallelism between the main electrodes of said semiconductor element and said contact probe,
In front SL contact probe is brought into contact with the rest of the plunger pin in the first contact surface around the projecting portion while increasing the load of the contact to the protruding portion by the plunger pin,
Step have a,
The plunger pin has a spring having the same load, and the difference between the load applied to the protrusion and the load applied to the first contact surface around the protrusion is determined from the first contact surface of the protrusion. A semiconductor device test method set by the amount of protrusion .

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