JP6710204B2 - プラズマ損傷保護のための多層誘電体スタック - Google Patents
プラズマ損傷保護のための多層誘電体スタック Download PDFInfo
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- JP6710204B2 JP6710204B2 JP2017520346A JP2017520346A JP6710204B2 JP 6710204 B2 JP6710204 B2 JP 6710204B2 JP 2017520346 A JP2017520346 A JP 2017520346A JP 2017520346 A JP2017520346 A JP 2017520346A JP 6710204 B2 JP6710204 B2 JP 6710204B2
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/5329—Insulating materials
- H01L23/53295—Stacked insulating layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/022—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02203—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being porous
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
- H01L21/02345—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to radiation, e.g. visible light
- H01L21/02348—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to radiation, e.g. visible light treatment by exposure to UV light
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
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- H01L21/7682—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing the dielectric comprising air gaps
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- H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
- H01L21/76825—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. by exposing the layer to particle radiation, e.g. ion implantation, irradiation with UV light or electrons etc.
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
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- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H01L21/76832—Multiple layers
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76835—Combinations of two or more different dielectric layers having a low dielectric constant
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
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- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H01L21/76834—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers formation of thin insulating films on the sidewalls or on top of conductors
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
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- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
- H01L21/76849—Barrier, adhesion or liner layers formed in openings in a dielectric the layer being positioned on top of the main fill metal
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- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
- H01L21/76883—Post-treatment or after-treatment of the conductive material
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- H01L2221/1005—Formation and after-treatment of dielectrics
- H01L2221/1042—Formation and after-treatment of dielectrics the dielectric comprising air gaps
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Description
Claims (12)
- 多層誘電体スタックを堆積させる方法であって、
第1の厚さを有する第1の層を基板上に堆積させることであって、前記第1の層は、RF電力の存在下で1種以上の有機ケイ素化合物及び1種以上のポロジェンを供給することによって形成され、且つプラズマチャンバの処理領域で形成される、堆積させることと、
前記第1の層の直上に、前記第1の厚さよりも薄い第2の厚さを有する第2の層を堆積させることであって、前記第2の層は、前記処理領域でRF電力の存在下で1種以上の有機ケイ素化合物及び1種以上のポロジェンを供給することによって形成される、堆積させることと、
前記第2の層を紫外線照射に曝露することであって、それにより、前記ポロジェンが前記第1の層と前記第2の層との両方から除去され、多孔性架橋多層誘電体スタックが生成される、曝露することと、
プラズマプロセスを使用して前記多層誘電体スタック上に金属層を堆積させることであって、前記第2の層が前記プラズマプロセス中に前記第1の層を損傷から保護する、堆積させることと、
を含む方法。 - 前記第2の厚さに対する前記第1の厚さの比が、4:1又はそれより大きい、請求項1に記載の方法。
- 前記第2の層の多孔度が、前記第1の層の多孔度よりも小さい、請求項1または2に記載の方法。
- 前記第2の層が、前記第1の層よりも高弾性率かつ高硬度である、請求項1から3のいずれか1項に記載の方法。
- 前記第2の層の堆積中におけるRF電力、及び有機ケイ素化合物とポロジェンとを供給する流量を、それぞれ、前記第1の層の堆積中におけるRF電力、及び有機ケイ素化合物とポロジェンとを供給する流量よりも低くすることをさらに含む、請求項1から4のいずれか1項に記載の方法。
- 多層誘電体スタックを堆積させる方法であって、
550Å〜3000Åの第1の厚さを有する第1の層を基板上に堆積させることであって、前記第1の層は、RF電力の存在下で1種以上の有機ケイ素化合物及び1種以上のポロジェンを供給することによって形成され、且つプラズマチャンバの処理領域で形成される、堆積させることと、
前記第1の層の直上に、50Å〜500Åの厚さを有する第2の層を堆積させることであって、前記第2の層は、前記処理領域でRF電力の存在下で1種以上の有機ケイ素化合物及び1種以上のポロジェンを供給することによって形成される、堆積させることと、
前記第2の層を紫外線照射に曝露することであって、それにより、前記ポロジェンが前記第1の層と前記第2の層との両方から除去され、多孔性架橋多層誘電体スタックが生成される、曝露することと、
プラズマプロセスを使用して前記多層誘電体スタック上に金属層を堆積させることであって、前記第2の層が前記プラズマプロセス中に前記第1の層を損傷から保護する、堆積させることと、
を含む方法。 - 前記第2の層の多孔度が、前記第1の層の多孔度よりも小さい、請求項6に記載の方法。
- 前記第2の層が、前記第1の層よりも高弾性率かつ高硬度である、請求項6または7に記載の方法。
- 前記第2の層の堆積中におけるRF電力、及び有機ケイ素化合物とポロジェンとを供給する流量を、それぞれ、前記第1の層の堆積中におけるRF電力、及び有機ケイ素化合物とポロジェンとを供給する流量よりも低くすることをさらに含む、請求項6から8のいずれか1項に記載の方法。
- 前記第2の層の多孔度が、前記紫外線照射への曝露後に5%〜12%である、請求項6から9のいずれか1項に記載の方法。
- 前記第1の層の多孔度に対する前記第2の層の多孔度の比が、0.4から0.5である、請求項6から10のいずれか1項に記載の方法。
- 前記第2の層が、前記第1の層よりも高い誘電率を有する、請求項6から11のいずれか1項に記載の方法。
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US201462064396P | 2014-10-15 | 2014-10-15 | |
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PCT/US2015/048956 WO2016060753A1 (en) | 2014-10-15 | 2015-09-08 | Multi-layer dielectric stack for plasma damage protection |
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KR20200015279A (ko) | 2018-08-03 | 2020-02-12 | 삼성전자주식회사 | 나노결정질 그래핀의 형성방법 및 이를 포함하는 소자 |
JP2022509636A (ja) * | 2018-11-30 | 2022-01-21 | アプライド マテリアルズ インコーポレイテッド | 3d nand用途のための膜積層体オーバーレイの改善 |
KR20200086582A (ko) | 2019-01-09 | 2020-07-17 | 삼성전자주식회사 | 원자층 증착 장치 및 이를 이용한 박막 형성 방법 |
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US7022864B2 (en) * | 2003-07-15 | 2006-04-04 | Advanced Technology Materials, Inc. | Ethyleneoxide-silane and bridged silane precursors for forming low k films |
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US20130171819A1 (en) * | 2011-12-28 | 2013-07-04 | Toshiba America Electronic Components, Inc. | Methods for integration of metal/dielectric interconnects |
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