JP6704387B2 - Substrate for growing nitride semiconductor, method of manufacturing the same, semiconductor device, and method of manufacturing the same - Google Patents

Description

The present invention relates to a nitride semiconductor growth substrate, a method for manufacturing the same, a semiconductor device, and a method for manufacturing the same.

Crystals of group III nitride semiconductors typified by GaN are widely applied to optical devices such as light emitting diodes and lasers, or high frequency devices such as diodes and transistors, and are expected to be applied to power devices in the future. ..

Most of these devices are manufactured on a GaN c-plane growth substrate, but a surface not intentionally formed on the c-plane is intentionally formed on a part of the GaN c-plane growth substrate in order to improve device characteristics. Attempts have been made to make devices by utilizing this.

For example, the following Patent Document 1 discloses a field effect transistor formed by utilizing an inclined surface (non-polar surface) of a GaN c-plane growth substrate and capable of eliminating an adverse effect due to a piezoelectric field. ..

Further, in Non-Patent Document 1 below, an inclined surface (non-c-plane) formed on a c-plane growth substrate of GaN
There has been reported an example of developing a light emitting diode capable of emitting multicolor light with high efficiency by utilizing.

Further, the following Non-Patent Document 2 reports the results of a study in which a GaN crystal having an inclined surface is grown on a substrate by selective growth using a mask, and light emission from InGaN grown on the substrate is investigated. Has been done.

JP, 2011-82218, A

K.Nishizuka et.al., Efficient radiative recombination from <11-22>-oriented InxGa1-xN multiple quantum wells fabricated by the regrowth technique, APPLIED PHYSICS LETTERS (2004), 85(15): 3122-3124 H. Miyake et.al., Blue emission from InGaN/GaN hexagonal pyramid structures, Superlattices and Microstructures (2007), Vol.41 issues 5-6, 341-346

Many GaN epitaxial wafers used for device fabrication have a template on which a GaN single crystal layer is heteroepitaxially grown on a heterogeneous substrate such as sapphire or silicon as a base. Further, in some cases, a GaN self-standing single crystal substrate is also used as a base of a GaN epitaxial wafer.

Since a normal GaN template or a GaN self-standing single crystal substrate has a flat polished surface or a flat epi-grown surface grown on it, it is disclosed in Patent Document 1 and Non-Patent Document 1 described above. In order to fabricate a device using such a tilted surface, three-dimensional processing of a GaN crystal is performed on the surface of an underlying GaN template or GaN free-standing single crystal substrate by using a fine processing technique such as photolithography. Must be done.

In these microfabrications, a SiO2 film or the like serving as a mask is usually deposited on the surface of a GaN crystal by a CVD method or the like, a desired mask pattern is formed by using a photolithography technique, and then a GaN crystal is formed by reactive ion etching or the like. Is removed, and finally the mask is removed.

However, these steps are not only very complicated and time-consuming, but also often have etching damage on the surface of the etched GaN, which makes it impossible to obtain the expected device characteristics with good reproducibility. ..

Further, in the selective growth using a mask as disclosed in Non-Patent Document 2, it is still necessary to use a complicated photolithography technique. Further, since the material surface of the mask appears on the surface of the substrate, cracks are likely to occur due to a difference in linear expansion coefficient with the mask during subsequent epitaxial growth or processing. Furthermore, it is necessary to consider the crystal growth conditions so that abnormal growth does not occur on the mask.

An object of the present invention is to use a substrate for growing a nitride semiconductor having a three-dimensional periodic array structure on the surface, a method for manufacturing the same, and a substrate for growing a nitride semiconductor, which are suitable for producing devices with good characteristics at a high yield. The present invention provides a semiconductor device manufactured by the method and a manufacturing method thereof.

According to one embodiment of the present invention, there is provided the nitride semiconductor growth substrate according to [1] to [ 13 ]. Further, according to another embodiment of the present invention, there is provided a method for manufacturing a substrate for growing a nitride semiconductor according to [ 14 ] to [ 21 ]. According to another embodiment of the present invention, there is provided a semiconductor device as described in [ 22 ]. According to another embodiment of the present invention, there is provided a method for manufacturing a semiconductor device as described in [23 ].

[1] A nitride semiconductor layer grown by the HVPE method, which includes a continuous film and a plurality of convex portions having a truncated pyramid shape or a pyramid shape, which are periodically arranged on the continuous film, is formed on a surface, and at least , The plurality of convex portions and a region under the plurality of convex portions of the continuous film are made of a continuous nitride semiconductor single crystal, the plurality of convex portions have a uniform crystal orientation, and each bottom surface has an a-axis. A substrate for growing a nitride semiconductor, including a (0001) plane having a shape composed of sides parallel to.
[2] The nitride semiconductor growth according to the above [1], wherein the nitride semiconductor layer is a layer grown on a layer made of a nitride semiconductor single crystal grown by MOCVD or HVPE on a heterogeneous substrate. substrate.

[ 3 ] The above- mentioned [1] or [2] , wherein the plurality of convex portions have a truncated pyramid shape, and a top surface thereof includes a (0001) plane having a shape constituted by sides parallel to the a-axis. Substrate for nitride semiconductor growth.

[ 4 ] The nitride semiconductor according to any one of [1] to [3], wherein the inclined surfaces of the plurality of convex portions have uniform plane orientation, size, and shape and have no processing damage. Substrate for growth.

[ 5 ] The nitride semiconductor growth substrate according to [ 4 ], wherein the inclined surface includes a (10-1n) plane (n is an arbitrary integer).

[ 6 ] The nitride semiconductor growth substrate according to [ 5 ], wherein the inclined surface includes an as-grown facet growth surface.

[ 7 ] The substrate for growing a nitride semiconductor according to any one of [1] to [ 6 ], wherein the heights of the plurality of convex portions are uniform.

[ 8 ] The heights of the plurality of convex portions are periodically changed, and the vertices or the top surfaces of the plurality of convex portions are on one of two virtual planes [1] to The substrate for growing a nitride semiconductor according to any one of [ 6 ].

[ 9 ] The nitride semiconductor according to any one of [1] to [ 8 ], wherein the distance between the centers of any adjacent convex portions of the plurality of convex portions is 100 μm or more and 10 mm or less. Substrate for growth.

[ 10 ] For growing a nitride semiconductor according to any one of [1] to [ 9 ], wherein a distance between bottom surfaces of arbitrary adjacent convex portions of the plurality of convex portions is 1 mm or less. substrate.

[ 11 ] The nitride semiconductor growth substrate according to any one of [1] to [ 10 ], wherein the height of the plurality of convex portions is 50 μm or more and 5 mm or less.

[ 12 ] Any one of [1] to [ 11 ], wherein a dislocation density in a region between bottom surfaces of adjacent convex portions of the plurality of convex portions is higher than a dislocation density inside the convex portions. The substrate for growing a nitride semiconductor according to 1.

[ 13 ] The nitride semiconductor growth substrate according to any one of [1] to [ 12 ], wherein the shape of the bottom surface of the plurality of convex portions is a triangle, a quadrangle, or a hexagon.

[ 14 ] A step of forming a plurality of linear grooves parallel to the a-axis of the nitride semiconductor single crystal so as to form a periodic pattern on a flat substrate whose surface is made of the nitride semiconductor single crystal. , A truncated pyramid shape in which a nitride semiconductor crystal is epitaxially grown on the substrate in which the plurality of linear grooves are formed and which is periodically arranged in a pattern corresponding to the periodic pattern formed by the plurality of linear grooves. Or a step of forming a nitride semiconductor layer having a plurality of convex portions made of a pyramid-shaped nitride semiconductor single crystal on the surface thereof, the method for manufacturing a substrate for growing a nitride semiconductor.

[ 15 ] The method for manufacturing a substrate for growing a nitride semiconductor according to [ 14 ], wherein the surface of the substrate includes a c-plane.

[ 16 ] The method for producing a substrate for growing a nitride semiconductor according to [ 14 ] or [ 15 ], wherein the width of the plurality of linear grooves is 10 μm or more and 100 μm or less.

[ 17 ] The nitride semiconductor growth according to any one of [ 14 ] to [ 16 ], wherein a distance between centers of grooves having the same direction among the plurality of linear grooves is 100 μm or more and 10 mm or less. Substrate manufacturing method.

[ 18 ] The method for producing a substrate for growing a nitride semiconductor according to any one of [ 14 ] to [ 17 ], wherein the nitride semiconductor layer is formed by an HVPE method in which a growth atmosphere gas contains hydrogen gas. ..

[ 19 ] The method for producing a nitride semiconductor growth substrate according to any one of [ 14 ] to [ 18 ], wherein the nitride semiconductor layer includes a continuous film.

[ 20 ] The growth of the nitride semiconductor layer, followed by etching away unnecessary nitride semiconductor crystals deposited on the inclined surface of the convex portion, according to any one of [ 14 ] to [ 19 ]. A method for manufacturing a substrate for growing a nitride semiconductor.

[ 21 ] The nitride according to any one of [ 14 ] to [ 20 ], wherein the periodic pattern formed by the plurality of linear grooves includes a pattern including a triangular, quadrangular, or hexagonal lattice. Manufacturing method of semiconductor growth substrate.

[ 22 ] A semiconductor device including one of the plurality of convex portions of the nitride semiconductor growth substrate according to any one of [1] to [ 13 ].

[ 23 ] A multi-layer epitaxial growth layer is obtained by epitaxially growing a plurality of single crystal films of a nitride semiconductor on the plurality of convex portions of the substrate for growing a nitride semiconductor according to any one of [1] to [ 13 ]. Forming the multilayer epitaxial growth layer, and dividing the nitride semiconductor growth substrate to form a plurality of semiconductor devices each including one of the plurality of convex portions. A method for manufacturing a semiconductor device, comprising:

According to one embodiment of the present invention, a substrate for growing a nitride semiconductor having a three-dimensional periodic array structure on the surface, a method for manufacturing the same, and a nitride semiconductor growth suitable for manufacturing a device having good characteristics with a high yield are provided. It is possible to provide a semiconductor device manufactured using the substrate for manufacturing and a manufacturing method thereof.

FIG. 1A is a vertical cross-sectional view schematically showing the manufacturing process of the nitride semiconductor growth substrate according to the first embodiment. FIG. 1B is a vertical sectional view schematically showing a manufacturing process of the nitride semiconductor growth substrate in the first embodiment. FIG. 1C is a vertical cross-sectional view schematically showing a manufacturing process of the nitride semiconductor growth substrate according to the first embodiment. FIG. 1D is a vertical cross-sectional view schematically showing a manufacturing process of the nitride semiconductor growth substrate according to the first embodiment. FIG. 1E is a vertical sectional view schematically showing a manufacturing process of the nitride semiconductor growth substrate in the first embodiment. FIG. 2A is a top view showing a part of the template. FIG. 2B is a top view showing a part of the second nitride semiconductor single crystal layer. FIG. 2C is a top view showing a part of the second nitride semiconductor single crystal layer. FIG. 3A is a vertical cross-sectional view schematically showing a manufacturing process of the nitride semiconductor growth substrate according to the second embodiment. FIG. 3B is a vertical cross-sectional view schematically showing a manufacturing process of the nitride semiconductor growth substrate according to the second embodiment. FIG. 3C is a vertical cross-sectional view schematically showing a manufacturing process of the nitride semiconductor growth substrate according to the second embodiment. FIG. 3D is a vertical cross-sectional view schematically showing a manufacturing process of the nitride semiconductor growth substrate in the second embodiment. FIG. 3E is a vertical cross-sectional view schematically showing the manufacturing process of the nitride semiconductor growth substrate in the second embodiment. FIG. 4A is a top view showing a part of the template. FIG. 4B is a top view showing a part of the second nitride semiconductor single crystal layer. FIG. 4C is a top view showing a part of the second nitride semiconductor single crystal layer. FIG. 5A is a vertical cross-sectional view schematically showing the manufacturing process of the semiconductor device according to the third embodiment. FIG. 5B is a vertical sectional view schematically showing the manufacturing process of the semiconductor device according to the third embodiment. FIG. 5C is a vertical cross-sectional view schematically showing the manufacturing process of the semiconductor device according to the third embodiment. FIG. 5D is a vertical sectional view schematically showing the manufacturing process of the semiconductor device according to the third embodiment. FIG. 6A is an SEM (Scanning Electron Microscope) top view photograph showing the nitride semiconductor growth substrate according to the example. FIG. 6B is a cross-sectional photograph by an SEM (Scanning Electron Microscope) showing the nitride semiconductor growth substrate according to the example. FIG. 6C is a bird's-eye view photograph of a cross section of the substrate for growing a nitride semiconductor according to the example, taken by an SEM (Scanning Electron Microscope). FIG. 7A is a top view photograph by SEM showing a nitride semiconductor growth substrate according to another embodiment. FIG. 7B is a SEM cross-sectional photograph showing a substrate for growing a nitride semiconductor according to another example. FIG. 7C is a bird's-eye view photograph of a cross section of the nitride semiconductor growth substrate according to another example, taken by SEM.

[First Embodiment]
The present embodiment provides a substrate for growing a nitride semiconductor, which is suitable for manufacturing a semiconductor device having good characteristics and in which a three-dimensional periodic array structure having an inclined surface with no processing damage is formed on the surface of the substrate.

1A to 1E are vertical cross-sectional views schematically showing a manufacturing process of a nitride semiconductor growth substrate according to the first embodiment.

First, as shown in FIG. 1A, a first nitride semiconductor single crystal layer 12 is heteroepitaxially grown on a heterogeneous substrate 11 made of a material different from a nitride semiconductor to obtain a template 10. Next, as shown in FIG. 1B, grooves 13 are formed on the surface of the template 10. Next, as shown in FIGS. 1C and 1D, the second nitride semiconductor single crystal layer 14 is epitaxially grown on the template 10 in which the groove 13 is formed. Next, as shown in FIG. 1E, the nitride semiconductor growth substrate 16 is cut out from the second nitride semiconductor single crystal layer 14 as needed. Hereinafter, each of these steps will be described in detail.

The top surface of the heterogeneous substrate 11 shown in FIG. 1A is flat, and the top surface of the first nitride semiconductor single crystal layer 12 grown thereon is also flat.

The heterogeneous substrate 11 is a substrate made of, for example, sapphire, Si, GaAs, ZnO, or Ga2O3. Particularly, it is preferable to use the sapphire substrate as the heterogeneous substrate 11 from the viewpoints of stability (reactivity) during crystal growth and easy availability. Specifically, for example, a c-plane sapphire substrate having a diameter of 65 mm and a thickness of 400 μm, which is commercially available for GaN epitaxial crystal growth, can be used.

The first nitride semiconductor single crystal layer 12 is made of a nitride semiconductor single crystal. Here, the nitride semiconductor single crystal refers to a single crystal represented by a composition formula InxAlyGazN (0≦x≦1, 0≦y≦1, 0≦z≦1, x+y+z=1). The first nitride semiconductor single crystal layer 12 is, for example, an undoped GaN thin film having a thickness of 2 μm.

Further, in order to enhance the crystallinity of the first nitride semiconductor single crystal layer 12 and ensure the flatness of the surface, it is desirable to apply a low temperature buffer layer insertion technique widely used for heteroepitaxial growth of GaN. .. A technique for heteroepitaxially growing a GaN crystal on a sapphire substrate using a low temperature buffer layer is disclosed in, for example, Japanese Patent No. 3026087.

Instead of the template 10, a single crystal GaN free-standing substrate may be used. In this case, the groove 13 is formed on the free-standing substrate of single crystal GaN and is used as a base for epitaxial growth of the second nitride semiconductor single crystal layer 14.

The groove 13 formed on the surface of the template 10 in the step shown in FIG. 1B is composed of a combination of linear grooves parallel to the a-axis of a nitride semiconductor single crystal that is a hexagonal crystal, and a side parallel to the a-axis. It has a grid-like periodic pattern in which triangles are arranged. In this case, the inclined surface 15b of the truncated pyramid-shaped or pyramidal-shaped convex portion 15 of the second nitride semiconductor single crystal layer 14 grown on the template 10 can be formed by a facet growth surface (the inclined surface 15b and the facet). The growth surface will be described later). For example, the width of the linear groove forming the groove 13 is 40 μm, the depth is 60 μm, and the pitch of the grooves (distance between the centers of adjacent grooves) is 1 mm.

FIG. 2A is a top view showing a part of the template 10, and shows an example of the pattern of the groove 13. The upper surface of the first nitride semiconductor single crystal layer 12 shown in FIG. 2A is the c-plane of the nitride semiconductor single crystal forming the first nitride semiconductor single crystal layer 12, that is, the (0001) plane, The c-axis of the nitride semiconductor single crystal that constitutes one nitride semiconductor single crystal layer 12 is oriented perpendicular to the paper surface. The cross section of the template 10 shown in FIG. 1B corresponds to the cross section along the section line AA of FIG. 2A.

The groove 13 shown in FIG. 2A has a rotational symmetry of up to 6 times depending on the set position of the central axis of the rotating operation. For example, when the central axis of the rotating operation is set on the vertices of the triangle of the grid pattern, the pattern of the groove 13 has 6-fold symmetry. Further, when the central axis of the rotating operation is set on the center of the triangle of the lattice pattern, the pattern of the groove 13 has three-fold symmetry.

When the center of the triangle of the grid pattern is located on the central axis of the template 10, the pattern of the grooves 13 shown in FIG. 2A has three-fold rotational symmetry with respect to the central axis of the template 10. Further, when the vertices of the triangles of the grid pattern are located on the central axis of the template 10, the pattern of the grooves 13 shown in FIG. 2A has 6-fold rotational symmetry with respect to the central axis of the template 10.

A commercially available laser processing machine, a dicer, an electric discharge machine, or the like can be used to form the groove 13, but a fine groove can be processed with high positional accuracy and damage to the GaN crystal after processing is small. It is preferable to use a laser processing machine. For example, a laser processing machine using wavelengths of 532 nm, 355 nm, 266 nm, 213 nm, etc. using a harmonic wave of a commercially available Nd:YAG laser can be used.

When the groove processing is performed by the laser processing machine, processing waste of the first nitride semiconductor single crystal layer 12 or the heterogeneous substrate 11 (for example, processing waste of GaN or sapphire) adheres inside or around the groove 13. In order to remove this, ultrasonic cleaning using pure water or an organic solvent or bubbling cleaning using acid (for example, cleaning with a mixed solution of hydrochloric acid and hydrogen peroxide solution) is performed on the grooved template 10. It is preferable that the cleaning is performed and then thoroughly washed with pure water.

The width W of the linear groove forming the groove 13 on the upper surface of the first nitride semiconductor single crystal layer 12 is preferably 10 μm or more and 100 μm or less. If the width W is narrower than 10 μm, the groove 13 is filled with the second nitride semiconductor single crystal layer 14 at an early stage when the second nitride semiconductor single crystal layer 14 is grown on the template 10. The triangular frustum-shaped or triangular-pyramidal convex portions 15 of the second nitride semiconductor single crystal layers 14 adjacent to each other are connected to each other, which makes it difficult to maintain the three-dimensional periodic array structure (first The convex portion 15 of the second nitride semiconductor single crystal layer 14 will be described later). On the other hand, when the width W is larger than 100 μm, the polycrystalline nuclei of the nitride semiconductor generated inside the groove 13 grow large, and in this case also, the three-dimensional periodic array of the second nitride semiconductor single crystal layer 14 is formed. It becomes difficult to maintain the structure.

Further, among the plurality of linear grooves forming the groove 13, the distance (pitch) D1 between the centers of the grooves in the same direction is preferably 100 μm or more and 10 mm or less. If the pitch D1 is narrower than 100 μm, it becomes difficult to grow the convex portion 15 of the second nitride semiconductor single crystal layer 14 to a size large enough to manufacture a semiconductor device. On the other hand, when the pitch D1 is wider than 10 mm, a plurality of convex portions 15 of the second nitride semiconductor single crystal layer 14 are generated on one region defined by the groove 13, and these convex portions 15 grow without being connected properly. There are cases. In this case, it becomes difficult to maintain the three-dimensional periodic array structure of the second nitride semiconductor single crystal layer 14.

The grooves 13 preferably have a pattern that defines regions of equal shape and area, as shown in FIG. 2A. In this case, the shape and size of the convex portion 15 of the second nitride semiconductor single crystal layer 14 grown on the plurality of partitioned regions can be made uniform.

The second nitride semiconductor single crystal layer 14 formed in the steps shown in FIGS. 1C and 1D is made of a nitride semiconductor crystal, and particularly preferably made of a GaN crystal. The second nitride semiconductor single crystal layer 14 is, for example, a Si-doped GaN crystal layer having a thickness of 2 mm.

The second nitride semiconductor single crystal layer 14 may be either i-type (semi-insulating) n-type or p-type. Si, S, Se, Ge, O, C, Fe, Mg, Zn, or the like is used as an impurity element that is doped to control conductivity.

The second nitride semiconductor single crystal layer 14 has a three-dimensional periodic array structure composed of the convex portions 15. The bottom surface of the convex portion 15 (the surface in contact with the template 10 in the state shown in FIG. 1C) is the (0001) plane of the nitride semiconductor single crystal, like the upper surface of the template 10.

FIG. 1C shows a state before the convex portion 15 of the second nitride semiconductor single crystal layer 14 grows on each region defined by the groove 13 on the template 10 and the adjacent convex portions 15 contact each other. ing.

The convex portion 15 is a truncated pyramidal or triangular pyramid-shaped portion that grows in a triangular region defined by the groove 13 of the template 10. Since the edge of the bottom surface of the convex portion 15 and the edge of the groove 13 are coincident with each other, the shape of the bottom surface of the convex portion 15 is a triangle formed by the sides parallel to the a-axis of the nitride semiconductor single crystal.

The facet growth plane of the hexagonal nitride semiconductor single crystal is the (10-1n) plane (n is an arbitrary integer) and is parallel to the a-axis. Therefore, the facet growth surface appears along the linear groove parallel to the a-axis that forms the groove 13 on the template 10, and forms the inclined surface 15b of the convex portion 15.

The convex portion 15 has a truncated pyramid shape or a truncated pyramid shape depending on the crystal growth conditions. However, in consideration of the quality of the grown crystal when the epitaxial crystal growth is performed on the second nitride semiconductor single crystal layer 14 and the securing of the region for forming the electrode of the semiconductor device, the convex portion 15 has a truncated pyramid shape. Is preferred. The triangular pyramid-shaped or triangular pyramid-shaped convex portion 15 may be subjected to polishing to form the triangular-frustum-shaped convex portion 15 having a desired height.

When the second nitride semiconductor single crystal layer 14 includes the triangular pyramid-shaped convex portion 15, the top surface 15 a thereof is the same as the upper surface of the template 10 and is the (0001) plane of the nitride semiconductor single crystal. is there. The top surface 15a is preferably a (0001) surface, but may have an offset angle from the (0001) surface as long as it is within 5°. When the offset angle exceeds 5°, the convex portion 15 is tilted to increase the variation in the area of the inclined surface 15b. Therefore, a semiconductor device having excellent characteristics is manufactured using the second nitride semiconductor single crystal layer 14. Difficult to do.

It is preferable that the size, shape, and height of the top surfaces 15a of all the convex portions 15 are substantially uniform. If the shape and size of the region defined by the groove 13 on the template 10 are substantially uniform, the size, shape, and height of the top surface 15a can be made substantially uniform. When the size, shape and height of the top surface 15a are substantially uniform, the size and shape of the inclined surface 15b are also substantially uniform. A semiconductor manufactured by using the second nitride semiconductor single crystal layer 14 by increasing the uniformity of the size, shape and height of the top surface 15a and the uniformity of the size and shape of the inclined surface 15b. The manufacturing yield of the device can be improved.

Further, in order to improve the manufacturing yield of the semiconductor device manufactured by using the second nitride semiconductor single crystal layer 14, the inclined surface 15b of the convex portion 15 is required to have no processing damage. The inclined surface 15b is an as-grown surface composed of a facet growth surface of a nitride semiconductor single crystal and has no processing damage because it is not processed by etching or the like. The presence or absence of processing damage on the inclined surface 15b can be determined by observing the cross section with a TEM (transmission electron microscope) and examining the presence or absence of disorder in the atomic arrangement of the nitride semiconductor single crystal. By forming the inclined surface 15b by a facet growth surface of a nitride semiconductor single crystal, it is possible to improve the uniformity of the size and shape of the inclined surface 15b.

Further, by forming the inclined surface 15b by the facet growth surface, the surface orientations of all the inclined surfaces 15b become equivalent, so that the characteristics of the semiconductor device manufactured using the second nitride semiconductor single crystal layer 14 can be improved. Variation can be suppressed.

The second nitride semiconductor single crystal layer 14 is formed by a vapor phase growth method such as HVPE (Hydride Vapor Phase Epitaxy) method or MOCVD (Metal Organic Chemical Vapor Deposition) method, or a liquid phase such as sodium flux method or ammonothermal method. It can be grown by the growth method. Among these, it is preferable to use the HVPE method, which has a high crystal growth rate and a low raw material cost. When the second nitride semiconductor single crystal layer 14 is grown by the HVPE method, it is preferable that the growth atmosphere gas contains hydrogen gas. This makes it easier to maintain the shape of the convex portion 15 and facilitates formation of the three-dimensional periodic array structure of the second nitride semiconductor single crystal layer 14.

Details of the growth technique of GaN by the HVPE method are disclosed in, for example, Japanese Patent No. 3535583. The details of the technique of doping Si when growing GaN by the HVPE method are disclosed in, for example, Japanese Patent No. 3279528.

FIG. 2B is a top view showing a part of the second nitride semiconductor single crystal layer 14 corresponding to FIG. 1C, and shows an example of a pattern of the second nitride semiconductor single crystal layer 14. The cross section of the template 10 and the second nitride semiconductor single crystal layer 14 shown in FIG. 1C corresponds to the cross section taken along the line BB in FIG. 2B.

The second nitride semiconductor single crystal layer 14 shown in FIG. 2B is grown on the template 10 shown in FIG. 2A, and a plurality of convex portions 15 are efficiently arranged. The shape and size of the convex portion 15 shown in FIG. 2B are uniform.

In FIG. 1D, as the growth of the second nitride semiconductor single crystal layer 14 progresses, the second nitride semiconductor single crystal layer 14 forms a continuous film 17 of nitride semiconductor single crystal on the template 10 and a plurality of continuous films 17 on the template 10. It shows a state in which the convex portion 15 is formed. The crystal orientations of the continuous film 17 of the nitride semiconductor single crystal and the plurality of convex portions 15 are aligned.

By selecting the crystal growth conditions that can maintain the facet growth surface of the inclined surface 15b of the convex portion 15, even if the growth of the second nitride semiconductor single crystal layer 14 proceeds, the adjacent convex portions 15 are horizontally aligned. Individual triangular truncated pyramids or triangular pyramidal shapes can be maintained without growing and joining to flatten. That is, the shape of the convex portion 15 in the state shown in FIG. 1D hardly changes from the shape of the convex portion 15 in the state shown in FIG. 1C. Therefore, the three-dimensional periodic array structure of the second nitride semiconductor single crystal layer 14 composed of the convex portions 15 can be efficiently used for manufacturing a semiconductor device.

The laminated body of the second nitride semiconductor single crystal layer 14 and the template 10 in the state shown in FIG. 1D may be used as a nitride semiconductor growth substrate for applications such as a base substrate for epitaxial crystal growth.

By growing the second nitride semiconductor single crystal layer 14 by the HVPE method containing hydrogen gas in the growth atmosphere gas, the second nitride semiconductor single crystal continuous film 17 as shown in FIG. 1D is formed. The nitride semiconductor single crystal layer 14 can be easily formed.

Further, since the second nitride semiconductor single crystal layer 14 needs to have a sufficient thickness for cutting out the substrate 16 for growing a nitride semiconductor, it is preferable to grow the second nitride semiconductor single crystal layer 14 by the HVPE method having a high crystal growth rate.

In addition, after the growth of the second nitride semiconductor single crystal layer 14, the crystals of the nitride semiconductor having different crystal orientations may be attached on the inclined surface 15b of the convex portion 15. In this case, it is preferable to remove the attached crystal of the nitride semiconductor by wet etching using heated mixed acid of phosphoric acid and sulfuric acid or the like.

The height H of the convex portion 15 is preferably 50 μm or more and 5 mm or less. The height H is proportional to the area of the inclined surface 15b, and for the same reason as the distance between the centers of the adjacent convex portions 15, neither too low nor too high is practical. That is, when the height H is higher than 5 mm, it becomes difficult to perform the homogeneous epitaxial growth of the convex portion 15, and when it is lower than 50 μm, it becomes difficult to obtain a sufficient size for manufacturing a semiconductor device.

The dislocation density in the region between the adjacent convex portions 15 of the second nitride semiconductor single crystal layer 14, that is, the region directly above the groove 13 of the template 10 is higher than the region in the convex portion 15. Preferably. It is known that dislocations, which are crystal defects in a nitride semiconductor single crystal forming a semiconductor device, cause deterioration of device characteristics and life, and it is desirable that the dislocation density be as low as possible. According to the present embodiment, when the nitride semiconductor crystal grows to form the convex portion 15, the dislocations propagated in the crystal in the grown-in are bent in the inclination direction of the growth interface and are adjacent to each other. It has the property of gathering in the region between the convex portions 15. By utilizing this property, dislocations can be concentrated in the region between the adjacent convex portions 15 and the dislocation density in the convex portions 15 can be reduced.

As in the method disclosed in Non-Patent Document 2 described above, instead of forming the groove 13 in the template 10, a mask pattern is formed on the template 10 and the second nitride semiconductor single crystal layer 14 is selected. Although a growing method is also conceivable, a complicated photolithography process is required for forming the mask pattern, and the mask pattern and the second nitride semiconductor single film remaining on the bottom of the second nitride semiconductor single crystal layer 14 are required. This is industrially unfavorable because the risk of cracking in the second nitride semiconductor single crystal layer 14 in the epi step and the process step due to the difference in linear expansion coefficient from the crystal layer 14 increases.

FIG. 2C is a top view showing a part of the second nitride semiconductor single crystal layer 14 corresponding to FIG. 1D and shows an example of a pattern of the convex portion 15. The cross section of the template 10 and the second nitride semiconductor single crystal layer 14 shown in FIG. 1D corresponds to the cross section taken along the line CC of FIG. 2C.

The second nitride semiconductor single crystal layer 14 shown in FIG. 2C is a growth of the second nitride semiconductor single crystal layer 14 shown in FIG. 2B, and the second nitride semiconductor single crystal layer 14 shown in FIG. 2B. The single crystal layer 14 has a convex portion 15 having substantially the same shape and size.

As shown in FIG. 2C, it is preferable that the convex portions 15 of the second nitride semiconductor single crystal layer 14 are arranged with almost no space. In this case, a semiconductor device using the convex portion 15 can be efficiently formed.

The distance D2 between the centers of the adjacent convex portions 15 in a plan view is preferably 100 μm or more and 10 mm or less. The larger the distance D2, the larger the bottom surface of the convex portion 15. If the distance D2 is smaller than 100 μm, the size of the convex portion 15 may be slightly small for manufacturing a semiconductor device and may be difficult to handle.

On the other hand, if the distance D2 is too large, the bottom surface of the convex portion 15 becomes large unless the width of the groove 13 of the template 10 is extremely large, and accordingly the height of the convex portion 15 also becomes large. It becomes difficult to uniformly grow the crystal epitaxially. On the contrary, if the height of the convex portion 15 is kept low in order to ensure homogeneity, the ratio of the size of the inclined surface 15b to the size of the bottom surface of the convex portion 15 becomes small, so that the characteristics of the semiconductor device and Acquisition efficiency will decrease. Therefore, the distance D2 is preferably 10 mm or less in view of the chip size of the current semiconductor device.

The distance D3 between the bottom surfaces of the adjacent convex portions 15 is preferably 1 mm or less. When the distance D3 exceeds 1 mm, when a crystal is epitaxially grown on the second nitride semiconductor single crystal layer 14, new three-dimensional crystal nuclei are generated in the gap between the bottom surfaces of the adjacent convex portions 15 and the bottom surface. This is a cause of disturbing the periodic array structure on the surface of the second nitride semiconductor single crystal layer 14.

FIG. 1E shows a state in which the nitride semiconductor growth substrate 16 is cut out from the second nitride semiconductor single crystal layer 14 on the template 10. As shown in FIG. 1E, after the second nitride semiconductor single crystal layer 14 is grown to a sufficient thickness, the starting substrate is nitrided by cutting in parallel with the surface of the template 10, that is, in parallel with the c-plane. The substrate 16 for growing a nitride semiconductor, which is a free-standing substrate, can be obtained without using a free-standing substrate of a single semiconductor single crystal.

For cutting the second nitride semiconductor single crystal layer 14, a wire saw or the like which is generally used for cutting Si crystal or GaAs crystal can be used.

As described above, according to the present embodiment, it is possible to obtain a substrate for growing a nitride semiconductor having a three-dimensional periodic array structure composed of the convex portions 15. Specifically, as shown in FIG. 1D, nitriding as a template substrate, which is composed of the second nitride semiconductor single crystal layer 14 composed of the continuous film 17 and the plurality of convex portions 15 on the continuous film 17, and the template 10. It is possible to obtain a substrate for growing a semiconductor layer and a substrate 16 for growing a nitride semiconductor as a free-standing substrate that is cut out from the second nitride semiconductor single crystal layer 14 as shown in FIG. 1E.

The second nitride semiconductor single crystal layer 14 in the nitride semiconductor growth substrate according to the present embodiment is mostly made of a nitride semiconductor single crystal, and preferably the whole is made of a nitride semiconductor single crystal. The region between the adjacent convex portions 15 may be polycrystalline or amorphous, but at least the plural convex portions 15 and the region under the plural convex portions 15 of the continuous film 17 are continuous nitride semiconductors. It consists of a single crystal.

The nitride semiconductor growth substrate obtained in the present embodiment preferably has a substantially circular shape with a diameter of 50 mm or more. The substrate for growing a nitride semiconductor according to the present embodiment does not require a microfabrication process such as photolithography to form a three-dimensional periodic array structure and can utilize a crystal growth process, so that it is uniform over the entire surface of a large substrate. It is possible to form a three-dimensional periodic array structure. In order to make full use of this characteristic, the nitride semiconductor growth substrate preferably has a diameter of 50 mm or more, and more preferably 100 mm or more. The term “substantially circular” is meant to include a state in which a circular substrate has been processed such as an orientation flat (OF) or an index flat (IF) as a mark.

Further, as shown in FIG. 1C, the formation of the second nitride semiconductor single crystal layer 14 is performed by generating and growing crystal nuclei on each region defined by the groove 13 of the template 10. Therefore, strain does not easily remain inside the nitride semiconductor growth substrate obtained from the second nitride semiconductor single crystal layer 14, and defects such as variations in crystal orientation distribution and substrate warpage are unlikely to occur. Therefore, even when epitaxial crystal growth is performed using the nitride semiconductor growth substrate of the present embodiment or a subsequent process is performed, problems such as cracking of the substrate during the process are less likely to occur.

[Second Embodiment]
The second embodiment differs from the first embodiment in the pattern of the three-dimensional periodic array structure formed by the convex portions of the second nitride semiconductor single crystal layer. Descriptions of the configurations common to the other first embodiments will be omitted or simplified.

3A to 3E are vertical cross-sectional views schematically showing the manufacturing process of the nitride semiconductor growth substrate according to the second embodiment.

First, as shown in FIG. 3A, a template 20 is obtained by heteroepitaxially growing a first nitride semiconductor single crystal layer 22 on a heterogeneous substrate 21 made of a material different from a nitride semiconductor. Next, as shown in FIG. 3B, a groove 23 is formed on the surface of the template 20. Next, as shown in FIGS. 3C and 3D, the second nitride semiconductor single crystal layer 24 is epitaxially grown on the template 20 in which the groove 23 is formed. Next, as shown in FIG. 3E, a substrate 27 for growing a nitride semiconductor is cut out from the second nitride semiconductor single crystal layer 24, if necessary. Hereinafter, each of these steps will be described in detail.

The heterogeneous substrate 21 and the first nitride semiconductor single crystal layer 22 shown in FIG. 3A are the same members as the heterogeneous substrate 11 and the first nitride semiconductor single crystal layer 12 of the first embodiment, respectively.

The groove 23 formed on the surface of the template 20 in the step shown in FIG. 3B is constituted by a combination of linear grooves parallel to the a-axis of the nitride semiconductor single crystal which is a hexagonal crystal, and sides parallel to the a-axis. It has a grid-like pattern in which hexagons and triangles are arranged. In this case, the inclined surfaces 25b and 26b of the convex portions 25 and 26 of the second nitride semiconductor single crystal layer 24 grown on the template 20 can be constituted by facet growth surfaces (the inclined surfaces 25b and 26b and facet growth). The surface will be described later). For example, the width of the linear groove forming the groove 23 is 40 μm, the depth is 60 μm, and the pitch of the grooves (distance between the centers of adjacent grooves) is 1 mm.

FIG. 4A is a top view showing a part of the template 20, and shows an example of the pattern of the groove 23. The upper surface of the first nitride semiconductor single crystal layer 22 shown in FIG. 4A is the c-plane of the nitride semiconductor single crystal forming the first nitride semiconductor single crystal layer 22, that is, the (0001) plane, The c-axis of the nitride semiconductor single crystal that constitutes one nitride semiconductor single crystal layer 22 is perpendicular to the paper surface. The cross section of the template 10 shown in FIG. 3B corresponds to the cross section along the section line DD of FIG. 4A.

The groove 23 shown in FIG. 4A has a rotational symmetry of up to 6 times depending on the set position of the central axis of the rotating operation. For example, when the central axis of the rotating operation is set on the center of the hexagon of the lattice pattern, the pattern of the groove 23 has 6-fold symmetry. Further, when the center axis of the rotating operation is set on the center of the triangle of the lattice pattern, the pattern of the groove 23 has three-fold symmetry.

When the center of the hexagon of the grid pattern is located on the central axis of the template 10, the pattern of the grooves 23 shown in FIG. 4A has 6-fold rotational symmetry with respect to the central axis of the template 10. Further, when the vertices of the triangles of the grid pattern are located on the central axis of the template 10, the pattern of the grooves 13 shown in FIG. 4A has three-fold rotational symmetry with respect to the central axis of the template 10.

The groove 23 is formed by a method similar to that of the groove 13 of the first embodiment, and is configured by a linear groove similar to the groove 13.

The second nitride semiconductor single crystal layer 24 shown in FIGS. 3C and 3D is made of the same nitride semiconductor crystal as the second nitride semiconductor single crystal layer 14 of the first embodiment, and is formed by the same growth method. To be done.

The second nitride semiconductor single crystal layer 24 has a three-dimensional periodic array structure composed of convex portions 25 and 26. The bottom surfaces of the convex portions 25 and 26 (the surfaces that contact the template 20 in the state shown in FIG. 3C) are the (0001) planes of the nitride semiconductor single crystal, like the upper surface of the template 20.

The convex portion 25 is a hexagonal truncated pyramid shape or a hexagonal pyramid-shaped portion that grows in a hexagonal region divided by the groove 23 of the template 20, and the convex portion 26 is a triangle divided by the groove 23 of the template 20. Is a truncated pyramid shape or a triangular pyramid-shaped portion. Since the edges of the bottom surfaces of the convex portions 25 and 26 and the edges of the groove 23 coincide with each other, the shape of the bottom surface of the convex portion 25 is a hexagon formed by the sides parallel to the a-axis of the nitride semiconductor single crystal. The shape of the bottom surface of the convex portion 26 is a triangle formed by sides parallel to the a-axis of the nitride semiconductor single crystal.

The facet growth plane of the hexagonal nitride semiconductor single crystal is the (10-1n) plane (n is an arbitrary integer) and is parallel to the a-axis. For this reason, the facet growth surface appears along the linear groove parallel to the a-axis forming the groove 13 on the template 10, and the inclined surfaces 25b and 26b of the convex portions 25 and 26 are formed.

The height of the convex portion 25 growing on the region having a large area on the template 10 tends to be higher than the height of the convex portion 26 growing on the region having a small area. Therefore, the height of the convex portion of the second nitride semiconductor single crystal layer 24 changes periodically, and the top surface 25a or the apex of the convex portion 25 and the top surface 26a or the apex of the convex portion 26 are different from each other. , Located on two virtual planes of different heights.

In FIG. 3C, before the convex portions 25 and 26 of the second nitride semiconductor single crystal layer 14 grow on each region defined by the groove 23 on the template 20 and the adjacent convex portions 25 and 26 contact each other. Shows the state of.

The convex portion 25 has a hexagonal truncated pyramid shape or a hexagonal pyramid shape depending on crystal growth conditions. Similarly, the convex portion 26 has a truncated pyramid shape or a truncated pyramid shape depending on crystal growth conditions. However, in consideration of the quality of the grown crystal at the time of performing the epitaxial crystal growth on the second nitride semiconductor single crystal layer 24 and the securing of the region for forming the electrode of the semiconductor device, the convex portions 25 and 26 are respectively formed. It is preferably a truncated pyramid shape or a truncated pyramid shape. The top of the triangular pyramid-shaped or triangular pyramid-shaped convex portion 25 may be subjected to polishing to form the triangular-pyramidal convex portion 25 having a desired height. Similarly, the top of the hexagonal pyramid-shaped or hexagonal pyramid-shaped convex portion 26 may be subjected to polishing to form the hexagonal-pyramidal-shaped convex portion 26 having a desired height.

When the second nitride semiconductor single crystal layer 24 includes the triangular pyramid-shaped convex portion 25 and the hexagonal pyramid-shaped convex portion 26, the top surfaces 25 a and 26 a thereof are the same as the upper surface of the template 20. It is a (0001) plane of a nitride semiconductor single crystal. The top surfaces 25a and 26a are preferably (0001) planes, but may have an offset angle from the (0001) plane within 5°. When the offset angle exceeds 5°, the convex portions 25 and 26 are tilted to increase the variation in the area of the inclined surfaces 25b and 26b. Therefore, the second nitride semiconductor single crystal layer 24 is used to provide excellent characteristics. It becomes difficult to manufacture a semiconductor device.

It is preferable that the size, shape, and height of the top surfaces 25a of all the convex portions 25 be substantially uniform. When the size, shape and height of the top surface 25a are substantially uniform, the size and shape of the inclined surface 25b are also substantially uniform. Similarly, it is preferable that the size, shape, and height of the top surfaces 26a of all the convex portions 26 be substantially uniform. When the size, shape and height of the top surface 26a are substantially uniform, the size and shape of the inclined surface 26b are also substantially uniform. By using the second nitride semiconductor single crystal layer 24 by increasing the size, shape and height uniformity of the top surfaces 25a and 26a and the size and shape uniformity of the inclined surfaces 25b and 26b. The manufacturing yield of manufactured semiconductor devices can be improved.

Further, in order to improve the manufacturing yield of the semiconductor device manufactured by using the second nitride semiconductor single crystal layer 24, the sloped surface 25b of the convex portion 25 and the sloped surface 26b of the convex portion 26 have processing damage. Not required. The inclined surfaces 25b and 26b are as-grown surfaces composed of facet growth surfaces of the nitride semiconductor single crystal and have no processing damage because they are not processed by etching or the like. The presence or absence of processing damage on the inclined surfaces 25b and 26b can be determined by observing the cross section with a TEM (transmission electron microscope) and examining the presence or absence of disorder of the atomic arrangement of the nitride semiconductor single crystal. By forming the inclined surfaces 25b and 26b by facet growth surfaces of a nitride semiconductor single crystal, it is possible to improve the uniformity of size and shape of the inclined surfaces 25b and 26b.

Further, by forming the inclined surfaces 25b and 26b by facet growth surfaces, the surface orientations of all the inclined surfaces 25b and 26b become equivalent, so that a semiconductor manufactured using the second nitride semiconductor single crystal layer 24. It is possible to suppress variations in device characteristics.

FIG. 4B is a top view corresponding to FIG. 3C and showing a part of the second nitride semiconductor single crystal layer 24, and shows an example of a pattern of the second nitride semiconductor single crystal layer 24. The cross section of the template 20 and the second nitride semiconductor single crystal layer 24 shown in FIG. 3C corresponds to the cross section taken along the line EE of FIG. 4B.

The second nitride semiconductor single crystal layer 24 shown in FIG. 4B is grown on the template 20 shown in FIG. 4A, and the plurality of convex portions 25 and 26 are efficiently arranged. The shape and size of the convex portion 25 and the shape and size of the convex portion 26 shown in FIG. 4B are uniform. Therefore, the height of the top surface 25a of the convex portion 25 and the height of the top surface 26a of the convex portion 26 are also uniform.

In FIG. 3D, as the growth of the second nitride semiconductor single crystal layer 24 progresses, the second nitride semiconductor single crystal layer 24 has a continuous film 28 of the nitride semiconductor single crystal on the template 20 and a plurality of continuous films 28 thereon. It shows a state where the convex portions 25 and 26 are formed. The crystal orientations of the continuous film 28 of the nitride semiconductor single crystal and the plurality of convex portions 25 and 26 are aligned.

Since the inclined surface 25b of the convex portion 25 and the inclined surface 26b of the convex portion 26 are facet growth surfaces, even if the growth of the second nitride semiconductor single crystal layer 24 progresses, the adjacent convex portions 25, 26 are horizontal to each other. Individual shapes can be maintained without directional growth and bonding to planarize. That is, the shapes of the convex portions 25 and 26 in the state shown in FIG. 3D hardly change from the shapes of the convex portions 25 and 26 in the state shown in FIG. 3C. Therefore, the three-dimensional periodic array structure of the second nitride semiconductor single crystal layer 24 composed of the convex portions 25 and 26 can be efficiently used for manufacturing a semiconductor device.

When the second nitride semiconductor single crystal layer 24 is used for manufacturing a semiconductor device, only the convex portion 25 having a large inclined surface area may be used without using the convex portion 26 having a small inclined surface area. ..

The laminated body of the second nitride semiconductor single crystal layer 24 and the template 20 in the state shown in FIG. 3D may be used as a nitride semiconductor growth substrate, such as an underlying substrate for epitaxial crystal growth.

The distance between the bottom surfaces of the adjacent convex portions 25, 26 is preferably 1 mm or less. If this distance exceeds 1 mm, when a crystal is epitaxially grown on the second nitride semiconductor single crystal layer 24, new three-dimensional crystal nuclei form in the gap between the bottom surfaces of the adjacent convex portions 25 and 26. This is because it is generated and disturbs the periodic array structure on the surface of the second nitride semiconductor single crystal layer 24.

The region between the adjacent convex portions 25 and 26 of the second nitride semiconductor single crystal layer 24, that is, the region immediately above the groove 23 of the template 20 has a dislocation density higher than that of the regions inside the convex portions 25 and 26. It is preferably high. It is known that dislocations, which are crystal defects in a nitride semiconductor single crystal forming a semiconductor device, cause deterioration of device characteristics and life, and it is desirable that the dislocation density be as low as possible. According to the present embodiment, when the nitride semiconductor crystal grows to form the convex portions 25 and 26, the dislocations propagated in the crystal in the grown-in bend in the tilt direction of the growth interface and proceed. It has a property of gathering in a region between the adjacent convex portions 25 and 26. By utilizing this property, dislocations can be concentrated in the region between the adjacent convex portions 25 and 26, and the dislocation density in the convex portions 25 and 26 can be reduced.

FIG. 4C is a top view showing a part of the second nitride semiconductor single crystal layer 24 corresponding to FIG. 3D and shows an example of the pattern of the convex portions 25 and 26. The cross section of the template 20 and the second nitride semiconductor single crystal layer 24 shown in FIG. 3D corresponds to the cross section taken along the line FF of FIG. 4C.

The second nitride semiconductor single crystal layer 24 shown in FIG. 4C is a growth of the second nitride semiconductor single crystal layer 24 shown in FIG. 4B, and the second nitride semiconductor single crystal layer 24 shown in FIG. 4B. It has convex portions 25 and 26 having substantially the same shape and size as the single crystal layer 24.

As shown in FIG. 4C, the convex portions 25 and 26 of the second nitride semiconductor single crystal layer 24 are preferably arranged with almost no space. In this case, a semiconductor device using the convex portions 25 and 26 can be efficiently formed.

FIG. 3E shows a state in which the nitride semiconductor growth substrate 27 is cut out from the second nitride semiconductor single crystal layer 24 on the template 20. As shown in FIG. 3E, after the second nitride semiconductor single crystal layer 24 is grown to a sufficient thickness, the template 20 is cut in parallel with the surface, that is, in parallel with the c-plane. Even if a nitride semiconductor single crystal freestanding substrate is not used as the substrate, the nitride semiconductor growth substrate 27 that is a freestanding substrate can be obtained.

For cutting the second nitride semiconductor single crystal layer 24, a wire saw or the like generally used for cutting Si crystal or GaAs crystal can be used.

As described above, according to the present embodiment, it is possible to obtain the substrate for growing a nitride semiconductor having the three-dimensional periodic array structure composed of the convex portions 25 and 26. Specifically, as shown in FIG. 3D, as a template substrate including a continuous film 28 and a second nitride semiconductor single crystal layer 24 composed of a plurality of convex portions 25 and 26 thereon and a template 20, It is possible to obtain the substrate for growing a nitride semiconductor of 1), and the substrate for growing a nitride semiconductor 27 as a free-standing substrate cut out from the second nitride semiconductor single crystal layer 24 as shown in FIG. 3E.

The second nitride semiconductor single crystal layer 24 in the substrate for growing a nitride semiconductor according to the present embodiment is mostly made of a nitride semiconductor single crystal, and preferably entirely made of a nitride semiconductor single crystal. The region between the adjacent convex portions 25 and 26 may be polycrystalline or amorphous, but at least the region under the convex portions 25 and 26 of the continuous film 28 and the plural convex portions 25 and 26 should be at least , A continuous nitride semiconductor single crystal.

The nitride semiconductor growth substrate obtained in the present embodiment preferably has a diameter of 50 mm or more, and more preferably 100 mm or more, similarly to the nitride semiconductor growth substrate of the first embodiment.

[Third Embodiment]
In the third embodiment, a semiconductor device is manufactured using the nitride semiconductor growth substrate. Since the steps up to the formation of the nitride semiconductor growth substrate are almost the same as those in the first and second embodiments, description of common parts will be omitted or simplified.

5A to 5D are vertical cross-sectional views schematically showing the manufacturing process of the semiconductor device according to the third embodiment.

First, as shown in FIG. 5A, a nitride semiconductor single crystal layer 31 as a substrate for growing a nitride semiconductor is heteroepitaxially grown on a free-standing substrate 30 of a nitride semiconductor in which a groove is formed. Next, as shown in FIG. 5B, a multilayer epitaxial growth layer 32 is formed on the nitride semiconductor single crystal layer 31. Next, as shown in FIG. 5C, an electrode 33 is formed on the upper surface of the multilayer epitaxial growth layer 32, and after removing the free-standing substrate 30, an electrode 34 is formed on the lower surface of the nitride semiconductor single crystal layer 31. Next, as shown in FIG. 5D, the nitride semiconductor single crystal layer 31, the multilayer epitaxial growth layer 32, and the electrode 34 are divided to obtain a plurality of semiconductor devices 35. Hereinafter, each of these steps will be described in detail.

The nitride semiconductor free-standing substrate 30 shown in FIG. 5A has a groove similar to the groove 13 of the template 10 of the first embodiment on the surface which is the c-plane, and the nitride semiconductor single crystal of the template 10 is similar to the template 10. Used as a base substrate for epitaxial growth. The nitride semiconductor free-standing substrate 30 is, for example, a GaN free-standing substrate. The template 10 may be used instead of the nitride semiconductor free-standing substrate 30.

The nitride semiconductor single crystal layer 31 shown in FIG. 5A is made of the same nitride semiconductor single crystal as the second nitride semiconductor single crystal layer 24 of the first embodiment, and is formed by the same growth method. Further, it has a three-dimensional periodic array structure composed of convex portions similar to the second nitride semiconductor single crystal layer 14.

The free-standing substrate 30 has grooves similar to the grooves 23 of the template 20 of the second embodiment, and the nitride semiconductor single crystal layer 31 has the same three-dimensional periodic array as the second nitride semiconductor single crystal layer 24. It may have a structure.

The multilayer epitaxial growth layer 32 shown in FIG. 5B is a layer including a light emitting layer for a light emitting diode (LED) or a laser diode (LD), and is formed by the MOCVD method or the like. Each layer of the multilayer epitaxial growth layer 32 is made of a nitride semiconductor single crystal film. Since the three-dimensional periodic array structure on the surface of the nitride semiconductor single crystal layer 31 has no processing damage due to etching or the like, the multilayer epitaxial growth layer 32 with good crystal quality can be grown.

The electrode 33 shown in FIG. 5C is formed on the top surface of each of the plurality of convex portions of the nitride semiconductor single crystal layer 31 by using a photolithography technique or the like. The free-standing substrate 30 is removed by means such as back lap or grinding. At this time, the thickness of the nitride semiconductor single crystal layer 31 can be adjusted to match the height of the semiconductor device 35 to be manufactured. The self-standing substrate 30 may be left without being removed. However, when the template 10 is used instead of the free-standing substrate 30, the different type substrate 11 needs to be removed. The electrode 34 is formed on the entire lower surface of the nitride semiconductor single crystal layer 31.

In the step shown in FIG. 5D, the nitride semiconductor single crystal layer 31, the multilayer epitaxial growth layer 32, and the electrode 34 are divided at the portions between the convex portions of the nitride semiconductor single crystal layer 31. For this division, for example, cutting with a dicer or the like may be performed, or after cutting the upper surface and the lower surface of the nitride semiconductor single crystal layer 31 with a scriber or a dicer, cutting may be performed. ..

According to the present embodiment, since one convex portion of the nitride semiconductor single crystal layer 31 is used as a constituent unit of a semiconductor device, accurate alignment for division is unnecessary, and a semiconductor chip is easily manufactured. be able to.

The portion between the convex portions of the divided nitride semiconductor single crystal layer 31 does not need to be a single crystal nitride semiconductor, and may be a polycrystalline or amorphous nitride semiconductor. However, considering the crystal quality of the multi-layer epitaxial growth layer 32 grown on the nitride semiconductor single crystal layer 31 and the convenience in the process processing after the formation of the multi-layer epitaxial growth layer 32, the single layer on the surface of the nitride semiconductor single crystal layer 31 is considered. It is not desirable that a material other than a crystalline nitride semiconductor appears, and the portion between the convex portions of the nitride semiconductor single crystal layer 31 is also a continuous single crystal of a nitride semiconductor in which the convex portion and the crystal orientation are aligned. Is desirable.

In order to improve the utilization efficiency of the nitride semiconductor single crystal layer 31, it is desirable that the convex portions are arranged as densely as possible over the entire surface as shown in FIGS. 2C and 4C. In order to facilitate a device manufacturing process such as division, it is possible to intentionally arrange the convex portions at intervals. In this case, it is possible to form a wide groove between the bottom surfaces of the adjacent convex portions, or by forming a double-line-shaped groove, between the grooves forming the double wire ( It is also possible to form a flat surface including a (0001) plane or a slender quadrangular pyramid having a (0001) plane as a top surface. Further, for the purpose of forming an electrode of the device, a space can be intentionally formed between the bottom surfaces of the adjacent convex portions.

In addition, in the present embodiment, one semiconductor device is manufactured by using one convex portion, but one convex portion may be divided to manufacture a plurality of semiconductor devices. Parts may be used to manufacture one semiconductor device.

In the present embodiment, the purpose is to utilize the characteristics of the non-c-plane that appears on the inclined surface of the convex portion in the device. However, the surface of the multilayer epitaxial growth layer 32 is not a flat surface but is a surface with intentionally unevenness. Thus, it can be applied to a technique for improving the light extraction efficiency of a light emitting device.

(Effects of the embodiment)
According to the first embodiment and the second embodiment, etching or the like is performed by forming the three-dimensional periodic array structure on the surface of the substrate for growing a nitride semiconductor by using facet growth of the nitride semiconductor single crystal. It is possible to obtain a slanted surface having a three-dimensional periodic array structure without performing the above processing. As a result, it is possible to obtain a nitride semiconductor growth substrate having a three-dimensional periodic array structure at a low cost, without damaging the inclined surface by processing, with good yield.

Further, according to the third embodiment, it is possible to manufacture a semiconductor device having excellent characteristics and reliability with a high yield by using a substrate for growing a nitride semiconductor having a sloped surface with no processing damage on the surface. ..

Further, each of the above-described embodiments can be carried out by utilizing the conventional crystal growth technique, processing technique, etc., and thus the cost burden for the obtained effect can be very small.

The results of manufacturing and evaluating the nitride semiconductor growth substrate and the semiconductor device based on the above embodiment will be described below.

(Example 1)
First, an undoped GaN layer as the first nitride semiconductor single crystal layer 12 is grown by the MOCVD method on a commercially available single crystal sapphire c-plane substrate having a diameter of 50 mm and a thickness of 360 μm as the different substrate 11, and the template 10 is formed. Formed.

To form this undoped GaN layer, TMG (trimethylgallium) and NH ₃ were used as source gases. The growth pressure is normal pressure, the sapphire substrate is subjected to thermal cleaning in a hydrogen gas atmosphere at 1200° C. for 10 minutes to clean the surface, and then the substrate temperature is lowered to 620° C. to set the low temperature undoped GaN buffer layer to 20 nm. Then, the substrate temperature was raised to 1050° C., and a flat undoped GaN continuous film without pits was grown to a thickness of 2 μm.

Next, grooves 13 were formed on the surface of the obtained template 10. A commercially available YVO4 pulse laser processing machine having a wavelength of 532 nm and a rated output of 5 W was used for the groove processing. The pattern of the grooves 13 is a triangular lattice pattern composed of linear grooves parallel to the a-axis as shown in FIG. 2A. The width of the groove 13 was 30 μm, the depth was 20 μm, and the pitch of the grooves (distance between the centers of adjacent grooves) was 1.2 mm.

Next, the template 10 was ultrasonically cleaned in methyl alcohol for the purpose of removing powdery processing wastes of GaN and sapphire that were adhered when the groove processing was performed inside or around the groove 13 by a laser processing machine. After that, it was dried.

Next, the Si-doped GaN layer as the second nitride semiconductor single crystal layer 14 was epitaxially grown on the grooved template 10 by the HVPE method.

This Si-doped GaN layer uses GaCl generated by contacting HCl gas with metallic Ga heated to 780° C., NH ₃ as a source gas, and SiH ₂ Cl ₂ gas diluted with hydrogen as a dopant gas. These gases were supplied and grown on the template 10 heated to 1050°C. The pressure in the furnace during the growth was atmospheric pressure, the composition of the carrier gas was 50% nitrogen and 50% hydrogen, and the V/III ratio of the source gas was 4. During the growth, the template 10 was rotated at 5 rpm, the crystal growth rate was ˜300 μm/h, and the target of the average crystal film thickness was 1 mm. The target carrier concentration of the grown crystal was 1×10 18 cm ⁻³ .

When the template 10 on which the Si-doped GaN layer as the second nitride semiconductor single crystal layer 14 was grown in this manner was taken out from the furnace after cooling, the truncated pyramidal GaN single crystal as the convex portion 15 was formed into the template. It was observed that the patterns were formed in a periodic array as shown in FIG. The top surface 15a of each convex portion 15 was a plane of a substantially equilateral triangle having a side length of about 500 μm, and each side of the triangle was parallel to the a-axis of GaN. From this, it was determined that all the convex portions 15 were single crystals having uniform crystal orientations and the top surface 15a was the c-plane.

From the appearance of the second nitride semiconductor single crystal layer 14, no cracks or abnormal growth were observed, and no ungrown regions or pits were observed. When the cross section of the second nitride semiconductor single crystal layer 14 was observed, the height from the upper surface of the template 10 to the top surface 15a of the convex portion 15 was about 1.2 mm, and the height of the convex portion 15 was about. It was 180 μm. The bottom of each convex portion 15 is connected to the continuous film 17 of GaN, and it was confirmed that the entire second nitride semiconductor single crystal layer 14 is a continuous film of GaN having the periodic array structure of the convex portions 15. It was Further, the angle formed by the inclined surface 15b of the convex portion 15 and the c-plane of the GaN crystal was measured to be approximately 32°, so that the inclined surface 15b was inferred to be the (10-13) plane. ..

Here, when the heterogeneous substrate 11, which is a sapphire substrate, is observed from the back surface side, fine cracks generated at a pitch substantially the same as the pitch of the grooves 13 formed on the front surface are observed. It did not extend to the nitride semiconductor single crystal layer 14 side. It is presumed that these cracks in the heterogeneous substrate 11 were generated due to the difference in linear expansion coefficient between the heterogeneous substrate 11 and the second nitride semiconductor single crystal layer 14 during crystal cooling.

Thus, a nitride semiconductor growth substrate having a triangular pyramid periodic array structure on the surface, which is a template substrate composed of the second nitride semiconductor single crystal layer 14 and the template 10, was obtained. 6A, 6B, and 6C are a top view photograph, a cross-section photograph, and a bird's-eye view photograph of the cross section, respectively, showing a nitride semiconductor growth substrate according to the present example by an SEM (Scanning Electron Microscope).

(Example 2)
In the same manner as in Example 1 above, the second nitride semiconductor was formed on the template 10 having a diameter of 50 mm, which was composed of the continuous film 17 of GaN having a thickness of about 1 mm and the triangular frustum-shaped convex portion 15 thereon. A Si-doped GaN layer as the single crystal layer 14 was formed.

Next, the second nitride semiconductor single crystal layer 14 was cut perpendicularly to the crystal growth direction and separated from the sapphire substrate as the heterogeneous substrate 11. The cutting of the second nitride semiconductor single crystal layer 14 was performed using a wire electric discharge machine by attaching the second nitride semiconductor single crystal layer 14 to a pedestal for slicing. No crack was generated in the second nitride semiconductor single crystal layer 14 due to this cutting step. As a result, a self-standing substrate 16 of Si-doped GaN single crystal having a thickness of about 600 μm and having a periodic array structure of convex portions 15 in the shape of a truncated pyramid on the surface was obtained.

When the dislocation density of the obtained free-standing substrate 16 was evaluated by the dark spot density observed by cathodoluminescence, it was 4×10 4 on the top surface 15a and the inclined surface 15b of the convex portion 15.⁷~8×10⁷cm ^-2It was confirmed that it was within the range of. On the other hand, the dislocation density of the groove portion between the adjacent convex portions 15 is 2×10.⁸~8×10⁸cm^-2It was confirmed that the dislocation density was higher by almost one digit than that inside the convex portion 15.

(Example 3)
First, a c-plane GaN self-standing substrate having a diameter of 50 mm and a thickness of 400 μm, which was produced by using the crystal growth technique (VAS method) disclosed in Japanese Patent No. 3631724, was prepared.

Next, the groove 23 was formed on the surface of this GaN free-standing substrate by using the same laser processing machine as in the above-mentioned Example 1. The groove 23 was formed in a pattern having a triangular lattice and a hexagonal lattice, which is composed of linear grooves parallel to the a-axis as shown in FIG. 4A. The groove 23 had a width of 50 μm, a depth of 60 μm, and a groove pitch (distance between centers of adjacent grooves) of 1 mm.

Then, a Si-doped GaN layer as the second nitride semiconductor single crystal layer 24 was epitaxially grown on the grooved GaN free-standing substrate by the HVPE method. The HVPE growth conditions are the same as in Example 1 except that the composition of the raw material carrier gas during growth is 90% nitrogen and 10% hydrogen. The second nitride semiconductor single crystal layer 24 and the GaN free-standing substrate constitute a nitride semiconductor growth substrate.

When the GaN free-standing substrate on which the Si-doped GaN layer as the second nitride semiconductor single crystal layer 24 was grown in this manner was taken out of the furnace after cooling, a hexagonal truncated pyramid-shaped GaN single crystal as the tall convex portion 25 was obtained. The crystals and the truncated pyramidal GaN single crystals as the short convex portions 26 are formed in a periodic array as shown in FIG. 4C corresponding to the pattern of the grooves 23 on the GaN free-standing substrate. It was observed that

From the appearance of the second nitride semiconductor single crystal layer 24, no crack or abnormal growth was observed, and no ungrown region or pit was observed. When the cross section of the second nitride semiconductor single crystal layer 24 is broken and observed, the height from the upper surface of the GaN free-standing substrate to the top surface 25a of the convex portion 25 is about 1280 μm, and the convex portion 26 from the upper surface of the GaN free-standing substrate. The height to the top surface 26a was about 970 μm. The top surface 25a of each convex portion 25 was a substantially regular hexagon, and each side thereof was parallel to the a-axis of GaN. Further, the top surface 26a of each convex portion 26 was a substantially equilateral triangle, and each side thereof was parallel to the a-axis of GaN. The bottoms of the convex portions 25 and 26 are connected to a continuous film 28 of GaN having a thickness of about 880 μm, and the entire second nitride semiconductor single crystal layer 24 has a periodic array structure of the convex portions 25 and 26. It was confirmed to be a continuous film of. The angle between the inclined surface 25b of the convex portion 25 and the c-plane of the GaN crystal was measured and found to be approximately 43.2°. Therefore, it is surmised that the inclined surface 25b is the (10-12) plane. Was done.

When the dislocation density of the second nitride semiconductor single crystal layer 24 was evaluated by the dark spot density observed by cathodoluminescence, it was 2×10 ^{6 on} the top surface 25a and the inclined surface 25b of the hexagonal truncated pyramid-shaped convex portion 25. It was confirmed to be within the range of up to 5×10 ⁶ cm ^-2 . On the other hand, the dislocation density of the groove portion between the adjacent convex portions 25 and 26 was 5×10 ^{6 to} 9×10 ⁶ cm ⁻² , and it was confirmed that the dislocation density was higher than that of the inside of the convex portion 25. ..

In this way, a nitride semiconductor growth substrate having a triangular pyramid periodic array structure on the surface, which was composed of the second nitride semiconductor single crystal layer 24 and the GaN free-standing substrate, could be obtained.

(Example 4)
First, an undoped GaN layer as the first nitride semiconductor single crystal layer 22 is grown by the MOCVD method on a commercially available single crystal sapphire c-plane substrate having a diameter of 50 mm and a thickness of 360 μm as the different substrate 21, and the template 20 is used. Formed. The growth conditions for this undoped GaN layer are the same as in Example 1.

Next, the groove 23 was formed on the surface of the template 20 by using the same laser processing machine as that of the above-described first embodiment. The groove 23 was formed in a pattern having a triangular lattice and a hexagonal lattice, which is composed of linear grooves parallel to the a-axis as shown in FIG. 4A. The groove 23 had a width of 50 μm, a depth of 60 μm, and a groove pitch (distance between centers of adjacent grooves) of 1 mm.

Next, the Si-doped GaN layer as the second nitride semiconductor single crystal layer 24 was epitaxially grown on the grooved template 20 by the HVPE method. The HVPE growth conditions are the same as in Example 1.

When the template 20 on which the Si-doped GaN layer as the second nitride semiconductor single crystal layer 24 was grown in this manner was taken out from the furnace after cooling, a hexagonal truncated pyramid-shaped GaN single crystal as the tall convex portion 25 was obtained. And the truncated pyramid-shaped GaN single crystal as the short convex portion 26 is formed in a periodic array as shown in FIG. 4C corresponding to the pattern of the grooves 23 on the template 20. Was observed.

From the appearance of the second nitride semiconductor single crystal layer 24, no crack or abnormal growth was observed, and no ungrown region or pit was observed. When the cross section of the second nitride semiconductor single crystal layer 24 was observed, the height from the upper surface of the template 20 to the top surface 25a of the convex portion 25 was about 1400 μm, and the height from the upper surface of the template 20 to the top of the convex portion 26. The height to the surface 26a was about 1180 μm. The top surface 25a of each convex portion 25 was a substantially regular hexagon, and each side thereof was parallel to the a-axis of GaN. Further, the top surface 26a of each convex portion 26 was a substantially equilateral triangle, and each side thereof was parallel to the a-axis of GaN. The bottoms of the convex portions 25 and 26 are connected to a continuous film 28 of GaN having a thickness of about 1060 μm, and the entire second nitride semiconductor single crystal layer 24 has a periodic array structure of the convex portions 25 and 26. It was confirmed to be a continuous film of. The angle between the inclined surface 25b of the convex portion 25 and the c-plane of the GaN crystal was measured and found to be approximately 43.2°. Therefore, it is surmised that the inclined surface 25b is the (10-12) plane. Was done.

When the dislocation density of the second nitride semiconductor single crystal layer 24 was evaluated by the dark spot density observed by cathodoluminescence, it was 3×10 ^{7 on} the top surface 25a and the inclined surface 25b of the hexagonal pyramid-shaped convex portion 25. It was confirmed that it was within the range of up to 6×10 ⁷ cm ^-2 . On the other hand, the dislocation density of the groove portion between the adjacent convex portions 25 and 26 was 5×10 ^{6 to} 9×10 ⁶ cm ⁻² , and it was confirmed that the dislocation density was higher than that of the inside of the convex portion 25. ..

In this way, a nitride semiconductor growth substrate having the surface of the second nitride semiconductor single crystal layer 24 and the template 20 having a triangular pyramid periodic array structure could be obtained. 7A, 7B and 7C are a top view photograph by SEM, a cross-section photograph and a bird's-eye view photograph of the cross-section showing the nitride semiconductor growth substrate according to the present example, respectively.

(Example 5)
First, an undoped GaN layer as the first nitride semiconductor single crystal layer 12 is grown by the MOCVD method on a commercially available single crystal sapphire c-plane substrate having a diameter of 100 mm and a thickness of 600 μm as the different substrate 11, and the template 10 is formed. Formed.

To form this undoped GaN layer, TMG (trimethylgallium) and NH ₃ were used as source gases. The growth pressure is normal pressure, the sapphire substrate is subjected to thermal cleaning in a hydrogen gas atmosphere at 1200° C. for 10 minutes to clean the surface, and then the substrate temperature is lowered to 600° C. to set the low-temperature undoped GaN buffer layer to 20 nm. Then, the substrate temperature was raised to 1050° C. to grow an undoped GaN continuous film to a thickness of 1.5 μm. A mixed gas of hydrogen and nitrogen was used as the carrier gas. The crystal growth rate was about 3 μm/h. When the surface of the first nitride semiconductor single crystal layer 12 taken out from the furnace after the growth was observed with an optical microscope, it was confirmed that a flat continuous film without pits was obtained on the entire surface of the substrate.

Next, grooves 13 were formed on the surface of the obtained template 10 using a commercially available laser processing machine. The pattern of the grooves 13 is a triangular lattice pattern composed of linear grooves parallel to the a-axis as shown in FIG. 2A. The groove 13 had a width of 60 μm, a depth of 900 μm, and a groove pitch (distance between centers of adjacent grooves) of 2 mm.

Next, for the purpose of removing the powdery processing wastes of GaN and sapphire that were adhered to the inside and the periphery of the groove 13 when the groove processing was performed by the laser processing machine, the template 10 was superposed in pure water and methyl alcohol. After sonication, it was dried.

Then, a Ge-doped GaN layer as the second nitride semiconductor single crystal layer 14 was epitaxially grown on the grooved template 10 by the HVPE method.

This Ge-doped GaN layer uses GaCl generated by bringing HCl gas into contact with metallic Ga heated to 800° C., NH ₃ as a source gas, and GeCl ₄ gas diluted with hydrogen as a dopant gas. The gas was supplied onto the template 10 heated to 1100° C. to grow it. The pressure in the furnace during growth was atmospheric pressure, the composition of the carrier gas was 90% nitrogen and 10% hydrogen, and the V/III ratio of the source gas was 3. During the growth, the template 10 was rotated at 4 rpm, the crystal growth rate was ˜250 μm/h, and the target of the average crystal film thickness was 1100 μm. The target carrier concentration of the grown crystal was 8×10 ¹⁸ cm ^-3 .

When the template 10 on which the Si-doped GaN layer as the second nitride semiconductor single crystal layer 14 was grown in this manner was taken out from the furnace after cooling, the truncated pyramidal GaN single crystal as the convex portion 15 was formed into the template. It was observed that the patterns were formed in a periodic array as shown in FIG.

From the appearance of the second nitride semiconductor single crystal layer 14, no cracks or abnormal growth were observed, and no ungrown regions or pits were observed. When the cross section of the second nitride semiconductor single crystal layer 14 is broken and observed, the height from the upper surface of the template 10 to the top surface 15a of the convex portion 15 is about 1.3 mm, and the height of the convex portion 15 is about 1.3 mm. It was 200 μm. The top surface 15a of each convex portion 15 was a substantially equilateral triangle, and each side thereof was parallel to the a-axis of GaN. The bottom of each convex portion 15 is connected to the continuous film 17 of GaN, and it was confirmed that the entire second nitride semiconductor single crystal layer 14 is a continuous film of GaN having the periodic array structure of the convex portions 15. It was Further, the angle formed by the inclined surface 15b of the convex portion 15 and the c-plane of the GaN crystal was measured to be approximately 32°, so that the inclined surface 15b was inferred to be the (10-13) plane. ..

Thus, a nitride semiconductor growth substrate having a triangular pyramid periodic array structure on the surface, which is a template substrate composed of the second nitride semiconductor single crystal layer 14 and the template 10, was obtained.

(Example 6)
A free-standing substrate 16 of Si-doped GaN single crystal having a diameter of 50 mm and having a triangular pyramid periodic array structure obtained on the surface of Example 2 is prepared, and a multilayer epitaxial layer 32 having an LED structure is formed thereon by the MOCVD method. Formed by.

To form the multilayer epitaxial layer 32, TMG, TMA (trimethylaluminum), TMI (trimethylindium) and NH ₃ were used as source gases. First, the self-standing substrate 16 was heated to 1150° C. in a mixed air flow of NH ₃ and H ₂ (NH ₃ :H ₂ =1:2) and kept at that temperature for 5 minutes, and then the first layer was grown. The necessary group III source gases were sequentially flowed to grow each epitaxial layer. The structure of the grown multilayer epitaxial layer 32 includes an n-GaN layer having a thickness of 1 μm, In _0.2 Ga _0.8 N/GaN-3-MQW (Well layer having a thickness of 3 nm, and barrier layer having a thickness of 1 μm in this order from the free-standing substrate 16 side. 10 nm), a p-Al _0.1 Ga _0.9 N layer having a thickness of 40 nm, and a p-GaN layer having a thickness of 500 nm. Here, the MQW layer was grown by lowering the temperature to 800°C. The growth temperature of the other layers was 1150°C. The growth pressure was all normal pressure. However, the thickness and mixed crystal composition of the epitaxial layer mentioned here are calculated based on the data obtained when the condition is set on the c-plane GaN substrate, and the inclined surface 15b of the convex portion 15 of the self-standing substrate 16 is used. It has been found that in the upper epitaxial layer, there is a slight shift in the direction of decreasing the film thickness and in the direction of decreasing the In composition.

Next, a p-type electrode having a circular Ni/Au structure with a diameter of 150 μm is formed on the multilayer epitaxial layer 32 on the top surface 15a of the convex portion 15 using a photolithography technique, and the back surface side of the self-standing substrate 16 is backed. After removing 600 μm by lapping, an n-type electrode having a Ti/Al/Ti/Au structure was formed on the entire back surface. As a result, the height from the back surface of the free-standing substrate 16 to the top surface 15a of the convex portion 15 was about 970 μm.

Next, this self-supporting substrate 16 was mounted on an adhesive sheet and cleaved at the groove between the convex portions 15 using a wafer cleaving device to divide into a plurality of LED chips as semiconductor devices. In this way, an LED chip having a shape in which triangular pyramids were stacked on a triangular prism having a bottom side of about 1000 μm was obtained.

When the produced LED chip was energized and the emission wavelength was measured using a spectroscope, blue emission with a peak wavelength of 470 nm was observed from the top surface 15a of the triangular pyramid-shaped convex portion 15, while the convex portion was observed. Purple light emission with a peak wavelength of 430 nm was observed from the inclined surface 15b of No. 15, and it was confirmed that an LED chip that emits light of two wavelengths could be manufactured with one chip.

Although the embodiments and examples of the present invention have been described above, the present invention is not limited to the above-described embodiments and examples, and various modifications can be made without departing from the gist of the invention.

For example, the pattern of the groove formed on the template 10 or the free-standing substrate 30 is not limited to the pattern of the groove 13 shown in FIG. 2A or the pattern of the groove 23 shown in FIG. 4A. The groove pattern may be a pattern formed by a straight line parallel to the a-axis, and may be, for example, a hexagonal pattern (honeycomb pattern) type in which hexagonal lattices are combined or a rhombic lattice pattern. For example, when the groove pattern is a hexagonal pattern, the convex portions of the second nitride semiconductor single crystal layer are all hexagonal truncated pyramids or hexagonal pyramids, and when the groove pattern is a rhombic lattice pattern, All the convex portions of the second nitride semiconductor single crystal layer have a truncated pyramid shape or a pyramidal shape. Further, if the inclined surface of the convex portion can be formed by the facet growth surface, the groove 13 may be composed of discontinuous grooves, for example, a large number of holes.

Further, a modified example in which a groove as a destruction guide portion is processed on the back surface side of the different type substrates 11 and 21 is conceivable. In this case, when stress is generated in the second nitride semiconductor single crystal layers 14 and 24 due to the difference in linear expansion coefficient between the different substrates 11 and 21 and the second nitride semiconductor single crystal layers 14 and 24. Since cracks preferentially occur in the heterogeneous substrates 11 and 21, the occurrence of cracks in the second nitride semiconductor single crystal layers 14 and 24 can be suppressed. Further, when the grooves on the back surface of the different type substrates 11 and 21 are formed at the positions facing the grooves 13 and 23, it is possible to facilitate the element separation after the element formation.

Further, in the above-described embodiment, the surface of the first nitride semiconductor single crystal layer 12 of the template 10 or the surface of the free-standing substrate 30 is the c-plane of the nitride semiconductor single crystal, but the c-plane such as the m-plane or the a-plane. It may be a surface other than the above. In this case, it is difficult to form the convex portion of the pattern having rotational symmetry, but it is possible to form the convex portion having the inclined surface.

Further, the embodiments and examples described above do not limit the invention according to the claims. It should be noted that not all of the combinations of features described in the embodiments and examples are essential to the means for solving the problems of the invention.

INDUSTRIAL APPLICABILITY The present invention can be applied to a nitride semiconductor growth substrate used for manufacturing an optical device such as a light emitting diode or a laser, or a nitride semiconductor device such as a high frequency device such as a diode or a transistor.

10, 20 Templates 11, 21 Different substrates 12, 22 First nitride semiconductor single crystal layer 13, 23 Groove 14, 24 Second nitride semiconductor single crystal layer 15, 25, 26 Convex portion 15a, 25a, 26a Top Surfaces 15b, 25b, 26b Sloped surfaces 16, 27 Nitride semiconductor growth substrate 17, 28 Continuous film 30 Freestanding substrate 31 Nitride semiconductor single crystal layer 32 Multilayer epitaxial growth layer 35 Semiconductor device

Claims (23)

A nitride semiconductor layer grown by the HVPE method, which includes a continuous film and a plurality of convex portions having a truncated pyramid shape or a pyramid shape, which are periodically arranged on the continuous film, is provided on the surface,
At least, the plurality of convex portions and the region under the plurality of convex portions of the continuous film is made of a continuous nitride semiconductor single crystal,
The nitride semiconductor growth substrate including the (0001) plane in which the plurality of convex portions have uniform crystal orientations and each bottom surface has a shape configured by sides parallel to the a-axis. The nitride semiconductor growth substrate according to claim 1, wherein the nitride semiconductor layer is a layer grown on a layer made of a nitride semiconductor single crystal grown by MOCVD or HVPE method on a heterogeneous substrate. The nitride semiconductor growth according to claim 1 or 2 , wherein the plurality of convex portions have a truncated pyramid shape, and a top surface thereof includes a (0001) plane having a shape constituted by sides parallel to the a-axis. substrate. The nitride semiconductor growth substrate according to claim 1, wherein the inclined surfaces of the plurality of convex portions have a uniform plane orientation, size, and shape, and have no processing damage. The nitride semiconductor growth substrate according to claim 4 , wherein the inclined surface includes a (10-1n) surface (n is an arbitrary integer). The nitride semiconductor growth substrate according to claim 5 , wherein the inclined surface includes an as-grown facet growth surface. Wherein it is uniform heights of the plurality of convex portions, nitride semiconductor growth substrate according to any one of claims 1-6. The heights of the plurality of convex portions are changed periodically, and vertex or top surfaces of the plurality of convex portions are on either side of the two virtual planes, one of the claims 1-6 The substrate for growing a nitride semiconductor according to item 1. Wherein among the plurality of convex portions, the distance between the centers of the convex portions adjacent the arbitrarily is 100μm or more 10mm or less, the nitride semiconductor growth substrate according to any one of claims 1-8. Wherein among the plurality of convex portions, the distance between the bottom surface of the convex portion adjacent any, is 1mm or less, the nitride semiconductor growth substrate according to any one of claims 1-9. The heights of the plurality of convex portions is 50μm or more 5mm or less, the nitride semiconductor growth substrate according to any one of claims 1-10. Of the plurality of convex portions, dislocation density of the region between the bottom surface of the convex portion adjacent, higher than said internal dislocation density of the convex portion, nitride according to any one of claims 1 to 11 Substrate for semiconductor growth. Wherein the shape of the bottom surface of the plurality of convex portions, triangular, square, or hexagonal, nitride semiconductor growth substrate according to any one of claims 1 to 12. Forming a plurality of linear grooves parallel to the a-axis of the nitride semiconductor single crystal so as to form a periodic pattern on a flat substrate whose surface is made of the nitride semiconductor single crystal;
A nitride semiconductor crystal is epitaxially grown on the substrate in which the plurality of linear grooves are formed, and the truncated pyramidal shape is periodically arranged in a pattern corresponding to the periodic pattern formed by the plurality of linear grooves. And a step of forming a nitride semiconductor layer having a plurality of convex portions made of a pyramid-shaped nitride semiconductor single crystal on a surface thereof. 15. The method for manufacturing a nitride semiconductor growth substrate according to claim 14 , wherein the surface of the substrate includes a c-plane. The method for manufacturing a substrate for growing a nitride semiconductor according to claim 14 or 15 , wherein a width of each of the plurality of linear grooves is 10 μm or more and 100 μm or less. Among the plurality of linear grooves, the distance between the center of the same groove in the direction is 100μm or more 10mm or less, the method of manufacturing the nitride semiconductor growth substrate according to any one of claims 14-16 .. The nitride semiconductor layer is formed by the HVPE method comprising hydrogen gas into the growth atmosphere gas, the method of manufacturing the nitride semiconductor growth substrate according to any one of claims 14-17. The nitride semiconductor layer comprises a continuous film, according to claim 14-18 nitride semiconductor growth method for manufacturing a substrate according to any one of. The nitride semiconductor growth according to any one of claims 14 to 19 , wherein after growing the nitride semiconductor layer, unnecessary nitride semiconductor crystals deposited on the inclined surface of the convex portion are removed by etching. Substrate manufacturing method. Periodic pattern in which the plurality of linear grooves are formed, triangular, square, or a pattern including a hexagonal lattice, the nitride semiconductor growth substrate according to any one of claims 14-20 Production method. To any one of claims 1 to 13 comprising one of the plurality of convex portions of the nitride semiconductor growth substrate according, semiconductor devices. On the plurality of convex portions of the nitride semiconductor growth substrate according to any one of claims 1 to 13 and a plurality of nitride semiconductor single-crystal film is epitaxially grown, forming a multilayer epitaxial layer ,
Forming the multilayer epitaxial growth layer, dividing the nitride semiconductor growth substrate, and forming a plurality of semiconductor devices each including one of the plurality of convex portions. Production method.