JP6699535B2 - Circuit board - Google Patents

Description

  The present invention relates to a circuit board in which a plurality of conductive layers are laminated with an insulating substrate interposed therebetween.

  BACKGROUND ART Conventionally, for example, in a vehicle-mounted power supply system mounted on a vehicle, a configuration is known in which a storage battery is connected to a generator or an electric load by using a circuit board on which an electric path pattern is printed. The circuit board is provided with a switch element that connects the electric load and the storage battery, and the charge/discharge of each storage battery is controlled by controlling the switch element.

  In a circuit board used in an in-vehicle power supply system, the amount of heat generated is large because the voltage and current are generally large. An increase in the amount of heat generated may cause a circuit malfunction or failure. Therefore, in the circuit board, heat dissipation is improved by various methods. For example, in the circuit board of Patent Document 1, a heat radiation pattern is provided in a layer different from the layer in which the electrical path pattern is formed, and the heat generating terminals (drain terminals) of electronic components such as switch elements are radiated through the through vias. Connected to the pattern. Thereby, the heat from the heat generating terminal is radiated through the heat radiation pattern.

JP 2008-270683A

  By the way, in the circuit board of Patent Document 1, a plurality of through vias are provided in the electrical path pattern in order to improve the heat dissipation effect. However, since the electric path pattern is connected to the heat dissipation pattern via the plurality of through vias, the current flowing from the heat generating terminal may bypass the electric path pattern and flow to the heat dissipation pattern. In this case, there is a possibility that the circuit characteristics (eg, resistance and impedance) indicating the difficulty of current flow in the electric path pattern may be affected. For example, if the current bypasses the region of the electric path pattern where the current hardly flows through the heat radiation pattern, the circuit characteristics indicating the difficulty of the current flow in the electric path pattern will be affected.

  The present invention has been made in view of the above circumstances, and its main object is to provide a circuit board that can radiate heat while suppressing the influence on the circuit characteristics.

  A first invention is an insulating substrate, a plurality of conductive layers provided on the surface of the insulating substrate and made of a conductor, and a conductive layer that penetrates the insulating substrate and connects the plurality of conductive layers. A plurality of connecting members having a plurality of connecting members, and the conductive layer includes an electric path layer through which a current from a circuit element flows, and a heat radiating layer provided with a heat radiating pattern. In, there is a connecting member that is connected to the electrical path layer, and is arranged at different positions in the current direction in which the current flows, and in the heat dissipation pattern, the connecting member arranged at the different position. There is a plurality of heat radiation patterns connected to each other, and each of the heat radiation patterns is electrically independent from each other by being divided by an insulating region in the heat radiation layer.

  When a plurality of connecting members arranged at different positions in the current direction are connected to each other through the heat radiation pattern, current may flow in the heat radiation pattern. In this case, the circuit characteristics (for example, resistance and impedance) indicating the difficulty of current flow may be affected not only by the electric path layer but also by the shape and connection of the heat radiation pattern. Therefore, the heat radiation patterns respectively connected to the plurality of connecting members arranged at different positions in the current direction are provided independently from each other by being partitioned by the insulating region in the heat radiation layer. As a result, no current flows in the heat radiation pattern, and the circuit characteristics are determined by the electric path layer. That is, the influence of the heat radiation pattern on the circuit characteristics can be suppressed.

  In a second aspect of the present invention, a current flows from the plurality of first circuit elements to the plurality of second circuit elements in the electric path layer, and the plurality of first circuit elements are connected in parallel with each other. In addition, the plurality of second circuit elements are connected in parallel with each other, and the electric path layer is connected with the plurality of first circuit elements in parallel with the plurality of first circuit elements connected in parallel. The gist is that two circuit elements are connected in series.

  In the electric path layer, a plurality of first circuit elements connected in parallel and a plurality of second circuit elements connected in parallel are connected in series. Therefore, a large current may flow as compared with the case where circuit elements are connected in series one by one. Even in this case, since no current flows through the heat dissipation pattern, it is possible to appropriately dissipate heat without affecting the circuit characteristics.

  In a third aspect of the invention, the plurality of first circuit elements and the plurality of second circuit elements are arranged in rows, and the respective rows are arranged to face each other, and the electric path layer comprises: The gist is that it is provided so as to extend from the plurality of first circuit elements to the plurality of second circuit elements.

  The plurality of first circuit elements and the plurality of second circuit elements are arranged in a row, and are arranged to face each other, and the electric path layer is provided so as to connect between them. Therefore, the current direction can be determined by the arrangement of each circuit element and the shape of the electric path layer. Thereby, an appropriate heat radiation pattern can be determined.

  A fourth invention is, in the electric path layer, between the first circuit element and the second circuit element, the area in which the plurality of first circuit elements are arranged is a reference and is orthogonal to the current direction. A setting area having a predetermined width is provided, and the respective heat radiation patterns provided independently of each other are heat radiation patterns connected to the setting area via the connecting member. Is the gist.

  As a result, in the electric path layer, the current collected from the plurality of first circuit elements flows into the setting region having the widthwise length determined. If a current flows, for example, via the heat dissipation pattern, bypassing the set area set in this way, it will affect the circuit characteristics. Therefore, each of the heat radiation patterns provided independently of each other is connected to the setting region via a connecting member to suppress the influence on the circuit characteristics.

  A fifth aspect of the present invention is summarized as the setting region is a region having a narrower length in the width direction than a region in which the plurality of first circuit elements are arranged.

  Since it becomes difficult for a current to flow in a setting region that is narrower than a region in which the plurality of first circuit elements are arranged, when the current passes through the region, the amount of heat generated increases. Therefore, by connecting the area and the heat radiation pattern, heat can be radiated more efficiently than in other areas. Further, it can be said that the circuit characteristic of the electric path layer is determined by the setting region because the current hardly flows in the setting region.

  However, when a current flows in the heat dissipation pattern by bypassing the setting area, the circuit characteristics of the electric path layer cannot be determined only by the difficulty of the current flow in the setting area. Therefore, the heat radiation patterns connected to the set area via the connecting member are provided independently of each other, so that the circuit characteristics of the electric path layer are determined by the difficulty of current flow in the area where the path width is narrower than other areas. I did it. This facilitates setting of circuit characteristics in the electric path layer.

  A sixth aspect of the invention is summarized in that the heat radiation pattern has a heat radiation pattern that connects a plurality of the connecting members arranged in a region other than the setting region in the electric path layer.

  Even if a current flows in the heat radiation pattern by bypassing the area other than the set area, the circuit characteristics are hardly affected. Therefore, by disposing the heat dissipation pattern so as to connect the plurality of connection members arranged in such an area, it is possible to reduce the insulating area and improve the heat dissipation efficiency.

  In a seventh aspect of the present invention, the electric path layer is provided with setting regions in which a length in a width direction orthogonal to the current direction is defined with reference to a region where the circuit element is arranged, and the setting regions are independent of each other. The gist is that each of the provided heat radiation patterns is a heat radiation pattern connected to the setting region via the connection member.

  When the current bypasses the set region and the current flows through the heat radiation pattern, for example, the circuit characteristics are affected. Therefore, each of the heat radiation patterns provided independently of each other is connected to the setting region via a connecting member to suppress the influence on the circuit characteristics.

  An eighth aspect of the invention is summarized in that the heat radiation pattern has a heat radiation pattern that connects a plurality of the connection members arranged along a width direction orthogonal to the current direction.

  Since the plurality of connecting members arranged along the width direction orthogonal to the current direction have the same position in the current direction, they have the same potential. That is, even if the plurality of connecting members are connected via the heat radiation pattern, no current flows in the heat radiation pattern. Therefore, by connecting the heat dissipation pattern so as to connect the plurality of connecting members, it is possible to reduce the insulating region required when the heat dissipation pattern is provided independently and to increase the heat dissipation pattern. That is, it is possible to improve the heat dissipation efficiency while suppressing the influence of the heat dissipation pattern on the circuit characteristics.

  In a ninth aspect, the insulating substrate is provided in plural, the electric path layer is an intermediate layer sandwiched between the insulating substrates, and the heat dissipation layers are provided on both sides of the circuit board and exposed to the outside. The main point is that it is the outer layer.

  Since the heat dissipation layer is arranged in the outer layer, the heat dissipation efficiency can be improved as compared with the case where it is provided in the intermediate layer.

  A tenth aspect of the invention is characterized in that the circuit element is arranged in one of the outer layers and the other outer layer serves as a heat dissipation layer.

  The area of the heat radiation pattern can be increased without being interfered by the circuit element. In addition, the circuit elements can be easily arranged.

  An eleventh invention is that the circuit board is mounted on a mounting surface provided in a power supply device, and the heat radiation pattern is arranged so as to face the mounting surface. To do.

  By disposing the heat radiation pattern so as to face the mounting surface, it is possible to easily transfer the heat from the heat radiation pattern to the mounting surface and improve the heat radiation efficiency.

  A twelfth aspect of the invention is summarized in that the mounting surface has conductivity, and the heat radiation pattern is arranged so as to face the mounting surface via an insulator.

  A capacitor can be formed by the heat radiation pattern and the mounting surface. Thereby, the noise of the heat radiation pattern can be removed. Further, by interposing the insulator, the capacitance of the capacitor formed by the heat radiation pattern and the mounting surface can be increased. That is, noise can be efficiently removed. At the same time, it is possible to reliably prevent contact with the mounting surface, and to prevent current from flowing from the heat radiation pattern through the mounting surface.

  A thirteenth invention is applied to a power supply device of an in-vehicle power supply system in which the circuit board is connected to a power generator or an electric load, and the circuit element energizes the electric path layer connected to the storage battery or The gist is that it is a switching element that switches to a power-off state.

  It is a circuit board that is applied to the power supply device of the in-vehicle power supply system in which the storage battery is connected to the generator or the electric load, and because it is the circuit board that is provided with the electrical path layer to which the switching element is connected, a large current flows. sell. Therefore, by improving the heat dissipation efficiency while suppressing the influence of the heat dissipation pattern on the circuit characteristics, the circuit board is suitable as a circuit board through which a large current can flow.

The perspective view of a power supply device. The perspective view of the power supply device which removed the cover member. The disassembled perspective view which decomposes|disassembles and shows each part which comprises a power supply device. The perspective view of a base member. The top view of the power supply device which removed the cover member. FIG. 10 is an end view of the VV line section of the circuit board of FIG. 9. Circuit diagram of an in-vehicle power supply system. The enlarged top view of a circuit board. The top view which shows a 1st layer. The top view which shows a 2nd layer. The top view which shows a 4th layer.

  Hereinafter, an embodiment in which a power supply device according to the present invention is embodied will be described with reference to the drawings. In the present embodiment, it is assumed that the present invention is embodied as a power supply device used in an in-vehicle power supply system mounted on a vehicle. The power supply device 10 is mounted, for example, under the seat of a vehicle. The vehicle includes an engine that is an internal combustion engine, an in-vehicle ECU that controls the engine and other parts, a generator that is driven by the engine to generate power, and a power storage unit that is charged by the generated power of the generator. In this embodiment, a lead storage battery is used as the power storage unit.

  First, the overall configuration of the power supply device 10 will be described with reference to FIGS. In the following description, for the sake of convenience, the vertical direction of the power supply device 10 is defined with reference to FIG. 1 in which the power supply device 10 is installed on a horizontal plane. In each drawing, a height direction HD, a width direction WD, and a depth direction DD that are vertical directions are shown.

  The power supply device 10 includes a battery module 20 having a plurality of cells (for example, lithium-ion storage batteries), a circuit board 30 on which electronic components for performing charge/discharge control of the battery module 20 are mounted, a base member 40, and And a housing case 42 having a cover member 41. The plurality of unit cells are connected in series to form an assembled battery. Each of the battery module 20 and the circuit board 30 is fixed to the base member 40, as shown in FIG. The cover member 41 is assembled from above with respect to the integrated assembly component shown in FIG. 2 to form the power supply device 10 shown in FIG. As a result, the battery module 20 and the circuit board 30 are accommodated in the accommodation case 42.

  The power supply device 10 includes a first external terminal 101, a second external terminal 102, and a third external terminal 103. An ISG 200, which is a generator with a motor function, is electrically connected to the first external terminal 101. Further, the ISG 200 generates electric power by the power transmitted from the output shaft of the engine 201, and at least a part of the generated electric power of the ISG 200 is supplied to the battery module 20. As a result, the battery module 20 is charged. Further, the ISG 200 may be supplied with power from the power supply device 10. As a result, the ISG 200 functions as a motor and functions as a power source together with the engine 201.

  A first electric load 202 mounted on the vehicle is electrically connected to the second external terminal 102. In the present embodiment, the first electric load 202 includes a lead storage battery as a power storage unit and a starter that imparts initial rotation to the output shaft of the engine 201.

  A second electric load 203 mounted on the vehicle is electrically connected to the third external terminal 103. The second electric load 203 includes a constant voltage required load that is required to be stable such that the voltage of the supplied power is constant or at least fluctuates within a predetermined range. Specific examples of the electric load 15 that is a constant voltage required load include various ECUs such as a navigation device, an audio device, a meter device, and an in-vehicle ECU.

  Next, the configuration of each part of the power supply device 10 will be described in detail.

<Base member 40 of storage case 42>
The base member 40 of the housing case 42 will be described with reference to FIG. The base member 40 is molded from a metal material such as aluminum. The base member 40 includes a bottom portion 43 having a step, and a wall portion 44 provided upright from the peripheral portion of the bottom portion 43 or in the vicinity of the peripheral portion.

  The base member 40 includes a heat dissipation portion 45 that dissipates heat generated by the electronic components mounted on the circuit board 30 to the outside of the power supply device 10. The heat dissipation part 45 extends upward from the upper surface of the bottom part 43 and has a substantially rectangular shape. The longitudinal direction of the heat radiating portion 45 and the width direction WD coincide with each other, and one end of the heat radiating portion 45 in the longitudinal direction extends to a wall surface of a portion of the wall portion 44 extending in the depth direction DD.

  The heat radiating section 45 is provided with an opposed surface 45a as a mounting surface opposed to the circuit board 30 on the upper end surface thereof. The facing surface 45a is formed flat. The heat generated in the circuit board 30 is radiated to the outside of the power supply device 10 via the heat dissipation portion 45 and the bottom portion 43.

  As shown in FIG. 3, the circuit board 30 is placed on the facing surface 45a via the insulating sheet 46 serving as an electrically insulating insulator, and is fixed by screws. As a result, the insulating sheet 46 is sandwiched between the facing surface 45a and the circuit board 30, and the circuit board 30 and the heat dissipation portion 45 are electrically insulated. The bottom part 43, the wall part 44, and the heat dissipation part 45 are integrally formed by die casting.

<Circuit board 30>
As shown in FIG. 5, the circuit board 30 of the present embodiment is a substantially L-shaped printed board. As shown in FIG. 6, the circuit board 30 has a plurality (four layers) of conductive layers formed of a conductor in a thin film shape. That is, the circuit board 30 is a multilayer board (laminated board). In the following, the conductive layers are referred to as the first layer 31, the second layer 32, the third layer 33, and the fourth layer 34 in order from the upper side (cover member 41 side). The fourth layer 34 faces the facing surface 45a via the insulating sheet 46. An insulating substrate serving as a plate-shaped insulating layer made of an insulating material is provided between each layer. In the following, the substrate provided between the first layer 31 and the second layer 32 is referred to as a first substrate 35, and the substrate provided between the second layer 32 and the third layer 33 is referred to as a second substrate. The substrate 36 is shown, and the substrate provided between the third layer 33 and the fourth layer 34 is shown as a third substrate 37.

  As shown in FIG. 5, various electronic components are mounted on the surface (first layer 31 side) of the circuit board 30. For example, in the circuit board 30, the first switch SW1 is mounted at approximately the center in the width direction WD, and the first switch SW1 includes a plurality of (six in the present embodiment) first switch elements Sa1 to Sa6. It is configured. The first switch elements Sa1 to Sa6 are mounted so as to be arranged in three rows in the width direction WD and arranged in two rows in the depth direction DD. Further, in the circuit board 30, the second switch SW2 is mounted on the right side (the right side in FIG. 5) of the first switch SW1, and the second switch SW2 includes a plurality (eight in this embodiment) of the second switches. It is composed of two switch elements Sb1 to Sb8. The second switch elements Sb1 to Sb8 are mounted so as to be arranged in four rows in the width direction WD and arranged in two rows in the depth direction DD.

  Further, in the circuit board 30, a third switch SW3 is mounted on the left side (the left side in FIG. 5) of the first switch SW1, and the third switch SW3 includes a plurality of (two in the present embodiment) first switches. It is composed of three switch elements Sc1 and Sc2. The third switch elements Sc1 and Sc2 are mounted side by side in the depth direction DD. Further, in the circuit board 30, a fourth switch SW4 is mounted on the right side of the second switch SW2, and the fourth switch SW4 includes a plurality of (two in the present embodiment) fourth switch elements Sd1 and Sd2. It consists of The fourth switch elements Sd1 and Sd2 are mounted side by side in the depth direction DD. In the present embodiment, the switch elements Sa1 to Sa6, Sb1 to Sb8, Sc1, Sc2, Sd1 and Sd2 are circuit elements (semiconductor switching elements), and specifically MOSFETs are used.

  Further, in the circuit board 30, on/off of each of the switch elements Sa1 to Sa6, Sb1 to Sb8, Sc1, Sc2, Sd1 and Sd2 is controlled at the end portion in the width direction WD to perform charge/discharge control of the battery module 20. A microcomputer 80 is installed. In addition, the power supply device 10 includes a bus bar unit 90 including a plurality of bus bars, as shown in FIG. The bus bar unit 90 connects the first external terminal 101, the second external terminal 102, and the third external terminal 103 to the circuit board 30.

  Here, an electric circuit of the power supply device 10 will be described with reference to an electric circuit diagram. As shown in FIG. 7, the power supply device 10 is provided with an electric path L1 that connects the external terminals 101 and 102 and an electric path L2 that connects the connection point N1 on the electric path L1 and the battery module 20. .. Of these, the first switch SW1 is provided on the electrical path L1, and the second switch SW2 is provided on the electrical path L2.

  The first switch SW1 is divided into two sets of first switch elements Sa1 to Sa6, and is configured to connect the two sets of first switch elements Sa1 to Sa6 in series. The first switch elements Sa1 to Sa6 of each set are composed of three first switch elements Sa1 to Sa6 and are connected in parallel. In the present embodiment, it is divided into a set of the first switch elements Sa1 to Sa3 and a set of the first switch elements Sa4 to Sa6, and the first switch elements Sa1 to Sa6 are connected in parallel in each set.

  Further, in each set, when the three first switch elements Sa1 to Sa6 are connected in parallel, the parasitic diodes of the MOSFETs (switch elements) are connected so that the cathodes thereof have the same direction. On the other hand, when the two sets of first switch elements Sa1 to Sa6 are connected in series, the cathodes of each set are connected so that the directions thereof are opposite to each other.

  Specifically, of the first switch SW1, the first switch elements Sa1 to Sa3 connected to the second external terminal 102 side are connected in parallel with their cathodes facing the second external terminal 102 side. .. On the other hand, in the first switch SW1, the first switch elements Sa4 to Sa6 connected to the first external terminal 101 side are connected in parallel with their cathodes facing the first external terminal 101 side. That is, the anodes of the parasitic diodes of the first switch elements Sa1 to Sa3 and the anodes of the parasitic diodes of the first switch elements Sa4 to Sa6 are connected.

  The second switch SW2 has the same basic configuration as the first switch SW1 except for the number of switch elements. Specifically, of the second switch SW2, the second switch elements Sb1 to Sb4 connected to the first external terminal 101 side are connected in parallel with their cathodes facing the first external terminal 101 side. . On the other hand, of the second switch SW2, the second switch elements Sb5 to Sb8 connected to the battery module 20 side are connected in parallel with their cathodes facing the battery module 20 side. That is, the anodes of the parasitic diodes of the second switch elements Sb1 to Sa4 are connected to the anodes of the parasitic diodes of the second switch elements Sb5 to Sb8.

  By configuring the first switch SW1 and the second switch SW2 as described above, for example, when the first switch SW1 is in the off (open) state, that is, the first switch elements Sa1 to Sa6 are in the off state. In that case, the flow of current through the parasitic diode is completely cut off.

  The directions of the parasitic diodes of the first switch elements Sa1 to Sa6 in the first switch SW1 may be changed so that the parasitic diodes are connected to each other at their cathodes. Specifically, in a direction in which the anode of the parasitic diode is on the side of the first external terminal 101, the three first switching elements Sa1 to Sa3 are connected in parallel, and the anode of the parasitic diode is on the side of the second external terminal 102. Then, the three first switch elements Sa4 to Sa6 may be connected in parallel. The same applies to the second switch SW2.

  Further, as the semiconductor switch, an IGBT, a bipolar transistor, or the like can be used instead of the MOSFET. When an IGBT or a bipolar transistor is used, a diode is connected in parallel to each semiconductor switch instead of the above parasitic diode.

  Further, one end of the electric path L3 is connected to the connection point N2 between the second external terminal 102 and the first switch SW1 in the electric path L1. At the same time, one end of the electric path L4 is connected to the connection point N4 between the battery module 20 and the second switch SW2 in the electric path L2. The other ends of these electric paths L3, L4 are connected at an intermediate point N3. Further, the intermediate point N3 and the third external terminal 103 are connected by the electric path L5. A third switch SW3 and a fourth switch SW4 are provided on the electric paths L3 and L4, respectively.

  The third switch SW3 is configured to connect the third switch elements Sc1 and Sc2 in series. When connecting the third switch elements Sc1 and Sc2 in series, the cathodes of the third switch elements Sc1 and Sc2 are connected so that the cathodes thereof face in opposite directions. That is, the anodes of the third switch elements Sc1 and Sc2 are connected to each other. The same applies to the fourth switch SW4. The third switch SW3 and the fourth switch SW4 may also be configured similarly to the first switch SW1.

  The electric path from the first external terminal 101 to the first switch SW1 or the second switch SW2 is configured by the bus bar of the bus bar unit 90. Similarly, the electric path from the second external terminal 102 to the first switch SW1 and the third switch SW3 is composed of a bus bar. The electric path from the second switch SW2 to the battery module 20 or the fourth switch SW4 is composed of a bus bar. The electric path from the third external terminal 103 to the fourth switch SW4 and the third switch SW3 is composed of a bus bar.

  On the other hand, in the first switch SW<b>1 to the fourth switch SW<b>4, the circuit board 30 is provided with an electrical path that connects the switching elements in series. Hereinafter, the configuration for connecting the switch elements will be described in detail. It should be noted that the first switch SW1 to the fourth switch SW4 are connected in the same manner except that the number of switch elements connected is different. Therefore, the first switch SW1 will be described as an example, and the description of the second switch SW2 to the fourth switch SW4 will be omitted.

  As shown in FIG. 8, the first switch elements Sa1 to Sa3 are arranged side by side (in a row (in a row in this embodiment)) on the battery module 20 side in the depth direction DD. On the other hand, the first switch elements Sa4 to Sa6 are arranged side by side (in a row (in this embodiment, one row)) on the other side in the depth direction DD. In FIG. 8, the first switch elements Sa1 to Sa3 are arranged on the upper side and the first switch elements Sa1 to Sa3 are arranged on the lower side. Moreover, in the depth direction DD, the first switch elements Sa1 to Sa3 are arranged so as to face the first switch elements Sa4 to Sa6, respectively. Further, the straight line where the first switch elements Sa1 to Sa3 are arranged is parallel to the straight line where the first switch elements Sa4 to Sa6 are arranged.

  As shown in FIG. 6, the first layer 31 to the fourth layer 34 are formed of a conductor in a thin film shape, and are made of, for example, a copper foil or the like. The first layer 31 to the fourth layer 34 are provided by printing or the like on the first substrate 35 to the third substrate 37. Specifically, the first layer 31 is provided by being printed on the surface (upper surface) of the first substrate 35. The second layer 32 is provided by being printed on the surface (upper surface) of the second substrate 36. The third layer 33 is provided by being printed on the surface (upper surface) of the third substrate 37. The fourth layer 34 is provided by being printed on the surface (lower surface) of the third substrate 37.

  The second layer 32 may be provided on any surface of the first substrate 35 and the second substrate 36 as long as it is provided between the first substrate 35 and the second substrate 36. Similarly, the third layer 33 may be provided on any surface of the second substrate 36 and the third substrate 37 as long as it is provided between the second substrate 36 and the third substrate 37.

  Further, the circuit board 30 is provided with a plurality of through vias 51 to 54 (multilayer through via holes) penetrating the first layer 31 to the fourth layer 34 (and the first substrate 35 to the third substrate 37). That is, the through vias 51 to 54 are provided so as to intersect (perpendicular to) the first layer 31 to the fourth layer 34. The through vias 51 to 54 are configured by inserting a conductor (for example, copper plating) inside the through holes provided in the first layer 31 to the fourth layer 34. Therefore, it is possible to pass a current through the through vias 51 to 54. Further, heat can be transferred through the through vias 51 to 54. Therefore, the through vias 51 to 54 correspond to connecting members that connect a plurality of conductive layers.

  Next, the configuration of each of the first layer 31 to the fourth layer 34 in the region where the first switch SW1 is arranged (region shown by the broken line in FIG. 8) will be described. As shown in FIG. 9, the first layer 31 is provided with an electric path pattern through which an electric current flows, and serves as an electric path layer. The electric path pattern of the first layer 31 is divided into two. Of the electric path pattern of the first layer 31, in the depth direction DD, the area (upper area) on the first switch element Sa1 to Sa3 side is referred to as a first area 311 and the area on the first switch element Sa4 to Sa6 side. The (lower area) is referred to as a second area 312.

  The first region 311 is connected to the drain terminals of the first switch elements Sa1 to Sa3. The first region 311 is a rectangular current-carrying region, and its longitudinal direction is provided along the width direction WD. The length of the first region 311 in the longitudinal direction is at least longer than the width from the first switch element Sa1 to the first switch element Sa3.

  Similarly, the second region 312 is connected to the drain terminals of the first switch elements Sa4 to Sa6. The second region 312 is a rectangular current-carrying region, and its longitudinal direction is provided along the width direction WD. Further, the length of the second region 312 in the longitudinal direction is at least longer than the width from the first switch element Sa4 to the first switch element Sa6.

  In the first layer 31, the first region 311 and the second region 312 are separated by the insulating region 313. That is, in the first layer 31, the first region 311 and the second region 312 are not connected. Specifically, a linear insulating region 313 is provided between the first region 311 and the second region 312 along the width direction WD.

  A temperature detecting element 314 is arranged between the first region 311 and the second region 312. Further, an electric path pattern 315 connected to this temperature detecting element 314 is provided between the first area 311 and the second area 312. The electric path pattern 315 is not connected to the first region 311 and the second region 312 in the first layer 31. The electric path pattern 315 connected to the temperature detection element 314 is connected to the microcomputer 80 or the like as a control unit and is configured to detect the temperature of each switch element and output the detection result.

  Further, in the first layer 31, a plurality of through vias 51 are arranged in the first region 311 and are connected to the first region 311. Similarly, in the first layer 31, a plurality of through vias 52 are arranged in the second region 312 and are connected to the second region 312. Further, the plurality of through vias 53 are also arranged in each of the plurality of insulating regions 316 provided in the first region 311. Similarly, the plurality of through vias 54 are also arranged in the plurality of insulating regions 317 provided in the second region 312.

  Hereinafter, the through via 51 connected to the first region 311 will be referred to as a first through via 51, and the through via 52 connected to the second region 312 will be referred to as a second through via 52. Further, the through via 53 arranged in the insulating region 316 in the first region 311 is referred to as a third through via 53, and the through via 54 arranged in the insulating region 317 in the second region 312 is referred to as a fourth through via. It is shown as 54.

  The second layer 32 will be described with reference to FIG. Note that the upper side of FIG. 10 is the first switch elements Sa1 to Sa3 side, and is a view of the second layer 32 seen from above. The second layer 32 is provided with an electric path pattern through which a current flows and serves as a path layer. The electric path pattern of the second layer 32 has a substantially rectangular shape, and the length in the width direction WD is longer than that in the depth direction DD. The electric path pattern of the second layer 32 is provided so as to be connected from the connection position of the first switch elements Sa1 to Sa3 to the connection position of the first switch elements Sa4 to Sa6 in the depth direction DD. That is, an insulating region that separates the two regions is not provided between the first switch elements Sa1 to Sa3 and the first switch elements Sa4 to Sa6.

  The path width (length in the width direction WD) in the first region 311 and the third region 321 on the side of the first switch elements Sa1 to Sa3 is wider than the distance between both ends of the first switch elements Sa1 to Sa3. There is. Similarly, the path width (length in the width direction WD) in the second region 312 and the fourth region 322 on the side of the first switch elements Sa4 to Sa6 is wider than the distance to both ends of the first switch elements Sa4 to Sa6. Is becoming

  In the second layer 32, in the vicinity of the center in the depth direction DD, a region in which the length in the width direction WD orthogonal to the current direction is defined with the first region 311 in which the first switch elements Sa1 to Sa3 are arranged as a reference. Is provided. More specifically, in the second layer 32, a region (hereinafter, referred to as a constricted region 323) in which the route width of the electrical route pattern is narrower than that in the first region 311 is provided near the center in the depth direction DD. ing. More specifically, the electric path pattern of the second layer 32 is provided with a linear cut 324 along the width direction WD from the outside in the width direction WD at approximately the center in the depth direction DD. That is, the linear insulating region 324a is provided from the outer side to the inner side in the width direction WD.

  The cut 324 is formed so as to extend to both sides in the depth direction DD at the inner end portion in the width direction WD. That is, a linear insulating region 324b is provided at the inner end in the width direction WD of the insulating region 324a extending from the outer side to the inner side in the width direction WD from the center to the outer side in the depth direction DD. Due to this cut 324, the electrical path pattern of the second layer 32 has a constricted region 323 of width WD1 (length in the width direction WD) and length DD1 (length in the depth direction DD) near the center in the depth direction DD. Are formed. It can be said that the constricted region 323 is a set region in which the length in the width direction WD orthogonal to the current direction is determined with the first region 311 in which the plurality of first switch elements Sa1 to Sa3 are arranged as a reference.

  In the electric path pattern of the second layer 32, a region closer to the first switch elements Sa1 to Sa3 than the constricted region 323 or the insulating region 324a in the depth direction DD is referred to as a third region 321, and the constricted region 323 or the insulating region. An area closer to the first switch elements Sa4 to Sa6 than the area 324a is referred to as a fourth area 322. When the first layer 31 and the second layer 32 are stacked, the third region 321 is included in the first region 311. Similarly, when the first layer 31 and the second layer 32 are overlapped, the fourth region 322 is included in the second region 312.

  In the second layer 32, the through vias 51 to 54 are arranged so as to be connected to the electrical path pattern. Specifically, the first through via 51 arranged in the first region 311 in the first layer 31 and connected to the first region 311 is arranged in the third region 321 in the second layer 32, and is connected to the third region 321. It is connected. That is, when the first through via 51 connected to the first region 311 overlaps the constricted region 323 in the depth direction DD, the first penetrating via 51 is arranged closer to the first switch elements Sa1 to Sa3 than the constricted region 323. It is connected to the electric path pattern of the two layers 32. On the other hand, when the first through via 51 connected to the first region 311 does not overlap the constricted region 323 in the depth direction DD, the first through via 51 is arranged closer to the first switch elements Sa1 to Sa3 than the insulating region 324a. It is connected to the electric path pattern of the second layer 32.

  Further, the second through via 52 arranged in the second region 312 in the first layer 31 and connected to the second region 312 is arranged in the fourth region 322 in the second layer 32 and connected to the fourth region 322. Has been done. That is, when the second through via 52 connected to the second region 312 overlaps the constricted region 323 in the depth direction DD, the second through via 52 is arranged closer to the first switch elements Sa4 to Sa6 than the constricted region 323, and It is connected to the electric path pattern of the two layers 32. On the other hand, when the second through via 52 connected to the second region 312 does not overlap the constricted region 323 in the depth direction DD, the second through via 52 is arranged closer to the first switch elements Sa4 to Sa6 than the insulating region 324a. It is connected to the electric path pattern of the second layer 32.

  That is, the constricted region 323 is provided in the electric path pattern in a region where the through vias 51 and 52 connected to the first region 311 and the second region 312 are not arranged. As a result, the constricted region 323 is not connected to the first region 311 and the second region 312 via the through vias 51 and 52.

  On the other hand, the third penetrating via 53 and the fourth penetrating via 54 provided in the constricted region 323 of the second layer 32 and connected to the constricted region 323 include the first through-hole 311 and the second through-region 312 in the first layer 31. Of the insulating regions 316 and 317. That is, the through vias 53 and 54 provided in the constricted region 323 are arranged so that the first via 311 and the second region 312 are not connected to the first switch elements Sa to Sa6 in the first layer 31 via the electric path pattern. The insulating regions 316 and 317 are insulated from each other. Since the third layer 33 has the same structure as the second layer 32, the description thereof will be omitted.

  The fourth layer 34 will be described with reference to FIG. Note that the upper side of FIG. 11 is the first switch elements Sa1 to Sa3 side, and is a view of the fourth layer 34 seen from above. A heat dissipation pattern 340 is provided on the fourth layer 34. The heat dissipation pattern 340 of the fourth layer 34 is divided into two. In the heat dissipation pattern 340 of the fourth layer 34, in the depth direction DD, a region on the first switch element Sa1 to Sa3 side is referred to as a fifth region 341, and a region on the first switch element Sa4 to Sa6 side is a sixth region. It is shown as 342.

  The fifth region 341 is a horizontally long region, and its longitudinal direction is provided along the width direction WD. Further, the length in the longitudinal direction of the fifth region 341 is at least longer than the width from the first switch element Sa1 to the first switch element Sa3.

  Similarly, the sixth region 342 is a horizontally long region, and its longitudinal direction is provided along the width direction WD. The length of the sixth region 342 in the longitudinal direction is at least longer than the width from the first switch element Sa4 to the first switch element Sa6.

  In the fourth layer 34, the fifth region 341 and the sixth region 342 are separated by the insulating region 343. That is, in the fourth layer 34, the fifth region 341 and the sixth region 342 are not connected. The insulating region 343 has a large length (width) in the depth direction DD near the center in the width direction WD.

  In addition, when the first layer 31 and the fourth layer 34 are stacked, the fifth region 341 is included in the first region 311. Similarly, when the first layer 31 and the fourth layer 34 are stacked, the sixth region 342 is included in the second region 312. When the second layer 32 (or the third layer 33) and the fourth layer 34 are stacked, the fifth region 341 substantially overlaps the third region 321 and does not overlap the constricted region 323. Similarly, when the second layer 32 (or the third layer 33) and the fourth layer 34 are stacked, the sixth region 342 substantially overlaps the fourth region 322 and does not overlap the constricted region 323.

  Further, when the second layer 32 (or the third layer 33) and the fourth layer 34 are stacked, the constricted region 323 is substantially included in the insulating region 343 provided between the fifth region 341 and the sixth region 342. .. That is, the length in the width direction WD in the central portion of the insulating region 343 is substantially the same as the width WD1 of the constricted region 323, and the length in the depth direction DD in the central portion of the insulating region 343 is the length of the constricted region 323. It is almost the same as DD1. Further, the central position of the insulating region 343 and the central position of the constricted region 323 are substantially the same.

  In the insulating region 343 provided near the center in the depth direction DD, the wiring-shaped electric path pattern 344 connected to the fifth region 341 and the sixth region 342 are connected in the center in the width direction WD. A wiring-shaped electric path pattern 345 is provided. These electric path patterns 344 and 345 are respectively connected to terminals of a current detection circuit or a voltage detection circuit (not shown). Through the electric path patterns 344 and 345, the current detection circuit or the voltage detection circuit detects the current or voltage between the first switch elements Sa1 to Sa6 (that is, the first switch SW1) and outputs the detection result to the control unit. Output to the microcomputer 80 or the like.

  In the fourth layer 34, the plurality of first through vias 51 are arranged in the fifth region 341 and are connected to the fifth region 341. The first through via 51 connected to the fifth region 341 is arranged in the first region 311 in the first layer 31, and is connected to the first region 311. Further, the first through via 51 connected to the fifth region 341 is arranged in the third region 321 in the second layer 32 and the third layer 33, and is connected to the third region 321. That is, the plurality of first through vias 51 connected to the fifth region 341 are not arranged in the constricted region 323.

  Specifically, when the first through via 51 connected to the fifth region 341 overlaps the constricted region 323 in the second layer 32 in the depth direction DD, the first switch element is more than the constricted region 323 than the constricted region 323. It is arranged on the Sa1 to Sa3 side. On the other hand, when the first through via 51 connected to the fifth region 341 does not overlap the constricted region 323 in the second layer 32 in the depth direction DD, the first switch element Sa1 to the first switch element Sa1 to the insulating region 324a. It is arranged on the Sa3 side.

  Similarly, in the fourth layer 34, the plurality of second through vias 52 are arranged in the sixth region 342 and are connected to the sixth region 342. The second penetrating via 52 connected to the sixth region 342 is arranged in the second region 312 in the first layer 31, and is connected to the second region 312. The second penetrating via 52 connected to the sixth region 342 is arranged in the fourth region 322 in the second layer 32 and the third layer 33, and is connected to the fourth region 322. That is, the second penetrating via 52 connected to the sixth region 342 is not arranged in the constricted region 323.

  Specifically, when the second through via 52 connected to the sixth region 342 overlaps with the constricted region 323 in the second layer 32 (or the third layer 33) in the depth direction DD, the constricted region 323. It is arranged closer to the first switch elements Sa4 to Sa6 than 323 is. On the other hand, when the second through via 52 connected to the sixth region 342 does not overlap the constricted region 323 in the second layer 32 (or the third layer 33) in the depth direction DD, the second through via 52 is more than the insulating region 324a. Is also arranged on the first switch elements Sa4 to Sa6 side.

  Also, in the fourth layer 34, the third through via 53 and the fourth through via 54 are arranged in the insulating region 343 between the fifth region 341 and the sixth region 342. These through vias 53 and 54 are arranged in the insulating regions 316 and 317 in the first layer 31, and are not connected to the electric path pattern of the first layer 31. Further, the through vias 53 and 54 arranged in the insulating region 343 between the fifth region 341 and the sixth region 342 are arranged in the constricted region 323 in the second layer 32 and the third layer 33, and the constricted region 323 is formed. 323 is connected.

  Here, how the through vias 51 to 54 are arranged in each layer will be described. In the first layer 31, the first penetrating via 51 connected to the first region 311 is connected to the third region 321 in the second layer 32 (and the third layer 33), and the fifth through via in the fourth layer 34. It is connected to the area 341. In the first layer 31, the second penetrating via 52 connected to the second region 312 is connected to the fourth region 322 in the second layer 32 (and the third layer 33), and in the fourth layer 34, the sixth region 322. It is connected to the area 342. The third through via 53 arranged in the insulating region 316 in the first region 311 is connected to the constricted region 323 in the second layer 32 (and the third layer 33) and in the insulating region 343 in the fourth layer 34. It is located in. The fourth through via 54 arranged in the insulating region 316 in the second region 312 is connected to the constricted region 323 in the second layer 32 (and the third layer 33) and in the insulating region 343 in the fourth layer 34. It is located in.

  Next, the flow of current will be described. 9 to 11, the flow of current is indicated by arrows. In the present embodiment, it is assumed that current flows from the first switch elements Sa1 to Sa3 side to the first switch elements Sa4 to Sa6 side. In this case, the first switch elements Sa1 to Sa3 are the first circuit elements, and the first switch elements Sa4 to Sa6 are the second circuit elements. The same applies when the current flows from the first switching elements Sa4 to Sa6 side to the first switching elements Sa1 to Sa3 side, only the direction of the current is different.

  As shown in FIG. 9, when a signal is input to each gate terminal of the first switch elements Sa1 to Sa6 (when a current is applied), the current input from the external voltage source is the first switch element Sa1. Through Sa3 to the first region 311 via each drain terminal. Examples of the voltage source include the ISG 200 and the battery module 20. The current flowing in the first region 311 flows into the third regions 321 of the second layer 32 and the third layer 33 via the plurality of first through vias 51 connected to the first region 311.

  At this time, the first through via 51 connected to the first region 311 is not arranged in the constricted region 323 in the second layer 32 and the third layer 33. Therefore, the current does not directly flow from the first through via 51 connected to the first region 311 to the constricted region 323.

  Then, as shown in FIG. 10, in the second layer 32 and the third layer 33, the first switch elements Sa1 to Sa3 are arranged in the order of the third region 321, the constricted region 323, and the fourth region 322 along the electric path pattern. Current flows from the side toward the first switch elements Sa4 to Sa6.

  After that, a current flows through the second region 312 in the first layer 31 via the second through via 52 connected to the fourth region 322. As shown in FIG. 9, the current flowing in the second region 312 flows to the external electric load via the drain terminals of the first switch elements Sa4 to Sa6. The electric load includes the first electric load 202, the second electric load 203, the battery module 20, and the like. In this way, current flows along the electric path pattern provided in each layer of the circuit board 30.

  Since the first region 311 and the second region 312 are not connected, the current does not directly flow from the first region 311 to the second region 312. Similarly, since the fifth region 341 and the sixth region 342 are not directly connected, the current does not flow directly from the fifth region 341 to the sixth region 342. The fifth region 341 and the sixth region 342 are connected via the electric path patterns 344 and 345 and the current detection circuit (or voltage detection circuit), and current may flow through these paths. . However, since the circuit characteristic of the current detection circuit (or voltage detection circuit) is extremely large compared to the circuit characteristic of the electric path pattern on the circuit board 30, even if a current flows, the flowing current is negligible. is there.

  Thus, the current passing through the circuit board 30 always passes through the constricted regions 323 of the second layer 32 and the third layer 33. The constricted region 323 has a narrower path width than the other paths in the electric path pattern on the circuit board 30, and thus the current is most difficult to flow. The path width is the width in the direction orthogonal to the direction of current flow. Therefore, the circuit characteristics (resistance and impedance) indicating the difficulty of the current flow in the electric path pattern are determined by the length and width of the constricted region 323. Since the thickness is almost uniform, the thickness of the conductive layer does not affect the circuit characteristics. That is, it can be said that the circuit characteristics of the electric path pattern can be set based on the width WD1 and the length DD1 of the constricted region 323.

  Further, in the constricted region 323 where the path width is narrow, it is difficult for current to flow (the impedance is large), and therefore heat is more likely to be generated as compared with other regions (the third region 321, the fourth region 322, etc.). .. Therefore, it is desirable that the constricted region 323 be connected to the heat radiation pattern via the through via to radiate heat.

  However, since the heat dissipation patterns also have conductivity, connecting the heat dissipation patterns may bypass the constricted region 323, that is, a current may flow through the heat dissipation pattern. In this case, the circuit characteristics are affected, and the circuit characteristics cannot be determined by the shape of the constricted region 323. For example, in the fourth layer 34, when through vias having different potentials are connected via a heat radiation pattern, a current flows through the heat radiation pattern, bypassing the constricted region 323. In this case, the circuit characteristics cannot be determined only by the shape of the constricted region 323. Therefore, the circuit board 30 of this embodiment has the following configuration.

  The fourth layer 34 is provided with heat dissipation patterns 61 and 62 formed of a conductor (for example, copper foil) in a thin film shape. Therefore, the fourth layer 34 can be said to be a heat dissipation layer. The heat dissipation patterns 61 and 62 are arranged in the insulating region 343 between the fifth region 341 and the sixth region 342. When the fourth layer 34 and the second layer 32 (or the third layer 33) are stacked, the heat dissipation patterns 61 and 62 are arranged so as to be included in the constricted region 323.

  A plurality of heat radiation patterns 61 and 62 are provided in the insulating region 343 between the fifth region 341 and the sixth region 342, and each heat radiation pattern 61 and 62 is formed in a rectangular shape. The heat dissipation patterns 61 and 62 are arranged in two rows in the depth direction DD and twelve rows in the width direction WD.

  Further, through-vias 53 and 54 are arranged in the heat dissipation patterns 61 and 62, and are connected to the through-vias 53 and 54, respectively. That is, the heat dissipation patterns 61 and 62 are independently provided for the through vias 53 and 54. Specifically, in the heat dissipation pattern 61 arranged on the first switch elements Sa1 to Sa3 side, the third through vias 53 are arranged, and are connected to the third through vias 53. Further, in the heat dissipation patterns 62 arranged on the first switch elements Sa4 to Sa6 side, the fourth through vias 54 are arranged and connected to the fourth through vias 54, respectively. On the other hand, the heat dissipation patterns 61 and 62 are separated by the insulating region 343 for each of the through vias 53 and 54.

  The through vias 53 and 54 connected to the heat dissipation patterns 61 and 62 are arranged in the constricted region 323 and connected to the constricted region 323 in the second layer 32 and the third layer 33, as described above. The through vias 53 and 54 connected to the heat dissipation patterns 61 and 62 are arranged in the insulating regions 316 and 317 in the first layer 31, and are not connected to the electric path pattern of the first layer 31.

  Since the heat dissipation patterns 61 and 62 are independently provided in this way, even if they are connected to the through vias 53 and 54 provided in the constricted region 323 in the second layer 32 and the third layer 33, No current flows in the four layers 34 via the heat dissipation patterns 61 and 62. Similarly, in the first layer 31, no current flows through the through vias 53 and 54 provided in the constricted region 323.

  More specifically, the through vias 53 and 54 connected to the constricted region 323 are provided in two rows along the current direction. The current direction is determined by the arrangement of the first switch elements Sa1 to Sa6 and the electric path pattern. In the present embodiment, the constricted area 323 is linearly provided along the depth direction DD, and the first switch elements Sa1 to Sa3 and the first switch elements Sa4 to Sa6 are arranged side by side in the depth direction DD. There is. Therefore, in the constricted area 323, the current direction is along the depth direction DD.

  In the constricted region 323, it is more difficult for current to flow (the impedance is larger) than in regions where the path width is wide such as the third region 321. Therefore, in the constricted region 323, when the position in the current direction is different, the electric potential is also different. That is, in the constricted region 323, the potential of the third through via 53 is different from the potential of the fourth through via 54 whose position in the current direction is different from that of the third through via 53.

  However, in the fourth layer 34, the heat dissipation patterns 61 and 62 connected to the through vias 53 and 54 are separated by the insulating region 343 and provided independently of each other. That is, in the fourth layer 34, the heat dissipation pattern 61 connected to the third through via 53 and the heat dissipation pattern 62 connected to the fourth through via 54 are not connected. Therefore, the through vias 53 and 54 having different potentials are not connected to each other via the heat radiation patterns 61 and 62, and no current flows through the heat radiation patterns 61 and 62. Further, in the constricted region 323, current is less likely to flow, so heat is easily generated, but the heat generated in the constricted region 323 is transferred to the heat dissipation patterns 61, 62 via the plurality of through vias 53, 54. .

  According to this embodiment described in detail above, the following effects can be obtained.

  The heat dissipation patterns 61 and 62 are provided on a layer (fourth layer 34) different from the conductive layer (first layer 31 to third layer 33) provided with the electric path pattern through which the currents from the first switch elements Sa1 to Sa6 flow. Was established. Thereby, the size of the heat dissipation patterns 61 and 62 can be set without interfering with the electric path patterns provided in the first layer 31 to the third layer 33, and the heat dissipation efficiency can be improved. That is, the exposed area can be increased and the heat dissipation efficiency can be improved. Further, since the electric path pattern is connected to the heat dissipation patterns 61 and 62 through the plurality of through vias 53 and 54, heat is efficiently dissipated as compared with the case where the electric path pattern is connected through one through via. can do.

  By the way, when a plurality of through vias 53 and 54 arranged at different positions in the current direction are connected to each other via a heat radiation pattern, a current may flow in the heat radiation pattern by bypassing the electric path pattern. .. In this case, the circuit characteristics (for example, resistance and impedance) indicating the difficulty of current flow may be affected not only by the electrical path pattern but also by the shape and connection of the heat radiation pattern. Therefore, the heat dissipation patterns 61, 62 connected to any of the plurality of through vias 53, 54 arranged at different positions in the current direction are separated by the insulating region 343 in the fourth layer 34, so that the heat dissipation patterns 61, The through vias 53 and 54 connected to 62 and the heat radiation patterns 61 and 62 connected to the through vias 53 and 54 arranged at different positions are provided independently of each other. As a result, no current flows through the heat radiation patterns 61 and 62, and the circuit characteristics are determined by the electric path pattern. That is, the influence of the heat radiation patterns 61 and 62 on the circuit characteristics can be suppressed.

  In the constricted region 323, which has a narrower path width than the others, of the electrical path pattern in which the current flows from the first switch elements Sa1 to Sa3 to the first switch elements Sa4 to Sa6, other wide areas (third area 321, fourth area). It becomes more difficult for current to flow as compared with the region 322). As a result, when the current passes through the constricted region 323, the amount of heat generated increases. Therefore, by connecting the constricted region 323 and the heat radiation patterns 61 and 62, heat can be efficiently radiated. Further, since it is more difficult for current to flow in the constricted region 323 having a narrower path width than in the wider region, it can be said that the circuit characteristic of the electric path pattern is determined by this narrow region.

  However, if a plurality of through vias 53 and 54 arranged in such a constricted region 323 and arranged at different positions in the current direction are connected to each other via a heat radiation pattern, the constricted region 323 in which current hardly flows. A current may flow by bypassing. In this case, the circuit characteristics of the electric path pattern cannot be determined only by the difficulty of the current flow in the constricted region 323 having a narrower path width than the others. Therefore, the heat radiation patterns 61 and 62 connected to the narrowed region 323 having a narrow path width through the through vias 53 and 54 are provided independently of each other, so that the circuit characteristics of the electric path pattern are different from each other. The narrowness of the narrowed region 323 is determined by the difficulty of the current flow. This facilitates setting of circuit characteristics in the electric path pattern.

  The electrical path pattern is to connect in series a plurality of first switch elements Sa1 to Sa3 connected in parallel and a plurality of first switch elements Sa4 to Sa6 connected in parallel. Therefore, a large current may flow as compared with the case where the first switch elements are connected in series one by one. Even in this case, since no current flows through the heat dissipation patterns 61 and 62, heat can be appropriately dissipated without affecting the circuit characteristics.

  The first switch elements Sa1 to Sa6 are arranged in two rows, and the electric path pattern is linearly provided so as to connect between them. Therefore, the current direction can be determined by the arrangement of the first switch elements Sa1 to Sa6 and the shape of the electric path pattern. This makes it possible to appropriately determine the through vias 53, 54 having different positions in the current direction, and to determine the appropriate heat dissipation patterns 61, 62 so that the through vias 53, 54 are not connected by the heat dissipation patterns 61, 62. .

  The electric path pattern is provided such that the path width in the first region 311 where the first switch elements Sa1 to Sa3 are arranged is wider than the distance between the first switch element Sa1 and the first switch element Sa3. On the other hand, the constricted region 323 is narrower than the path width in the first region 311 where the first switch elements Sa1 to Sa3 are arranged. Therefore, current is collected from the first switch elements Sa1 to Sa3 by the electric path pattern, and the collected current flows into the narrowed region 323 having a narrow path width. That is, it is possible to easily specify that the constricted region 323 is a region in which current does not easily flow and has a larger amount of heat generation than other regions. Further, it can be recognized that the constricted region 323 determines the circuit characteristic of the electric path pattern. As described above, since it is possible to specify a region that generates a large amount of heat and may affect the circuit characteristics, it is possible to provide appropriate heat dissipation patterns 61 and 62 on the fourth layer 34.

  The electric path pattern has a third area 321 having a wider path width than the constricted area 323, and the fifth area 341 is connected to connect the first through via 51 arranged in the third area 321. Has been. Since the current hardly circumvents the third region 321 having a wide path width, the electric path pattern has little influence on the circuit characteristics. Therefore, by connecting the fifth regions 341, it is possible to reduce the insulating region and improve the heat dissipation efficiency. The same applies to the sixth region 342.

  The fourth layer 34 provided with the heat dissipation patterns 61 and 62 is arranged as an outer layer. Therefore, as compared with the case where the intermediate layer (the second layer 32 and the third layer 33) provided between the first substrate 35 and the third substrate 37 is provided, the area in contact with the outside is large and the heat dissipation efficiency is improved. Can be improved.

  Of the outer layers (first layer 31 and fourth layer 34) on both sides of the circuit board 30, circuit elements such as a switch element and a temperature detection element 314 are arranged on the first layer 31, and the heat radiation pattern 61, 62 was provided. Therefore, the areas of the heat dissipation patterns 61 and 62 can be increased without being interfered by the circuit elements. In addition, the circuit elements can be easily arranged.

  The circuit board 30 is placed on the facing surface 45a provided on the base member 40, and the heat radiation patterns 61 and 62 are arranged so as to face the facing surface 45a. This makes it easier to transfer the heat from the heat radiation patterns 61 and 62 to the facing surface 45a, and improves the heat radiation efficiency.

  Further, the heat dissipation patterns 61 and 62 are arranged so as to face the facing surface 45 a with the insulating sheet 46 interposed therebetween. Therefore, the heat dissipation patterns 61 and 62 and the facing surface 45a can form a capacitor. Thereby, noise generated in the electric path pattern can be removed via the heat dissipation patterns 61 and 62. Further, by interposing the insulating sheet 46, it is possible to increase the capacity of the capacitor including the heat radiation patterns 61 and 62 and the facing surface 45a. That is, noise can be effectively removed. At the same time, it is possible to reliably prevent the heat radiation patterns 61 and 62 from coming into contact with the facing surface 45a, and to prevent current from flowing from the heat radiation patterns 61 and 62 through the facing surface 45a.

  Since the circuit board 30 is applied to the power supply device 10 of the vehicle-mounted power supply system and is provided with the electric path pattern for connecting the switch elements, a large current can flow. Therefore, by improving the heat dissipation efficiency while suppressing the influence of the heat dissipation patterns 61 and 62 on the circuit characteristics, the circuit board 30 is suitable as a circuit board 30 through which a large current can flow.

(Other embodiments)
The present invention is not limited to the above embodiment and may be implemented as follows, for example. In the following description, the same or equivalent portions in each embodiment are designated by the same reference numerals, and the description of the portions having the same reference numerals is cited.

  The plurality of through vias provided on a straight line along the direction orthogonal to the current direction (width direction WD in the constricted region 323) have the same potential. That is, even if the heat radiation patterns 61 connected to the third through via 53 are connected to each other, no current flows. Similarly, even if the heat radiation patterns 62 connected to the fourth through via 54 are connected to each other, no current flows. Therefore, the heat dissipation patterns 61 connected to the plurality of third through vias 53 having the same potential may be connected to each other. Similarly, the heat dissipation patterns 62 connected to the plurality of fourth through vias 54 having the same potential may be connected to each other. As a result, it is possible to reduce the insulating area required when providing the heat dissipation patterns 61 and 62 independently and to increase the heat dissipation patterns 61 and 62. That is, it is possible to improve the heat dissipation efficiency while suppressing the influence of the heat dissipation patterns 61 and 62 on the circuit characteristics.

  -In the said embodiment, you may connect the thermal radiation pattern connected to the penetration via|veer with the same electric potential.

  -The number and arrangement of through vias may be changed. Further, the shapes of the electric path pattern and the heat radiation pattern may be changed.

  -Each layer is connected using the through vias 51 to 54 penetrating the first layer 31 to the fourth layer 34, but it is not necessary to penetrate all layers to connect. For example, a connection via (blind via) that connects only specific layers may be provided. Specifically, the vias arranged in the constricted region 323 do not have to penetrate the first substrate 35.

  The heat dissipation patterns 61 and 62 may be provided on the first layer 31, which is the outer layer. Further, it may be provided on the second layer 32 or the third layer 33 which is an intermediate layer.

  The insulating sheet 46 may not be provided as long as it is separated from the facing surface 45a. For example, the circuit board 30 may be arranged so as to be floated by a predetermined distance.

  The circuit board 30 may not be placed so that the heat radiation patterns 61 and 62 face the facing surface 45a. For example, the circuit board 30 may be placed upright.

  -In the above embodiment, the number of insulating layers (substrates) stacked may be arbitrarily changed. Similarly, the number of stacked conductive layers may be arbitrarily changed.

  -The constricted region 323 may not be provided in the electric path pattern. In this case, in the fourth layer 34, it is desirable to independently provide a heat radiation pattern for each of the through vias 51 to 54.

  30... Circuit board, 31... 1st layer, 32... 2nd layer, 33... 3rd layer, 34... 4th layer, 35... 1st board, 36... 2nd board, 37... 3rd board, 51... 1st penetration via, 52... 2nd penetration via, 53... 3rd penetration via, 54... 4th penetration via, 61, 62... Heat dissipation pattern, 341... 5th area, 342... 6th area, Sa1-Sa6... 1st Switch element.

Claims (13)

An insulating substrate (35 to 37), a plurality of conductive layers (31 to 34) provided on the surface of the insulating substrate and made of a conductor, and a plurality of conductive layers provided so as to penetrate the insulating substrate. A circuit board (30) including a plurality of conductive connecting members (51 to 54) for connection,
The conductive layer includes an electric path layer (32) through which a current from the circuit elements (Sa1 to Sa6) flows, and a heat dissipation layer (34) provided with heat dissipation patterns (61, 62, 341, 342). ,
The plurality of connecting members are connected to the electric path layer, and there are connecting members arranged at positions different from each other in a current direction in which a current flows,
The heat dissipation pattern has a plurality of heat dissipation patterns respectively connected to the connecting members arranged at the different positions, and each of the heat dissipation patterns is electrically separated by being separated by an insulating region in the heat dissipation layer. Circuit boards provided independently of each other. Current flows from the plurality of first circuit elements (Sa1 to Sa3) to the plurality of second circuit elements (Sa4 to Sa6) in the electric path layer ,
The plurality of first circuit elements are connected in parallel with each other, and the plurality of second circuit elements are connected in parallel with each other,
The electrical path layer connects the plurality of first circuit elements connected in parallel and the plurality of second circuit elements connected in parallel in series. Circuit board. The plurality of first circuit elements and the plurality of second circuit elements are arranged in rows, and the respective rows are arranged to face each other,
The circuit board according to claim 2, wherein the electric path layer is provided so as to extend from the plurality of first circuit elements to the plurality of second circuit elements. In the electric path layer, between the first circuit element and the second circuit element, a length in a width direction orthogonal to the current direction is defined based on a region where the plurality of first circuit elements are arranged. There is a defined setting area (323),
The circuit board according to claim 3, wherein each of the heat radiation patterns provided independently of each other is a heat radiation pattern connected to the setting region via the connection member.   The circuit board according to claim 4, wherein the setting region is a region in which the length in the width direction is narrower than a region in which the plurality of first circuit elements are arranged.   The circuit board according to claim 4 or 5, wherein the heat dissipation pattern has a heat dissipation pattern that connects a plurality of the connecting members arranged in regions (321, 322) other than the setting region in the electric path layer. In the electric path layer, a setting region (323) having a length in a width direction orthogonal to the current direction with respect to a region where the circuit element is arranged is provided,
The circuit board according to claim 1, wherein each of the heat radiation patterns provided independently of each other is a heat radiation pattern connected to the setting region via the connection member.   The circuit board according to claim 1, wherein the heat radiation pattern has a heat radiation pattern that connects a plurality of the connection members arranged along a width direction orthogonal to the current direction. There are a plurality of insulating substrates,
The electric path layer is an intermediate layer sandwiched between the insulating substrates ,
Before SL radiating layer circuit board according to any one of claims 1 to 8 is either of the outer layer exposed to the outside portion provided on both sides of the circuit board.   The circuit board according to claim 9, wherein the circuit element is arranged in one outer layer of the outer layers, and the other outer layer serves as a heat dissipation layer. The circuit board is mounted on a mounting surface (45a) provided in the power supply device,
The circuit board according to claim 1, wherein the heat radiation pattern is arranged so as to face the placement surface. The mounting surface described above has conductivity,
The circuit board according to claim 11, wherein the heat dissipation pattern is arranged so as to face the placement surface via an insulator (46). The circuit board is applied to a power supply device of an in-vehicle power supply system in which a storage battery (20) is connected to a generator (200) or an electric load (201, 202),
The circuit board according to any one of claims 1 to 12, wherein the circuit element is a switching element that switches the electric path layer connected to the storage battery to an energized state or a deenergized state.

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