JP6677363B1 - 電子モジュールおよびスイッチング電源 - Google Patents
電子モジュールおよびスイッチング電源 Download PDFInfo
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- JP6677363B1 JP6677363B1 JP2019564113A JP2019564113A JP6677363B1 JP 6677363 B1 JP6677363 B1 JP 6677363B1 JP 2019564113 A JP2019564113 A JP 2019564113A JP 2019564113 A JP2019564113 A JP 2019564113A JP 6677363 B1 JP6677363 B1 JP 6677363B1
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- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
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- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
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Abstract
Description
図1(A)、(B)、図2、図3、図4に、第1実施形態にかかる電子モジュール100を示す。ただし、図1(A)は、電子モジュール100の斜視図である。図1(B)は、電子モジュール100の分解斜視図であり、積層基板1からFET13を取り外し、はんだ17を省略した状態を示している。図2は電子モジュール100の断面図であり、図1(A)に一点鎖線で示すX−X部分を示している。図3は、電子モジュール100の積層基板1の分解斜視図であり、積層基板1を9層の基体層1a〜1iに分解して示している。ただし、図3においては、一番下に積層された基体層1aの下側主面に形成された第1外部電極2、第2外部電極3、第3外部電極4も破線で示している。図4は、電子モジュール100の等価回路図である。
図5(A)、(B)に、第2実施形態にかかるスイッチング電源200を示す。ただし、図5(A)は、スイッチング電源200の平面図である。図5(B)は、スイッチング電源200の等価回路図である。
図6に、第3実施形態にかかる電子モジュール300を示す。ただし、図6は、電子モジュール300の分解斜視図であり、積層基板1からFET33を取り外した状態を示している。
図7(A)、(B)、図8に、第4実施形態にかかる電子モジュール400を示す。ただし、図7(A)は、電子モジュール400の分解斜視図である。図7(B)は、電子モジュール400の断面図であり、図7(A)に一点鎖線で示すY−Y部分を示している。図8は、電子モジュール400の等価回路図である。
図9に、第5実施形態にかかる電子モジュール500を示す。ただし、図9は、電子モジュール500の断面図である。
図10に、第6実施形態にかかる電子モジュール600を示す。ただし、図10は、電子モジュール600の断面図である。
図11に、第7実施形態にかかる電子モジュール700を示す。ただし、図11は、電子モジュール700の断面図である。
図12、図13に、第8実施形態にかかる電子モジュール800を示す。ただし、図12は、電子モジュール800の分解斜視図である。図13は、電子モジュール800の等価回路図である。
1a〜1i、71g〜71i・・・基体層(磁性体層)
61g〜61i・・・基体層(誘電体層)
2・・・第1外部電極
3・・・第2外部電極
4・・・第3外部電極
5・・・第1中継電極
6・・・第2中継電極
7・・・第3中継電極
8・・・第2キャパシタ電極
9・・・第1接続電極(第1キャパシタ電極)
10・・・第2接続電極
11・・・第3接続電極
12a、12d・・・ビア導体(第1接続導体)
12b、12e・・・ビア導体(第2接続導体)
12c、12f・・・ビア導体(第3接続導体)
12g、52a、52b、87a、87b、87c・・・ビア導体(第4接続導体)
13、13A、13B、33・・・FET
14、34・・・ドレイン電極
15、35・・・ソース電極
16、36・・・ゲート電極
17・・・はんだ
18、88・・・スナバ回路
25・・・基板
41・・・配線(第3接続導体)
51・・・第4中継電極
72・・・誘電体
81・・・第1接続電極(第1キャパシタ電極)
82・・・第2キャパシタ電極
83・・・第3キャパシタ電極
84・・・第4キャパシタ電極
85・・・第5キャパシタ電極
86・・・第6キャパシタ電極
Claims (10)
- 複数の基体層が積層され、対向する第1主面および第2主面と、前記第1主面と前記第2主面とを繋ぐ少なくとも1つの側面とを備えた積層基板と、
複数の端子電極を備え、前記積層基板の前記第2主面に実装されたスイッチング素子と、を備えた電子モジュールであって、
前記第1主面に、第1外部電極、第2外部電極、第3外部電極が形成され、
前記第2主面に、第1接続電極、第2接続電極、第3接続電極が形成され、
前記第1外部電極と前記第1接続電極とが、少なくとも1つの第1接続導体によって電気的に接続され、
前記第2外部電極と前記第2接続電極とが、少なくとも1つの第2接続導体によって電気的に接続され、
前記第3外部電極と前記第3接続電極とが、少なくとも1つの第3接続導体によって電気的に接続され、
前記第1接続電極、前記第2接続電極、前記第3接続電極に、それぞれ、前記スイッチング素子の前記端子電極が接続され、
前記第1接続電極は、第1キャパシタ電極を兼ね、
前記積層基板の前記基体層の層間に第2キャパシタ電極が形成され、
前記第1キャパシタ電極と前記第2キャパシタ電極との間に発生する静電容量によってキャパシタが形成され、
前記第2キャパシタ電極と前記第2接続電極とが、少なくとも1つの第4接続導体によって電気的に接続され、
前記第4接続導体によってインダクタが形成され、
前記キャパシタと前記インダクタとによってスナバ回路が形成された電子モジュール。 - 前記基体層の少なくとも1つが、磁性体によって作製された磁性体層であり、
前記第4接続導体が、少なくとも1つの前記磁性体層を貫通した、請求項1に記載された電子モジュール。 - 前記第1キャパシタ電極を兼ねる前記第1接続電極の面積が、前記第2接続電極の面積よりも大きく、かつ、前記第3接続電極の面積よりも大きい、請求項1または2に記載された電子モジュール。
- 前記スイッチング素子が、前記端子電極としてドレイン電極とソース電極とゲート電極とを備えたFETであり、
前記ドレイン電極が前記第1接続電極に電気的に接続され、
前記ソース電極が前記第2接続電極に電気的に接続され、
前記ゲート電極が前記第3接続電極に電気的に接続された、請求項1ないし3のいずれか1項に記載された電子モジュール。 - 前記スイッチング素子が、前記端子電極としてドレイン電極とソース電極とゲート電極とを備えたFETであり、
前記ソース電極が前記第1接続電極に電気的に接続され、
前記ドレイン電極が前記第2接続電極に電気的に接続され、
前記ゲート電極が前記第3接続電極に電気的に接続された、請求項1ないし3のいずれか1項に記載された電子モジュール。 - 前記第4接続導体の長さが、前記第1キャパシタ電極と前記第2キャパシタ電極との間の距離よりも大きい、請求項1ないし5のいずれか1項に記載された電子モジュール。
- 前記第1接続導体が、少なくとも1つの前記磁性体層を貫通し、
前記第2接続導体が、少なくとも1つの前記磁性体層を貫通した、請求項2ないし5のいずれか1項に記載された電子モジュール。 - 前記第3接続導体が、前記積層基板の前記側面を経由して、前記第3外部電極と前記第3接続電極とを電気的に接続した、請求項1ないし7のいずれか1項に記載された電子モジュール。
- 前記積層基板が、少なくとも1つの前記基体層として、前記積層基板の平面方向の全域にわたる誘電体層、および、前記積層基板の平面方向の一部の領域にわたる誘電体層の少なくとも一方を備え、
前記誘電体層が、前記キャパシタを形成する前記第1キャパシタ電極と前記第2キャパシタ電極との間に配置された、請求項1ないし8のいずれか1項に記載された電子モジュール。 - 基板と、
前記基板に実装された、請求項1ないし9のいずれか1項に記載された電子モジュールと、を備えたスイッチング電源。
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JP2000295846A (ja) * | 1999-04-02 | 2000-10-20 | Cosel Co Ltd | インバータ回路及び直流電源装置 |
JP2004200227A (ja) * | 2002-12-16 | 2004-07-15 | Alps Electric Co Ltd | プリントインダクタ |
JP2015012742A (ja) * | 2013-07-01 | 2015-01-19 | 株式会社日立製作所 | 電力変換装置 |
JP2017085064A (ja) * | 2015-10-30 | 2017-05-18 | 株式会社村田製作所 | 集積回路素子の実装構造 |
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JP2000295846A (ja) * | 1999-04-02 | 2000-10-20 | Cosel Co Ltd | インバータ回路及び直流電源装置 |
JP2004200227A (ja) * | 2002-12-16 | 2004-07-15 | Alps Electric Co Ltd | プリントインダクタ |
JP2015012742A (ja) * | 2013-07-01 | 2015-01-19 | 株式会社日立製作所 | 電力変換装置 |
JP2017085064A (ja) * | 2015-10-30 | 2017-05-18 | 株式会社村田製作所 | 集積回路素子の実装構造 |
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