JP6633967B2 - Ssd通信プロトコルのためのxor基盤のスクランブリング及びディスクランブリング方法及びシステム - Google Patents
Ssd通信プロトコルのためのxor基盤のスクランブリング及びディスクランブリング方法及びシステム Download PDFInfo
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- JP6633967B2 JP6633967B2 JP2016093038A JP2016093038A JP6633967B2 JP 6633967 B2 JP6633967 B2 JP 6633967B2 JP 2016093038 A JP2016093038 A JP 2016093038A JP 2016093038 A JP2016093038 A JP 2016093038A JP 6633967 B2 JP6633967 B2 JP 6633967B2
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- data
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- memory device
- xor
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/062—Securing storage systems
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
- H04L25/03828—Arrangements for spectral shaping; Arrangements for providing signals with specified spectral properties
- H04L25/03866—Arrangements for spectral shaping; Arrangements for providing signals with specified spectral properties using scrambling
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/14—Protection against unauthorised use of memory or access to memory
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/14—Protection against unauthorised use of memory or access to memory
- G06F12/1408—Protection against unauthorised use of memory or access to memory by using cryptography
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/60—Protecting data
- G06F21/606—Protecting data by securing the transmission between two devices or processes
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/78—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data
- G06F21/79—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data in semiconductor storage media, e.g. directly-addressable memories
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/82—Protecting input, output or interconnection devices
- G06F21/85—Protecting input, output or interconnection devices interconnection devices, e.g. bus-connected or in-line devices
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
- G06F3/0658—Controller construction arrangements
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09C—CIPHERING OR DECIPHERING APPARATUS FOR CRYPTOGRAPHIC OR OTHER PURPOSES INVOLVING THE NEED FOR SECRECY
- G09C1/00—Apparatus or methods whereby a given sequence of signs, e.g. an intelligible text, is transformed into an unintelligible sequence of signs by transposing the signs or groups of signs or by replacing them by others according to a predetermined system
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/06—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
- H04L9/065—Encryption by serially and continuously modifying data stream elements, e.g. stream cipher systems, RC4, SEAL or A5/3
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/08—Key distribution or management, e.g. generation, sharing or updating, of cryptographic keys or passwords
- H04L9/0861—Generation of secret information including derivation or calculation of cryptographic keys or passwords
- H04L9/0869—Generation of secret information including derivation or calculation of cryptographic keys or passwords involving random numbers or seeds
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/12—Transmitting and receiving encryption devices synchronised or initially set up in a particular manner
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/10—Providing a specific technical effect
- G06F2212/1052—Security improvement
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/20—Employing a main memory using a specific memory technology
- G06F2212/202—Non-volatile memory
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Security & Cryptography (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Software Systems (AREA)
- Signal Processing (AREA)
- Computer Networks & Wireless Communication (AREA)
- Health & Medical Sciences (AREA)
- Bioethics (AREA)
- General Health & Medical Sciences (AREA)
- Human Computer Interaction (AREA)
- Spectroscopy & Molecular Physics (AREA)
- Power Engineering (AREA)
- Storage Device Security (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Applications Claiming Priority (6)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201562158420P | 2015-05-07 | 2015-05-07 | |
| US62/158,420 | 2015-05-07 | ||
| US201562209166P | 2015-08-24 | 2015-08-24 | |
| US62/209,166 | 2015-08-24 | ||
| US15/064,191 | 2016-03-08 | ||
| US15/064,191 US10121013B2 (en) | 2015-05-07 | 2016-03-08 | XOR-based scrambler/descrambler for SSD communication protocols |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2016213838A JP2016213838A (ja) | 2016-12-15 |
| JP2016213838A5 JP2016213838A5 (cg-RX-API-DMAC7.html) | 2019-05-16 |
| JP6633967B2 true JP6633967B2 (ja) | 2020-01-22 |
Family
ID=57222715
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2016093038A Active JP6633967B2 (ja) | 2015-05-07 | 2016-05-06 | Ssd通信プロトコルのためのxor基盤のスクランブリング及びディスクランブリング方法及びシステム |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US10121013B2 (cg-RX-API-DMAC7.html) |
| JP (1) | JP6633967B2 (cg-RX-API-DMAC7.html) |
| KR (1) | KR102329307B1 (cg-RX-API-DMAC7.html) |
| CN (1) | CN106155584B (cg-RX-API-DMAC7.html) |
| TW (1) | TWI714579B (cg-RX-API-DMAC7.html) |
Families Citing this family (18)
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| US20180270205A1 (en) * | 2017-03-15 | 2018-09-20 | Image Match Design Inc. | Fingerprint-sensing integrated circuit and scrambling encryption method thereof |
| US20180308214A1 (en) * | 2017-04-21 | 2018-10-25 | Intel Corporation | Data scrambling mechanism |
| CN107506326B (zh) * | 2017-07-05 | 2019-03-15 | 芯启源(南京)半导体科技有限公司 | 数据传输加扰和解扰电路、发送和接收装置及系统 |
| KR102452621B1 (ko) * | 2018-06-04 | 2022-10-07 | 삼성전자주식회사 | 선형 피드백 쉬프트 레지스터를 이용하여 데이터를 복구하는 장치 및 이를 포함하는 데이터 송수신 시스템 |
| CN109257088B (zh) * | 2018-08-14 | 2021-07-02 | 深圳市科楠科技开发有限公司 | 一种数据解扰系统及方法 |
| US10956259B2 (en) * | 2019-01-18 | 2021-03-23 | Winbond Electronics Corp. | Error correction code memory device and codeword accessing method thereof |
| EP3935543B1 (en) * | 2019-03-05 | 2024-09-18 | Cryptography Research, Inc. | Side-channel-attack-resistant memory access on embedded central processing units |
| CN110309083B (zh) * | 2019-06-28 | 2021-09-07 | 兆讯恒达科技股份有限公司 | 一种存储器数据加扰方法 |
| CN110309678B (zh) * | 2019-06-28 | 2021-03-19 | 兆讯恒达科技股份有限公司 | 一种内存加扰的方法 |
| CN110321672B (zh) * | 2019-06-28 | 2021-04-09 | 兆讯恒达科技股份有限公司 | 一种生成数据区扰码的方法 |
| US11615025B2 (en) * | 2020-02-10 | 2023-03-28 | SK Hynix Inc. | Encoding and decoding device for system data of storage device |
| EP4246336B1 (en) | 2020-07-15 | 2025-07-16 | Samsung Electronics Co., Ltd. | Storage controller and an operation method of the storage controller |
| KR20220009523A (ko) | 2020-07-15 | 2022-01-25 | 삼성전자주식회사 | 스토리지 컨트롤러, 및 스토리지 컨트롤러의 동작 방법 |
| US11573854B2 (en) * | 2021-02-02 | 2023-02-07 | Nvidia Corporation | Techniques for data scrambling on a memory interface |
| US12210633B2 (en) * | 2021-02-05 | 2025-01-28 | Skyechip Sdn Bhd | Memory controller for improving data integrity and providing data security and a method of operating thereof |
| US20240320088A1 (en) * | 2022-07-27 | 2024-09-26 | SK Hynix Inc. | Data coding device, memory controller, and storage device |
| KR20240062654A (ko) | 2022-11-02 | 2024-05-09 | 삼성전자주식회사 | 반도체 메모리 장치 및 반도체 메모리 장치의 동작 방법 |
| KR20250051882A (ko) | 2023-10-11 | 2025-04-18 | 삼성전자주식회사 | 스토리지 장치 및 그 동작 방법 |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| US7113927B1 (en) * | 1998-10-09 | 2006-09-26 | Victor Company Of Japan, Limited | Data distribution system, data distribution method, portable terminal with data receiving capability, portable terminal with data transmitting/receiving capability, recording medium onto which data content is recorded, encoding apparatus, and decoding apparatus |
| JP2002091828A (ja) * | 2000-09-18 | 2002-03-29 | Sharp Corp | データ処理装置および記憶装置、並びに、それらを使用したデータ転送システム |
| JP4734585B2 (ja) * | 2001-09-28 | 2011-07-27 | ハイ デンスィティ デバイスィズ アクシエセルスカプ | 大容量記憶装置におけるデータの暗号化/復号化の方法及び装置 |
| US7227949B2 (en) * | 2002-01-31 | 2007-06-05 | Texas Instruments Incorporated | Separate self-synchronizing packet-based scrambler having replay variation |
| US6933862B2 (en) * | 2003-10-14 | 2005-08-23 | Agilent Technologies, Inc. | Power consumption stabilization system and method |
| JP2005130059A (ja) * | 2003-10-22 | 2005-05-19 | Fuji Xerox Co Ltd | 画像形成装置および交換部品 |
| JP4734906B2 (ja) * | 2004-12-07 | 2011-07-27 | ソニー株式会社 | 情報処理装置、情報記録媒体、および情報処理方法、並びにコンピュータ・プログラム |
| US7412618B2 (en) * | 2005-02-11 | 2008-08-12 | International Business Machines Corporation | Combined alignment scrambler function for elastic interface |
| JP4911452B2 (ja) * | 2006-06-27 | 2012-04-04 | 株式会社メガチップス | 半導体メモリ及びデータ授受システム |
| WO2008127458A2 (en) * | 2006-12-06 | 2008-10-23 | Fusion Multisystems, Inc. (Dba Fusion-Io) | Apparatus, system, and method for a shared, front-end, distributed raid |
| CN103294946B (zh) * | 2007-05-11 | 2016-12-07 | 纳格拉星有限责任公司 | 用于控制安全环境中的处理器执行的设备 |
| KR100921774B1 (ko) * | 2007-12-06 | 2009-10-15 | 한국전자통신연구원 | 스크램블링 시퀀스 생성 장치 |
| US8139430B2 (en) * | 2008-07-01 | 2012-03-20 | International Business Machines Corporation | Power-on initialization and test for a cascade interconnect memory system |
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| US9606863B2 (en) | 2010-10-25 | 2017-03-28 | SMART High Reliability Solutions, LLC | Fabric-based solid state drive architecture |
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| US8713379B2 (en) * | 2011-02-08 | 2014-04-29 | Diablo Technologies Inc. | System and method of interfacing co-processors and input/output devices via a main memory system |
| JP5770383B2 (ja) * | 2011-09-30 | 2015-08-26 | インテル コーポレイション | 高速通信リンクのトレーニング中に電源ノイズを低減する方法及びシステム |
| US8839073B2 (en) | 2012-05-04 | 2014-09-16 | Lsi Corporation | Zero-one balance management in a solid-state disk controller |
| US9471484B2 (en) | 2012-09-19 | 2016-10-18 | Novachips Canada Inc. | Flash memory controller having dual mode pin-out |
| US9099173B2 (en) | 2012-12-14 | 2015-08-04 | Virtium Technology, Inc. | Classifying flash devices using ECC |
| US9246516B2 (en) | 2012-12-20 | 2016-01-26 | Intel Corporation | Techniques for error correction of encoded data |
| US20140310534A1 (en) | 2013-04-15 | 2014-10-16 | Apple Inc. | Data scrambling in memory devices using combined sequences |
| CN103777904B (zh) * | 2014-02-12 | 2017-07-21 | 威盛电子股份有限公司 | 数据储存装置以及数据加扰与解扰方法 |
-
2016
- 2016-03-08 US US15/064,191 patent/US10121013B2/en active Active
- 2016-04-25 KR KR1020160050281A patent/KR102329307B1/ko active Active
- 2016-05-03 TW TW105113696A patent/TWI714579B/zh active
- 2016-05-06 JP JP2016093038A patent/JP6633967B2/ja active Active
- 2016-05-09 CN CN201610302657.2A patent/CN106155584B/zh active Active
Also Published As
| Publication number | Publication date |
|---|---|
| KR102329307B1 (ko) | 2021-11-19 |
| US20160328567A1 (en) | 2016-11-10 |
| KR20160131892A (ko) | 2016-11-16 |
| TW201706903A (zh) | 2017-02-16 |
| CN106155584B (zh) | 2020-07-07 |
| JP2016213838A (ja) | 2016-12-15 |
| US10121013B2 (en) | 2018-11-06 |
| TWI714579B (zh) | 2021-01-01 |
| CN106155584A (zh) | 2016-11-23 |
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