JP6573332B2 - Circuit board and manufacturing method thereof - Google Patents

Description

  The present invention relates to a circuit board and a manufacturing method thereof, and more particularly to a circuit board having a conductive layer having a uniform thickness and a manufacturing method thereof.

  A printed circuit board (PCB) is designed according to the circuit to be manufactured, and circuit components are mounted. In the printed circuit board, after creating a circuit wiring diagram, a wiring made of an electric conductor is formed on a substrate made of an insulator based on the wiring diagram by a method such as machining, chemical processing, or surface treatment. More specifically, such circuit wiring is precisely formed using techniques such as printing, lithography, etching, and electroplating, and as a mounting platform for interconnecting electronic components and circuits between components. It is used.

  Currently, the number of through holes formed in a substrate is increasing. Since the product has a highly functional design, the through holes are particularly concentrated in the chip mounting area. Therefore, the distribution of through holes formed in the substrate is not uniform. Since the distribution of the through holes is not uniform, in the electroplating process, the current is dispersed in the region where the density of the through holes is high, and the current is concentrated in the region where the density of the through holes is low. As a result, the thickness of the conductive layer formed by the electroplating process is uneven in the areas where the through-hole density is high and in the low-hole density, which affects the impedance and resistance of the product. For example, it affects the stability of subsequent processes such as solder ball mount / solder paste printing.

  Therefore, it is required to develop a circuit board having a conductive layer having a uniform thickness and a method for manufacturing the circuit board.

  In view of the above circumstances, the present invention provides a circuit board having a conductive layer having a uniform thickness and a method for manufacturing the circuit board.

  The circuit board of the present invention includes a substrate, a metal layer provided on the surface of the substrate, a conductive layer provided on the surface of the metal layer and including a first conductive layer and a second conductive layer, and the conductive layer. , The metal layer, and a plurality of through holes penetrating the substrate, the region having a high density of the through holes and a region having a low density of the through holes, and the conductive layer having a substantially flat top surface And an interface exists in an adjacent portion of the first conductive layer and the second conductive layer.

  The method for manufacturing a circuit board according to the present invention includes a step of forming a metal layer on a surface of a substrate, a region having a high density of through holes penetrating the metal layer and the substrate, and a region having a low density of the through holes. A step of forming a plurality of the through holes and a first electroplating process so as to cover the surface of the metal layer and the inner surface of the through holes, and the density of the through holes is high. Forming a first conductive layer having a recessed region at a position corresponding to the step, forming a shielding layer on the first conductive layer, forming an opening on a surface of the shielding layer, and opening the opening A step of exposing the recessed region of the first conductive layer and a second electroplating process to form a second conductive layer on the first conductive layer exposed from the opening; Covering the first conductive layer; and Removing the layer, filling the through-hole with a filling, and performing a planarization process for removing a part of the first conductive layer and a part of the second conductive layer Including.

  The method for manufacturing a circuit board according to the present invention includes a step of forming a metal layer on a surface of a substrate, a region having a high density of through holes penetrating the metal layer and the substrate, and a region having a low density of the through holes. A step of forming a plurality of the through holes, a step of forming a shielding layer on the metal layer, an opening is formed on a surface of the shielding layer, and the density of the through holes is high from the opening. Exposing the metal layer in a region; performing a first electroplating process to form a first conductive layer on a surface of the metal layer exposed from the opening; and removing the shielding layer Performing a second electroplating process to cover the first conductive layer and the metal layer and forming a second conductive layer also provided in the through hole; and in the through hole Filling the filling with , And performing a planarization process to remove a portion of the first conductive layer portion and the second conductive layer.

It is a schematic sectional drawing which shows one step of the manufacturing method of the circuit board based on the 1st Embodiment of this invention. It is a schematic sectional drawing which shows one step of the manufacturing method of the circuit board based on the 1st Embodiment of this invention. It is a schematic sectional drawing which shows one step of the manufacturing method of the circuit board based on the 1st Embodiment of this invention. It is a schematic sectional drawing which shows one step of the manufacturing method of the circuit board based on the 1st Embodiment of this invention. It is a schematic sectional drawing which shows one step of the manufacturing method of the circuit board based on the 1st Embodiment of this invention. It is a schematic sectional drawing which shows one step of the manufacturing method of the circuit board based on the 2nd Embodiment of this invention. It is a schematic sectional drawing which shows one step of the manufacturing method of the circuit board based on the 2nd Embodiment of this invention. It is a schematic sectional drawing which shows one step of the manufacturing method of the circuit board based on the 2nd Embodiment of this invention. It is a schematic sectional drawing which shows one step of the manufacturing method of the circuit board based on the 2nd Embodiment of this invention. It is a schematic sectional drawing which shows one step of the manufacturing method of the circuit board based on the 2nd Embodiment of this invention. The result of the roughness meter analysis of the circuit board surface performed after the electroplating process of the manufacturing method of the circuit board of a prior art is shown. The result of the roughness meter analysis of the circuit board surface performed after the planarization process of the manufacturing method of the circuit board of a prior art is shown. The result of the roughness meter analysis of the circuit board surface performed after the 2nd electroplating process of the manufacturing method of the circuit board of the 1st Embodiment of this invention is shown. The result of the roughness meter analysis of the circuit board surface performed after the planarization process of the manufacturing method of the circuit board of the 1st Embodiment of this invention is shown. The result of the roughness meter analysis of the circuit board surface performed after the 2nd electroplating process of the manufacturing method of the circuit board of the 2nd Embodiment of this invention is shown. The result of the roughness meter analysis of the circuit board surface performed after the planarization process of the manufacturing method of the circuit board of the 2nd Embodiment of this invention is shown.

  In order to understand the objects, features, and effects of the present invention in more detail, the technical items of the present invention will be described in detail below using preferred embodiments and the accompanying drawings.

  A circuit board and a manufacturing method thereof according to an embodiment of the present invention will be described below. However, the embodiments described below are merely illustrative of specific embodiments and do not limit the scope of the invention. In the specification and drawings of the present invention, the same or similar components are denoted by the same reference numerals.

  In the present invention, the electroplating process is performed twice. More specifically, a conductive layer is formed on the substrate by the first electroplating process. Thereafter, a conductive layer is further formed by a second plating process in a region where the plating density on the substrate is relatively small (a region where the density of the through holes is high and the conductive layer formed on the substrate is thin). The thickness of the conductive layer in the region having a high density is made higher than the thickness of the conductive layer in the other region (the region having a low density of through holes). Finally, a flattening process is performed. Thus, in the present invention, the thickness uniformity of the entire conductive layer is effectively improved.

  FIG. 1E is a schematic cross-sectional view of the circuit board according to the first embodiment of the present invention. In the present embodiment, the circuit board is made of a resin material and has a substrate 100 having an opposing surface 102 (also referred to as a substrate surface 102), a metal layer 110 provided on the surface 102 of the substrate 100, and a surface of the metal layer 110. And a plurality of through holes penetrating the conductive layer 170, the metal layer 110, and the substrate 100. The through holes are filled with a filler to form a filling hole 180. In the present embodiment, the circuit board has through-holes formed unevenly, and a region having a high density of through-holes (see 122 in FIG. 1A) and a region having a low density of through-holes (124 in FIG. 1A). See). In this embodiment, the conductive layer 170 is also formed on the inner surface of the through hole, and the through hole is filled with a filler made of a conductive material or a non-conductive material.

  The conductive layer 170 has a substantially flat upper surface 172. The conductive layer 170 includes a first conductive layer 130 and a second conductive layer 160, and an interface S <b> 1 exists in an adjacent portion of the first conductive layer 130 and the second conductive layer 160. The first conductive layer 130 and the second conductive layer 160 can be made of the same or different conductive materials. As the conductive material, for example, copper, gold, nickel, palladium, silver, tin, or a combination of a plurality of materials selected from these materials can be used. In the present embodiment, the first conductive layer 130 and the second conductive layer 160 are copper.

  In the present embodiment, the second conductive layer 160 is provided on the first conductive layer 130. In the present embodiment, as shown in FIG. 1E, the cross-sectional outline of the first conductive layer 130 is a concave shape, the cross-sectional outline of the second conductive layer 160 is a convex shape, and the interface S1 is a concave surface. It exists in the form.

  FIG. 2E is a schematic cross-sectional view of a circuit board according to a second embodiment of the present invention. In the present embodiment, the circuit board is made of a resin material and has a substrate 200 having an opposing surface 202 (also referred to as a substrate surface 202), a metal layer 210 provided on the surface 202 of the substrate 200, and a surface of the metal layer 210. And a plurality of through holes that penetrate the conductive layer 270, the metal layer 210, and the substrate 200, and the through holes are filled with a filler to form a filling hole 280. In the present embodiment, the circuit board is formed with non-uniform through-holes, and a region having a high through-hole density (see 222 in FIG. 2A) and a region having a low through-hole density (see 224 in FIG. 2A). See). In this embodiment, the conductive layer 270 is also formed on the inner surface of the through hole, and the through hole is filled with a filler made of a conductive material or a non-conductive material.

  The conductive layer 270 has a substantially flat upper surface 272. The conductive layer 270 includes a first conductive layer 250 and a second conductive layer 260, and an interface S <b> 2 exists in an adjacent portion of the first conductive layer 250 and the second conductive layer 260. The first conductive layer 250 and the second conductive layer 260 can be made of the same or different conductive materials. As the conductive material, for example, copper, gold, nickel, palladium, silver, tin, or a combination of a plurality of materials selected from these materials can be used. In the present embodiment, the first conductive layer 250 and the second conductive layer 260 are copper.

  The circuit board of the second embodiment is different from the circuit board of the first embodiment shown in FIG. 1E in that both the first conductive layer 250 and the second conductive layer 260 are on the surface of the metal layer 210. The first conductive layer 250 is provided at a position corresponding to the region 222 having a high through-hole density, and the second conductive layer 260 is provided in the region 224 having a low through-hole density. It is that. As shown in FIG. 2E, in this embodiment, unlike the circuit board of the first embodiment, the interface S2 existing in the adjacent portion of the first conductive layer 250 and the second conductive layer 260 is the surface of the substrate. Exists perpendicular to 202.

  In a circuit board manufactured by a conventional technique, after a conductive layer having a non-uniform thickness is formed, the conductive layer is flattened by a flattening process so that the thickness of the conductive layer is uniform. Therefore, the conventional circuit board may have an excessively thin conductive layer. In contrast, in the manufacturing method of the present invention, the difference in the thickness of the conductive layer formed by electroplating between the region where the density of the through holes is high and the region where the density of the through holes is low is calculated twice. By performing the electroplating process, the planarization process is performed after the effective reduction. Therefore, in the present invention, even when the upper surface of the conductive layer is made almost flat by the planarization treatment, the conductive layer can maintain a sufficient thickness, and the overall uniformity of the thickness of the conductive layer is effectively improved. doing.

  1A to 1E are schematic cross-sectional views illustrating a method for manufacturing a circuit board according to the first embodiment of the present invention.

  First, a substrate 100 having an opposing surface 102 is prepared. In the present embodiment, a substrate 100 made of a resin material is used. A metal layer 110 is formed on the substrate surface 102. Next, as shown in FIG. 1A, a plurality of through holes 120 penetrating the metal layer 110 and the substrate 100 formed on the opposing substrate surface 102 are formed by laser drilling or mechanical drilling. At this time, the through hole 120 is formed so that the region 122 having a high density of the through hole 120 and the region 124 having a low density of the through hole 120 are formed. After performing the laser drilling process or the mechanical drilling process, a step of removing smear may be performed to clean a residue (not shown) in the through-hole 120 generated by the laser drilling or the mechanical drilling.

  Next, as shown in FIG. 1B, a first conductive layer 130 that covers the surface of the metal layer 110 and the inner surface of the through hole 120 is formed by a first electroplating process. The formed first conductive layer 130 includes a recessed region 132 at a position corresponding to the region 122 where the density of the through holes 120 is high. The contour of the recessed area 132, that is, the height of the recessed area with respect to the substrate surface 102, gradually decreases from the outer periphery (both sides in the cross section) toward the center. Before performing the first electroplating process, a seed layer (not shown) may be formed conformally on the surface of the metal layer 110 and the inner surface of the through hole 120.

  An image transfer process is performed to form a shielding layer 140 on the first conductive layer 130. The shielding layer 140 may be a photoresist layer such as a dry film, for example. Next, an opening 150 is formed on the surface of the shielding layer 140 by an exposure process and an etching process, and the recessed region 132 of the first conductive layer 130 is exposed from the opening 150. Next, a second electroplating process is performed to form a second conductive layer 160 on the first conductive layer 130 exposed from the opening 150 formed in the shielding layer 140, as shown in FIG. 1C. One conductive layer 130 is covered. An interface S <b> 1 is formed between adjacent portions of the first conductive layer 130 and the second conductive layer 160. The outline of the cross section of the first conductive layer 130 is a concave shape, the outline of the cross section of the second conductive layer 160 is a convex shape, and the interface S1 exists in a concave surface. As shown in FIG. 1C, the contour of the interface S1 and the contour of the hollow region 132 are the same.

  The thickness of the second conductive layer 160 can be adjusted according to the depth of the recessed region 132 of the first conductive layer 130. In the present embodiment, the thickness of the second conductive layer 160 is larger than the depth of the recessed region 132.

  Next, as shown in FIG. 1D, the shielding layer 140 is removed.

  Subsequently, the through hole 120 is filled with a filler. The filling may be a conductive material or a non-conductive material. Next, planarization treatment is performed to remove a part of the first conductive layer 130 and a part of the second conductive layer 160, and as shown in FIG. 1E, the conductive layer 170 and the plurality of filling holes 180 are formed. A circuit board is obtained. The conductive layer 170 has a substantially flat upper surface 172.

  Here, the circuit board of the first embodiment of the present invention was completed. As seen in FIG. 1E, the conductive layer 170 generally has a uniform thickness. The non-uniformity of the thickness of the conductive layer due to the non-uniform distribution of the through-holes seen in the conventional circuit board is improved in the circuit board of this embodiment, and the difference in the thickness of the conductive layer 170 Clearly achieves the objective of reducing and improving the uniformity of the overall conductive layer.

  This embodiment is a method for effectively solving the problem that the conductive layer is formed by performing only one electroplating process of the prior art and the thickness of the conductive layer is often uneven. provide. In this embodiment, the conductive layer is formed by two electroplating processes. The second conductive layer 160 is formed by filling the hollow region 132 of the first conductive layer 130 with a conductive material by the second electroplating process, and the thickness of the conductive layer in the region where the density of the through holes is high is set. It is higher than the thickness of the conductive layer in the region where the density of the through holes is low. Next, in the present embodiment, a flat conductive layer 170 is formed by a planarization process, a circuit board having a uniform conductive layer as a whole is manufactured, and the stability of subsequent processes is improved.

  2A to 2E are schematic cross-sectional views illustrating a method for manufacturing a circuit board according to the second embodiment of the present invention.

  First, a substrate 200 having an opposing surface 202 is prepared. In the present embodiment, a substrate 200 made of a resin material is used. A metal layer 210 is formed on the substrate surface 202. Next, as shown in FIG. 2A, a plurality of through holes 220 penetrating the metal layer 210 and the substrate 200 formed on the opposing substrate surface 202 are formed by laser drilling or mechanical drilling. At this time, the through hole 220 is formed so that the region 222 having a high density of the through hole 220 and the region 224 having a low density of the through hole 220 are formed. After performing the laser drilling process or the mechanical drilling process, a step of removing smear may be performed to clean a residue (not shown) in the through hole 220 generated by the laser drilling or the mechanical drilling.

  Next, the shielding layer 230 is formed on the metal layer 210. The shielding layer 230 may be a photoresist layer such as a dry film, for example. Before forming the shielding layer 230 on the metal layer 210, a seed layer (not shown) may be conformally formed on the surface of the metal layer 210 and the inner surface of the through hole 220. An image transfer process is performed, and an opening 240 is formed in the shielding layer seed by exposure and etching processes, and a part of the metal layer 210 in the region 222 having a high through-hole density is exposed from the opening 240. Next, first electroplating is performed to form a first conductive layer 250 on the surface of the metal layer 210 exposed from the opening 240 as shown in FIG. 2B. At this time, the first conductive layer 250 is also formed on the inner surface of the through hole 220.

  The thickness of the first conductive layer 250 can be adjusted as appropriate, but the difference between the thickness of the thickest portion and the thinnest portion in the conductive layer having a non-uniform thickness known in the prior art, that is, the same substrate. It is desirable to adjust the region where the density of the upper through hole is low and the region where the density of the through hole is high based on the difference in thickness of the conductive layer formed by the electroplating process. In the present embodiment, the thickness of the first conductive layer 250 is set to be larger than the difference in thickness of the conductive layers known in the prior art.

  Next, as shown in FIG. 2C, the shielding layer 230 is removed.

  Subsequently, a second electroplating process is performed to form a second conductive layer 260 that covers the first conductive layer 250 and the metal layer 210 as shown in FIG. 2D. At this time, the second conductive layer is also formed on the surface of the first conductive layer 250 formed on the inner surface of the through hole 220, and the second conductive layer is also provided in the through hole 220. An interface S <b> 2 exists in an adjacent portion between the first conductive layer 250 and the second conductive layer 260. The interface S2 is an interface perpendicular to the substrate surface 202, as shown in FIG. 2D.

  Next, a filling material is filled into these through holes 220. The filling may be a conductive material or a non-conductive material. Next, a planarization process is performed to remove a part of the first conductive layer 250 and a part of the second conductive layer 260, and as shown in FIG. 2E, the flat conductive layer 270 and the plurality of filling holes A circuit board with 280 is obtained.

  Here, the circuit board of the second embodiment of the present invention was completed. As seen in FIG. 2E, the conductive layer 270 generally has a uniform thickness. The non-uniformity of the thickness of the conductive layer 270 due to the non-uniform distribution of the through holes, which is observed in the conventional circuit board, is improved in the circuit board of the present embodiment, and the thickness of the conductive layer 170 is reduced. The difference is clearly reduced and the objective of improving the overall conductive layer uniformity is achieved.

  Note that due to the uneven distribution of the through holes, the second conductive layer 260 is also formed with a small thickness in the region 222 where the density of the through holes is high, and thick in the region 224 where the density of the through holes is low. It is formed. On the other hand, in the present embodiment, the first conductive layer 250 is formed in the region 222 where the density of the through holes is high by the first plating process, and the thickness may be generated by the second plating process. The uniform conductive layer 270 is formed by compensating for the difference. As described above, in the present embodiment, after the first conductive layer 250 is formed in the region 222 having a high through-hole density by the first plating process, the second conductive layer 260 is formed by the second electroplating process. Then, after the thickness of the conductive layer in the region 222 with a high through-hole density is made thicker than the thickness of the region 224 with a low through-hole density, the flat conductive layer 270 is formed by a subsequent planarization process. Therefore, in this embodiment, the uniformity of the entire conductive layer and the stability of subsequent processes are improved. In this embodiment, the conductive layer is formed by two electroplating processes, and the conductive layer is formed by only one electroplating process as in the prior art, so that the thickness of the conductive layer is not uniform. It provides a method for effectively solving the problem.

  Since the product has a highly functional design, the number of through-holes formed in the substrate is increasing more and more particularly in the chip mounting area. For this reason, the distribution of through holes formed in the substrate is non-uniform, and the thickness of the conductive layer is non-uniform after electroplating in an area where the density of the through holes is high and an area where the density of the through holes is low. The phenomenon that occurs. The circuit board manufacturing method provided by the present invention is a conductive layer formed by electroplating using two electroplating processes (first plating process and second plating process) combined with an image transfer process. The conductive layer is further plated in a region where the thickness of the through hole is expected to be thinner than other portions, and the thickness of the conductive layer in the region where the through-hole density is high is larger than the thickness of the conductive layer in the region where the through-hole density is low Thickening and then flattening the conductive layer by a flattening process greatly reduces the difference in thickness in the conductive layer between the region where the through-hole density is high and the region where the through-hole density is low. The uniformity of the conductive layer can be effectively improved. Since the thickness of the conductive layer is uniform according to the present invention, a stable wiring width can be maintained when performing etching processing for subsequent wiring circuit molding, and the width of the wiring circuit is not stable. Alternatively, it is possible to prevent a state in which a residue remains on the circuit board. Furthermore, the uniformity of the thickness of the conductive layer is improved by the present invention, so that the stability of the subsequent process, for example, the packaging process can be further improved.

  The difference between the present invention and the prior art will be described below using the circuit board manufactured by the prior art as a comparative example and the circuit board manufactured by the manufacturing method of the present invention as an example.

(Comparative example)
As a comparative example, a circuit board was manufactured by a conventional circuit board manufacturing method, and the roughness of the circuit board surface was analyzed twice after plating and after flattening. FIG. 3A shows the result of a roughness meter analysis of the circuit board surface performed after the electroplating process of the prior art circuit board manufacturing method, and FIG. 3B is performed after the planarization process of the prior art circuit board manufacturing method. The result of roughness meter analysis on the surface of a printed circuit board is shown. As shown in FIG. 3A, in the circuit board manufactured by the conventional technique, a recess having a height of about −15 μm from the surface of the circuit board is formed in the conductive layer after the electroplating process. As shown in FIG. 3B, in the conductive layer after the planarization treatment, the height of the depression from the circuit board surface is about −10 μm.

Example 1
As Example 1, a circuit board was manufactured by the circuit board manufacturing method of the first embodiment, and the roughness of the circuit board surface was analyzed twice after plating and after planarization. FIG. 4A shows the result of a roughness meter analysis of the circuit board surface performed after the second electroplating process of the circuit board manufacturing method of the first embodiment of the present invention, and FIG. 4B shows the first of the present invention. The result of the roughness meter analysis of the circuit board surface performed after the planarization process of the manufacturing method of the circuit board of this embodiment is shown. As shown in FIG. 4A, the conductive layer after the second electroplating process (similar to the structure shown in FIG. 1D) of the circuit board manufactured in the first embodiment of the present invention is formed from the surface of the circuit board. A convex portion having a height of about +10 μm is formed. As shown in FIG. 4B, after the planarization process (similar to the structure shown in FIG. 1E), the protrusion formed on the conductive layer becomes a depression having a height of about −3 μm from the circuit board surface. ing.

(Example 2)
As Example 2, a circuit board was manufactured by the circuit board manufacturing method of the second embodiment, and the roughness of the circuit board surface was analyzed twice after plating and after planarization. FIG. 5A shows the result of a roughness meter analysis of the circuit board surface performed after the second electroplating process of the circuit board manufacturing method of the second embodiment of the present invention, and FIG. 5B shows the second of the present invention. The result of the roughness meter analysis of the circuit board surface performed after the planarization process of the manufacturing method of the circuit board of this embodiment is shown. As shown in FIG. 5A, the conductive layer after electroplating the circuit board manufactured in the second embodiment of the present invention (similar to the structure shown in FIG. 2D) has a height from the substrate surface of about A convex part of +5 μm is formed. As shown in FIG. 5B, after the planarization process (similar to the structure shown in FIG. 2E), the protrusion formed on the conductive layer becomes a depression having a height of about −4 μm from the circuit board surface. ing.

  The above results are summarized in Table 1 below. As can be seen from comparison between the prior art and the circuit board manufactured according to the present invention, the circuit board manufactured using either the first or second embodiment of the present invention has a conductive layer after planarization. The difference in thickness of the circuit board is clearly smaller than the difference in thickness of the conductive layer of the prior art, and the conductive layer (copper layer) of the circuit board manufactured using the first or second embodiment of the present invention. ) Thickness uniformity has been greatly improved.

  Although a number of preferred embodiments have been described herein, the disclosure is not limited to the disclosed embodiments, and the spirit and scope of the disclosure as defined by the appended claims. It should be understood that various changes, substitutions, and modifications can be made herein without departing from the invention.

100, 200 Substrate 102, 202 Surface 110, 210 Metal layer 120, 220 Through hole 122, 222 High density of through hole 124, 224 Low density of through hole 130, 250 First conductive layer 140, 230 Shielding Layer 150, 240 Opening 160, 260 Second conductive layer 170, 270 Conductive layer 172, 272 Upper surface 180, 280 Filling hole S1, S2 Interface

Claims (11)

A substrate,
A metal layer provided on the substrate surface;
A conductive layer provided on a surface of the metal layer and including a first conductive layer and a second conductive layer;
A plurality of through holes penetrating the conductive layer, the metal layer, and the substrate;
The first conductive layer and the second conductive layer are electroplated layers;
There are a region where the density of the through holes is high and a region where the density of the through holes is low,
The conductive layer has a substantially flat upper surface, and an interface exists between adjacent portions of the first conductive layer and the second conductive layer,
The second conductive layer is provided on the first conductive layer,
The outline of the cross section of the first conductive layer is a concave shape having a recessed area at a position corresponding to the area where the density of the through holes is high, and the outline of the cross section of the second conductive layer is a convex shape, A circuit board that exists in the form of a concave interface. A substrate,
A metal layer provided on the substrate surface;
A conductive layer provided on a surface of the metal layer and including a first conductive layer and a second conductive layer;
A plurality of through holes penetrating the conductive layer, the metal layer, and the substrate;
The first conductive layer and the second conductive layer are electroplated layers;
There are a region where the density of the through holes is high and a region where the density of the through holes is low,
The conductive layer has a substantially flat upper surface, and an interface exists between adjacent portions of the first conductive layer and the second conductive layer,
The first conductive layer and the second conductive layer are provided on a surface of the metal layer, and the first conductive layer is provided in a region where the density of the through holes is high , and the second conductive layer is provided. The layer is provided in a region where the density of the through holes is low,
The interface is perpendicular to the substrate surface. The circuit board according to claim 1, wherein the first conductive layer and the second conductive layer are made of the same or different conductive materials. Forming a metal layer on the surface of the substrate;
Forming a plurality of the through holes so as to include a region having a high density of through holes penetrating the metal layer and the substrate, and a region having a low density of the through holes;
A first electroplating process is performed to cover the surface of the metal layer and the inner surface of the through hole, and a first conductive layer having a recessed region at a position corresponding to a region where the density of the through hole is high Forming step;
Forming a shielding layer on the first conductive layer;
Forming an opening in the surface of the shielding layer, exposing the recessed region of the first conductive layer from the opening;
Performing a second electroplating process to form a second conductive layer on the first conductive layer exposed from the opening and covering the first conductive layer;
Removing the shielding layer;
Filling the through hole with a filler;
And a planarization process for removing a part of the first conductive layer and a part of the second conductive layer. The method for manufacturing a circuit board according to claim 4, further comprising a step of conformally forming a seed layer on a surface of the metal layer and an inner surface of the through-hole before performing the first electroplating process. The method for manufacturing a circuit board according to claim 4, wherein the shielding layer is a photoresist layer. The method for manufacturing a circuit board according to claim 4, wherein the height of the recessed region with respect to the substrate surface gradually decreases from both sides toward the center. Forming a metal layer on the surface of the substrate;
Forming a plurality of the through holes so as to include a region having a high density of through holes penetrating the metal layer and the substrate, and a region having a low density of the through holes;
Forming a shielding layer on the metal layer,
Forming an opening in the surface of the shielding layer, and exposing the metal layer in a region where the density of the through holes is high from the opening;
Performing a first electroplating process to form a first conductive layer on the surface of the metal layer exposed from the opening and the inner surface of the through hole;
Removing the shielding layer;
Performing a second electroplating treatment to cover the first conductive layer and the metal layer, and to form a second conductive layer also provided in the through hole;
Filling the through hole with a filler;
And a planarization process for removing a part of the first conductive layer and a part of the second conductive layer. The circuit board manufacturing method according to claim 8, further comprising: forming a seed layer conformally on a surface of the metal layer and an inner surface of the through hole before forming the shielding layer on the metal layer. Method. The method for manufacturing a circuit board according to claim 8, wherein the shielding layer is a photoresist layer. The method for manufacturing a circuit board according to claim 8, wherein an interface perpendicular to the substrate surface is formed in an adjacent portion of the first conductive layer and the second conductive layer.

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