JP6539998B2 - Semiconductor power converter - Google Patents

Description

  The present invention relates to a semiconductor power converter configured by fixing a plurality of discrete type semiconductor elements to a substrate.

  As shown in FIG. 9, in a typical inverter device as a semiconductor power conversion device, alternating current power supplied from an alternating current power supply 100 is converted into a direct current voltage by a diode rectifier 200, this direct current voltage is smoothed by a capacitor 300, and the inverter is The circuit 400 converts it into AC power and supplies it to the AC load 500. Here, in the inverter circuit 400, three sets of half bridge circuits in which upper and lower sets of upper switching arms Su, Sv and Sw and lower switching arms Sx, Sy and Sz are connected in series are connected in parallel to the capacitor 300. It has a connected configuration. The three-phase alternating current output from the connection point between the switching arms of each half bridge circuit is supplied to the alternating current load 500. Each of the switching arms Su to Sz is a voltage controlled semiconductor element 401 represented by an insulated gate bipolar transistor (IGBT), a power MOS field effect transistor, or the like, and a freewheeling diode (FWD) connected in antiparallel to this. And 402.

  By the way, each arm Su to Sz mentioned above is usually a discrete type semiconductor element Se called TO-220, 247 or 3P shown in FIG. 10A, or a module type semiconductor element Sm shown in FIG. 10B. It is comprised as an electronic component which has shapes, such as. A discrete type semiconductor element Se shown in FIG. 10 (a) is used for a power converter having a relatively small current capacity, and a module type shown in FIG. 10 (b) for a power converter having a relatively large current capacity. The semiconductor element Sm is used.

When using a discrete type semiconductor element Se shown in FIG. 10A to configure a device having a large current capacity, as shown in FIG. 11, a plurality of discrete type semiconductor elements Se are arranged in parallel. It is made to connect (refer patent document 1).
Here, when the semiconductor element Se of discrete type is an IGBT, it can be represented by an equivalent circuit as shown in FIG. 12A, in which a freewheeling diode is reversely connected between the collector and the emitter. As shown in FIG. 12B, the appearance is rectangular when viewed from the front, and a gate terminal G, a collector terminal C and an emitter terminal E are formed in order from the left side at the lower end. Further, as shown in FIG. 12C, the thickness is relatively thin, and in the case of a non-insulation package, a back metal plate portion C2 having the same potential as the collector terminal C is exposed on the back side.

Further, since the discrete type semiconductor element Se generates heat when voltage is applied or current flows, some kind of cooling means is required. Therefore, in the discrete type semiconductor element Se, the back metal plate portion C2 exposed on the back side needs to be brought into contact with a cooling fin or the like to be cooled, with the back metal plate portion C2 exposed as a heat dissipation surface.
When connecting a plurality of discrete type semiconductor elements Se in parallel, as shown in FIG. 13, the back metal plate portion C2 is brought into contact with the horizontally long common cooling fins F and arranged in parallel. It is also known to arrange semiconductor discrete components in parallel on a heat sink via an insulation heat transfer sheet (see, for example, Patent Document 2).

  Furthermore, the back metal plate portion of the discrete semiconductor element is attached to and fixed to the case main body using a mounting spring, and the collector terminal of the central portion of the discrete type semiconductor element is bent in a direction away from the back metal plate portion It is also known to suppress the inclination of the discrete semiconductor element and enhance the adhesion between the metal plate portion and the case main body by bending the end again and inserting the bent portion of the tip into the printed circuit board. (See, for example, Patent Document 3).

Patent No. 3837064 JP 2005-72249 A Unexamined-Japanese-Patent No. 2003-152369

Such a discrete type semiconductor element Se is often disposed on a printed circuit board as shown in FIG. 14A, but a high breakdown voltage IGBT having a high voltage V _CE between the collector terminal C and the emitter terminal E If it applies, the insulation creepage distance can not be secured between the collector terminal C having a high potential and the gate terminal G and the emitter terminal E having a low potential on the printed circuit board 600.

  Therefore, as shown in FIG. 14B, between the insertion holes of the gate terminal G and the insertion holes of the collector terminal C and the insertion holes of the collector terminal C and the insertion holes of the emitter terminal E in the printed circuit board 600, It is conceivable to form two slits 701 and 702 extending in the direction orthogonal to the arrangement direction of the gate terminal G, the collector terminal C and the emitter terminal E to secure the insulation creepage distance.

However, in this case, since it is necessary to form two slits 701 and 702 for one discrete type semiconductor element Se, there arises an unsolved problem that the strength of the printed circuit board 600 is lowered.
Also, as described in Patent Document 3 described above, the central collector terminal C is bent forward on the side opposite to the back metal plate portion, and the bent end is further bent downward and inserted into the insertion hole of the printed circuit board It is also conceivable to do. In this case, as shown in FIG. 15, when connecting a plurality of discrete type semiconductor elements in series, the collector terminal C is bent forward and protrudes, so that the front side of the discrete type semiconductor element Se is The insulation creepage distance bulges forward by the insulation creepage distance of the collector terminal, and the arrangement length of the discrete type semiconductor elements Se on the printed circuit board becomes longer, resulting in an increase in the printed circuit board size. And there is an unsolved problem of cost increase.

  Therefore, the present invention has been made focusing on the unsolved problems of the above-described conventional example, and a semiconductor power conversion device capable of reducing the device size while securing the insulation creepage distance of discrete type semiconductor elements. The purpose is to provide.

According to one aspect of the present invention, there is provided a semiconductor power conversion device configured by fixing a plurality of discrete type semiconductor elements to a substrate, the semiconductor elements comprising: a heat dissipation surface formed on one surface; A plurality of terminals projected from a side surface intersecting the surface and held by the substrate, and a high potential terminal which is a high potential with respect to the other terminals among the plurality of terminals is bent toward at least a surface including the heat dissipation surface The semiconductor element has a heat dissipation surface formed of a metal conductor, and the semiconductor element is fixed in a state where the metal conductor is in contact with the heat dissipation component to constitute a semiconductor device, and the heat dissipation component has the same potential as the high potential terminal. The semiconductor element is set to a lower potential than the high potential terminal, and includes two low potential terminals aligned with the high potential terminal interposed therebetween, and the heat dissipation component has a creeping distance with respect to the low potential terminal. To the substrate in a separated position The semiconductor element includes a semiconductor switching element and a diode connected in anti-parallel to the semiconductor switching element, and a plurality of semiconductor devices are used as a substrate and a high potential terminal and a heat radiation component. While keeping the creeping distance, they are aligned and at the same time, the low potential terminal which is the output terminal of one semiconductor element of the adjacent semiconductor device is electrically connected to the high potential terminal which is the input terminal of the other semiconductor element. A semiconductor power conversion device is provided in which a part of a drive circuit for driving the control terminal of the semiconductor element is disposed within the creepage distance range of the heat dissipation component in the other adjacent semiconductor device .

  According to one aspect of the present invention, by bending the high potential terminal of the discrete type semiconductor element toward the surface including the heat dissipation surface, the insulation creepage distance between the printed circuit board and the other low potential terminal can be obtained. Therefore, when the discrete type semiconductor elements are arranged in series, the insulation creepage distance of the high potential terminal can be prevented from bulging, and the semiconductor power conversion device can be miniaturized.

It is a figure showing a discrete semiconductor element and a printed circuit board applied to one mode of the present invention. They are a side view which shows the state which mounted the discrete semiconductor element in the cooling fin, and its equivalent circuit schematic. BRIEF DESCRIPTION OF THE DRAWINGS It is a circuit diagram which shows one phase of the power converter device which concerns on 1st Embodiment which shows 1 aspect of this invention. FIG. 4 is a bottom view showing an equivalent circuit in the case where upper and lower switching arms of FIG. 3 are formed of discrete semiconductor elements, and an insulation creepage distance of each semiconductor element on a printed circuit board. It is a bottom view which shows the modification of FIG. It is a bottom view showing the printed circuit board which formed one slit which secures insulation creepage distance. They are an equivalent circuit schematic which shows 2nd Embodiment which is one form of this invention, and a bottom view which shows a printed circuit board. It is a bottom view which shows the equivalent circuit and printed circuit board which show the modification of the power converter device which is one form of this invention. It is a circuit diagram showing a two-level power converter. It is a figure which shows the semiconductor element of a discrete type, and the semiconductor element of module type. It is a figure which shows the case where the semiconductor element of a discrete type is parallelly arranged. It is the equivalent circuit schematic, front view, and side view which show the semiconductor element of a discrete type. It is a perspective view which shows the case where the semiconductor element of a discrete type is parallelly arrange | positioned to a cooling fin. It is a figure which shows the relationship between the conventional discrete type semiconductor element and the mounting position of a printed circuit board. They are an equivalent circuit at the time of connecting the conventional discrete type semiconductor element in series, and a bottom view which shows the insulation creepage distance for every semiconductor element on a printed circuit board.

Hereinafter, a semiconductor power conversion device according to an aspect of the present invention will be described with reference to the drawings.
First Embodiment
In the first embodiment showing one aspect of the present invention, discrete type discrete semiconductor elements Se shown in FIG. 1A are mounted on a printed circuit board 11 as a substrate as shown in FIG. 1B.

  Here, the discrete semiconductor element Se is connected in anti-parallel to, for example, a voltage control type semiconductor switching element Q and this semiconductor switching element Q which are configured by insulated gate bipolar transistors (IGBTs) and power MOSFETs shown in FIG. And a flat rectangular parallelepiped package 12 in which one switching arm composed of the freewheeling diode D is incorporated.

  As shown in FIG. 2A, the package 12 has a heat radiation surface 12a formed on the back side, and extends downward from the bottom of one of the flat side surfaces intersecting the heat radiation surface 12a, from the front. The gate terminal G, the collector terminal C, and the emitter terminal E are arranged in order with a predetermined distance from the left side. Further, on the heat dissipation surface 12a, a back metal conductor plate C2 made of a metal conductor, which has the same potential as the collector terminal C and is a heat dissipation surface, is exposed.

Of the gate terminal G, the collector terminal C and the emitter terminal E, the collector terminal C at the central position is a high potential terminal, and the gate terminal G and the emitter terminal E sandwiching the high potential terminal have a lower potential than the collector terminal C. It becomes a terminal.
Then, as shown in FIG. 1A, the collector terminal C at the center position is a flat surface including a protrusion 13a projecting downward from the bottom surface of the package 12 and a back metal conductor plate C2 from the lower end of the protrusion 13a. A second bent portion 13b bent parallel to the bottom surface toward the bottom, and a second bent portion bent downward at a tip position on the rear side of a plane including the back metal conductor plate portion C2 of the first bent portion 13b It is comprised by the bending part 13 which has the bending part 13c.

Here, when the distance between the second bent portion 13c and the gate terminal G and the emitter terminal E is mounted on the printed board 11, as shown in FIG. 1 (b), insulation necessary on the printed board 11 is obtained. The bending position is set so as to secure the creeping distance CD.
In the above embodiment, the first bending portion 13b and the second bending portion 13c indicate bending in two steps. However, if it is possible to secure a necessary insulation creepage distance CD, bending position or the like can be obtained. It is also possible to set the number of bending positions arbitrarily. For example, the bending position may be set to only the first bending portion 13b and the collector terminal may be inserted obliquely to the insertion hole 14c (see FIG. 1A), and three or more bending positions may be inserted. It may be provided.

  The discrete semiconductor element Se is mounted on the printed circuit board 11 as shown in FIGS. 1 (b) and 2 (a). In the printed circuit board 11, through holes 14g, 14c and 14e through which the gate terminal G of the discrete semiconductor element Se, the second bent portion 13c of the collector terminal C, and the emitter terminal E are inserted are gate terminals G and emitter terminals E. And the second bent portion 13c of the collector terminal C, and the creeping distance CD between the gate terminal G, the collector terminal C, and the fixing jig 16c of the radiation fin 16 are secured.

Further, as shown in FIG. 2A, the discrete semiconductor element Se is fixed to the radiation fin 16 as a heat radiation component to radiate the heat generation amount generated at the time of voltage application and current application, and the discrete semiconductor element Se The semiconductor device SD is configured by the heat radiation fins 16 and the heat radiation fins 16.
The heat dissipating fins 16 are formed of, for example, a metal material with high thermal conductivity such as aluminum, aluminum alloy, or copper by, for example, a drawing process, and a plate portion 16a having a flat surface, and the printed board 11 from the back side of the plate portion 16a. And a plurality of fin portions 16b extending backward while maintaining a predetermined interval in the vertical direction in parallel with the above.

  The radiation fin 16 is fixedly held on the printed circuit board 11 by a fixing jig 16c as a fixing portion which is formed so as to protrude from the bottom surfaces of both end sides in the front-rear direction. Here, a gap for inserting the first bent portion 13 b of the collector terminal C is formed between the bottom surface of the heat dissipating fin 16 and the surface of the printed circuit board 11. The discrete semiconductor element Se is fixed to the surface side of the plate portion 16a by screwing or the like so that the back metal conductor plate portion C2 is brought into direct contact with the plate portion 16a.

In this state, as shown in FIGS. 1 (b) and 2 (a), the first bent portion 13b of the collector terminal C of the discrete semiconductor element Se extends rearward along the lower surface of the radiation fin 16, The second bent portion 13 c is inserted into the insertion hole 14 c at the lower side of the radiation fin 16.
And if semiconductor device SD comprised with discrete semiconductor element Se and the radiation fin 16 is represented by an equivalent circuit, as shown in FIG.2 (b), the discrete semiconductor element Se will be an insulated gate as a voltage control type semiconductor switching element. It is composed of a bipolar transistor (IGBT) Q and a freewheeling diode D reversely connected to the insulated gate bipolar transistor Q. The collector terminal C and the radiation fin 16 are electrically connected to be at the same potential. . Further, as shown in FIG. 2A, the second bent portion 13c of the collector terminal C of the discrete semiconductor element Se and the fixing jig 16c of the radiation fin 16 are set to the same potential by the wiring pattern 11a of the printed circuit board 11. ing.

A multilevel semiconductor power conversion device 20 is configured using a plurality of semiconductor devices SD having the above configuration.
An example of the semiconductor power conversion device 20 has, for example, a five-level semiconductor power conversion device having a configuration shown in FIG. 3 if one of three phases is represented.
That is, there are four charge / discharge capacitors 301 to 304 connected in series between positive electrode line P1 and negative electrode line N1, and four, for example, insulated gate bipolar transistors (IGBTs) connected in series. Semiconductor switching devices Q1 to Q4 are connected in series, and four semiconductor switching devices Q5 to Q8 formed of, for example, an insulated gate bipolar transistor (IGBT) connected in series are connected in series The series circuit of the lower switching arm SA1d is connected in parallel.

Freewheeling diodes D1 to D8 are individually connected in antiparallel to the respective semiconductor switching elements Q1 to Q8 to form individual arms. An AC terminal ACa for outputting an AC voltage is provided at a midpoint between the semiconductor switching elements Q4 and Q5.
Further, the positive electrode line P2 is connected to the middle point between the charge / discharge capacitors 301 and 302, and the neutral point line M is connected to the middle point between the charge / discharge capacitors 302 and 303, and between the charge / discharge capacitors 303 and 304. The negative electrode line N2 is connected to the middle point of.

Furthermore, diodes D9 and D10 connected in series are connected in anti-parallel to the series circuit of semiconductor switching elements Q2 to Q5, and the middle point between the diodes D9 and D10 is the middle between the charge / discharge capacitors 301 and 302. The point is connected to the positive electrode line P2.
In addition, diodes D11 and D12 connected in series are connected in anti-parallel to a series circuit of semiconductor switching elements Q3 to Q6, and a middle point between the diodes D11 and D12 is a middle between charging / discharging capacitors 302 and 303. It is connected to the neutral point line M via a point.

Furthermore, diodes D13 and D14 connected in series are connected in anti-parallel to the series circuit of semiconductor switching elements Q4 to Q7, and the middle point between the diodes D13 and D14 is an intermediate point between charge / discharge capacitors 303 and 304. The point is connected to the negative electrode line N2.
The semiconductor switching elements Q1 to Q8 and the freewheeling diodes D1 to D8 constituting the upper switching arm SA1u and the lower switching arm SA1d described above are discrete semiconductor elements Se1 as shown in FIGS. 3 and 4A. The discrete semiconductor elements Se1 to Se8 are individually fixed to and held by the radiation fins 16, as shown in FIG. 4B, to constitute semiconductor devices SD1 to SD8.

  The semiconductor devices SD1 to SD8 are disposed on the printed circuit board 11 while maintaining a predetermined insulation creepage distance, but as shown in FIG. 4B, they may be aligned in parallel and disposed in parallel. It can also be arranged in a staggered manner. Here, the two adjacent discrete semiconductor elements Sei (i = 1 to 7) and Sei + 1 are arranged such that the subsequent stage discrete semiconductor elements Sei + 1 are opposed to the back surface of the radiation fin 16 of the previous stage discrete semiconductor elements Sei. It is done. Then, the emitter terminal E of each discrete semiconductor element Sei and the collector terminal C of the subsequent discrete semiconductor element Sei adjacent to each other are connected by a wiring pattern P10 formed on the back surface side of the printed board 11, as shown in FIG. As shown, the discrete semiconductor elements Se1 to Se8 are connected in series. The wiring pattern P <b> 10 is wired so as to secure a necessary creeping distance for terminals having different potentials.

  In this case, the insulation creepage distance required on the printed circuit board 11 of the semiconductor devices SD1 to SD8 is in contact with the collector terminal C serving as a high potential terminal and the back metal conductor C2 having the same potential as the collector terminal C. It becomes the range enclosed by the line L1 of FIG.4 (b) by the radiation fin 16 which becomes the same electric potential, and the gate terminal G and emitter terminal E which become a low electric potential terminal. Therefore, in each discrete semiconductor element Sei (i = 1 to 8), the second bent portion 13c of the collector terminal C of the discrete semiconductor element Sei (i = 1 to 8) and the radiation fin 16 on the printed board 11 A creeping distance between the gate terminal G and the emitter terminal E side end of the fixing jig 16 c and the gate terminal G and the emitter terminal E may be secured.

  Therefore, when arranging a plurality of semiconductor devices SD1 to SD8 in parallel as shown in FIG. 4B, it is necessary to secure a creeping distance between the adjacent semiconductor devices SDi and SDi + 1. At this time, in each semiconductor device SDi, the second bent portion 13 c of the collector terminal C, which is a high potential terminal of the discrete semiconductor element Sei, is disposed on the lower surface side of the heat dissipating fin 16. Therefore, the creeping distance required for the second bent portion 13c of the discrete semiconductor element Sei bulges forward of the gate terminal G and the emitter terminal E as the collector terminal C of the discrete semiconductor element of the conventional example described above. There is no need to

Therefore, when the semiconductor devices SD1 to SD8 are arranged in parallel on the printed board 11, it is possible to narrow the interval between the adjacent semiconductor devices SD1 to SD8. Therefore, the entire configuration of semiconductor power conversion device 20 using semiconductor devices SD1 to SD8 can be sufficiently miniaturized as compared with the conventional example.
Further, the wiring pattern 11a formed on the printed circuit board 11 makes the radiation fin 16 have the same potential as the collector terminal C and the back metal conductor portion C2 to be high potential terminals. For this reason, even if the first bent portion 13b of the collector terminal C is brought close to the lower surface of the radiation fin 16, the occurrence of discharge and the like will not occur. Moreover, when the discrete semiconductor element Se is fixed to the radiation fin 16, it is necessary to consider both the contact resistance considered from the electrical point of view and the contact thermal resistance considered from the cooling point of view. However, in the present embodiment, since the radiation fin 16, the collector terminal C, and the back metal terminal C2 are at the same potential, the contacts to be considered particularly from the electrical aspect when fixing the discrete semiconductor element Se to the radiation fin 16. The resistance is unnecessary, and there is no problem even if, for example, a heat conducting member having insulating properties is used.

  In the first embodiment, as shown in FIG. 4, the case where the discrete semiconductor element Sei of the subsequent semiconductor device SDi + 1 faces the rear side of the radiation fin 16 of the former semiconductor device SDi has been described. It is not limited to this. That is, as shown in FIG. 5, the discrete semiconductor elements Sei and the radiation fins 16 which constitute the semiconductor device SDi of the former stage are rotated 180 degrees as viewed from the top in the state of FIG. In the case where the radiation fins 16 of the semiconductor device SDi + 1 in the latter stage are disposed to face Sei, the emitter terminal E of the discrete semiconductor element Sei in the former stage is connected to the collector terminal C of the discrete semiconductor element Sei + 1 in the latter stage. The wiring pattern P12 of the printed circuit board 11 can be formed on the surface side of the printed circuit board 11. Also in this case, the wiring pattern P12 is wired such that a necessary creeping distance can be secured for terminals having different potentials.

  Further, in order to further shorten the distance between the collector terminal C serving as a high potential terminal on the printed substrate 11 of each discrete semiconductor element Se and the gate terminal G and the emitter terminal E serving as a low potential terminal, as shown in FIG. As shown in FIG. 6, one slit 30 is formed between the insertion hole 14g of the gate terminal of the printed circuit board 11 and the insertion hole 14e of the emitter terminal and the insertion hole 14c of the second bent portion 13c of the collector terminal C. The creeping distance may be secured by the slits 30.

In this case, a decrease in the strength of the printed circuit board 11 can be suppressed as compared to the case where two slits are provided as shown in FIG. 13 (b) of the conventional example.
Next, a second embodiment of the present invention will be described with reference to FIG.
In the second embodiment, a gate drive circuit for driving the gate of each discrete semiconductor element Se is disposed on the range of the insulation creepage distance.

In the second embodiment, as shown in FIG. 7, the arrangement of the semiconductor devices SD1 to SD8 is arranged in parallel by rotating the arrangement of the semiconductor devices SD1 to SD8 by 180 degrees as viewed from the plan as in the first embodiment. That is, the discrete semiconductor elements Se of the semiconductor device SD1 of the previous stage and the radiation fins 16 of the subsequent semiconductor device SD2 are opposed to each other.
Then, a wiring pattern in which the emitter terminal Ei of the discrete semiconductor device Sei and the collector terminal Ci + 1 of the discrete semiconductor device Sei + 1 are formed on the surface of the printed board 11 between the adjacent discrete semiconductor devices Sei (i = 1 to 7) and Sei + 1. Connect at P21.

  In addition, a gate drive circuit GDi that drives the gate of the semiconductor switching element included in each discrete semiconductor element Sei operates based on the emitter potential of the emitter terminal Ei. On the other hand, the collector potential of the collector terminal Ci + 1 of the discrete semiconductor element Sei + 1 and the emitter potential of the emitter terminal Ei of the discrete semiconductor element Sei in the previous stage are the same. The gate drive circuit GDi + 1 for driving the gate of the semiconductor switching element included in the discrete semiconductor element Sei + 1 also operates based on the emitter potential of the emitter terminal Ei + 1.

  Therefore, as shown in FIG. 7B, the gate drive circuit GDi is disposed such that a portion thereof is within the insulation creeping distance range of the collector terminal Ci + 1 of the discrete semiconductor element Sei + 1 on the subsequent stage side. The emitter terminal connection side is connected to the wiring pattern P21 within the insulation creepage distance of the collector terminal Ci + 1 of the discrete semiconductor element Sei + 1, and the gate signal output side is connected to the gate terminal G of the discrete semiconductor element Sei.

  As described above, according to the second embodiment, the gate drive circuit GDi that operates on the basis of the emitter potential of the discrete semiconductor element Sei and supplies the gate signal to the gate terminal Gi is used as the collector terminal Ci + 1 of the discrete semiconductor element Sei + 1 in the subsequent stage. Therefore, the semiconductor device SDi including the gate drive circuit GDi can be saved in space.

  In the above embodiments, the case where the plurality of semiconductor devices SD1 to SD8 are connected in series has been described, but the present invention is not limited to this. As shown in FIG. 8B, the semiconductor devices SD1 to SD8 The collectors of the discrete semiconductor elements Se1 to Se8 of the semiconductor devices SD1 to SD8 are connected to each other by the wiring pattern P12 and the emitters are connected to each other by the wiring pattern P13. As shown in), a plurality of discrete semiconductor elements Se1 to Se8 can be connected in parallel.

In this case, the number of discrete semiconductor elements connected in parallel is set in accordance with the amount of current permitted by the power conversion device.
In each of the above embodiments, the present invention is applied to a five-level power converter, but the two-level power converter shown in FIG. 9 or a multilevel power converter having three levels, four levels, or six levels or more The present invention can also be applied.

Further, as the semiconductor switching element incorporated in the discrete semiconductor element Se, not only voltage-controlled semiconductor switching elements such as insulated gate bipolar transistors and power MOSFETs but also current controlled semiconductor switching elements such as bipolar transistors can be applied. . Furthermore, in some cases, the free wheeling diode D may be omitted in the discrete semiconductor element Se and only the semiconductor switching element Q may be incorporated. In this case as well, the present invention can be applied.
Further, the semiconductor switching element may be a wide band gap semiconductor element composed of a wide band gap semiconductor material mainly made of silicon carbide, gallium nitride or diamond.

Se, Se1 to Se8: discrete semiconductor elements G: gate terminals C: collector terminals E: emitter terminals 11: printed substrate 12: package 13: bent portion 13a: projecting portion 13b: first bent portion 13c: second bent Parts 14g, 14c and 14e Insertion holes 16 Radiation fins SD, SD1 to SD8 Semiconductor device 20 Semiconductor power conversion device SA1u Upper switching arm SA1d Lower switching arm Q1 to Q8 Semiconductor switching elements D1 to D8 Freewheel Ring diode 30 ... Slit GD1 to GD8 ... Gate drive circuit

Claims (6)

A semiconductor power converter configured by fixing a plurality of discrete type semiconductor elements to a substrate,
The semiconductor device includes a heat dissipation surface formed on one surface, and a plurality of terminals which are protruded from the side surface intersecting the heat dissipation surface and held by the substrate.
Bending a high potential terminal which has a high potential with respect to the other terminal among the plurality of terminals toward a surface including at least the heat radiation surface ;
In the semiconductor device, the heat dissipation surface is formed of a metal conductor, and the semiconductor device is fixed in a state where the metal conductor is in contact with the heat dissipation component to configure a semiconductor device, and the heat dissipation component is the high potential terminal Is set to be the same potential as
The semiconductor element includes two low potential terminals which are set to a lower potential than the high potential terminal and arranged with the high potential terminal interposed therebetween, and the heat dissipation component is separated by a creeping distance from the low potential terminal. The fixed part to the substrate is formed in a protruding position.
The semiconductor element includes a semiconductor switching element and a diode connected in antiparallel to the semiconductor switching element, and a plurality of the semiconductor devices are used as the substrate to maintain the creepage distance of the high potential terminal and the heat dissipation component. And electrically connect the low potential terminal serving as the output terminal of one semiconductor element of the adjacent semiconductor device and the high potential terminal serving as the input terminal of the other semiconductor element, and the one semiconductor element A semiconductor power conversion device characterized in that a part of a drive circuit for driving the control terminal of (1) is disposed within a creeping distance range of the heat dissipation component in the other adjacent semiconductor device. The high-potential terminal includes a first bent portion passing between the heat dissipation component and the substrate, and a second bent portion bent from the first bent portion toward the substrate. The semiconductor power converter device as described. The semiconductor power conversion device according to claim 2 , wherein the second bent portion is bent at a position separated by a creeping distance with respect to the low potential terminal. The substrate, the semiconductor element and the claims 1, characterized in that one slit between the insertion hole for inserting the high-potential terminal and an insertion hole for inserting the low potential terminal is formed of 3 The semiconductor power converter device according to any one of the above. The semiconductor element includes a semiconductor switching element and a diode connected in antiparallel to the semiconductor switching element, and a plurality of the semiconductor devices are maintained on the substrate to maintain the creeping distance of the high potential terminal and the heat dissipation component. The semiconductor power converter according to any one of claims 1 to 4 , which is arranged . The semiconductor element is silicon carbide, a semiconductor power conversion device according to any one of any of a gallium nitride or diamond claim 1, wherein the Oh Rukoto a wide band gap semiconductor device as a main material 5 .

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