JP6515260B2 - Gaming machine - Google Patents

Description

  The present invention relates to a game machine such as a so-called ball and ball game machine (hereinafter, also referred to as a "pachinko machine") or a rotary game machine, and more particularly to a case where a player takes a break time.

  Conventionally, in a game arcade (hereinafter referred to as a hall), the player patrols the passage between the gaming machines installed on each island, and confirms the nail state of the game board in a large number of gaming machines arranged along the passage. Then, after finding a desired nail-shaped game machine that seems to be likely to be received by the starting opening, the player takes place with possessions such as the player's lighter on the upper plate. The player who finds the desired nailed game machine collects the belongings from the other game machines which have placed their own property on the upper plate and took place in places other than the desired game machine. The user sits on the desired gaming machine and starts playing the game.

  The player feels hungry after a certain amount of time, but often does not intend to open the desired gaming machine finally found out to other players, so he calls a hall clerk who patrols the hall, and is taking a meal Offer that the desired gaming machine should be put on hold so that other players can not play the game. A hall clerk who receives such an offer places a plate on the front glass of the desired gaming machine indicating "during a meal break", and the desired gaming machine is another player for a while. Can not start the game. This plate is a small flat plate independent of the gaming machine itself, and it starts counting down from the time determined on the digital display, and it is overtime when it is 0 minutes remaining. It is configured to notify the situation by blinking (see Patent Document 1). As a result, the other player who is passing through touches the plate of such a display, and the desired gaming machine is probably in a state of being in a nailed state because it is in a position to daringly hold it while eating. Although he makes a guess, he recognizes that he does not have the right to play a game, and he goes through the passage as to whether there is a good nail condition among other gaming machines.

JP, 2001-79258, A

  By the way, if it is a meal, the player will usually come back after 30 minutes, but if something can not come back, the hall clerk will When noticed, it is common practice to play an announcement in the hall to urge the player to immediately return to his seat and resume the game. If this player (hereinafter referred to as "the original player") does not return, the hall clerk may remove the plate from the gaming machine to open the gaming machine to another player.

  On the other hand, it is easily predicted that other players who are aiming at a game machine in a nailed state may be able to start playing their own game if they remove this plate by evil. When the plate is actually removed in this way and another player is playing a game, the original player may be somewhat behind by a meal etc. and may not be able to return within the rest time. There is a risk that you may wonder if it has been removed.

  In order to prevent such fraud, it is possible to incorporate the function of such a plate into the gaming machine itself, but if doing so, the power supply becomes unstable in the hall where a large number of gaming machines are arrayed. When it becomes, there is also a possibility that it will be in a power failure state over a fixed time. If such a power failure state continues for a certain period of time, the measurement operation of the break time may be disturbed, and the rest time may not be correctly represented when reactivated (at power recovery).

  Therefore, it is an object of the present invention to be able to accurately represent the remaining rest time even when a power failure occurs and restarts after the rest time is set.

In order to achieve the above object, the gaming machine according to the present invention executes a big hit lottery after the start condition is satisfied, and when it is won in the big hit lottery, it changes from the normal gaming state to a more advantageous special gaming state A game control unit to be shifted, a payout control unit that controls the payout operation of game media by the control of the game control unit, and an effect that controls the rendering operation according to the result of the big hit lottery according to the control of the game control unit A control unit; a first display device that executes a display operation as part of the rendering operation under control of the presentation control unit; a second display device that performs a display operation under control of the presentation control unit; A contact type input device having a transparent operation surface covering a display area of a second display device and detecting a contact state of the operation surface, and supplying the first power or stopping the first power during supply Second A power failure notification unit that outputs a power failure notification signal when power supply of the first power supply by the power supply is stopped, and supplying the second power when receiving the power failure notification signal; And a second power supply for stopping the supply of the second power in response to the start of the supply of the first power by the first power supply, the game control unit further comprising: The power supply command output unit outputs a power on command when power supply of 1 is started, and the effect control unit is configured to supply the first power by the first power or the power supply by the second power. And a time measuring means for measuring an elapsed time while having a timekeeping storage unit that holds the stored contents constantly, and an operation setting for setting an operation stop time in which the second display device is not permitted to operate. Screen Operation setting screen display control means for displaying, operation stop time setting means for setting operation stop time inputted on the operation setting screen according to the contact state of the operation surface of the contact type input device, and the operation stop time Remaining time display control means for causing the second display device to display the remaining time of the set operation stop time, causing the second display device to start measurement of the elapsed time by the time measurement means triggered by the setting being performed, and the operation Stop state releasing means for ending display control of the set remaining time of operation stop time when the remaining time of the stop time becomes zero; the operation stop time at the first time point when the power failure notice signal is received Elapsed time information saving means for writing information on the first remaining time in the timekeeping storage unit, and the power failure forecasting upon receipt of the power on command. The elapsed time measured by the time measuring means from the first time point when the notification signal is received to the second time point when the power on command is received A remaining time recovery means for causing the second display device to display again the second remaining time of the operation stop time as a result of being added to the remaining time of 1.

  Specifically, the gaming machine according to the present invention acquires a random number value triggered by the fact that the game ball fired in the game area of the game board is accepted by the starting opening formed in the game area, and then starts up In response to the establishment of the condition, the variation of the special symbol is started and the big hit lottery is executed by comparing the acquired random number value and the specified big hit random number, and the variation time of the result of the big hit lottery and the special symbol To output a variation pattern command including the above, and as a result of the big hit lottery, when the acquired random number value and the big hit random value match, transition from the normal gaming state to a more advantageous special gaming state for the player Payout control for controlling the game ball payout operation by the prize ball device based on the game ball control unit, the prize ball device for executing the payout operation of the game ball, and the prize ball command from the game control unit When the variation pattern command is received from the control unit and the game control unit, a rendering operation according to the big hit lottery result over the variation time based on the result of the big hit lottery and the variation time included in the variation pattern command And a first display device provided on the game board to execute a display operation as a part of the rendering operation under the control of the rendering control unit, and in accordance with the control of the rendering control unit A second display device for executing a different display operation, a contact type input device having a transparent operation surface covering a display area of the second display device, and detecting a contact state of the operation surface; A first power supply for supplying power or stopping the first power being supplied; a power failure notifier for outputting a power failure notification signal when the supply of the first power by the power supply is stopped; Signal A second power supply that supplies a second power triggered by picking up, and stops the supply of the second power triggered by the start of the supply of the first power by the first power supply; And the game control unit includes power on command output means for outputting a power on command when the supply of the first power is started by the first power supply, and the effect control unit includes the first control unit. A time measuring means for measuring an elapsed time while being provided with a time-counting storage unit for constantly holding stored contents while receiving power supply from the first power supply or the second power supply from the power supply, and the second display device Operation setting screen display control means for displaying an operation setting screen for setting an operation stop time in which operation is not permitted, and the operation setting screen input according to the contact state of the operation surface of the contact type input device Stop operation The operation stop time setting means for setting the stop time and the measurement of the elapsed time by the time measurement means are triggered by the setting of the operation stop time, and the operation set for the second display device is started. Remaining time display control means for displaying the remaining time of the stopping time, and stopping the display control of the remaining time of the set operation stopping time when the remaining time of the operation stopping time becomes a specified state Means, and elapsed time information saving means for writing the remaining time information on the first remaining time of the operation stop time at the first point of time when the power failure notice signal is received in the clock storage unit; Rendering pattern saving means for writing an identifier indicating the type of rendering pattern information under execution concerning a rendering pattern being executed at a first time point into the timekeeping storage unit Upon receipt of the power-on command, the type of effect pattern being executed when the power failure notice signal is received is grasped based on the identifier written in the timekeeping storage unit, and identified by the pointer Effect pattern restoration means for re-executing the effect pattern from the beginning based on schedule data of the type to be performed, and the power supply from the first point in time when the power failure notification signal is received upon receiving the power on command. The elapsed time measured by the time measuring means up to the second point in time when the input command is received is added as a result to the first remaining time of the operation stop time already written in the time storage unit. And a remaining time recovery means for causing the second display device to display the second remaining time of the operation stop time again.

  In this way, even if the specified break time is set and the remaining time of the break time starts to be measured, the time measuring unit is turned off even in the case of a blackout from the first time point to the second time point Since the second power supply receives power supply, the information regarding the remaining time of the operation stop time held in the timekeeping storage unit can be prevented from being volatilized and erased. After that, when it is restarted, the effect control unit correctly includes the elapsed time of the blackout period before and after the blackout based on the information on the remaining time of the operation stop time kept in the timekeeping memory even during the blackout period. The remaining time of the operation stop time can be measured, and even if it is restarted as such, the remaining rest time can be accurately represented.

  According to the gaming machine according to the present invention, it is possible to make it difficult to give the player who is in contact with the content of the failure a chance to try a fraudulent act that abuses the content of the failure while improving the work efficiency of coping with the failure.

It is a perspective view which shows the state which open | released the main body frame with respect to the outer frame of a pachinko machine, and opened the door frame with respect to the main body frame. It is a front view of a pachinko machine. It is a rear view of a pachinko machine. It is a front perspective view of an outer frame. It is a front perspective view of a main body frame. It is a rear perspective view of the board | substrate unit in a main body frame. It is a perspective view of a door frame. It is a disassembled perspective view of the touch panel provided on the upper dish liquid crystal display. It is a front view of a game board. It is the disassembled perspective view which decomposed | disassembled the game board of FIG. 9, and was seen from the front. It is a front view which expands and shows the function display unit in a game board in the state attached to the pachinko machine. It is a block diagram of a main control board, a delivery control board, and a peripheral control board. It is a block diagram which shows the continuation of FIG. It is the schematic of the various detection signals input / output to the game ball etc. lending device connection terminal board which relays the electrical connection of the delivery control board which comprises a main board, CR unit, and a frequency display board. It is a block diagram which shows the continuation of FIG. It is a block diagram which shows the outline of peripheral control MPU. It is a block diagram of a sound source built-in VDP periphery in a liquid crystal and sound control part. It is a block diagram showing a power supply system of a pachinko machine. It is a block diagram which shows the continuation of FIG. It is a circuit diagram showing a circuit of a main control board. It is a circuit diagram showing a power failure monitoring circuit. FIG. 6 is a circuit diagram showing an interface circuit for communication between the main control substrate and the peripheral control substrate. It is a circuit diagram showing a circuit etc. of a payment control part. It is a circuit diagram showing a payout control input circuit. FIG. 25 is a circuit diagram showing the continuation of FIG. 24. It is a circuit diagram showing a payout motor drive circuit. It is a circuit diagram showing a CR unit input / output circuit. FIG. 6 is an input / output diagram showing various input / output signals to / from a main control board and various output signals to an external terminal board. It is a table which shows an example of the various commands transmitted to a delivery control board from a main control board. It is a table which shows an example of the various commands transmitted to a periphery control board from a main control board. It is a table which shows continuation of the various commands transmitted to the periphery control board from the main control board of FIG. It is a table which shows an example of the various commands from the delivery control board which a main control board receives. It is a flowchart which shows an example of a process at the time of main control side power activation. It is a flowchart which shows the continuation of the process at the time of main control side power-on of FIG. It is a flow chart which shows an example of main control side timer interrupt processing. It is a flow chart which shows an example of processing at the time of payout control part power-on. It is a flowchart which shows the continuation of the process at the time of the payout control part power-on of FIG. 37 is a flowchart illustrating the continuation of the process when the payout control unit is turned on, following FIG. It is a flowchart which shows an example of a payment control part timer interruption process. It is a flow chart which shows an example of rotation angle switch history creation processing. It is a flowchart which shows an example of a sprocket fixed position determination skip process. It is a flowchart which shows an example of a ball look determination process. It is a flow chart which shows an example of prize ball stock number addition processing for prize balls. It is a flowchart which shows an example of the prize ball stock number addition process for a rental ball. It is a flow chart which shows an example of stock surveillance processing. It is a flow chart which shows an example of payout ball look operation judging processing. It is a flowchart which shows an example of a payout setting process. It is a flow chart which shows an example of ball ball operation setting processing. It is a flow chart which shows an example of retry operation monitoring processing. It is a flow chart which shows an example of inconsistency counter reset judging processing. It is a flow chart which shows an example of error cancellation operation judgment processing. It is a timing chart which shows signal processing (A) at the time of payout operation by ball lending, and input signal confirmation processing (A) from CR unit. It is a flow chart which shows an example of processing at the time of peripheral control part power activation. It is a flowchart which shows an example of peripheral control part V blank interrupt processing. It is a flowchart which shows an example of a peripheral control part 1 ms timer interrupt process. It is a flowchart which shows an example of a periphery control part command reception interruption process. It is a flow chart which shows an example of peripheral control part power failure notice signal interrupt processing. It is a figure which shows an example of the display content of a maintenance screen. It is a figure which shows an example of the display content of a maintenance screen. It is a figure which shows an example of the display content of a maintenance screen. It is a figure which shows an example of the display content of a maintenance screen. It is a figure which shows the display content of calling that a store clerk should be called during a big hit. It is a figure which shows an example of the display content of a service mode screen. It is a figure which shows an example of the display content of a rest timer setting screen. It is a figure which shows an example of the display content of the screen during a break. It is a figure which shows an example of the display content of the screen during a break. It is a figure which shows an example of the display content of the screen during a break. It is a figure which shows an example of an operation menu screen. It is a figure which shows an example of an operation menu screen. It is a figure which shows an example of an operation menu screen. It is a figure which shows an example of an operation menu screen. It is a figure which shows an example of an operation menu screen. It is a figure which shows an example in which the title of the selection display thing was displayed. It is a figure which shows an example in which the title of the selection display thing was displayed. It is a figure which shows an example of an operation menu screen. It is a figure which shows an example of an operation menu screen. It is a figure which shows an example of an operation menu screen. It is a figure which shows an example of an operation menu screen. It is a figure which shows an example of a sound volume adjustment screen. It is a figure which shows an example of a sound volume adjustment screen. It is a figure which shows an example of a sound volume adjustment screen. It is a figure which shows an example of a sound volume adjustment screen. It is a figure which shows an example of a sound volume adjustment screen.

[1. Overall configuration of pachinko machine]
Hereinafter, a pachinko machine as a game machine according to the present invention will be described with reference to the drawings. First, the entire pachinko machine according to the embodiment will be described with reference to FIGS. 1 to 3. FIG. 1 is a perspective view showing a state in which a main frame is opened to an outer frame of a pachinko machine according to the embodiment and a door frame is opened to the main frame, and FIG. FIG. 3 is a rear view of the pachinko machine.

  The pachinko machine 1 is, as shown in FIGS. 1 to 3, an outer frame 2 installed on an island facility (not shown) of the game hall and a box frame pivotally supported openably and closably on the outer frame 2. Of the main body frame 3 and the game board 4 having a game area 1100 which is fixed from the front side to the main body frame 3 and into which a game ball as a game medium is hit, and the front of the main body frame 3 and the game board 4 from the player side A door frame 5 pivotally supported openably and closably with respect to the main body frame 3 so as to be closed is provided. In the door frame 5 of the pachinko machine 1, a game window 101 formed so that the game area 1100 of the game board 4 can be viewed from the player side, and a space below the game window 101 for storing game balls. A tray-shaped upper plate 301 and a lower plate 302 (see FIG. 7), and a handle device 500 operated by the player to drive the gaming balls stored in the upper plate 301 into the gaming area 1100 of the gaming board 4; Is equipped.

  In front view, the pachinko machine 1 is formed in a vertically long rectangular shape in which the outer frame 2, the main body frame 3 and the door frame 5 extend in the vertical direction, respectively, and the horizontal width of each is substantially the same In addition to the above, the dimensions of the vertical width of the main frame 3 and the door frame 5 with respect to the outer frame 2 are slightly shortened. The decorative cover 23 is attached to the front of the outer frame 2 at a position lower than the body frame 3 and the door frame 5, and the front of the outer frame 2 is completely closed by the door frame 5 and the decorative cover 23. It has become so. Further, the outer frame 2, the main body frame 3 and the door frame 5 are arranged such that the upper ends thereof are substantially aligned, and the main body frame 3 and the door frame 5 are rotatable at a position on the left front side of the outer frame 2. It is supported, and the right end of the main body frame 3 and the door frame 5 is moved forward with respect to the outer frame 2 so as to be in an open state.

  In front view, the pachinko machine 1 is such that the game area 1100 in which the game ball is hit through the substantially circular game window 101 is exposed, and projects forward to the lower side of the game window 101. Two upper dishes 301 and lower dishes 302 are arranged up and down. In the front lower right corner of the door frame 5, a handle device 500 for the player to operate is disposed, and the player handles the handle device 500 in a state where the game balls are stored in the upper tray 301. When the rotation operation is performed, the gaming balls in the upper plate 301 are driven into the gaming area 1100 of the gaming board 4 with a hitting strength according to the rotation angle, and it is possible to play a game.

  Although the game window 101 of the door frame 5 is closed by the transparent glass unit 590, and the player can visually recognize the inside of the game area 1100, the player inserts a hand or the like into the game area 1100 to play a game. It is possible not to touch the game ball or the obstacle nail in the area 1100, the various winning openings, the special effects, and the like.

[2. Overall configuration of outer frame]
Next, the outer frame 2 installed on the island facility of the game hall will be described with reference to FIG. FIG. 4 is a front perspective view of the outer frame. The outer frame 2 is, as shown in FIG. 4, upper and lower upper and lower frame plates 10 and 11 extending in the lateral direction, left and right side frame plates 12 and 13 extending in the vertical (vertical) direction, and respective frame plates 10, 11, 12, 13, four connecting members 14 for connecting the end portions, and connecting the frame plates 10, 11, 12, 13 with each other by the connecting members 14 to form a vertically long rectangular ( Square shape). The upper frame plate 10 and the lower frame plate 11 in the outer frame 2 are formed of a solid material (for example, wood, plywood, etc.) of a predetermined thickness. In addition, an upper support fitting 20 described later is attached to the upper surface and the front surface of the left end portion of the upper frame plate 10.

  On the other hand, the side frame plates 12 and 13 are light-weight metal molds (for example, aluminum alloy) having a constant cross-sectional shape. In addition, a plurality of grooves extending in the vertical direction are formed on the outer side surface and the inner side surface of the side frame plates 12 and 13, and when installing the pachinko machine 1 on pachinko island facilities of the game hall, etc. While being able to make it easy to hold the pachinko machine 1 as a finger hook, the design of the appearance can be enhanced.

  The outer frame 2 is disposed so as to face the upper support fitting 20 fixed to the upper surface of the left end of the upper frame plate 10 and the upper support fitting 20 and fixed to a lower inner predetermined position of the left side frame plate 12 A support fitting 21 and a reinforcement fitting 22 arranged to support the lower surface of the lower support fitting 21 and fixed so as to connect the left and right side frame plates 12 and 13, and a decorative cover fixed to the front face of the reinforcement fitting 22 It has 23 and. The upper support fitting 20 and the lower support fitting 21 are for pivotally supporting the main body frame 3 and the door frame 5 so as to be able to open and close. A pivot pin 633 (see FIG. 5) of an upper pivot support 630 of the main body frame 3 described later is detachably engaged with the support hook 20c of the upper support fitting 20. A main frame support formed on a main body frame support bracket 644 of the main body frame 3 described later is inserted into the support protrusion 21 d of the lower support bracket 21, and the support support 21 d of the lower support bracket 21 is After inserting the main frame 3 into the support hole of the main body frame support bracket 644 in the main body frame 3, the main body frame 3 can be easily locked by locking the support pin 633 of the upper shaft support fitting 630 of the main body frame 3 to the support hook hole 20c. It can be pivoted open and close freely.

  Further, in the outer frame 2, two closing plates 24 and 25 (see FIG. 1) arranged at a predetermined distance apart in the vertical direction are attached and fixed to the inner side of the side frame plate 13 on the right side. The closing plates 24 and 25 are formed in a substantially L shape in plan view. The closing plates 24 and 25 are hook portions 1054 and 1065 of the lock device 1000 (locking device) attached along the open side of the main body frame 3 when the main body frame 3 is closed to the outer frame 2 (FIG. 1). (See below), and the details will be described later, but by inserting a key into the cylinder lock 1010 of the lock device 1000 and turning it to one side, the hook portions 1054, 1065 and the closing plates 24, 25 are The engagement is disengaged, and the closed state of the main body frame 3 with respect to the outer frame 2 can be released.

[3. Overall configuration of body frame]
Next, the main body frame 3 provided openably and closably on the front side of the outer frame 2 will be described with reference to FIGS. 5 and 6. FIG. 5 is a front perspective view of the main body frame, and FIG. 6 is a rear perspective view of the substrate unit in the main body frame. As shown in FIG. 5, the main body frame 3 forms a skeleton of the main body frame 3 and has a main frame base 600 having a rectangular game board holding port 601 for penetrating in the front-rear direction and holding the game board 4 An upper shaft support fitting 630 and a lower shaft support bracket 640 mounted on the upper end and the lower end of the left side end of the main body frame base 600 and supported by the outer frame 2 and rotatably supporting the door frame 5; A ball hitting device 650 attached to the lower front of the main frame base 600 for hitting a game ball into the game area 1100 of the game board 4 and a back of the main frame base 600 attached to the upper plate 301 of the dish unit 300 When the door frame 5 is attached to the front of the main body frame base 600 and the door frame 5 is opened to the main body frame 3 from the prize ball unit 700 to the dish unit 300 of the door frame 5 It includes a ball outlet opening and closing unit 790 to shut off the flow of skill sphere, the.

  Further, the main body frame 3 is attached to the lower rear surface of the main body frame base 600, and various control boards for controlling electrical parts provided on the door frame 5 excluding the game board 4 and the main body frame 3 And a back cover 900 covering the rear opening of the game board holding port 601 in the main frame base 600, and a side crime prevention plate 950 covering the left end of the main frame base 600 in a front view And a lock device 1000 attached to the right end of the main frame base in a front view, opening and closing locking of the main frame 3 to the outer frame 2, and locking and closing the door frame 5 to the main frame 3.

[3-1. Body frame base]
Next, the main body frame base 600 will be described. The main body frame base 600 is integrally formed of a synthetic resin, and is formed so as to have a vertically long rectangular shape along the outer shape of the door frame 5 and a predetermined amount of depth in the front-rear direction. It is done. The main unit frame base 600 has a game board holding port 601 capable of fittingly holding the outer periphery of the game board 4 through a rectangular shape penetrating in the front-rear direction within a range of about 3/4 of the whole from the upper part to the lower part; A U-shaped front end frame portion 602 forming the front end outer periphery excluding the front side left side of the base 600 and a recess from the front surface of the front end frame portion 602 rearwardly from the lower end of the door frame base main body 110 in the door frame 5 The protruding door frame protruding piece 110c (see FIG. 1), the upper bent protruding piece 167 (see FIG. 1) protruding rearward of the upper reinforcing sheet metal 151 in the reinforcing unit 150 of the door frame 5, and the open side reinforcing sheet metal 153 And an engaging groove 603 into which the open side outward bent protruding piece 164 (see FIG. 1) protruding rearward is inserted and engaged.

  Further, the main body frame base 600 extends from the lower side of the game board holding port 601 to the lower end of the main body frame base 600 and is recessed downward by a predetermined amount from the front end of the front end frame portion 602 A peripheral wall portion 605 which protrudes rearward inside the front end frame portion 602 and which forms an inner peripheral wall of the game board holding port 601 is provided. The free end portion (upper and lower left end portions in front view) of the U-shaped front end frame portion 602 is connected by the peripheral wall portion 605 so that the outer shape of the main body frame base 600 becomes a frame shape. It has become.

  In addition, the main frame base 600 forms the lower side of the game board holding port 601 at the upper end of the lower rear wall portion 604 and the game board placement unit 606 on which the game board 4 is placed; Positioning projections 607 that project upward from substantially the center in the left-right direction and engage with the outer ball discharge grooves of the game panel 1150 on the game board 4 and are formed at predetermined positions on the right inner wall of the peripheral wall 605 in front view The game board locking portion to which the tool 1120 is fixed, and the upper end regulating rib 609 hanging down from the upper inner wall of the peripheral wall portion 605 and having a plurality of lower ends arranged in the left and right direction. And have. The positioning projection 607 of the main body frame base 600 can be engaged with the out ball discharge groove of the game board 4 to restrict the movement of the lower end of the game board 4 in the left and right direction and the back direction There is. In addition, the game board locking portion can restrict movement of the right side in a front view of the game board 4 in the front-rear direction by locking the game board fastener 1120 of the game board 4 . In addition, although the details will be described later, the movement of the side crime prevention plate 950 in the front-rear direction is restricted by the positioning member 956 of the game board 4 in a front view.

  Further, the main frame base 600 is formed at a position where the lower rear wall portion 604 is recessed one step rearward from the front surface of the front end frame portion 602, and the ball hitting and launching device is on the front right side of the lower rear wall portion 604 in front view. A striking launcher 650 is mounted from the front side so that the 650 launch solenoids 654 are accommodated in the solenoid accommodating recess. With the hitting and launching apparatus 650 attached to the front of the lower rear wall 604, a far space 626 extending leftward and downward is formed on the left side of the firing rail 660 in the hitting and launching apparatus 650 in a front view. It is supposed to be. In the present embodiment, when the door frame 5 is closed with respect to the main body frame 3, the ball entrance 542e (see FIG. 1) of the far cover unit 540 is located below the far space 626. The gaming ball having descended the far space 626 is received by the far ball inlet 542 e of the far cover unit 540 and discharged to the lower plate 302 (see FIG. 7) in the dish unit 300.

  Also, the main frame base 600 has a plurality of openings formed in a rectangular shape in the front-rear direction on the left side of the lower rear wall 604 in the front-rear direction and a plurality of openings on the upper side and the front And a through hole 615 penetrating through the The opening of the body frame base 600 is closed from the front side by the relay terminal board cover 692, and the board unit attached to the rear surface of the lower rear wall 604 through the opening 692 a of the relay terminal board cover 692. A main door relay terminal plate 880 and a peripheral door relay terminal plate 882 of 800 are arranged to face the front side.

  Further, the main body frame base 600 detects the opening of the door frame 5 with respect to the main body frame 3 on the lower front surface of the substantially circular cylinder lock through hole 611 penetrating in the front-rear direction at the upper right end of the lower rear wall portion 604 in front view When the door frame 5 is opened (opened) with respect to the main body frame 3, the pressing is released and the opening of the door frame 5 can be detected. It is supposed to be. Further, a main body frame open switch 619 for detecting the opening of the main body frame 3 with respect to the outer frame 2 is attached to the main body frame base 600 on the rear side lower than the position where the door frame open switch 618 is attached. When the main body frame 3 is opened (opened) with respect to the outer frame 2, the pressure is released and the opening of the main body frame 3 can be detected.

[3-2. Upper shaft support and lower shaft support]
Next, the upper shaft support 630 and the lower shaft support 640 will be described. The upper shaft bracket 630 and the lower shaft bracket 640 are attached to the bracket mounting portions on the upper left end upper and lower rear surfaces of the main body frame base 600 by using predetermined screws, thereby the door frame 5 is fixed The main frame 3 can be pivotally supported on the outer frame 2 so as to be capable of opening and closing.

  The upper shaft support fitting 630 is a plate-like attachment portion 631 attached to the upper side bracket attachment portion of the main body frame base 600 and extending in the vertical and horizontal directions, and a plate-like front extension extending forward from the upper end of the attachment portion 631 7, a pivot pin 633 projecting upward from near the front end of the front extension 632 and a pivot pin 155 of the door frame 5 disposed on the left side of the pivot pin 633 in a front view. (See above) is inserted downward in the vertical direction through which the door frame shaft support hole 634 is inserted and the pivoting end to the open side of the door frame 5 hanging down from the left end of the front extension portion 632 in front view And a stopper. In the upper shaft support fitting 630, the mounting portion 631, the front extension portion 632, and the stopper are integrally formed by bending a single metal plate.

  The lower shaft support bracket 640 is disposed on the lower side of the door frame shaft support bracket 642 for supporting the door frame 5 and the door frame shaft support bracket 642 and supports the main frame 3 with respect to the outer frame 2. And a main body frame shaft support bracket 644. The door frame shaft support bracket 642 in the lower shaft support bracket 640 is attached to the lower bracket mounting portion of the main body frame base 600 and extends forward from the lower end of the mounting portion and a plate-shaped mounting portion extending in the vertical and horizontal directions. A plate-like front extension part 642b, a door frame shaft support hole 642c which penetrates vertically in the vicinity of the front end of the front extension part 642b and into which the shaft pin 157 (see FIG. 7) of the door frame 5 is inserted A stopper 642 d is provided to stand upward from a left end in a front view of the extension portion 642 b and to restrict the pivoting end of the door frame 5 to the opening side. In the door frame shaft support fitting 642, the mounting portion, the front extension portion 642b, and the stopper 642d are integrally formed by bending and forming a single metal plate.

  Further, the main frame support bracket 644 in the lower shaft support 640 is attached to the lower bracket mounting portion of the main frame base 600 and extends forward from the lower end of the mounting portion and a plate-like mounting portion extending in the vertical and horizontal directions. A forwardly extending portion 644b is provided, and a body frame shaft support hole vertically penetrates in the vicinity of the front end of the forwardly extending portion 644b. Also in the body frame shaft support bracket 644, the mounting portion and the front extension portion 644b are integrally formed by bending a single metal plate.

  The lower shaft support bracket 640 is in a state where the mounting portion of the door frame shaft support bracket 642 and the mounting portion of the body frame shaft support bracket 644 overlap (contact) in the front-rear direction. The front extension portion 642 b and the front extension portion 644 b of the main body frame support bracket 644 are attached to the lower metal fitting attachment portion of the main body frame base 600 with a predetermined distance in the vertical direction.

  When the upper shaft support bracket 630 and the lower shaft support bracket 640 are attached to the body frame base 600, the shaft support pin 633 of the upper shaft support bracket 630 and the body frame shaft support hole of the lower shaft support bracket 640 are coaxial. The main frame support hole of the main frame support 644 in the lower support 640 is engaged with the support projection 21d of the lower support 21 in the outer frame 2 (see FIG. 4). The front extension part 644b of the main body frame shaft support bracket 644 is placed on the support projecting piece 21c (see FIG. 4) of the lower support bracket 21 so as to be inserted, and then the shaft of the upper shaft support bracket 630 By inserting the support pin 633 into the support hole 20c (see FIG. 4) of the upper support fitting 20 in the outer frame 2, the main body frame 3 can be pivotally supported on the outer frame 2 so as to be able to open and close. It is supposed to be.

  Also, with the upper shaft support 630 and the lower shaft support 640 attached to the body frame base 600, the door frame shaft support hole 634 of the upper shaft support 630 and the door frame support hole of the lower shaft support 640 The door frame is configured such that the shaft pin 157 of the door frame 5 is inserted into the door frame shaft support hole 642 c of the door frame shaft support bracket 642 in the lower shaft support bracket 640 with the position 642 c coaxially positioned. After placing the lower shaft support portion 158 (see FIG. 7) on the front extension portion 642b of the door frame support bracket 642, the shaft pin 155 of the door frame 5 is mounted on the door frame of the upper shaft support fitting 630. The door frame 5 can be pivotally supported on the main body frame 3 so as to be openable and closable by inserting the shaft support hole 634. In the present embodiment, the upper shaft pin 155 of the door frame 5 is slidable in the vertical direction, and the shaft pin 155 is inserted into the door frame shaft support hole 634 of the upper shaft support bracket 630. By sliding the shaft pin 155 upward after the upper shaft support portion 156 of the door frame 5 and the front extension portion 632 of the upper shaft support bracket 630 overlap vertically. It can be inserted into the door frame shaft support hole 634.

[3-3. Ball hitting launcher]
Next, the hitting and launching apparatus 650 will be described. The ball hitting and launching apparatus 650 is mounted on a lower base of a lower rear wall 604 of the main frame base 600 at a predetermined position on a front surface of a metal plate, and a rotary drive shaft 654 a protrudes forward on the lower rear surface of the firing base 652. A firing solenoid 654, a hitting ball 656 fixed integrally to the rotational drive shaft 654a of the firing solenoid 654, a tip 658 fixed to the tip of the hitting ball 656, and a predetermined position on the movement locus of the tip 658 The tip end of the hitting ball 656 passes between the firing rail 660 attached to the front end of the firing base 660 and the firing rail 660 attached to the front end of the firing rail 660. A ball stop that holds the game ball at the base end of the firing rail 660 by forming a clearance that the game ball can not pass at the same time as it is made possible 662 and a stopper for restricting the pivoting of the hitting ball 656 (the tip 658) to the side of the firing rail 660 than the hitting position where it is possible to hit the game ball held at the base end of the firing rail 660 by the ball stopper 662 And 664.

  Although not shown in detail, the firing solenoid 654 in the hitting and launching apparatus 650 reciprocates and rotates the rotation drive shaft 654a at a strength (speed) according to the rotation operation angle of the handle device 500. . The hitting rod 656 of the hitting and launching apparatus 650 has a fixing portion 656a fixed to the rotation drive shaft 654a of the firing solenoid 654, a gentle arc extending from the fixing portion 656a, and a tip end is at the axial center of the rotation drive shaft 654a. A collar portion 656b to which the tip 658 is fixed at the tip with the normal direction directed, and a stopper portion 656c which can contact the stopper 664 extending to the opposite side across the fixing portion 656a with respect to the collar portion 656b; Is equipped. When the stopper portion 656c of the hitting ball 656 abuts against the stopper 664, the tip of the tip end 658 is pivoted toward the firing rail 660 than the hitting position (rotation end in the counterclockwise direction in front view) It is supposed to be regulated.

  In a state where the striking device firing device 650 is attached to the lower rear wall portion 604 of the main body frame base 600, the upper end of the firing rail 660 is substantially at the center in the lateral direction and the upper end of the lower rear wall portion 604, that is, the game board mounting portion 606 (lower side of the game board holding port 601) is positioned lower than the lower end of the outer rail 1111 of the game board 4 held in the game board holding port 601 and has a predetermined width in the left-right direction A far space 626 is formed to extend downward. And, the ball hitting device 650 can hit the game ball into the game area 1100 of the game board 4 by firing the game ball so as to jump over the far space 626 on the left side of the launch rail 660 in a front view. It has become. In the state where the door frame 5 is closed with respect to the main body frame 3, the ball entry 542e of the far cover unit 540 attached to the door frame 5 is positioned at the lower part of the far space 626. A game ball that has become a foul ball without being driven into the area 1100 falls in the far space 626, is received by the far ball inlet 542e, and is discharged to the lower tray 302.

[3-4. Prize ball unit]
Next, the winning ball unit 700 will be described. In the pachinko machine in the hall where the pachinko machine 1 is installed, the gaming balls supplied to the pachinko machine 1 from the pachinko machine are stored, and then paid out to the upper tray 301 of the pachinko machine 1 based on a predetermined payout instruction. It is a thing. The prize ball unit 700 is provided with a prize ball base 710 attached to the back surface of the main body frame base 600, and a prize ball tank attached to the top of the back surface of the prize ball base 710 and receiving and storing game balls supplied from the pachinko island facility side. A tank rail unit 730 is arranged below the prize ball tank 720 and arranged in the game ball stored in the prize ball tank 720 and sent downstream, and the game balls aligned by the tank rail unit 730 are predetermined. The prize ball device 740 to pay out based on the payout instruction and the gaming ball paid out by the prize ball device 740 can be guided to the upper plate 301 of the plate unit and the upper plate 301 is paid out when the game ball is full. The game machine is mainly equipped with a full tank branching unit 770 capable of branching and guiding the game ball to the lower plate 302 side.

  In addition, the prize ball unit 700 includes an external terminal board 784 attached to the rear surface of the prize ball base 710, and an external terminal board cover 786 covering the rear side of the external terminal board 784.

[3-4-1. Prize ball tank]
An outer periphery of the bottom wall portion 721 is surrounded by the outer peripheral wall portion 722 of the award ball tank 720, and a predetermined amount of gaming balls can be stored on the bottom wall portion 721. In addition, the winning ball tank 720 is inclined so that the upper surface of the bottom wall 721 is lowered toward the discharge port 723 so that the gaming balls on the bottom wall 721 roll toward the discharge port 723 It has become.

  Further, the prize ball tank 720 is provided with two ball straightening members 727 pivotally supported by the shaft portion 725 in a rotatable manner. One end side of the ball straightening member 727 is pivotally supported by the shaft portion 725 and a weight is held therein, and the other end side is suspended by its own weight. The ball straightening member 727 is suspended in a tank rail unit 730 described later, and the game balls flowing in the tank rail unit 730 can be leveled and aligned.

[3-4-2. Tank rail unit]
The tank rail unit 730 includes a tank rail 731 disposed below the award ball tank 720 and elongated in the left-right direction. The tank rail 731 has a bowl-like shape with a predetermined depth open at the top, and has a width (depth) in which the game balls can be aligned in two rows in the front-rear direction. The bottom is sloped so that

  In addition, the tank rail unit 730 includes an alignment gear 732 rotatably supported at an upper portion of the discharge port of the tank rail 731, a gear cover 733 covering the upper portion of the alignment gear 732, and a tank continuous with the right end of the gear cover 733 in a front view A ball pressure plate 734 for closing the upper portion of the rail 731 and a ball stopper 735 capable of advancing and retracting into the tank rail 731 and stopping rolling of the gaming ball in the tank rail 731 to the discharge port side And. Two alignment gears 732 are provided in line in the front-rear direction so as to correspond to the two flow paths of the game balls divided in two rows by the partition wall of the tank rail 731.

[3-4-3. Prize ball device]
The prize ball device 740 is for delivering the game balls discharged and supplied from the discharge port of the tank rail unit 730 to the upper plate 301 of the plate unit 300 based on a predetermined payout instruction. The prize ball device 740 is open at the upper end and has a width slightly wider than the outline of the gaming ball and extends to a position slightly lower than the center in the vertical direction, and communicates with the lower end of the supply passage and has a predetermined size. A distribution space having a space, a prize ball passage communicating with the lower end of the distribution space on the rear side (open side) in the rear view and bent in a substantially U shape and opened on the left side in the rear view; And a ball removal passage communicating with the lower end and extending downward and opening at the lower end. The supply passage, the distribution space, the prize ball passage, and the ball removal passage are formed in a state of being opened rearward.

  The prize ball device 740 is engaged with the first gear fixed to the rotation shaft of the payout motor 744 so as to be integrally rotatable and disposed on the rear side of the motor support plate, the second gear meshing with the first gear, and the second gear. The third gear to be rotated, the dispensing rotating body integrally rotated with the third gear and disposed in the distribution space, and the dispensing rotating body are integrally rotatably fixed on the opposite side across the third gear, circumferentially A ball breakage switch 750 for detecting the presence or absence of a game ball in the supply passage, and a prize ball passage, provided with a rotation detection board on which a plurality of (three in the present embodiment) detection slits are formed at intervals. Holds a count switch 751 for detecting gaming balls flowing down, a rotation angle switch 752 for detecting a detection slit formed on a rotation detection board integrally rotating with the payout rotary body, and a rotation angle switch 752 Rotation angle switch board 53, a payout motor 744, burn out switch 750, a counting switch 751, and the rotation angle prize balls casing substrate 754 that relays the connection between dispensing the below-described control board and the switch 752, the.

  The payout rotary body is provided with three recesses each having a size capable of accommodating one gaming ball at equal intervals in the circumferential direction, and the gaming sphere supplied from the supply passage is 1 by rotation of the payout rotary body. Each ball is accommodated in the recess so that it can be dispensed to the prize ball passage or the ball removal passage side. In addition, the three detection slits formed on the rotation detection board that rotates integrally with the payout rotation body are equally divided (every 120 degrees) on the outer periphery of the rotation detection board, and correspond to the recesses of the payout rotation body. The rotational position of the payout rotary body can be detected by detecting the detection slit with the rotational angle switch 752 provided at each position. In the present embodiment, the rotation (120 degrees) between the detection slits of the rotation detection board (dispensing rotor) is designed to correspond to the rotation of 18 steps of the dispensing motor 744.

  In the prize ball device 740, when the payout rotor is rotated in the counterclockwise direction by the payout motor 744, the gaming balls in the supply passage are dispensed to the prize ball passage, and the payout rotation is performed. The game balls paid out to the winning ball passage by the rotation of the body are counted one by one by the counting switch 751 and delivered to the winning ball passage. On the other hand, when the ball removing operation member is operated by a store clerk or the like in the hall, the game balls in the supply passage are paid out to the ball pulling passage, and the game balls paid out to the ball pulling passage are It can discharge | emit from the lower end of a channel | path to the rear side exterior of the pachinko machine 1 through the full-tank branch unit 770 mentioned later.

[3-4-4. Full Tank Branch Unit]
The full tank branch unit 770 is formed in a box shape that becomes lower as it goes from the rear end to the front end, and opens upward substantially at the center in the left-right direction at the upper rear end. A game is performed from the bottom of the prize ball receptacle in the branch space to the front side from the prize ball receptacle which receives the game ball which has flowed down the ball passage, the branch space which is disposed below the prize ball receptacle and extends laterally. The normal passage for guiding the ball, the gaming ball distributed in the normal passage are released forward, and the normal ball outlet 774 opened at the right end of the front view front view And a full ball outlet 776 which is released forward from the full ball passage 774 and is opened on the left side of the normal view of the ball outlet 774. ing.

  In addition, the full tank branch unit 770 has a ball outlet port for receiving gaming balls that have been opened upward at the left end in a front view at the rear end upper portion and flowed down the ball outlet passage of the prize ball device 740; A ball extraction passage for guiding the game ball received in the mouth to the front, and a game ball flowing through the ball extraction passage to the front, and at a position rearward of the normal ball outlet 774 and the full ball outlet 776 at the left end in front view And an open ball outlet.

  In the full tank branch unit 770, when the door frame 5 is closed with respect to the main body frame 3, the normal ball outlet 774 and the full tank ball outlet 776 are respectively the first ball inlet 542a of the far cover unit 540 in the door frame 5. And the gaming ball discharged from the ball outlet 774, which is normally in communication with the second ball inlet 542c (see FIG. 1), passes through the first ball inlet 542a of the far cover unit 540. The gaming balls supplied to the upper tray 301 of the unit 300 and discharged from the full ball outlet 776 are supplied to the lower tray 302 of the tray unit 300 through the second ball inlet 542 c of the far cover unit 540. ing. Further, the ball outlet is formed to communicate with the upper end of the main frame base ball removal passage in the main body frame base 600 in the right side in a rear view, and the game ball released from the ball outlet is the main body frame of the body frame base 600 It is delivered to the base ball removal passage.

  When the gaming ball is further paid out from the winning ball unit 700 (the winning ball device 740) with the upper plate 301 of the plate unit 300 being full of gaming balls, the ball is raised from the first ball outlet of the far cover unit 540. The game balls which can not be ejected to the side of the tray 301 stay in the first ball passage of the far cover unit 540, and eventually the normal passage upstream of the full ball branch unit 770 is filled up. In this state, the gaming ball that has entered the branch space from the winning ball receptacle can not normally enter the passage, and starts to move laterally in the branch space, and the gaming ball that has moved laterally is full. It enters into the tan passage and is supplied to the lower tray 302 of the pan unit 300 from the full ball outlet through the second ball inlet 542c of the far cover unit 540, the second ball passage, and the second ball outlet. It has become.

[3-5. Substrate unit]
Next, the substrate unit 800 will be described. As shown in FIG. 6, the substrate unit 800 has a substrate unit base 810 attached to the rear surface of the lower rear wall of the main body frame base 600, a speaker box 820 attached to the left rear surface of the substrate unit base 810 in a front view, A power supply substrate box holder 840 attached to the rear surface of the unit base 810 and a power supply substrate box attached to the rear surface of the power supply substrate box holder 840 and having a rear end substantially flush with the rear end of the speaker box 820 850, a dispensing control substrate box 860 attached to the back surface of the power supply substrate box 850 and the speaker box 820, and a terminal substrate box 870 attached to the rear surface of the speaker box 820 so as to cover the left end of the dispensing control substrate box 860 in front view And the substrate unit base A main door relay terminal plate 880 and the peripheral door relay terminal plate 882 is attached to the front surface 10, and a.

  The power supply substrate box holder 840 is a discharge ball receiving portion 841 receiving the gaming balls discharged upward and discharged downward from the out ball discharging portion of the game board 4 at the front left on the left and right center in front view; It is opened forward and upward at the front of the discharge passage 842 for guiding the gaming ball received by the discharge ball receiving portion 841 downward and discharging it, the side of the discharge passage 842 and the discharge ball receiving portion 841 (right side in front view) And a box accommodating portion formed such that the entire rear surface of the power supply substrate box holder 840 is recessed to the front side and capable of accommodating the front end of the power supply substrate box 850.

  In addition, the open front end side of the discharge passage 842 of the power supply substrate box holder 840 is closed by the rear surface of the substrate unit base 810, and the opening of the substrate unit base 810 faces the discharge passage 842. It is formed, flows through the opening of the substrate unit base 810 through the opening of the substrate unit base 810 and flows down to the rear side of the substrate unit base 810 through the body frame base ball removal passage formed on the rear surface of the lower rear wall portion It becomes possible to discharge the gaming balls and the gaming balls discharged from the out ball discharging portion of the game board 4 and received by the discharging ball receiving portion 841 through the discharging passage 842 to the lower back side of the pachinko machine 1 ing.

  The power supply substrate box 850 is formed in a horizontally long box shape whose front is open, and includes a power supply substrate 851 attached so as to close its front end opening. The power supply substrate box 850 is adapted to receive various electronic components attached to the power supply substrate 851, and externally transmits the heat from the electronic components and the like through the plurality of slits 850a formed on the upper surface and the lower surface. It can be released into the A power switch 852 attached to the power supply substrate 851 faces the rear surface of the power supply substrate box 850.

  The delivery control board box 860 includes a thin box-like box base 861 that is wide and open to the rear, a thin box-like cover 862 that fits into the box base 861 from the rear side and is open to the front, and a box base 861 And a payout control substrate 4110 attached to the rear surface of the rear cover and covered by the cover 862. Further, the payout control board box 860 is provided with a plurality of separation / cutting portions 863 that protrude outward from the left end in rear view and are formed on both the box base 861 and the cover 862. The box base 861 and the cover 862 are fixed by caulking. Thus, in order to separate the box base 861 and the cover 862, the separation and cutting portion 863 can not be separated without being cut off, and the trace thereof is left when the delivery control substrate box 860 is opened. . Therefore, it can be determined whether or not the dispensing control board box 860 has been illegally opened and closed. In the present embodiment, the delivery control board box 860 can be opened and closed only once for inspection or the like.

  Further, in the payout control board box 860, the operation switch 860a (error release unit) attached to the payout control board 4110, the inspection output terminal 860c, and the like are faced rearward through the cover 862. Further, in the payout control board box 860, terminals for various connections for connecting to the main control board 4100 and the like are arranged to face rearward through the cover 862. The operation switch 860a is operated when clearing the RAM built in the microprocessor of the payout control board 4110 when the power is turned on and the RAM built in the microprocessor of the main control board 4100, or after the power is turned on. When notified of an error, it is operated to clear the error, and the function to clear the RAM when the power is turned on and the time after the power is turned on (a period of playing the function as the RAM clear has passed And the function of canceling the error in A detailed description of this point will be given later.

  Terminal board box 870 has a board base 871 attached to the rear face of speaker box 820, a frame peripheral relay terminal board 868 attached to the rear face of board base 871 and peripheral panel relay terminals 872 fixed backward, and a board base A game ball lending device connection terminal plate 869 attached to the rear surface of the 871 and having the CR unit relay terminal 873 fixed to the rear, the peripheral panel relay terminal 872 and the CR unit relay terminal 873 face the back side And a substrate cover 874 covering the rear side of the base 871. The peripheral panel relay terminal 872 is for connecting to a frequency indicator for displaying the operating state of the pachinko machine 1 provided on the pachinko island facility where the pachinko machine 1 is installed, and a CR unit relay terminal 873 Is for connecting with a CR unit installed adjacent to the pachinko machine 1.

  The main door relay terminal board 880 and the peripheral door relay terminal board 882 are provided for the peripheral control board 4140 provided on the game board 4 attached to the main body frame 3, the payout control board 4110 for the board unit 800, etc. It is for relaying the connection with the handle device 500, each decoration board, the operation unit 400 and the like. By attaching the main door relay terminal board 880 and the peripheral door relay terminal board 882 to the board attachment portion formed on the front face of the board unit base 810, the front face of the main body frame base 600 is faced frontward, A wire extending from the door frame 5 can be connected.

  The main door relay terminal board 880 and the peripheral door relay terminal board 882 are covered on the front side by a relay terminal board cover 692 attached to the front of the main body frame base 600 and the relay terminal board cover 692 Only the connection terminal faces the front side through the opening 692a, and the front surface of the main body frame 3 has a clean appearance.

  Further, the main door relay terminal board 880 is a ball lending button 361, a return button 362, a lending remaining display portion 363, a potentiometer 512 of the handle device 500, a touch of the ball lending unit 360 in the bowl unit 300 disposed on the door frame 5 side. The relay 516 relays the connection between the switch 516, the firing stop switch 518, and the full switch 550 of the far cover unit 540, and the payout control board 4110 disposed on the body frame 3 side. In addition, regarding the rental ball button 361 of the rental ball unit 360, the return button 362, the loan remaining display portion 363, the potentiometer 512 of the handle device 500, the touch switch 516, the release stop switch 518, and the full switch 550 of the far cover unit 540. The explanation will be described later.

  In addition, the peripheral door relay terminal plate 882 is provided in the decoration units 200, 240, 280 and the decoration unit 200 provided on the door frame 5 side, the dish unit 300, the decoration substrates provided in the operation unit 400, and the operation unit 400 , For relaying the connection between various switches for detecting the operation of the dial drive motor 414, the dial operation unit 401 and the press operation unit 405, and the peripheral control board 4140 of the game board 4 disposed on the main body frame 3 side It is. Note that each decoration unit 200, 240, 280 disposed on the door frame 5 side, each decoration board provided in the plate unit 300 and the operation unit 400, and the dial drive motor 414 provided in the operation unit 400, dial operation Description of various switches for detecting the operation of the unit 401 and the pressing operation unit 405 will be described later.

[4. Overall configuration of the door frame]
Next, the door frame 5 provided openably and closably on the front side of the main body frame 3 will be described with reference to FIG. FIG. 7 is a perspective view of the door frame. As shown in FIG. 7, the door frame 5 has a door frame base unit 100 having a game window 101 whose outer periphery is formed in a vertically long rectangular shape and whose inner peripheral shape is a slightly vertical circular shape (elliptical shape), A right side decoration unit 200 attached to the right outer periphery of the game window 101 at the front of the frame base unit 100 and a left side attached to the left outer periphery of the game window 101 at the front of the door frame base unit 100 facing the right side decoration unit 200 A decoration unit 240, an upper decoration unit 280 attached to the upper outer periphery of the game window 101 at the front of the door frame base unit 100, a door frame base unit disposed below the lower ends of the right side decoration unit 200 and the left side decoration unit 240 And 100. A pair of side speaker covers 290 attached to the front of the 100.

  Further, the door frame 5 is attached to the dish unit 300 attached to the lower part of the game window 101 at the front of the door frame base unit 100, the operation unit 400 attached to the upper center of the dish unit 300, and the right side of the dish unit 300. Liquid crystal display device 470 which is provided so as to cover the display area of the upper dish liquid crystal display device 470 (second display device) and has an operation surface which can detect a contact state, for example, capacitance Type touch panel 480 (contact type input device), a handle unit 500 attached to the lower right corner of the door frame base unit 100 through the plate unit 300 for performing a game ball driving operation, and the door frame base unit 100 Cover unit 54 which is disposed on the rear side of the tray unit 300 and is attached to the rear surface of the door frame base unit 100 A ball feed unit 580 attached to the rear surface of the door frame base unit 100 on the right side of the fal cover unit 540, and a glass unit 590 attached to the rear side of the door frame base unit 100 so as to close the game window 101; Have.

[4-1. Door frame base unit]
Next, the door frame base unit 100 will be described. The door frame base unit 100 has a door frame base main body 110 having a game window 101 which is formed in a rectangular shape whose outer shape is vertically long and which is penetrated in the front-rear direction and whose inner periphery is substantially oval in vertical length; An upper bracket 120 attached to the upper center of the game window 101 at the front of the base body 110 for fixing the upper decoration unit, and a pair of sides attached to the lower left and right sides of the game window 101 at the front of the door frame base 110 A speaker 130 and a handle bracket attached to the front lower right corner of the door frame base main body 110 for supporting the handle device 500 are provided.

  Further, the door frame base unit 100 includes a metal frame-shaped reinforcing unit 150 (see FIG. 1) fixed to the rear side of the door frame base main body 110 and the game window 101 on the rear surface of the door frame base main body 110. A crime prevention cover 180 (see FIG. 1) attached so as to cover the lower part, and a glass unit locking member 190 rotatably attached at a predetermined position on the outer periphery of the game window 101 on the rear surface of the door frame base main body 110 (see FIG. 1 and a launch cover 191 (see FIG. 1) disposed on the left side (open side) from the center in the left-right direction in rear view and attached to the rear face of the door frame base main body 110 along the lower end of the game window 101 Mounted on the rear surface of the door frame base main body 110 below the launch cover 191 and provided on the potentiometer 512 of the handle unit 500 described later and the game board 4 described later A handle relay terminal board 192 (see FIG. 1) relaying connection with 100, a handle relay terminal board cover 193 (see FIG. 1) covering the rear side of the handle relay terminal board 192, and a center in the horizontal direction A frame decoration drive amplifier substrate 194 which is disposed on the opposite side to the launch cover 191, handle relay terminal plate 192, etc. on the opposite side (right side (axial support side) from the center in the horizontal direction in rear view) (See FIG. 1) and a frame ornamental drive amplifier substrate cover 195 (see FIG. 1) covering the rear side of the frame ornamental drive amplifier substrate 194.

  The frame decoration drive amplifier substrate 194 is electrically connected to the side speakers 130 and the upper speakers of the left and right side decoration units 200 and 240, and is electrically connected to the peripheral control substrate 4140 provided on the game board 4 described later. The amplifier circuit is provided with an amplification circuit that amplifies the acoustic signal sent from the peripheral control board 4140 and outputs the amplified signal to each speaker 130. Although specific illustration is omitted, in the present embodiment, each decoration board provided in each decoration unit 200, 240, 280, dish unit 300 and operation unit 400, and a dial drive motor provided in operation unit 400. Wires for electrically connecting the switches, the handle relay terminal board 192, the ball lending unit 360 of the plate unit 300, etc. with the payout control board 4110, the peripheral control board 4140, etc. After being collected and bundled at the position of the right side (axial support side), it is extended backward and connected to the main door relay terminal board 880 and the peripheral door relay terminal board 882 of the main body frame 3.

[4-1-1. Door frame base body]
The door frame base main body 110 is formed of a synthetic resin in a vertically elongated frame shape, and is formed in such a form that the game window 101 having a vertically elongated inner shape and a substantially elliptical shape is entirely upwardly offset. It is done. The game window 101 is formed in a smooth curved shape in which the left and right side and upper inner peripheral edges are continuous, while the lower inner peripheral edge is formed in a linear shape extending left and right. In addition, at the lower inner peripheral edge of the game window 101 in the door frame base main body 110, a rectangular notch capable of inserting the first ball outlet of the far cover unit 540 is formed on the shaft support side (left side in front view). Speaker attachment portion for attaching and fixing the side speaker 130, which is disposed on the left and right outside of the lower side of the game window 101, and the right (open side) end of the front which is disposed in the lower right corner in front view and bulges forward. The handle attachment portion for attaching the handle bracket at a slanted angle so as to retract, the wiring passage opening through which the wiring from the handle device 500 can pass in the longitudinal direction at a predetermined position of the handle attachment portion, the upper side of the handle attachment portion The lock hole 116 is formed in a cylindrical shape that extends short in the forward direction and through which a cylinder lock 1010 described later can be inserted. The door frame base main body 110 has an upper side formed by the game window 101, and widths of left and right side sides are the upper reinforcing sheet metal 151, the pivoting side reinforcing sheet metal 152, and the open side reinforcing sheet metal 153 of the reinforcing unit 150 described later. The game window 101 is formed as large as possible with respect to the size of the door frame base main body in a front view.

[4-1-2. Reinforcement unit]
The reinforcement unit 150 is provided with an upper reinforcement sheet metal 151 (see FIG. 1) attached along the upper side back surface of the door frame base main body 110 and a pivot support attached along the back side of the pivoting side of the door frame base main body 110. A side reinforcing sheet metal 152 (see FIG. 1), an opening side reinforcing sheet metal 153 (see FIG. 1) attached along the back surface of the side of the door frame base main body 110, and a game window 101 of the door frame base main body 110. And a lower reinforcing sheet metal 154 (see FIG. 1) attached along the lower surface of the lower side, and they are formed into a square shape by mutually fastening them with a screw or a rivet.

  An upper shaft support portion 156 having a shaft pin 155 slidably provided in the upper and lower directions on the upper surface and a lower shaft support portion 158 having a shaft pin 157 on the lower surface. It is equipped integrally. The upper and lower shaft pins 155 and 157 are pivotally supported by the upper shaft support bracket 630 and the lower shaft support bracket 640 formed on the upper and lower shaft support sides of the main body frame 3, so that the door frame 5 is mounted on the main body frame 3. It is pivotally supported open and close freely.

  In addition, a hook cover 165 that abuts on the door frame hook portion 1041 of the lock device 1000 is provided at the rear lower portion of the open side reinforcing sheet metal 153. The hook cover 165 engages with the door frame hook portion 1041 of the lock device 1000 (locking device) attached along the open side of the main body frame 3 when the door frame 5 is closed with respect to the main body frame 3 The door frame hook portion is obtained by inserting a key into the cylinder lock 1010 of the lock device 1000 and rotating it in one direction (rotating in the direction opposite to the direction in which the main body frame 3 is opened relative to the outer frame 2). It is possible to release the closed state of the door frame 5 with respect to the main body frame 3 by disengaging the engagement between the 1041 and the hook cover 165.

[4-2. Dish unit]
Next, the plate unit 300 will be described. The dish unit 300 is provided with an upper plate 301 and a lower plate 302 for storing gaming balls paid out from the winning ball device 740, and the gaming balls stored in the upper plate 301 are hit and fired via the ball feeding unit. It can be supplied to the device 650.

  The upper tray upper panel 314 of the tray unit 300 is formed in a curved shape so as to project forward from the left to the center in a front view, and from the center to the front in a straight line toward the right. It is formed to protrude. An operation unit attachment portion to which the operation unit 400 is attached is formed at the upper center of the plate unit 300, and a liquid crystal attachment portion 314d for attaching the upper plate liquid crystal display device 470 is formed on the right side of the operation unit attachment portion. . The shape of the upper plate upper panel 314 in which the liquid crystal mounting portion 314 d is formed is formed in a plate shape, and this portion is bent downward, for example, when the player presses the portion downward by hand, When the pressing force exceeds a predetermined force, the upper plate upper panel 314 is broken. This is because the upper tray side liquid crystal display device 470 is expensive, so when the player presses the screen of the upper plate side liquid crystal display device 470, the upper tray upper panel 314 receives the force thereof. The upper dish upper panel 314 is bent to prevent the upper dish liquid crystal display device 470 from being damaged. That is, a structure is adopted in which the upper dish upper panel 314 is broken first before the upper dish liquid crystal display device 470 is broken. When the upper tray upper panel 314 is broken, the tray unit 300 is replaced. In this case, the upper tray liquid crystal display device 470 is removed from the broken upper tray upper panel 314 and attached to the upper tray upper panel 314 of the tray unit 300 to be replaced for reuse.

  The tray unit 300 also has an upper tray ball withdrawal mechanism 340 for withdrawing the gaming balls stored in the upper plate 301 into the lower plate 302 in response to the operation of the upper plate ball withdrawal button 341, and the lower plate ball withdrawal button 354. A lower ball ball extraction mechanism 350 for removing the gaming ball stored in the lower plate 302 downward through the lower ball ball extraction hole 324b in accordance with the operation of the lower plate ball 302, and a CR (not shown) installed adjacent to the pachinko machine 1 And a ball unit 360 for operating the unit.

[4-2-1. Operation unit]
The operation unit 400 is disposed on the front surface of the upper plate 301 substantially at the center in the left-right direction of the front view, and includes a dial operation unit 401 that allows the player to rotate and a pressing operation unit 405 that the player can press. The player can receive the operation of the player or move the dial operation unit 401 in accordance with the game state, and participates not only in the game ball hitting operation for the player but also the effect during the game To be able to The rotation (rotational direction) of the dial operation unit 401 is detected by a rotation detection switch provided in the operation unit 400, and the operation of the pressing operation unit 405 is detected by a pressure detection switch provided in the operation unit 400.

  Further, the operation unit 400 can rotate the dial operation unit 401 clockwise or counterclockwise by the driving force of the dial drive motor 414. In addition, the operation unit 400 rotates the dial operation unit 401 in a stepwise manner by the driving force of the dial drive motor 414 using a stepping motor, or when the player rotates the dial operation unit 401. It is possible to assist rotation, to prevent it from turning intentionally, and to add a sense of click to the rotation. Further, the operation unit 400 can vibrate the dial operation unit 401 by alternately repeating the rotation for rotating the dial drive motor 414 in small increments and the rotation for reverse rotation.

4-2-2. Ball unit]
The rental ball unit 360 includes a rental ball button 361 and a return button 362 that can be pressed backward, and also includes a loan remaining display unit 363 between the rental ball button 361 and the return button 362. When the rental ball button 361 is operated, it is detected by the ball rental switch 365a, and when the return button 362 is operated, it is detected by the return switch 365b. The display content of the remaining frequency indicator 365 c can be visually recognized through the remaining loan display portion 363. A CR unit lamp 365d is disposed adjacent to the remaining frequency indicator 365c, so that the light emission mode of the CR unit lamp 365d can be viewed through the loan remaining display portion 363. The ball rental switch 365a, the return switch 365b, the remaining frequency indicator 365c, and the CR unit lamp 365d are mounted on the frequency display plate 365, and the frequency display plate 365 is mounted inside the ball rental unit 360. . In this ball lending unit 360, after inserting cash or a prepaid card into a ball lending machine provided adjacent to the pachinko machine 1, when the ball lending button 361 is pressed, a predetermined number of gaming balls can be put into the bowl unit 300 Can be borrowed (paid out) into the upper tray 301, and when the return button 362 is pressed, the remaining amount of the loaned amount is subtracted and the cash remainder or prepaid card inserted is returned. There is. Further, the remaining amount display portion 363 displays the remaining number of cash and prepaid cards inserted into the ball lending machine.

[4-3. Ball sending unit]
Next, the ball feeding unit 580 will be described. The ball feeding unit 580 can supply the game balls supplied from the upper plate 301 in the plate unit 300 to the ball hitting and firing apparatus 650 one ball at a time, and the game balls stored in the upper plate 301 can be It can be withdrawn to the lower tray 302 by the operation of the upper disc ball release button 341 of the removal mechanism 340.

  In the ball feeding unit 580, the game balls stored in the upper plate 301 of the plate unit 300 are supplied through the upper plate ball discharging port of the upper plate 301 and the ball feeding opening of the door frame base main body 110 and penetrated in the front and back direction , And a box-shaped front cover having a ball outlet open to the lower side of the entry opening, and a rear open box-like front cover, and a box form closing the rear end of the front cover and having the front open open, penetrating in the longitudinal direction Back cover having a hitting supply port 582a for supplying the game ball intruded from the entrance of the front cover to the hit ball launcher 650, and pivoting about an axis extending in the longitudinal direction between the back cover and the front cover A ball removing member having a partitioning portion that is pivotally supported so as to partition between the entry port and the ball outlet on the rear side of the front cover, and the game balls on the partitioning portion of the ball removing member one ball at a time Supply port 582a up and down between front cover and rear cover And Tamaoku member rotatably supported around an axis extending to, and a Tamaoku solenoid 585 to rotate the Tamaoku member.

  When the ball feed solenoid 585 is driven (ON state), the ball feed member accepts one game ball, and when the ball feed solenoid 585 is released (OFF state), the ball feed member receives The game balls are to be sent (supplied) to the ball hitting device 650 side.

[4-4. Handle device]
Next, the handle device 500 will be described. The handle device 500 is fixed to a handle bracket attached to the front surface of the door frame base main body 110 and has a cylindrical handle shape with a front end bulging in a direction perpendicular to the axis, and a handle base rotatable relative to the handle base. It is disposed on the front of the rotary handle main body 506, which is fixed on the front of the rotary handle main body, and on the front of the rotary handle main body 506. And a front end cover 508 which is fixed to the handle base and rotatably supports the rotary handle front 506 and the rear of the rotary handle main in cooperation with the handle base.

  In addition, the handle device 500 is attached and fixed so as to project from the front side to the rear side at the rotation center in front of the rotary handle main body, and has a noncircular bearing portion at the rear end and the bearing portion of the shaft member The potentiometer 512 fixed to the front of the handle base so as to sandwich the potentiometer 512 between the handle base and the potentiometer 512 having a detection shaft portion which is made rotatable and fixed to the front of the handle base so as to detect the potentiometer 512 A switch support member having a through hole through which the shaft can pass, a touch switch 516 attached to the rear surface of the switch support member, and a firing stop switch 518 attached to the touch switch 516 at different positions on the rear surface of the switch support member , A single-shot bolt rotatably supported on the switch support member and operating the firing stop switch 518 And a handle disposed so as to cover the outer periphery of the shaft member and urging the front of the rotary handle main body 506 and the rear of the rotary handle main body back to the original rotational position (rotational end in the counterclockwise direction in front view) And a return spring. The potentiometer 512 is used to electrically adjust the strength with which the game ball is launched toward the game area 1100 in accordance with the rotational position of the front handle 506. In addition, the rotation handle body front 506 and the rotation handle body are rotated from the original rotation position to the limit rotation position (rotation end in the clockwise direction in front view) which is the maximum rotation position in the clockwise direction in front view. Do.

  Further, in the handle device 500, the potentiometer 512 is a variable resistor, and when the rotary handle main body front 506 and the rotary handle main body are rotated, the detection shaft portion of the potentiometer 512 is rotated via the shaft member. . Then, the internal resistance of the potentiometer 512 changes in accordance with the rotational position (rotational angle) of the detection shaft portion, and the driving force of the firing solenoid 654 in the bat firing device 650 changes in accordance with the internal resistance of the potentiometer 512. The game ball is driven into the game area 1100 with a firing intensity according to the rotation angle after the main body front 506 and the rotary handle main body, that is, the rotational position after the rotary handle main body 506 and the rotary handle main body There is.

[4-5. Foul cover unit]
Next, the foul cover unit 540 will be described. The foul cover unit 540 is attached to the rear surface below the gaming window 101 in the door frame base unit 100, and the game balls are paid out from the winning ball unit 700, and the game is played regardless of being fired by the ball striking device 650. The game balls (fowl balls) that have not reached the area 1100 are guided to the upper plate 301 and the lower plate 302 of the plate unit 300. The foul cover unit 540 includes a cover base which is open on the front side and has a flow passage of a plurality of gaming balls therein, and a front cover which closes the front end of the cover base.

  The cover base of the false cover unit 540 is disposed in the upper right corner in the rear view and extends through the first ball inlet 542a penetrating in the front-rear direction and the first ball inlet and extends to the front right of the cover base 542 A single ball passage, a second ball inlet 542c disposed on the outer side (right side in rear view) of the first ball inlet 542a and larger than the first ball inlet 542a, and a second ball passage in communication with the cover base And a second ball inlet 542 c inclined so as to extend downward and lower toward the lower right corner in the front view. The first ball inlet 542 a and the second ball inlet 542 c are configured such that the normal ball outlet 774 and the full ball outlet 776 of the full tank branch unit 770 in the winning ball unit 700 with the door frame 5 closed to the main frame 3. And are respectively formed at opposite positions. In the second ball passage of the cover base, the height of the portion extending in the left and right direction along the lower end is about three times the height of the outer diameter of the gaming ball, and the predetermined amount of gaming ball is A storage space that can be stored is formed.

  In addition, the cover base 542 is disposed at a substantially central upper portion in the left-right direction and opens in the upper direction to the far ball inlet 542e, and the far ball inlet 542e communicates with the ball ball to the upper near the downstream of the second ball passage. And a ball passage. In addition, the cover base is provided with an opening and closing operation piece for operating the opening and closing shutter 792 of the ball outlet opening and closing unit 790 on the rear surface below the second ball inlet. When the door frame 5 is closed with respect to the main body frame 3, the opening and closing operation piece contacts the spherical contact portion of the opening and closing crank in the ball outlet opening and closing unit 790 to rotate the opening and closing crank to open the opening and closing shutter 792. It can be in the open state.

  The front cover of the foul cover unit 540 is formed in a substantially plate shape that closes the front surface of the cover base, and is disposed at the upper left corner of the front view and communicates with the first ball passage of the cover base and penetrates in the front and back direction An outlet and a second ball outlet disposed at the lower right corner in a front view and communicating with the downstream end of the second ball passage of the cover base 542 and penetrating in the front-rear direction. The first ball outlet of the front cover is connected to the upper countersink supply port of the tray unit 300 through the notch of the door frame base unit 100. In addition, the second ball outlet is connected to the rear end of the lower bowl ball supply rod in the bowl unit 300 through the ball passage port of the door frame base main body 110.

  The foul cover unit 540 receives the game balls supplied from the normal ball outlet 774 of the full tank branch unit 770 in the winning ball unit 700 to the first ball inlet 542a and passes through the first ball passage to the dish unit 300 It can be supplied to the upper tray 301 through the upper tray ball supply port. In addition, the foul cover unit 540, from the full ball outlet 776 of the full tank branch unit 770 in the winning ball unit 700 to the second ball inlet 542c from the full ball outlet, through the second ball passage from the second ball outlet It can be supplied to the lower tray 302 via the lower tray and the lower tray inlet of the tray unit 300.

  Further, when the door cover 5 is closed to the main body frame 3, the far ball inlet 542 e is positioned below the far space 626 of the main body frame 3, so that the ball hitting and launching apparatus can When the game ball fired by 650 does not reach the game area 1100 and becomes a far ball and falls down the far space 626, it is received by the far ball inlet 542e. Then, the foul cover unit 540 can discharge (supply) the gaming ball received at the foul ball inlet 542 e from the second ball outlet to the lower tray 302 of the tray unit 300 through the far ball passage and the second ball passage It can be done.

  Further, the fowl cover unit 540 forms an upstream (left side in a front view) side surface of the accommodation space in the second ball passage, and is pivotally supported by the cover base so as to be pivotable by the game balls stored in the accommodation space. A member, a full tank switch 550 for detecting swinging of the swinging member, and a spring for biasing the swinging member in a non-detection state by the full switch 550 are provided. The lower end of the swinging member is pivotally supported by the cover base so that the upper end is pivoted to the left in front view, and the left side wall of the accommodation space is substantially vertical. It is supposed to form. Further, the swinging member is biased to a substantially vertical position by a spring. Further, the swinging member is formed with a detection piece projecting outward on the side surface opposite to the accommodation space side, and this detection piece is detected by the full switch 550. That is, based on the detection signal from the full tank switch 550, it can be determined whether or not the storage space is full with the stored game balls.

[4-6. Touch panel]
FIG. 8 is an exploded perspective view showing a configuration example of the touch panel 480 and the like provided on the upper dish liquid crystal display device 470. The upper dish liquid crystal display device 470 is provided on the base 490, and the touch panel 480 is provided on the upper dish liquid crystal display device 470 so as to face each other. The upper dish liquid crystal display device 470 and the touch panel 480 on the base 490 are covered by a cover 481 in which an opening having a shape corresponding to the operation surface of the touch panel 480 is formed. Therefore, the opening 48 of the cover 481 passes through the film 488 and the reinforcing glass 491 which will be described later and the operation surface of the touch panel 480 is exposed, and the operation surface is transmitted and the display area of the upper dish liquid crystal display device 470 Is exposed. Both sides of the touch panel 480 are covered with a band-like light transmitting film 488 whose both ends are combined.

  The film 488 covers the upper side of the operation surface of the touch panel 480, and when the operator tries to touch the operation surface of the touch panel 480 with a finger, the finger directly touches the film 488 instead of the operation surface of the touch panel 480 become. The belt-like, annular film 488 is supported by rollers 485, 486 at both ends of its turn, and is movably supported along the operation surface by rotation of the rollers 485, 486 (film support). . The roller 485 is rotated by driving the motor 482 (drive unit) through the motor drive substrate 4180, whereby the film 488 tensioned by the rollers 485 and 486 with a prescribed tension is along the longitudinal direction of the band. Can be moved. Such movement of the film 488 is controlled in touch panel processing S1031 shown in FIG. 53 described later.

  Further, on the upstream side of the film 488 shown in FIG. 8 in the basic moving direction D, an attached matter detection sensor 483L is provided to face the film 488, and on the downstream side of the film 488 in the basic moving direction D. Is provided so that the deposit detection sensor 483R faces the film 488. The attached matter detection sensors 483R and 483L are, for example, reflection type sensors that emit light to detect the state of the reflected light on the surface of the film 488, and are operated according to the rotation of the roller 485 accompanying the drive of the motor 482 The state of the deposit on the surface of the film 488 moving along the surface is acquired (adhesion detector). A solid information recognition sensor 487L covering the width of the strip-like film 488 is provided on the further upstream side of the basic movement direction D of the film 488, and on the further downstream side of the basic movement direction D of the film 488. Is provided with a solid-state information recognition sensor 487R that covers the width of the belt-like film 488. The solid-state information recognition sensor 487R is activated, for example, when the attachment detection sensor 483R detects an attachment on the surface of the band-shaped film 488 moved relative to the attachment detection sensor 483R. The film 488 is irradiated with ultraviolet light of a predetermined wavelength (for example, 355-435 μm) at a timing taking into consideration the movement time of the film 488 from the attached matter detection sensor 483R to the solid information recognition sensor 487R, and An image of the attached matter on the film 488 is taken through the transmitting ultraviolet ray transmission filter, and an image signal (downstream side image signal) obtained by photographing the attached matter in a mode emitted by the irradiation of the ultraviolet light is sent to the peripheral control MPU 4140a. Output (adhesion detection unit). On the other hand, this solid-state information recognition sensor 487L operates, for example, when the deposit is detected by the deposit detection sensor 483L if the deposit is on the surface of the strip-shaped film 488 moved relative to the deposit detection sensor 483L. The film 488 is irradiated with ultraviolet light of a predetermined wavelength (for example, 355-435 .mu.m) at a timing taking into consideration the moving time of the film 488 from the attached matter detection sensor 483L to the solid information recognition sensor 487L. An image of the attached matter on the film 488 is taken via an ultraviolet ray transmission filter that transmits ultraviolet light, and a video signal (upstream video signal) obtained by photographing the attached matter in a mode emitted by the irradiation of the ultraviolet ray is sent to the peripheral control MPU 4140a. Output against. Such detection of the state of the deposit on the surface of the film 488 is controlled in touch panel processing S1031 shown in FIG. 53 described later. Alternatively, the functions of the solid-state information recognition sensors 487R and 487L described above may be substituted by using a touch panel 480 having a high resolution concave-convex resolution instead.

  Further, on the upstream side in the moving direction D of the film 488, a cleaning roller 484L (wipe part) for pressing the surface of the film 488 to be moved to remove deposits from the film 488 is provided. On the downstream side in the moving direction D, a cleaning roller 484 R (wipe portion) is provided for pressing the surface of the film 488 to be moved to remove deposits from the film 488. The cleaning roller 484R is pressed against or pulled away from the film 488 by a pressing mechanism (not shown), and can remove deposits from the surface of the film 488 when pressed against the surface of the moving film 488, for example. Such operation control of the cleaning rollers 484R and 484L is controlled in touch panel processing S1031 shown in FIG. 53 described later.

[5. Overall configuration of the game board]
Next, the overall configuration of the game board 4 will be described with reference to FIG. 9 and FIG. FIG. 9 is a front view of the game board, and FIG. 10 is an exploded perspective view of the game board of FIG. 9 disassembled and viewed from the front. As shown in FIGS. 9 and 10, the game board 4 has an outer rail 1111 and an inner rail 1112, and the player operates the handle device 500 to operate the handle device 500 in the game area 1100 into which a game ball as a game medium is hit. At the position where it will be visible to the player from the gaming window 101 of the door frame 5 when it is attached to the pachinko machine 1 at the front view lower right corner of the frame-shaped front component 1110 and the front component 1110 A function display unit 1180 disposed, and a plurality of openings 1158 attached to the rear of the front component 1110 so as to close the game area 1100 and having a predetermined shape and penetrating in the front and back direction at positions corresponding to the game area 1100 The game panel 1 is attached from the front side to the opening 1158 of the game panel 1150, and the game panel 1 It includes a backing unit 3000 attached to the rear surface 50, a.

  In addition, the game board 4 is disposed between the game panel 1150 and the back unit 3000, and is inserted from the rear side of the game panel 1150 into a light emitting decorative hole formed in a plurality so as to penetrate the game panel 1150 A panel lens member 2500, a liquid crystal display device capable of displaying a predetermined effect image which is detachably attached to the rear side of the back unit 3000 and can be viewed from the player according to the gaming state, and a lower portion of the back unit 3000 And a main control board box 1170 attached to the rear surface of the substrate holder 1160. The main control substrate box 1170 is attached to the rear surface of the game panel 1150 so as to cover the rear side.

[5-1. Front component]
Next, the front component 1110 will be described. The front component 1110 has a substantially rectangular shape whose outer shape can be inserted into the game board holding port 601 of the main body frame 3, and the inner shape penetrates in a substantially circular shape in the front-rear direction. The outer periphery of the region 1100 is divided. The front component 1110 is an outer rail 1111 extending in a circular arc shape along the clockwise circumferential direction from the lower end toward the left from the center in the lateral direction in front view, and extending to the upper right corner passing the upper end in the lateral direction in the front view. The inner rail 1112 is disposed inside the outer rail 1111 substantially along the outer rail 1111 and extends in an arc shape from the center lower portion in the front view left and right direction to the upper left diagonal upper portion, and smoothly continuous from the lower end of the inner rail 1112 Inner circumferential rail 1113 extending in an arc shape to a position lower than the end (upper end) of outer rail 1111 along the circumferential direction counterclockwise in a front view, the end (upper end) of inner circumferential rail 1113 and outer rail 1111 A stop 1114 that allows the game ball rolled along the outer rail 1111 to connect with the end (upper end) of the inner rail 1111 and the inner rail 1113 And is rotatably supported at the upper end of the inner rail 1112 and closed between the outer rail 1111. Thus, it is possible to rotate only between the closed position extending upward from the upper end of the inner rail 1112 and the open position where it is pivoted in the clockwise direction as viewed from the front and opened between the outer rail 1111 A backflow prevention member 1116 biased by a spring so as to return to the closed position side.

  In the front component 1110, when the game board 4 is attached to the main frame 3, the lower end opening between the outer rail 1111 and the inner rail 1112 is a firing rail 660 in the ball striking device 650 of the main frame 3 (FIG. 1 It is located on the extension of (see). A space extending in the left-right direction and downward is formed between the lower end of the outer rail 1111 and the upper end of the firing rail 660, and the game ball launched along the firing rail 660 of the bat firing device 650 is Over the space, the lower end opening between the outer rail 1111 and the inner rail 1112 is driven into between the outer rail 1111 and the inner rail 1112. The game ball inserted between the outer rail 1111 and the inner rail 1112 rolls up along the outer rail 1111 according to the momentum, and the backflow prevention member 1116 pivotally supported on the upper end of the inner rail 1112 By turning it to the open position side against the biasing force, it is possible to enter the game area 1100.

  In addition, when the game ball is hit hard in the ball firing device 650, the game ball rolled along the outer rail 1111 in the game area 1100 abuts on the stopper 1114 provided at the end of the outer rail 1111. The rolling direction of the gaming ball can be compulsorily changed by bringing the gaming ball into contact with the stopper 1114, and the gaming ball is continuously rotated from the outer rail 1111 to the inner circumferential rail 1113. It is possible to prevent movement. In addition, even if the game ball which has entered (entered into) the game area 1100 tries to return between the outer rail 1111 and the inner rail 1112, the backflow prevention member 1116 is returned to the closed position by the biasing force before that. Thus, the backflow prevention member 1116 prevents backflow of the gaming balls.

  In addition, the game ball driven into the game area 1100 flows down to the lower end of the game area 1100 if it is not accepted by the start ports 2101 and 2102 of the front unit 2000 and the winning openings 2103, 2104 and 2201 etc. It is guided to the out port 1151 of the game panel 1150 by the out port guiding surface 1115 at the boundary between the inner rail 1112 and the inner peripheral rail 1113 and is discharged from the out port 1151 to the rear lower side of the game board 4 .

  On the other hand, if the gaming ball fired from the hit ball launcher 650 can not enter the gaming area 1100 beyond the backflow preventing member 1116 at the end of the inner rail 1112, the outer rail 1111 and the inner rail 1112 Between the lower end opening between the outer rail 1111 and the inner rail 1112 and the lower space between the upper end of the firing rail 660 and the lower end of the outer rail 1111. 1 (see FIG. 1) is received by the ball entry 542e (see FIG. 1) of the far cover unit 540 attached to the door frame 5 located at the lower part of the far space 626, It is discharged to the lower tray 302 (see FIG. 7).

  A metal plate is attached to the surface of the outer rail 1111 of the front component 1110, so that the wear resistance due to the rolling of the gaming ball is enhanced, and the gaming ball rolls smoothly. ing. In addition, elastic members such as rubber and synthetic resin are arranged on the surface of the stopper 1114, and even if the game balls roll vigorously along the outer rail 1111 and make a collision, the shock is mitigated. As well as being able to repel the gaming ball inward.

  Further, the front component 1110 is vertically spaced at the left end of the front view and recessed from the front to the rear and a pair of positioning recesses 1119 opened at the left end, and vertically spaced at the right end in the front view A pair of game board fasteners 1120 disposed, a fixed recess 1121 disposed on the left side in front view from the lower end of the outer rail 1111 and opened downward while the upper side is formed in an arc shape and recessed from the front side, In the vicinity of the left side end portion of the second embodiment, there is provided a rectangular-shaped notched ball passage notch portion 1122 which extends in the left-right direction from the lower end upward. The positioning recess 1119 of the front component 1110 is engaged with the positioning member 956 (see FIG. 5) attached to the inside of the side security plate 950 in the main body frame 3, thereby referring to the game board holding port 601 (FIG. 5). Can be restricted from moving in the front-rear direction at the left end of the game board 4 inserted in the front view. Further, the game board stopper 1120 can be detachably engaged with the game board locking portion of the main body frame base 600 of the main body frame 3, and the game board stopper 1120 is engaged with the game board By locking the stop portion, it is possible to restrict the front end right end of the game board 4 inserted in the game board holding port 601 of the main body frame 3 from moving in the front-rear direction.

  Further, with the fixed recess 1121 of the front component 1110 inserted into the game board holding port 601 of the main frame 3, the game board fixture 690 (FIG. 5) is supported. The fixed piece 690a (see FIG. 5) of the game board fixture 690 is inserted when the front panel is rotated clockwise in a front view, and the game board 4 The lower end of the is restricted to move forward. Further, the ball passage cutout portion 1122 of the front component 1110 is formed with the same ball passage cutout portion 1152 at the same position of the game panel 1150, and the game board 4 is used as the game board holding port 601 of the main body frame 3. In the inserted state, the front end of the full tank branch unit 770 (see FIG. 5) is inserted into the ball passage cutouts 1122 and 1152.

  A function display unit 1180 described later is disposed on the lower right of the front component 1110 in a front view.

5-2. Table unit]
Next, the front unit 2000 of the game board 4 will be described. The front unit 200 is disposed at the upper side of the out port 1151 at the lower center of the game area 1100 and supported by the front of the game panel 1150, and the outer periphery of the game area 1100 on the left of the attacker unit 2100. A side winning opening member 2200 disposed along the front of the game panel 1150 and supported by the front of the game panel 1150, and a frame-shaped center character 2300 disposed substantially at the center of the game area 1100 and supported by the game panel 1150. There is.

  The front unit 2000 is attached to the front of the game panel 1150 after being inserted from the front side with respect to the opening 1158 formed at the position corresponding to the game area 1100 in the game panel 1150, A portion protruding to the front side relative to the game panel 1150 is positioned in the game area 1100. Thereby, the front unit 2000 is in contact with the game ball driven into the game area 1100 at an appropriate position, and the movement of the game ball is performed together with the obstacle nail implanted on the front of the game panel 1150. Change can be given. Further, the front unit 2000 can decorate the game area 1100.

[5-2-1. Attacker unit]
Next, the attacker unit 2100 of the front unit 2000 will be described. Attacker unit 2100 has a plurality of receiving openings (prize openings) in which gaming balls driven into gaming area 1100 can be received, and more specifically, it is arranged approximately at the center in the horizontal direction. A starting opening 2101, a lower starting opening 2102 disposed below the upper starting opening 2101, and a rectangular opening disposed below the lower starting opening 2102 and extending in the lateral direction more than the upper starting opening 2101 and the lower starting opening 2102 A shape special winning opening 2103 and a general winning opening 2104 disposed slightly upward of the left and right sides of the special winning opening 2103 are provided. The game balls accepted by the upper start opening 2101, the lower start opening 2102, the big winning opening 2103, and the general winning opening 2104 are guided from the front side to the rear side of the game panel 1150.

  The upper start opening 2101 of the attacker unit 2100 is open at the upper side, and gaming balls can be always accepted (prize winning). On the other hand, the lower starting opening 2102 disposed below the upper starting opening 2101 has a pair of movable pieces 2106 which can be expanded by the starting opening solenoid 2105 between the lower starting opening 2101 and the lower starting opening 2101. When the piece 2106 rises substantially vertically, the game ball can not be received by the upper start opening 2101 and the pair of movable pieces 2106 to the lower start opening 2102, but the pair of movable pieces 2106 move in the left-right direction. In the expanded state, the gaming ball can be received to the lower starting opening 2102. That is, the lower starting opening 2102 is a variable winning opening due to the pair of movable pieces 2106. Note that the pair of movable pieces 2106 are opened and closed by driving the starting opening solenoid 2105 based on the detection of passage of the game ball by the gate switch 2352 of the gate unit 2350 in the center combination 2300 described later.

  The winning opening 2103 of the attacker unit 2100 can be opened and closed by a horizontally long rectangular opening / closing member 2107 which can close the opening. The lower side of the opening and closing member 2107 is pivotally supported, and in the substantially vertical state, the large winning opening 2103 can be closed to make it difficult to receive the game ball, and the upper side moves to the front side. When it rotates, the special winning opening 2103 can be opened to make it easy to receive the game ball. The opening / closing member 2107 is in a state in which the large winning opening 2103 is closed in the normal gaming state, and the game ball is accepted (start winning) by the upper starting opening 2101 and the lower starting opening 2102. In accordance with the lottery result (when the result of the special lottery is "big hit" or "small hit"), it is opened and closed by driving the attacker solenoid 2108.

  Furthermore, the general winning opening 2104 of the attacker unit 2100 is opened upward, and gaming balls can always be accepted (winning).

  Also, although not shown in detail, the attacker unit 2100 has a lower starting opening switch 2109 for detecting gaming balls received to the lower starting opening 2102 and a count switch for detecting gaming balls received to the big winning opening 2103. The game ball detected by the lower start opening switch 2109 and the count switch 2110 is further discharged onto the bottom wall portion of the substrate holder 1160. In addition, an upper starting opening switch 3022 that detects gaming balls received to the upper starting opening 2101 and a general winning opening switch 3020 that detects gaming balls received to the general winning opening 2104 are provided in the back unit 3000. .

5-2-2. Side winning opening member]
Next, the side winning opening member 2200 of the front unit 2000 will be described. The side winning opening member 2200 is inserted from the front with respect to the opening 1158 formed on the left side of the opening 1158 to which the attacker unit 2100 is inserted and fixed at the lower left side from the center in the left-right direction in the game panel 1150 Above, it is fixed to the front of the game panel 1150, and is made to face each other along the outer periphery of the game area 1100 so as to line up with the general winning opening 2104 on the left side in front view in the attacker unit 2100 A general winning hole 2201 is provided. These two general winning openings 2201 are opened upward and gaming balls can always be accepted (winning), and the gaming balls accepted to the general winning openings 2201 are guided from the front side to the rear side of the game panel 1150. After it is detected, it is detected by a general winning opening switch 3020 provided in the back unit 3000 described later.

  Further, the side winning opening member 2200 is disposed at a position such that the left end thereof is substantially in contact with the outer periphery of the game area 1100 at the upper left end thereof, and is inclined to become lower toward the right end. The shelf 2202 and the first shelf 2202 are disposed on the opposite side and lower side across the two general winning openings 2201 and the center in the horizontal direction of the game area 1100 (the lower start opening 2102 of the attacker unit 2100 and the special winning opening And the second shelf 2203 is lowered toward the side of 2103), and the game ball having flowed down along the outer periphery of the game area 1100 by the first shelf 2202 may be moved toward the center side of the game area 1100. It can be done.

  The two general winning openings 2201 are disposed to the right of the right end of the first shelf 2202, and even if the first shelf 2202 moves the game ball toward the center of the game area 1100, There is a possibility of winning to the general winning opening 2201. In addition, the upper side between the two general winning openings 2201 is also provided with a third shelf 2204 inclined so as to be lower toward the center side of the game area 1100.

  The side winning opening member 2200 is formed to be translucent as a whole, and although a detailed illustration is omitted, a side winning opening decoration substrate is provided on the rear side of the second shelf 2203. At the same time, a side lamp decoration substrate 3014 in a back unit 3000, which will be described later, is disposed on the rear side of the side winning opening member 2200. There is a light emitting decoration.

5-2-3. Center feature]
Next, the center role 2300 of the front unit 2000 will be described. The center character 2300 is inserted from the front side to the opening 1158 which is formed large so as to penetrate substantially the center of the game panel 1150, and is then fixed to the front of the game panel 1150. It is formed in a frame shape with a size that occupies most of the area 1100, and the outer peripheral surface on the right side of the front view is arc-shaped to form a gap slightly larger than the outer diameter of the gaming ball with the outer periphery of the gaming area 1100. While being formed, the outer peripheral surface on the left side is formed on a substantially straight line hanging down so as to form an area of a predetermined width with the outer periphery of the game area 1100.

  This center character 2300 is inclined to the left from the position slightly to the left of the center in the left-right direction on the outer peripheral surface on the upper side of the front wall located on the front of the game panel 1150. And when the game ball is driven to the upper part in the game area 1100, the game ball flows down through the left side of the center character 2300 when flowing down to the upper shelf 2301, and the right side of the upper shelf 2301. The game ball which has flowed down (entered) is made to flow down to the lower part of the game area 1100 at a stretch through the right side of the center character 2300. That is, when the game ball is hit so that the game ball intrudes to the right of the upper shelf 2301 in the center character 2300, chances of enjoying the flow of the game ball are reduced, so the game ball is strongly hit. It is possible to adjust the size of the game as appropriate, and to maintain tension and prevent the player from becoming a random game.

  In addition, the center character 2300 has entered the warp entrance 2302 and the warp entrance 2302 in which the gaming balls flowing down the gaming area 1100 can enter the outer peripheral surface on the left side of the front wall located on the front side of the gaming panel 1150 Warp outlet (not shown) for releasing the gaming ball into the frame, and after rolling the gaming ball released from the warp outlet in the left and right direction, it is released into the upper game area 1100 of the attacker unit 2100 and a center part And a stage 2310 formed on the upper surface of the lower side in the frame 2300.

  The stage 2310 in this center character 2300 is not shown in detail but a first stage to which gaming balls discharged from the warp outlet are supplied, and a gaming ball from the first stage which is disposed in front of the first stage And a second stage which is supplied and capable of releasing game balls into the game area 1100. The stage 2310 is formed in a curved surface shape such that the approximate center in the left-right direction is lowered. In addition, a chance entrance 2313 where the game ball can enter is formed on the rear side of the first stage substantially in the left-right direction, and the game ball that has entered the chance entrance 2313 is a chance of the lowermost front face in the center character 2300 It is discharged from the outlet 2314 into the game area 1100. This chance outlet 2314 is disposed immediately above the upper starting opening 2101 in the attacker unit 2100, and the gaming balls released from the chance outlet 2314 are accepted (winning) in the upper starting opening 2101 with high probability. ing.

  Note that the stage 2310 in the center character 2300 is formed of a transparent member so that the decorative body disposed below the stage 2310 in the back unit 3000 can be viewed by the player through the stage 2310. It has become.

  In addition, the center character 2300 is transparent on the outer peripheral surface on the left side of the front wall located on the front side of the game panel 1150 above the warp entrance 2302 so as to substantially contact the inner rail 1112 and transparent. An arch portion 2315 is further provided. The arch portion 2315 extends in the form of a thin plate substantially from the front end of the front wall portion, and forms a space through which the game ball can pass between the arch portion 2315 and the front surface of the game panel 1150. As a result, the game balls driven into the upper part of the game area 1100 and guided to the left of the center character 2300 by the upper shelf portion 2301 are made to flow downstream through the rear side of the arch portion 2315. .

  Further, the center character 2300 is provided with a gate portion 2350 for detecting passage of gaming balls in the vicinity of the arch portion 2315 on the outer peripheral surface on the left side of the front wall portion located on the front side of the gaming panel 1150. The gate unit 2350 is disposed on the upper side of the arch unit 2315 on the outer peripheral surface on the left side of the front wall, and detects the gate entrance to which the game ball flowing down the game area 1100 can enter and the game ball entering the gate entrance And a gate outlet for releasing the game ball detected by the gate switch 2352 from the outer peripheral surface of the front wall to the game area 1100. In the present embodiment, although the detailed illustration is omitted, the gate outlet of the gate portion 2350 is formed at the same height as the arch portion 2315, and the gaming ball detected by the gate switch 2352 is an arch. The section 2315 looks as if it were a dive.

[5-3. Panel lens member]
Next, the panel lens member 2500 of the game board 4 will be described. The panel lens member 2500 is a plurality of light emission formed in the game area 1100 in the game area 1150 at a position outside the opening 1158 where the center character 2300 is inserted, in a circular or x shape to penetrate in the front-rear direction The decorative holes are lighted and decorated. The panel lens member 2500 is disposed on the surface of the transparent upper panel lens 2510 corresponding to the plurality of light emitting decorative holes formed on the upper left side on the outer periphery of the center character 2300 and on the surface of the upper panel lens 2510. An upper panel lens substrate on which LEDs are mounted, a transparent lower panel lens 2520 corresponding to a plurality of light emitting decorative holes formed on the lower left side on the outer periphery of the center character 2300, and a rear panel of the lower panel lens 2520 And a lower panel lens substrate having a plurality of LEDs mounted on the surface.

  The upper panel lens 2510 and the lower panel lens 2520 in the panel lens member 2500 project forward from the plate-like lens base portion, and have a plurality of rod-like insertion light guides substantially in the same shape as the shape of the light emitting decorative hole to be inserted. It has a department. In the state where this insertion light guide part is inserted from the rear side to the light emission decoration hole of game panel 1150, the tip is formed so as to substantially match the front surface of game panel 1150, and the game flows down the front surface of game panel 1150 It does not affect the ball as much as possible.

  The panel lens member 2500 can emit light and decorate the area where the game balls flow down even with the opaque game panel 1150 such as veneer plywood by appropriately emitting the LEDs of the upper panel lens substrate and the lower panel lens substrate As well as being able to show the player the decoration of the game panel 1150 which has never been done, the pachinko machine 1 can be made to stand out to make it possible to differentiate it from other pachinko machines.

5-4. Back unit]
Next, the back unit 3000 of the game board 4 will be described. The back unit 3000 is attached and fixed to the back surface of the game panel 1150, and the back box 3001 supports the liquid crystal display device 1900 at a position spaced back from the game panel 1150 by a predetermined distance, and the liquid crystal display in the back box 3001. Upper unit 3100 disposed on the upper side of device 1900, character unit 3400 disposed on the right side of liquid crystal display device 1900 in back box 3001, and gear decoration disposed on the left side of liquid crystal display device 1900 in back box 3001 It mainly comprises a body unit 3500.

  Further, back unit 3000 is disposed at a position corresponding to side winning opening member 2200 in front unit 2000 attached to the front of game panel 1150 near the lower left front end of back box 3001, and a plurality of LEDs are mounted on the front A side lamp decorative substrate 3014, a game ball attached to the lower front end of the back box 3001 and accepted to the general winning opening 2201 of the side winning opening member 2200, and a game accepted to the left general winning opening 2104 in the attacker unit 2100 A left guiding member 3016 that guides the ball downward and a right that is disposed on the right of the left guiding member 3016 and guides the gaming ball received downward to the upper starting opening 2101 of the attacker unit 2100 and the general winning opening 2104 on the right. The guide member 3018 is mainly provided.

  Furthermore, although the back unit 3000 is not shown in detail, it is disposed under the lamp drive board box 3423 and the lamp drive board box 3423 which is disposed in the lower rear of the back box 3001 and accommodates the lamp drive board 4170. The motor drive board box 3430, which is disposed on the side and houses the motor drive board 4180, is fixed to the rear side of the back box 3001 and is disposed on the left side in a rear view of the lamp drive board box 3423 and the motor drive board box 3430. A panel relay terminal plate 4161, a horizontally elongated rectangular upper resistance substrate disposed on the upper rear side of the back box 3001, and a lock member attached to the rear side of the back box 3001 and detachably holding the liquid crystal display device 1900. And are further provided.

  In the present embodiment, the back unit 3000 can be viewed from the player side through the frame of the center character 2300 in the front unit 2000, and each unit 3100, 3400 is formed into a predetermined shape. , 3500, etc., make it possible to characterize the concept of the pachinko machine 1. Also, the back unit 3000 is configured such that each unit 3100, 3400, and 3500 can move independently or in linkage with each other according to the game state, and the movement of the back unit 3000 changes the game state for the player It is possible to suggest the arrival of an opportunity or the like, and to entertain the player.

[5-4-1. Back box]
Next, the back box 3001 of the back unit 3000 will be described. The back box 3001 is formed in the shape of a box whose front side is open, and is provided with a plurality of flange-shaped fixing portions 3001a projecting outward at the front end, and on the rear side of the game panel 1150 via the fixing portions 3001a. It is supposed to be fixed. In the back box 3001, a rectangular opening is formed substantially at the center of the rear wall, and the liquid crystal display device 1900 supported on the rear side can be viewed from the player through this opening. Furthermore, in the back box 3001, mounting portions for mounting and fixing the units 3100, 3400, and 3500, the substrates 3014, and the like are formed at appropriate positions.

  Further, although not shown, back box 3001 inserts and locks fixed piece 1902 on one side (right side in rear view) protruding outward from both left and right sides of liquid crystal display device 1900 to the right of the opening in rear view The liquid crystal support portion is provided, and a lock member is attached on the left side in the rear view of the opening, and the lock member supports the other (left side in the rear view) of the liquid crystal display device 1900 The display device 1900 is detachably attached to the rear side of the back box 3001.

5-4-2. Induction member]
Next, the left guiding member 3016 and the right guiding member 3018 will be described. The left guiding member 3016 guides and discharges the game balls received in the general winning opening 2201 of the side winning opening member 2200 and the general winning opening 2104 on the left side of the attacker unit 2100 respectively through different flow paths. A general winning opening switch 3020 for detecting passage of gaming balls is provided in each flow path. On the other hand, the right guiding member 3018 guides the game balls received to the upper starting opening 2101 of the attacker unit 2100 and the right general winning opening 2104 downward to the vicinity of the lower end and is discharged downward through different flow paths. An upper starting opening switch 3022 is provided in the flow passage corresponding to the upper starting opening 2101, and a general winning opening switch 3020 is provided in the flow passage corresponding to the general winning opening 2104 on the right. The right guiding member 3018 is provided with a magnetic detection switch 3024 capable of detecting magnetism.

  The gaming balls guided downward by the left guiding member 3016 and the right guiding member 3018 are discharged onto the bottom wall portion of the substrate holder 1160, and are discharged from the out ball discharging portion 1161 of the substrate holder 1160 downward to the game board 4 It has become so.

[5-4-3. Upper unit]
Next, the upper unit 3100 will be described. The upper unit 3100 is generally formed in a horizontally long shape, and is attached and fixed to the upper side of the opening facing the liquid crystal display device 1900 in the back box 3001. The upper unit 3100 is disposed on the front substantially at the center in the left-right direction, and is a lifting and lowering mechanism for lifting and lowering the rotatable decoration unit 3200 disposed on the rear side of the rotatable decoration unit 3200 and the rotatable decoration unit 3200 in front view. 3250, a swing decoration unit 3300 disposed substantially at the center in the lateral direction on the rear side of the lifting mechanism 3250, and movable ceiling units 3350 disposed on the left and right sides of the swing decoration unit 3300. ing.

  The rotating decoration unit 3200 can be vertically moved by the lifting mechanism 3250 between the rising position located at the top of the liquid crystal display device 1900 and the lowering position located approximately at the center of the liquid crystal display device 1900. It has become. The rotary ornament unit 3200 is configured to rotate a rotary ornament formed in a shuriken shape disposed on the front surface, and when it rotates, the rotation radius of the rotary ornament is expanded by the centrifugal force. It is supposed to be.

  In addition, since the rotary decorative unit 3200 not only rotates the rotary decorative unit to the end but also protrudes outward in the radial direction, the rotation radius of the entire rotary decorative unit is enlarged and the appearance is largely changed. It is possible to make the player have a strong impact, and it is possible to entertain the player and suppress the decrease in the interest for the game while attracting the player's interest strongly It is possible to make it easy to select the pachinko machine 1 as a pachinko machine which can be greatly differentiated from other pachinko machines and played.

  The swing decoration unit 3300 includes swing decoration bodies disposed on the left and right sides of the rear side so as to be adjacent to the rotation decoration unit 3200 positioned at the raised position, and the left and right swing decoration is made according to the gaming state. The body can be swung simultaneously in the left and right direction.

  The movable ceiling unit 3350 is provided with a plate-like ceiling decoration that extends horizontally in the left and right ends of the upper unit 3100. The ceiling decorative body is formed so as to be rotatable around an axis extending in the left and right direction around the front end side, so that the rear end side of the ceiling decorative body is turned downward according to the gaming state. It has become.

[5-4-4. Character unit]
Next, the character unit 3400 of the back unit 3000 will be described. The character unit 3400 is provided with a character body that is modeled on a ninja and three-dimensionally shaped, and moves in the left and right direction from the position of the right end to the position closer to the center side from the position of the right end It is possible to In addition, when moving in the left-right direction, the character body of the character unit 3400 is configured to rotate by a predetermined angle around an axis extending in the vertical direction along with the movement.

  In addition, the character body of the character unit 3400 can reciprocate around the axis where the head extends in the lateral direction, and reciprocate around the axis where the right arm extends in the vertical direction. It is possible to Thus, by turning the head back and forth, it is possible to perform an operation as if the character were crawling. In addition, by reciprocating the right arm in the horizontal direction, it is possible to cause the character to perform an action as if throwing a shuriken.

[5-4-5. Gear decoration unit]
Next, the gear decorative body unit 3500 of the back unit 3000 will be described. The gear decorative body unit 3500 includes a plurality of gear decorative bodies that are rotatable around an axis extending in the left and right direction and arranged in a plurality in the vertical direction, and the respective gear decorative bodies are simultaneously in accordance with the gaming state It is supposed to rotate.

[5-4-6. Liquid Crystal Display Device]
Next, the liquid crystal display device 1900 of the game board 4 will be described. The liquid crystal display device 1900 is detachably attached to the rear surface of the back box 3001 of the back unit 3000, and can display a predetermined effect image according to the game state. The liquid crystal display device 1900 is provided with fixing pieces 1902 protruding outward from both left and right sides, and is attached to the back box 3001 via the fixing pieces 1902.

  Further, the liquid crystal display device 1900 is provided with a peripheral substrate box 1905 in which the peripheral control substrate 4140 is accommodated at the rear side, although detailed illustration is omitted.

[6. Function Display Unit]
Next, the function display unit 1180 in the game board 4 will be described with reference to FIG. The function display unit 1180 is attached to a predetermined position of the front component 1110 and disposed. FIG. 11 is an enlarged front view showing a function display unit on the game board in a state of being attached to a pachinko machine.

  The function display unit 1180 is, as shown in an enlarged manner in FIG. 11, a game state display made up of one LED for displaying a game state changed by the game balls driven into the game area 1100 at the left end in front view And a special symbol memory indicator 1184 for displaying the number of reservations regarding the acceptance of the game ball to the upper starting port 2101 consisting of the unit 1183, and two LEDs lined up and down on the right of the gaming state indicator 1183; A special symbol consisting of one 7-segment LED arranged on the right of the special symbol memory display 1184 and displaying the first special lottery result drawn by receiving the game ball to the upper starting opening 2101 as a first special symbol The display 1185 and the second special symbol display 1185 arranged on the upper right of the upper special symbol display 1185 and drawn by receiving the game ball to the lower starting opening 2102 Lower special symbol display 1186 consisting of one 7-segment LED for displaying another lottery result as a second special symbol, and two LEDs lined up and down on the right of lower special symbol display 1186, lower start opening A lower special symbol memory display 1187 for displaying the number of reservations regarding acceptance of the game ball to 2102 is provided.

  The display unit 1181 of the function display unit 1180 is arranged in an arc substantially along the inner circumferential rail 1113 from immediately above the lower special symbol display 1186 to display the number of reservations regarding passage of the gate unit 2350 by the game ball. And a normal symbol memory display 1188 consisting of four LEDs, and arranged under the normal symbol memory display, for displaying a normal lottery result selected as the game ball passes through the gate portion 2350 as a normal symbol Opening and closing of the special winning opening 2103 when the first special lottery result or the second special lottery result is arranged side by side to the diagonal upper right side of the normal symbol display 1189 consisting of one LED and the normal symbol memory display 1188 And a round indicator 1190 consisting of two LEDs for displaying the number of repetitions of the pattern (the number of rounds).

  The game state indicator 1183 is a full color LED capable of changing its light emission color of red, green and orange, and various game states (a combination of a light emission color to emit light and lighting and blinking) For example, it is possible to display a probability fluctuation state, a time reduction state, a definite variation time short state, a big hit gaming state, a small hit gaming state, and the like.

  The upper special symbol memory display 1184 suspends the start of the variable display when the gaming ball is received in the upper starting opening 2101 when the first special symbol can not be changed and displayed on the upper special symbol display 1185 ( The stored number of stored first special symbols is displayed. This special symbol memory display 1184 has a first special symbol memory lamp 1184a consisting of predetermined LEDs and a first special symbol memory lamp 1184b, and the lighting of the first special symbol memory lamps 1184a and 1184b The blinking pattern makes it possible to display the number of reservations. Specifically, for example, when the number of reservations is one, the first special symbol memory lamp 1184a is turned on and the first special symbol memory lamp 1184b is extinguished, and when the number of reservations is two, the first special symbol memory lamp 1184a, 1184b Lights together, the first special symbol memory lamp 1184a blinks and the first special symbol memory lamp 1184b lights when the number of reservations is three, and the first special symbol memory lamps 1184a and 1184b both when the number of reservations is four It is supposed to blink. In the present embodiment, up to four are reserved.

  The lower special symbol memory display 1187 suspends the start of the variable display when the gaming ball is received in the lower starting opening 2102 when the second special symbol can not be changed and displayed in the lower special symbol display 1186 ( The stored number of stored second special symbols is displayed. The lower special symbol memory display 1187 has a second special symbol memory lamp 1187a consisting of a predetermined LED and a second special symbol memory lamp 1187b, and the second special symbol memory lamps 1187a and 1187b are turned on. The blinking pattern makes it possible to display the number of reservations. Specifically, for example, when the number of reservations is one, the second special symbol memory lamp 1187a is turned on and the second special symbol memory lamp 1187b is extinguished, and when the number of reservations is two, the second special symbol memory display lamp 1187a, 1187b lights together, the second special symbol memory lamp 1187a blinks and the second special symbol memory lamp 1187b lights when the number of reservations is three, and the second special symbol memory lamps 1187a and 1187b when the number of reservations is four Both are supposed to blink. In the present embodiment, up to four are reserved.

  The upper special symbol display 1185 and the lower special symbol display 1186 display the first special lottery result and the second special lottery result drawn by receiving the game ball to the upper starting opening 2101 and the lower starting opening 2102 The 7-segment LED is stopped after changing for a predetermined time according to the special lottery result, and is stopped and the first special lottery result or the second special lottery result is played by the light emission pattern (special symbol) of the 7-segment LED stopped. Can be made to be recognized by

  The normal symbol display 1189 is a full color LED capable of changing its light emission color of red, green and orange, and by combining the light emission color to emit light and lighting and blinking, the gate 2350 is played It is possible to display an ordinary lottery result which is drawn by passing a ball. In addition, the display of the normal symbol by the normal symbol display 1189 is also stopped and displayed with the light emission pattern corresponding to the normal lottery result after being variably displayed for a predetermined time as in the special symbol.

  When the gaming ball passes through the gate portion 2350 when the normal symbol memory display 1188 can not variably display the normal symbol in the normal symbol display 1189, the normal symbol whose start of the variable display is reserved (stored) The number of reservations (the number of memories) is displayed. This ordinary symbol memory display 1188 includes four ordinary symbol memory lamps 1188a to 1188d arranged side by side from the bottom, each of which is a predetermined LED, and the ordinary symbol memory lamp 1188a from the bottom according to the number of reservations. The number of reserved symbols can normally be displayed by sequentially turning on 1188 d. In the present embodiment, up to four variable symbols of normal symbols are reserved (stored).

  The round indicator 1190 is provided with a two-round indicator lamp 1190a consisting of predetermined LEDs and a fifteen-round indicator lamp 1190b, and the number of rounds in the "big hit" game can be indicated by lighting each lamp It is supposed to be.

  Further, as shown in FIG. 11, the function display unit 1180 can be viewed from the player side through the game window 101 of the door frame 5 with the game board 4 attached to the pachinko machine 1 . Game status indicator 1183, upper special symbol memory indicator 1184, upper special symbol indicator 1185, lower special symbol indicator 1186, lower special symbol memory indicator 1187, ordinary symbol memory indicator 1188, ordinary symbol indicator 1189, and The round indicator 1190 is attached to the front of the function display board 1191. A connection terminal for connecting the function display board 1191 and the main control board 4100 is attached to the rear end of the rear projection of the function display unit 1180.

  In this embodiment, since the function display unit 1180 is provided on the front component 1110 of the game board 4, compared to the case where it is provided on the front unit 2000 or the back unit 3000 attached to the game panel 1150, The function display unit 1180 can be used as a basic configuration of the game board 4, and the configuration related to the pachinko machine 1 can be simplified to prevent an increase in cost, and the model of the pachinko machine 1 (table unit 2000) Even if the detailed configuration of the game board 4 which can be embodied by the back unit 3000 and which can characterize the model of the pachinko machine 1) is different, the position of the function display unit 1180 does not change. Etc., the position of the function display unit 1180 can be recognized without confusion It has become.

[7. Main control board, payout control board and peripheral control board]
Next, a control board that performs various controls of the pachinko machine 1 will be described with reference to FIGS. 12 to 17. 12 is a block diagram of the main control board, the payout control board and the peripheral control board, FIG. 13 is a block diagram showing the continuation of FIG. 12, and FIG. 14 is a payout control board, CR unit and frequency constituting the main board. FIG. 15 is a schematic view of various detection signals input to and output from the game apparatus connection terminal board for gaming balls etc. relaying the electrical connection with the display board, and FIG. 16 is a block diagram showing the continuation of FIG. FIG. 17 is a block diagram showing an outline of a peripheral control MPU, and FIG. 17 is a block diagram of the periphery of a sound source built-in VDP in a liquid crystal and sound control unit.

  As shown in FIG. 12, the control configuration of the pachinko machine 1 mainly comprises a main control board 4100, a payout control board 4110, and a peripheral control board 4140, and various controls are shared. First, the main control board will be described, and then the payout control board, the power supply board, and the peripheral control board will be described.

7-1. Main control board]
As shown in FIG. 12, the main control board 4100 for controlling the progress of the game controls the processing at the time of power-on and is executed after a predetermined time has elapsed from the time of power-on, as well as the game operation. The main control MPU 4100a, which is a microprocessor incorporating various control programs such as a main control program to control and ROMs storing various commands and RAM temporarily storing data, and detection signals from various detection switches are input. Main control input circuit 4100b, a main control output circuit 4100c for outputting various signals to an external substrate etc., a main control solenoid drive circuit 4100d for driving various solenoids, The apparatus is mainly provided with a power failure monitoring circuit 4100e that monitors a sign of a stop.

  In addition to the built-in RAM (hereinafter referred to as "main control built-in RAM") and the built-in ROM (hereinafter referred to as "main control built-in ROM") in main control MPU 4100a. In addition, a watchdog timer for monitoring the operation (system) and a function for preventing fraud are incorporated.

  In addition, the main control MPU 4100a incorporates a non-volatile RAM. In this non-volatile RAM, a unique ID code to which a unique code (a code that exists only one in the world) for identifying an individual is attached by a maker who manufactured the main control MPU 4100a is stored in advance. Since this once assigned ID code is stored in the non-volatile RAM, it can not be rewritten even using an external device. The main control MPU 4100a can extract the ID code from the non-volatile RAM and refer to it.

  The main control input circuit 4100 b is not provided with a reset terminal for forcibly resetting information to which detection signals from various detection switches are input to its various input terminals, and has no reset function. Therefore, the main control input circuit 4100 b is configured as a circuit to which a system reset signal from a main control system reset described later is not input. That is, since the main control input circuit 4100b does not reset information based on detection signals from various detection switches inputted to its various input terminals by a main control system reset described later, various signals based on the information are variously It is configured as a circuit output from the output terminal.

  The main control output circuit 4100c is configured as an open collector output type in which the emitter terminal is grounded to the ground (GND), and various signals for outputting various signals to an external substrate etc. are input to the various input terminals. The main control output circuit 4100ca with a reset function is provided with a reset terminal for forcibly resetting the stored information, and the main control output circuit 4100cb without a reset function without a reset terminal is not provided And consists of. The main control output circuit with reset function 4100ca is configured as a circuit to which a system reset signal from a main control system reset described later is input. That is, the main control output circuit with reset function 4100ca has information for outputting various signals input to its various input terminals to an external substrate etc. by being reset by a main control system reset described later. Are constructed as a circuit in which the signals based on are not output at all from the various output terminals. On the other hand, the main control output circuit without reset function 4100 cb is configured as a circuit to which the system reset signal from the main control system reset described later is not input. That is, the main control output circuit without reset function 4100cb has the information for outputting various signals inputted to its various input terminals to the external substrate etc. not reset by the main control system reset described later. It is configured as a circuit in which a signal based on the signal is output from its various output terminals.

  An upper starting opening switch 3022 for detecting gaming balls entering the upper starting opening 2101, a lower starting opening switch 2109 for detecting gaming balls entering the lower starting opening 2102, and a general winning opening 2104 shown in FIG. A detection signal from the general winning opening switch 3020 for detecting the entered game ball and a signal from the power failure monitoring circuit 4100e are inputted to an input terminal of a predetermined input port of the main control MPU 4100a through the main control input circuit 4100b. There is. Also, as shown in FIG. 9, a gate switch 2352 for detecting gaming balls having passed through the gate portion 2350, a general winning opening switch 3020 for detecting gaming balls having entered the general winning opening 2201, and a special winning opening 2103 A detection signal from a count switch 2110 for detecting gaming balls and a detection signal from a magnetic detection switch 3024 attached to the back unit 3000 shown in FIG. 10 for detecting fraudulent activity using a magnet are panel relays attached to the game board 4 A terminal plate 4161 is input to an input terminal of a predetermined input port of the main control MPU 4100 a through the main control input circuit 4100 b.

  The main control MPU 4100a outputs a drive signal to the main control output circuit with reset function 4100ca from the output terminal of the predetermined output port based on the detection signal from each of these switches, thereby the main control output circuit with reset function A control signal is output from 4100ca to the main control solenoid drive circuit 4100d, and a drive signal is output from the main control solenoid drive circuit 4100d to the starting opening solenoid 2105 and the attacker solenoid 2108 via the panel relay terminal plate 4161, or a predetermined output thereof. By outputting a drive signal from the output terminal of the port to the main control output circuit with reset function 4100ca, the main control output circuit with reset function 4100ca through the panel relay terminal board 4161 and the function display board 1191, the upper special symbol display 1185, Special symbol indicator 1186, upper special symbol memory indicator 1184, lower special symbol memory indicator 1187, normal symbol indicator 1189, ordinary symbol memory indicator 1188, game status indicator 1183 and round indicator 1190 drive signals Output.

  Further, the main control MPU 4100a outputs various information (game information) about the game from the output terminal of the predetermined output port to the main control output circuit 4100ca with a reset function, thereby controlling the payout from the main control output circuit 4100ca with a reset function. By outputting various information (game information) to the substrate 4110 or outputting a signal (power failure clear signal) from the output terminal of the predetermined output port to the main control output circuit 4100 ca with reset function, the main control output with reset function A signal (power failure clear signal) is output from the circuit 4100 ca to the power failure monitoring circuit 4100 e.

  In the present embodiment, a non-contact type electromagnetic proximity switch is used for the upper start opening switch 3022, the lower start opening switch 2109, the gate switch 2352, and the count switch 2110. As the winning opening switches 3020 and 3020, contact-type ON / OFF mechanical switches are used. This is because the game ball frequently enters the upper starting opening 2101 and the lower starting opening 2102 and passes frequently through the gate portion 2350, so the upper starting opening switch 3022, the lower starting opening switch 2109, and the gate switch 2352 The detection of gaming balls also occurs frequently. Therefore, as the upper start opening switch 3022, the lower start opening switch 2109, and the gate switch 2352, proximity switches with a long lifetime are used. In addition, when the big hit game state which is advantageous for the player occurs, the big winning opening 2103 is opened and the game ball is frequently entered, so the detection of the game ball by the count switch 2110 also frequently occurs. For this reason, the count switch 2110 also uses a proximity switch with a long life. On the other hand, detection by the general winning opening switches 3020 and 3020 does not frequently occur in the general winning openings 2104 and 2201 where the gaming balls do not enter frequently. Therefore, a mechanical switch whose life is shorter than that of the proximity switch is used as the general winning opening switch 3020, 3020.

  Further, main control MPU 4100a transmits various commands relating to the payout as serial data from the output terminal of the predetermined serial output port to the main control output circuit 4100cb having no reset function, thereby controlling the payout from the main control output circuit 4100cb having no reset function. Various commands are transmitted to the substrate 4110 as serial data. The payout control board 4110 outputs a signal (payout ACK signal) to that effect to the main control board 4100 when normal reception of various commands from the main control board 4100 is completed as serial data. This signal (payment ACK signal) is input to an input terminal of a predetermined input port of the main control MPU 4100a through the main control input circuit 4100b.

  Further, main control MPU 4100a receives various commands relating to the state of pachinko machine 1 from payout control substrate 4110 as serial data by main control input circuit 4100b, whereby the input of the predetermined serial input port from main control input circuit 4100b is performed. The terminal receives various commands as serial data. When the main control MPU 4100a completes normal reception of various commands from the payout control board 4110 as serial data, the main control output with a reset function is output from the output terminal of the predetermined output port (a main payment ACK signal) to that effect. The signal is output to the circuit 4100ca, and a signal (main payment ACK signal) is output from the main control output circuit 4100ca having a reset function to the payout control board 4110.

  Further, the main control MPU 4100a transmits various commands relating to control of game effects and various commands relating to the state of the pachinko machine 1 as serial data from the output terminal of the predetermined serial output port to the main control output circuit 4100cb without reset function. There is no reset function, and various commands are transmitted as serial data from the main control output circuit 4100cb to the peripheral control board 4140.

  Here, the main cycle serial transmission port for transmitting various commands as serial data to the peripheral control board 4140 will be briefly described. The main control MPU 4100a is mainly configured of a main control CPU core 4100aa, and in addition to the main control built-in RAM, a main cycle serial transmission port 4100ae etc. which is one of various main control serial I / O ports is connected to the bus 4100ah. It is connected via a circuit (see FIG. 22). The main rotation serial transmission port 4100 ae transmits various commands to the peripheral control board 4140 as main rotation serial data, and mainly includes a transmission shift register 4100 aea, a transmission buffer register 4100 aeb, and a serial management unit 4100 aec (see FIG. See 22). When the main control CPU core 4100aa sets a command in the transmission buffer register 4100aeb and outputs a transmission start signal to the serial management unit 4100aec, the serial management unit 4100aec transmits the command set in the transmission buffer register 4100aeb from the transmission buffer register 4100aeb The data is transferred to the transmission shift register 4100aea and transmission to the peripheral control board 4140 as main cycle serial data is started. In the present embodiment, 32 bytes are provided as the storage capacity of the transmission buffer register 4100 aeb. The main control CPU core 4100aa sends a plurality of commands to the peripheral control board 4140 continuously by outputting a transmission start signal to the serial management unit 4100aec after setting the plurality of commands in the transmission buffer register 4100aeb.

  Power supply substrate 851 for supplying various voltages to main control substrate 4100 is an electric double layer capacitor (hereinafter simply referred to as “capacitor”) as a backup power supply for supplying power to main control substrate 4100 for a predetermined time even when the power is shut off. And BCO (see FIG. 18). The main control MPU 4100a can store various information in the main control built-in RAM in the power-off process even when the power is shut off by the capacitor BC0. Various information stored in the main control built-in RAM is an operation signal (RAM clear signal) from the operation switch 860a when the operation switch 860a of the payout control board 4110 described later is operated within a predetermined period after power-on. Is output from the payout control board 4110 and input to the input terminal of a predetermined input port of the main control MPU 4100a via the main control input circuit 4100b, and the main control MPU 4100a causes the main control MPU 4100a to completely erase from the main control built-in RAM. It is supposed to be (cleared).

7-2. Disbursement control board]
As shown in FIG. 13, the payout control board 4110 for controlling the payout and the like of the gaming ball displays the status of the pachinko machine 1 as well as the payout control unit 4120 which performs various controls relating to payout, the operation switch 860a also having various functions. And an error LED indicator 860b. Further, the operation switch 860a having a function as a RAM clear switch is described as a RAM (hereinafter referred to as "main control built-in RAM") built in the main control MPU 4100a based on a detection signal outputted by being operated. Outputs a RAM clear signal for completely erasing the information stored in ..).

7-2-1. Payout control section]
As shown in FIG. 13, the payout control unit 4120 that performs various controls related to payout controls the power-on process performed when the power is turned on, and a game medium payout that is executed after a predetermined time has elapsed since the power was turned on. Payment control MPU 4120a, which is a microprocessor that incorporates various control programs including a payout control program that controls the operation and ROMs storing various commands and RAM temporarily storing data, and detection from various detection switches related to payout A drive signal is output to a payout control input circuit 4120b to which a signal is input, a payout control output circuit 4120c for outputting various signals to an external substrate or the like, and a payout motor 744 of the award ball device 740 shown in FIG. Exchange various signals between the payout motor drive circuit 4120 d and the CR unit 6 for And a, a CR unit output circuit 4120e for. In addition to the built-in RAM (hereinafter referred to as “payment control built-in RAM”) and the built-in ROM (hereinafter referred to as “payment control built-in ROM”), the payout control MPU 4120 a In addition, a watchdog timer for monitoring the operation (system) and a function for preventing fraud are incorporated.

  The payout control program controls various types of game information from the main control board 4100 and various commands regarding payout from the main control board 4100 as payout serial data transmission signals via the payout control I / O port 4120b under the control of the payout control MPU 4120a. Receive serial data by serial method. Further, the payout control program generates a frame state 1 command (corresponding to a first error occurrence command) triggered by the occurrence of an error in the payout operation of the gaming ball, or operates the operation switch 860a as an error release unit. Based on the signal (detection signal), a 16-bit (2-byte) error cancellation navigation command (corresponding to the first error cancellation command) is created, and these error generation command and error cancellation navigation command are transmitted to the serial serial data of the payer. The signal is output as serial data of the serial system to the reception port of the main control board 4100 via the payout control I / O port 4120b (command transmission means). In addition, the payout control program pays out after a predetermined time has elapsed since the power was turned on, that is, after the payout control unit main processing is executed or the payout control unit timer interrupt processing is executed and the payout control is started. When an error occurs in the operation, the error is canceled based on the detection signal generated in response to the operation of the operation switch 860a, and the output of the warning information corresponding to the error is stopped (error cancellation control means).

  Further, the payout control program outputs (first door opening command) of a door frame opening command when a detection signal (door frame opening detection signal) is input from the door frame opening switch 618 in response to the opening operation. When a detection signal (body frame opening detection signal) accompanying the opening operation is input from the body frame opening switch 619, a body frame opening command (first body frame opening command) is output. On the other hand, the payout control program also receives the door frame closing command (first door frame closing command) when the detection signal (the door frame closing detection signal) is input from the door frame opening switch 618 according to the closing operation. While outputting, when the detection signal (main frame closing detection signal) accompanying the closing operation is input from the main frame opening switch 619, the main frame closing command (first main frame closing command) is output.

  The payout control input circuit 4120 b is not provided with a reset terminal for forcibly resetting information to which detection signals from various detection switches are respectively input to the various input terminals, and does not have a reset function. Therefore, the payout control input circuit 4120 b is configured as a circuit to which a system reset signal from a payout control system reset described later is not input. That is, the payout control input circuit 4120 b does not reset information based on detection signals from the various detection switches inputted to the various input terminals by the payout control system reset described later, so that various signals based on the information It is configured as a circuit output from the output terminal.

  The payout control output circuit 4120c is configured as an open collector output type in which the emitter terminal is grounded to the ground (GND), and various signals for outputting various signals to an external substrate or the like are input to the various input terminals. And a reset function dispensing control output circuit 4120 ca having a reset function provided with a reset terminal for forcibly resetting the stored information, and a reset function non-dispense control output circuit 4120 cb not having a reset function not provided with a reset terminal And consists of. The payout control output circuit 4120 ca with a reset function is configured as a circuit to which a system reset signal from a payout control system reset described later is input. That is, the payout control output circuit 4120 ca with a reset function has information for outputting various signals input to its various input terminals to an external substrate etc. by being reset by a payout control system reset described later. Are constructed as a circuit in which the signals based on are not output at all from the various output terminals. On the other hand, the non-resetting function dispensing control output circuit 4120 cb is configured as a circuit to which a system reset signal from a dispensing control system reset described later is not input. That is, since the information for outputting the various signals inputted to the various input terminals to the external substrate etc. is not reset by the later-described payout control system reset, the payment function output control circuit 4120 cb does not have reset function. It is configured as a circuit in which a signal based on the signal is output from its various output terminals.

  The detection signal from the out-of-ball switch 750 for detecting presence or absence of gaming balls in the supply passage of the prize ball device 740 and the counting switch 751 for detecting gaming balls flowing down in the prize ball passage of the prize ball device 740 It is inputted to the input terminal of a predetermined input port of the payout control MPU 4120 a through the inner substrate 754 of the ball assembly of the ball device 740 and the payout control input circuit 4120 b. The detection signal from the rotation angle switch 752 for detecting the detection slit formed on the rotation detection board of the prize ball device 740 is first of all, the rotation angle switch substrate 753 of the prize ball device 740, the prize ball case inner substrate 754, It is input to the input terminal of the predetermined input port of the payout control MPU 4120a via the payout control input circuit 4120b.

  A detection signal from a door frame open switch 618 for detecting the opening of the door frame 5 to the main body frame 3 and a main frame opening switch 619 for detecting the opening of the main body frame 3 to the outer frame 2 It is inputted to the input terminal of the predetermined input port of the payout control MPU 4120a via the signal.

  In addition, the detection signal from the full tank switch 550 for detecting whether or not the storage space of the fal cover unit 540 shown in FIG. 1 is full is stored in the game ball, the handle relay terminal board 192, the power supply board 851 and is input to an input terminal of a predetermined input port of the payout control MPU 4120 a via the payout control input circuit 4120 b.

  The payout control MPU 4120a receives various commands relating to the payout from the main control board 4100 via the payout control input circuit 4120b at the input terminal of the serial input port in the serial data mode, or detects the operation signal of the operation switch 860a (detection Signal) to the main control board 4100 via the payout control input circuit 4120b. Upon completion of normal reception of various commands from the main control board 4100 as serial data, the payout control MPU 4120a outputs a signal (payer ACK signal) to that effect, and a payout control output with a reset function from the output terminal of the predetermined output port. By outputting to the circuit 4120 ca, a signal (payout ACK signal) is output from the payout control output circuit 4120 ca with reset function to the main control board 4100.

  Further, the payout control MPU 4120a transmits various commands for indicating the state of the pachinko machine 1 as serial data to the reset function-free payout control output circuit 4120cb from the output terminal of the serial output port, whereby the payout function-free payout control is performed. Various commands are transmitted as serial data from the output circuit 4120 cb to the main control board 4100. When the normal control of the various commands from the payout control substrate 4110 is completed as serial data, the main control substrate 4100 outputs a signal (main payment ACK signal) to that effect to the payout control substrate 4110. This signal (main payment ACK signal) is input to an input terminal of a predetermined input port of the payout control MPU 4120a through the payout control input circuit 4120b.

  Further, the payout control MPU 4120a outputs a drive signal for driving the payout motor 744 from the output terminal of the predetermined output port to the payout control output circuit 4120ca with a reset function, thereby a payout control output circuit 4120ca with a reset function. The drive signal is output to the payout motor drive circuit 4120 d from the above, and the drive signal is output from the payout motor drive circuit 4120 d to the payout motor 744 through the prize ball inner substrate 754 or from the output terminal of the predetermined output port. By outputting a drive signal for displaying the state of the machine 1 on the error LED indicator 860b to the payout control output circuit 4120ca with reset function, the drive signal from the payout control output circuit 4120ca with reset function to the error LED indicator 860b Output.

  The error LED indicator 860b is a segment indicator, and displays the state of the pachinko machine 1 by displaying alphanumeric characters, figures, and the like. The contents that the error LED display 860b displays and notifies include the following. For example, when the figure "-" is displayed, it indicates that "normal" is displayed, and when the number "0" is displayed, it indicates that "connection abnormality" (specifically, with the main control board 4100 Report that there is an abnormality in the electrical connection between the board with the payout control board 4110, and if the number “1” is displayed, it indicates “ball out” (specifically, the ball is out) Informing that there is no gaming ball in the supply passage of the winning ball device 740 based on the detection signal from the switch 750, and when the number "2" is displayed, it indicates that "the ball is seen" (specifically Is based on the detection signal from the rotation angle switch 752 at the entrance of the distribution space communicating with the supply passage of the prize ball device 740, the payout rotor and the gaming ball are engaged near the entrance, making the payout rotor difficult to rotate. Report that it has been When "3" is displayed, it notifies that it is "counting switch error" (specifically, it indicates that the counting switch 751 has a problem based on the detection signal from the counting switch 751), and the numeral " When “5” is displayed, it informs that “retry error” (specifically, the fact that the number of retries for the payout operation has reached the preset upper limit value), and the number “6” is displayed. When there is a "full tank" (specifically, based on the detection signal from the full tank switch 550, it is informed that the storage space of the fal cover unit 540 is full with stored gaming balls), When the number "7" is displayed, it is reported that "CR not connected" (electrical connection is disconnected in any of the areas from the payout control board 4110 to the CR unit 6). When the number "9" is displayed, it indicates that "stocking (winning balls stock (unpaid))" (specifically, the number of balls of the gaming balls not yet paid out is predetermined) Reporting that it has reached

  Further, the payout control MPU 4120a outputs the number of balls of the gaming ball actually paid out, etc., to the payout control output circuit 4120ca with a reset function from the output terminal of the predetermined output port, thereby a payout control output circuit 4120ca with a reset function The ball number etc. of the game ball actually paid out are outputted to the external terminal board 784 through the resistance which is not shown.

  Further, the payout control board 4110 outputs various information (game information) about the game from the main control board 4100 to the external terminal board 784 via a resistor not shown. The external terminal plate 784 is provided with a plurality of photocouplers (not shown) (including an infrared LED and a photo IC built in), and the game arcade (hall) is provided via the plurality of photocouplers. The number of balls of the game ball, etc. and various information (game information, details of errors or errors relating to the payout operation of the game ball) are transmitted to the hall computer installed in. The external terminal board 784 and the hall computer are electrically insulated by a plurality of photo couplers, and an abnormal voltage is applied to the hall computer via the external terminal board 784 of the pachinko machine 1 and the hall The computer does not malfunction or break down, and the main control board 4100 which advances the game from the hall computer via the external terminal board 784 of the pachinko machine 1 and the payout control board 4110 which controls the payout etc. An abnormal voltage is applied to prevent malfunction or failure. The hall computer monitors the game of the player by grasping the number of balls of the gaming balls paid out by the pachinko machine 1 and the game information of the pachinko machine 1.

  The ball lending request signal of the game ball from the ball lending switch 365a of the lending ball unit 360 shown in FIG. And, a game ball or the like is input to the CR unit 6 through the lending device connection terminal plate 869. The CR unit 6 transmits a signal designating the number of gaming balls to be lent according to the ball lending request signal in a serial system to the payout control board 4110 via the gaming ball lending device connection terminal plate 869, and this signal is CR unit The data is input to an input terminal of a predetermined input port of the payout control MPU 4120a through the input / output circuit 4120e. In addition, the CR unit 6 updates the remaining degree of the prepaid card inserted according to the number of lent gaming balls, and at the same time, displays a signal for displaying the remaining degree on the remaining number indicator 365c The signal is output to the lending device connection terminal board 869, the main door relay terminal board 880, and the frequency display board 365, and this signal is input to the remaining frequency display 365c. In addition, the CR unit lamp 365d adjacent to the remaining frequency indicator 365c is configured such that the supply voltage from the CR unit 6 is input through the game ball connection terminal board 869 and the main door relay terminal board 880. There is.

  The power supply substrate 851 for supplying various voltages to the payout control substrate 4110 is provided with a capacitor BC1 (see FIG. 18) as a backup power supply for supplying power to the payout control substrate 4110 for a predetermined time even when power is shut off. There is. With this capacitor BC1, the payout control MPU 4120a can store various information in the payout control built-in RAM (payout storage unit) in the power-off process even when the power is shut off. The various information stored in the payout control internal RAM, when the operation switch 860a is operated within a predetermined period from when the power is turned on, the operation signal thereof via the payout control input circuit 4120b, the predetermined of the payout control MPU 4120a The payout control MPU 4120a is input to the input terminal of the input port, and the payout control MPU 4120a determines it as a RAM clear signal for completely erasing the information stored in the payout control built-in RAM. It is supposed to be completely erased (cleared). The operation signal (RAM clear signal) is output to the payout control output circuit 4120 cb without reset function, and is also output from the payout control output circuit 4120 cb without reset function to the main control board 4100.

7-2-2. Exchange of various signals with the game device connection terminal board for game balls, etc.]
Here, the exchange of various signals between the payout control unit 4120 and the CR unit 6, and the exchange of various signals between the CR unit 6 and the frequency display plate 365 will be described based on FIG. In addition to relaying the electrical connection between the CR unit 6 and the payout control board 4110 as shown in FIG. 14, the gaming ball lending device connection terminal board 869 also includes the CR unit 6 and the frequency display board 365. It also relays the electrical connection between the boards (precisely, the game ball connection device board 869 is electrically connected with the frequency display board 365 via the main door relay board 880 , CR unit 6 and the game ball connection device board 869 are electrically connected, the game ball connection device board 869 and the main door relay terminal board 880 are electrically connected, and the main door relay Terminal plate 880 and frequency display plate 365 are electrically connected). Between the substrate of CR unit 6 and the game device connection terminal plate 869, between the substrate of the game device connection terminal plate 869 and the payout control substrate 4110, the game device connection terminal plate 869 and main door relay Wirings (harnesses) are used to electrically connect between the board with the terminal board 880 and between the game ball and the like, and the board of the lending device connection terminal board 869 and the frequency display board 365, respectively. Further, an AC 24 V described later from the power supply substrate 851 is supplied to the CR unit 6 through the game ball and the like lending device connection terminal plate 869. The CR unit 6 is generated from the supplied AC 24 V to a predetermined voltage VL (in the embodiment, DC +12 V (DC +12 V, hereinafter referred to as “+12 V”)) by a built-in voltage generating circuit not shown The game balls are supplied to the payout control board 4110 through the loan device connection terminal plate 869, while the game balls are supplied to the frequency display plate 365 through the game device connection terminal plate 869 and the main door relay terminal plate 880 .

  On the part side of the frequency display plate 365, the ball rental switch 365a, which is a push button switch, is mounted at a position corresponding to the ball rental button 361 of the ball rental unit 360 shown in FIG. A return switch 365b, which is a push button switch, is mounted at a position corresponding to the button 362, and a remaining frequency display 365c, which is a segment display, is mounted at a position corresponding to the remaining lending display portion 363 of the rental ball unit 360.

  In the ball lending switch 365 a and the return switch 365 b, the ground LG from the CR unit 6 is electrically connected via the game ball lending device connection terminal board 869 and the main door relay terminal board 880. When the ball lending switch 365a is pressed and operated, the ball lending switch 365a is turned on (ON), and the ball lending operation signal TDS from the ball lending switch 365a is the main door relay terminal board 880 and the game The input is made to the CR unit 6 through the ball lending device connection terminal plate 869. When the return switch 362 is pressed, the return switch 365b is turned on (turned on), and the return operation signal RES from the return switch 365b is connected to the main door relay terminal board 880 and a game ball rental device It is input to the CR unit 6 through the terminal plate 869.

  The remaining power number display 365c is formed by arranging three segment displays in parallel, and among the three-digit segment displays, one digit of the segment displays is sequentially driven. The segment indicator of the is controlled to light. By such lighting control, the remaining frequency display 365 c displays the remaining amount of the prepaid card inserted in the CR unit 6 or displays an error of the CR unit 6. The remaining frequency display 365c is comprised of digit signals DG0 to DG2 (three signals in total) for specifying one-digit segment display among three-digit segment displays, and the specified one-digit segment display Segment drive signals SEG-A to SEG-G (a total of seven signals) for specifying the content to be displayed by lighting up, from the CR unit 6 to a game ball lending device connection terminal board 869 and a main door relay terminal board When input through 880, the 1-digit segment indicators are sequentially illuminated according to the input digit signals DG0 to DG2 and segment drive signals SEG-A to SEG-G, and these 3-digit segment indicators The contents due to the light emission can be viewed through the loan remaining display portion 363.

  A CR unit lamp 365 d is mounted on the frequency display plate 365 adjacent to the remaining frequency indicator 365 c. In the CR unit lamp 365d, a predetermined voltage VL from the CR unit 6 is input via the game ball and the like lending device connection terminal plate 869 and the main door relay terminal plate 880. The predetermined voltage VL is input to the CR unit 6 as a ball lending enable signal TDL through a current limiting resistor mounted on a gaming apparatus such as a gaming ball and the like via the CR unit lamp 365d. The CR unit 6 generates the predetermined voltage VL from AC 24 V supplied from the power supply substrate 851 by the built-in voltage generation circuit, and the ball lending switch 365 a and the return switch 365 b are in the ball lending possible state. Controls the logic of the ball lending enable signal TDL to make the CR unit lamp 365d emit light, and this luminescence can be viewed through the lending residual display unit 363. The segment drive signals SEG-A to SEG-G are input to the remaining number indicator 365c through the current limiting resistor mounted on the game apparatus connection terminal plate 869 such as a game ball.

  In the CR unit 6, the ball rental operation signal TDS from the ball rental switch 365a is pressed from the frequency display plate 365 through the main door relay terminal plate 880 and the game ball connection device plate 869 when the ball rental button 361 is pressed. When it is input, it is configured to output BRDY, which is a rental ball request signal, to the payout control board 4110 (payout control MPU 4120a) via the gaming ball rental device connection terminal plate 869. And CR unit 6 is a single payout operation start request signal to pay out a predetermined number of balls to be rented (in this embodiment, it is 25 balls and corresponds to 100 yen as the amount of money) in one payout operation. Is output to the payout control board 4110 (payout control MPU 4120a) via the game ball rental device connection terminal plate 869. The payout control board 4110 (the payout control MPU 4120a) to which BRDY and BRQ are input is a signal for notifying that one payout operation has been started or ended, the game ball lending device connection terminal board 869 , A signal indicating that it is possible or impossible to output to the CR unit 6 or that a payout operation for paying out a rental ball is possible, such as a gaming ball lending device connection terminal board 869 to the CR unit 6 or the like. In addition, for example, when a store clerk or the like in the hall sets in advance in the CR unit 6 so that the gaming ball for 200 yen is paid out when the rental ball button 361 is pressed, one payout operation Will be performed twice in a row, and if 25 balls for 100 yen are paid out, then 25 balls for 100 yen will be paid out continuously, and 50 balls for a total of 200 yen will be paid out Become.

  In the CR unit 6, the return button 362 is pressed and the return operation signal RES from the return switch 365b is input from the frequency display board 365 via the main door relay terminal board 880 and the game ball connection device board 869. And, the prepaid card is discharged from the insertion slot (not shown) and returned. The returned prepaid card stores the remaining amount obtained by subtracting the amount of money corresponding to the number of game balls paid out as a result of the pressing of the rental ball button 361.

7-3. Power supply board]
Next, the power supply substrate 851 will be briefly described. The power supply substrate 851 is supplied with power from the pachinko island facility, and can electrically connect or disconnect the AC 24 V (AC 24 V), and a power control unit 855 that generates various types of power. And a launch control unit 857 that performs launch control by the launch solenoid 654 of the striking launcher 650 shown in FIG. 5 and sphere feeding control by the sphere delivery solenoid 585 of the sphere delivery unit 580 shown in FIG.

[7-3-1. Power supply controller]
The power supply control unit 855 improves the power factor of the power rectified by the synchronous rectification circuit 855a and the synchronous rectification circuit 855a that rectifies the AC 24 V (AC 24 V) supplied from the pachinko island facility when the power switch 852 is operated. A power factor improving circuit 855b, a smoothing circuit 855c for smoothing power whose power factor is improved by the power factor improving circuit 855b, and various DCs for supplying power smoothed by the smoothing circuit 855c to various substrates And a power supply generation circuit 855d for generating a power supply.

7-3-2. Launch control unit]
The launch control unit 857, which performs launch control by the launch solenoid 654 and ball feed control by the ball feed solenoid 585, mainly includes a launch control circuit 857a. The launch control circuit 857a is an operation signal from a potentiometer 512 for electrically adjusting the intensity (launch intensity) to launch the gaming ball toward the gaming area 1100 in accordance with the rotational position of the front handle 506 shown in FIG. , A detection signal from the touch switch 516 that detects whether a palm or finger is touching the front handle 506 and whether or not the player is forced to stop the launch of the game ball by the intention of the player A detection signal from the emission stop switch 518 to be detected is input via the handle relay terminal plate 192. In addition, when the CR unit 6 and the game apparatus connection terminal plate 869 are electrically connected to each other, the release control circuit 857a receives a CR connection signal to that effect via the payout control board 4110. .

  The launch control circuit 857a controls the adjustment of the drive current for launching (playing) the gaming ball toward the gaming area 1100 based on the operation signal from the potentiometer 512 and the control to output to the launch solenoid 654. By outputting a constant current to the ball feeding solenoid 585 via the handle relay terminal plate 192, the ball feeding member of the ball feeding unit 580 is a game ball stored in the upper plate 301 of the plate unit 300 shown in FIG. Control is performed to receive the game balls received by the ball transfer member to the ball striking device 650 side.

7-4. Peripheral control board]
As shown in FIG. 15, the peripheral control board 4140 includes a peripheral control unit 4150 that performs effect control based on various commands from the main control board 4100, a game board side liquid crystal display device 1900, and an upper tray side liquid crystal display device 470. While performing drawing control and performing detection control of the touch state of the touch panel 480, music and effects flowing from the speaker housed in the speaker box 820 shown in FIG. 5 provided in the main body frame 3 and the speaker 130 provided in the door frame 5 A real time clock (hereinafter referred to as "RTC") control that holds a liquid crystal and sound control unit 4160 that performs sound control such as sound, calendar information that specifies the date, and time information that specifies the hour, minute, and seconds. The music which flows from the speaker housed in the speaker box 820 provided in the unit 4165 and the main body frame 3 and the speaker 130 provided in the door frame 5 And a, and volume adjustment volume 4140a adjusted by the knob portion of the rotational operation volume, such as sound effects.

7-4-1. Peripheral control unit]
As shown in FIG. 15, the peripheral control unit 4150 which performs effect control controls the peripheral control MPU 4150a as a microprocessor and the power-on process executed when the power is turned on, and also after a predetermined time has elapsed since the power was turned on. A peripheral control ROM 4150b that stores various control programs such as sub control programs that are executed and controls rendering operations, various data, various control data, and various schedule data, and a sound source built-in VDP 4160a of the liquid crystal and sound control unit 4160 described later. Various information (for example, schedule data defining the screen to be drawn on the game board liquid crystal display device 1900, emission of various LEDs, etc. continued across peripheral control unit steady processing executed each time a V blank signal is input) Manage schedule data, etc. that define aspects Peripheral control RAM 4150c storing various information (eg, information for managing the history of occurrence of the big hit gaming state), information for managing a special effect flag, etc. And a peripheral control external watchdog timer 4150 e (hereinafter referred to as “peripheral control external WDT 4150 e”) for monitoring whether or not the peripheral control MPU 4150 a is operating normally. Have.

  The peripheral control RAM 4150c can not hold the stored content only for the time when the instantaneous power failure occurs and the power is restored immediately, and the power is cut off for a long time (when a long time power interruption occurs In the peripheral control SRAM 4150d, the backup power is supplied by a large capacity electrolytic capacitor (hereinafter referred to as "electrolytic capacitor for SRAM") (not shown) provided on the power supply substrate 851. By this, it is possible to hold the stored content for about 50 hours. By providing the electrolytic capacitor for SRAM on the power supply substrate 851, the backup power is not supplied to the peripheral control SRAM 4150d when the gaming board 4 is removed from the pachinko machine 1, so the peripheral control SRAM 4150d stores the stored contents. You can not hold it and lose its contents.

  The peripheral control external WDT 4150 e is a timer for monitoring whether or not the system of the peripheral control MPU 4150 a is out of control, and when the timer is up, the hardware is reset. That is, when the peripheral control MPU 4150a does not output a clear signal for clearing the timer of the peripheral control external WDT 4150e to the peripheral control external WDT 4150e within a predetermined period (until the timer is up), the peripheral control MPU 4150a is reset. Since the peripheral control MPU 4150a can restart the timer count of the peripheral control external WDT 4150e when outputting a clear signal to the peripheral control external WDT 4150e within a certain period, it does not reset.

  Peripheral control MPU 4150a incorporates a plurality of parallel I / O ports, serial I / O ports and the like, and upon receiving various commands from main control board 4100, each decoration board of game board 4 based on the various commands. The game board side light emission data for outputting lighting signals, flashing signals or gradation lighting signals to a plurality of LEDs etc. provided in the lamp from the lamp drive board serial I / O port through the peripheral control output circuit (not shown) Game board motor drive data for transmitting drive signals to drive boards 4170 and outputting drive signals to electric drive sources such as motors and solenoids for operating various movable bodies provided on the game board 4 serial for motor drive boards It is transmitted to the motor drive board 4180 from the I / O port through the peripheral control output circuit, or the electric -Side motor drive data for outputting drive signals to specific drive sources from frame I / O port for frame decoration drive amplifier board motor to peripheral control output circuit, frame peripheral relay terminal board 868, and peripheral door relay terminal board 882 The door side light emission data for outputting lighting signals, blinking signals or gradation lighting signals to a plurality of LEDs or the like provided on each decoration substrate of the door frame 5 or transmitted to the frame decoration drive amplifier substrate 194 via It transmits to the frame decoration drive amplifier board 194 via the peripheral control output circuit, the frame peripheral relay terminal board 868 and the peripheral door relay terminal board 882 from the frame I / O port for frame decoration drive amplifier board LED.

  Various commands from the main control board 4100 are input to the main control board serial I / O port of the peripheral control MPU 4150a via a peripheral control input circuit (not shown). Further, a detection signal from a rotation detection switch for detecting the rotation (rotational direction) of the dial operation unit 401 provided in the operation unit 400 and a pressure detection switch for detecting an operation of the pressing operation unit 405 The detection signal is serialized by the door side serial transmission circuit (not shown) provided on the frame decoration drive amplifier substrate 194, and this serialized operation unit detection data is transmitted from the door side serial transmission circuit to the peripheral door relay terminal board 882, frame It is input to the operation unit detecting serial I / O port of the peripheral control MPU 4150a via the peripheral relay terminal board 868 and the peripheral control input circuit.

  Detection signals from various detection switches (for example, a photo sensor etc.) for detecting the original position and movable position of various movable bodies provided on the game board 4 are provided on the motor drive board 4180 (not shown) The serialized movable body detection data serialized by the serial transmission circuit is input from the gaming board side serial transmission circuit to the motor control board serial I / O port of the peripheral control MPU 4150a through the peripheral control input circuit. There is. The peripheral control MPU 4150a exchanges various data between the peripheral control board 4140 and the motor drive board 4180 by switching the input / output of the motor drive board serial I / O port.

  Peripheral control MPU 4150a has a built-in watchdog timer (hereinafter referred to as "peripheral control built-in WDT"), and the system runs away using peripheral control built-in WDT and peripheral control external WDT 4150e in combination. It is diagnosed whether it is

7-4-1a. Peripheral control MPU]
Next, the peripheral control MPU 4150a which is a microcomputer will be described. As shown in FIG. 16, peripheral control MPU 4150a has peripheral control built-in RAM 4150ab, peripheral control DMA (abbreviated as Direct Memory Access) controller 4150ac, peripheral control bus controller 4150ad, peripheral control various serial I, centering on peripheral control CPU core 4150aa. It comprises an / O port 4150ae, a peripheral control built-in WDT 4150af, peripheral control various parallel I / O ports 4150ag, and a peripheral control analog / digital converter (hereinafter referred to as peripheral control A / D converter) 4150ak.

  The peripheral control CPU core 4150 aa reads and writes various data from / to the peripheral control built-in RAM 4150 ab and the peripheral control DMA controller 4150 ac via the internal bus 4150 ah, while peripheral control various serial I / O ports 4150 ae and WDT 4150 af Various data are read / written to / from the peripheral control various parallel I / O port 4150ag and the peripheral control A / D converter 4150ak via the internal bus 4150ah, the peripheral control bus controller 4150ad, and the peripheral bus 4150ai.

  The peripheral control CPU core 4150 aa reads various data from the peripheral control ROM 4150 b via the internal bus 4150 ah, the peripheral control bus controller 4150 ad, and the external bus 4150 h, while the peripheral control RAM 4150 c and the peripheral control SRAM 4150 d. It reads and writes various data via the internal bus 4150 ah, the peripheral control bus controller 4150 ad, and the external bus 4150 h.

  The peripheral control DMA controller 4150ac includes storage devices such as peripheral control built-in RAM 4150ab, peripheral control ROM 4150b, peripheral control RAM 4150c, and peripheral control SRAM 4150d, peripheral control various serial I / O ports 4150ae, peripheral control built-in WDT 4150af, peripheral control various parallel I DMA0 is a dedicated controller that performs data transfer independently between peripheral devices such as I / O port 4150ag and peripheral control A / D converter 4150ak without using peripheral control CPU core 4150aa. It has four channels of ~ DMA3.

  Specifically, peripheral control DMA controller 4150 ac is a storage device of peripheral control built-in RAM 4150 ab incorporated in peripheral control MPU 4150 a, peripheral control various serial I / O ports 4150 ae incorporated in peripheral control MPU 4150 a, and WDT 4150 af To perform data transfer independently between peripheral control various parallel I / O port 4150ag and input / output devices such as peripheral control A / D converter 4150ak without using peripheral control CPU core 4150aa The peripheral control built-in RAM 4150 ab reads and writes via the internal bus 4150 ah while the peripheral control various serial I / O port 4150 ae, peripheral control built-in WDT 4150 af, peripheral control various parallel I / O port 4150 g, and the peripheral control A / D converter input and output devices such as 4150Ak, via the peripheral control bus controller 4150ad and peripheral bus 4150Ai, reading and writing.

  The peripheral control DMA controller 4150 ac is a peripheral control various types of serial I / s built in the peripheral control MPU 4150 a and storage devices such as the peripheral control ROM 4150 b, the peripheral control RAM 4150 c, and the peripheral control SRAM 4150 d externally attached to the peripheral control MPU 4150 a. Between devices with input / output devices such as O port 4150ae, peripheral control built-in WDT 4150af, peripheral control various parallel I / O port 4150ag, and peripheral control A / D converter 4150ak, without using the peripheral control CPU core 4150aa In order to perform data transfer independently, peripheral control bus controller 4150 ad and external bus 4150 h are used for storage devices such as peripheral control ROM 4150 b, peripheral control RAM 4150 c, and peripheral control SRAM 4150 d. And read / write, peripherals for input / output devices such as peripheral control various serial I / O port 4150ae, peripheral control built-in WDT 4150af, peripheral control various parallel I / O port 4150ag, and peripheral control A / D converter 4150ak Reading and writing are performed via the control bus controller 4150 ad and the peripheral bus 4150 ai.

  Peripheral control bus controller 4150ad controls internal bus 4150ah, peripheral bus 4150ai, and external bus 4150h to control the central processing unit of peripheral control MPU core 4150aa, peripheral control built-in RAM 4150ab, peripheral control ROM 4150b, peripheral control RAM 4150c, and peripheral control. Various devices such as storage devices such as SRAM 4150 d, peripheral control various serial I / O ports 4150 ae, peripheral control built-in WDT 4150 af, peripheral control various parallel I / O ports 4150 ag, and peripheral control A / D converter 4150 ak etc It is a dedicated controller that exchanges various data between them.

  Peripheral control various serial I / O port 4150ae are serial I / O port for lamp drive board, serial I / O port for motor drive board, serial I / O port for frame decoration drive amplifier board motor, frame decoration drive amplifier board LED It has a serial I / O port for a frame, a serial I / O port for a frame decoration drive amplifier board motor, a serial I / O port for a main control board, and a serial I / O port for acquiring operation unit information.

  Peripheral control built-in watchdog timer (peripheral control built-in WDT) 4150af is a timer for monitoring whether the system of peripheral control MPU 4150a is out of control. When this timer is up, it is reset by hardware It has become. That is, the peripheral control CPU core 4150 aa is reset when the watchdog timer is started and the clear signal for clearing the timer is not output to the peripheral control built-in WDT 4150 af within a predetermined period (until the timer is up). It will take When the peripheral control CPU core 4150 aa starts the watchdog timer and outputs a clear signal to the peripheral control built-in WDT 4150 af within a certain period, the timer count can be restarted, so that the reset does not occur.

  Peripheral control Various parallel I / O port 4150ag outputs various latch signals such as game board side motor drive latch signal, door side motor drive light emission latch signal etc. In addition, it outputs clear signal to peripheral control external WDT 4150 e, The detection signals from the various detection switches for detecting the original position and the movable position of the various movable bodies provided on the board 4 are serialized by the game board side serial transmission circuit (not shown) provided on the motor drive board 4180. Output a movable body information acquisition latch signal for receiving the movable body detection data from the game board serial transmission circuit at the serial I / O port for motor drive board of peripheral control MPU 4150a, or the upper decoration in the door frame 5 It outputs a lighting signal of an LED mounted on the upper decorative substrate of the unit 280. This LED is a high-intensity white LED, and is a confirmation notification lamp for notifying that the occurrence of the jackpot gaming state is determined. In this embodiment, the route between the LED and the peripheral control various parallel I / O port 4150ag is shortened by adopting a configuration in which the LED and the peripheral control various parallel I / O port 4150ag are electrically connected directly. The noise measures can be taken for the lighting control of the LED which has the meaning of weight on the game. In addition, about lighting control of LED, it is performed in peripheral control part 1 ms timer interrupt processing mentioned later, and other LEDs etc. except this LED are performed in peripheral control part steady processing mentioned later It has become.

  The peripheral control A / D converter 4150ak is electrically connected to the volume control volume 4140a, and when the knob portion of the volume control volume 4140a is turned, the resistance value is changed, and the resistance at the rotational position of the knob portion The voltage divided by the value is converted from an analog value to a digital value and converted into 1024 steps of values from 0 to 1023. In the present embodiment, the values of 1024 stages are divided into seven and managed as substrate volumes 0-6. Mute is set for substrate volume 0, and maximum volume is set for substrate volume 6, and the volume is set to increase from substrate volume 0 to substrate volume 6. The speaker and door frame 5 housed in the speaker box 820 provided in the main body frame 3 by controlling the liquid crystal and sound control unit 4160 (sound source built-in VDP 4160a described later) so as to obtain the volume set to the substrate volume Music and sound effects are made to flow from the provided speaker 130. As described above, music and sound effects are made to flow from the speaker housed in the speaker box 820 provided in the main body frame 3 and the speaker 130 provided in the door frame 5 by the sound volume adjustment based on the turning operation of the knob portion. .

  In the present embodiment, in addition to music and sound effects, notification sounds for notifying the store clerks in the hall of occurrences of malfunctions of the pachinko machine 1 and cheating against the pachinko machine 1 and contents concerning a game effect etc. (For example, to render the screen developed on the game board side liquid crystal display device 1900 as more powerful, to notify that the player is likely to shift to an advantageous gaming state, etc.) The notification sound also flows from the speaker housed in the speaker box 820 provided in the main body frame 3 and the speaker 130 provided in the door frame 5, but the notification sound and the notification sound are completely at the volume adjustment based on the turning operation of the knob portion. It is designed to flow independently of the program, and the volume from the mute to the maximum volume is programmed by the liquid crystal and sound control unit 4160 (VDP 4160a with built-in sound source to be described later). So that the it can be adjusted to your. The volume adjusted by this program can be changed smoothly from the muffling to the maximum volume, unlike the substrate volume divided into the seven steps described above. Thereby, for example, even if the store clerk or the like in the hall turns the knob portion of the volume adjustment volume 4140a to set the volume small, the speaker and the door housed in the speaker box 820 provided in the main body frame 3 Although the effect sound such as music and sound effects flowing from the speaker 130 provided in the frame 5 is reduced, a large volume is generated when the pachinko machine 1 is in trouble or the player is performing an illegal activity (this embodiment Then, the notification sound set to the maximum volume) can be made to flow. Therefore, even if the volume of the effect sound is reduced, it is possible to prevent the clerk or the like in the hall from becoming aware of the occurrence of a malfunction or the player's fraudulent act by the notification sound. Also, based on the current substrate volume set by the volume adjustment based on the turning operation of the knob portion, the volume of the advertisement sound is reduced to prevent interference with music and sound effects. There is a possibility to increase the volume to play the music and to add to music and sound effects to produce the screen developed on the game board side liquid crystal display device 1900 as more powerful or to shift to a gaming state advantageous to the player. It can also be announced that it is expensive.

7-4-1 b. Peripheral control ROM]
The peripheral control ROM 4150 b includes various control programs for controlling the peripheral control unit 4150, the liquid crystal and sound control unit 4160, the RTC control unit 4165, etc., various data, various control data, various schedule data, and predetermined individual information (hereinafter (Prescribed individual information) is stored in advance (effect control storage unit). Various schedule data include screen generation schedule data for generating a screen to be drawn on the game board side liquid crystal display device 1900 and the upper dish side liquid crystal display device 470, light emission mode generation schedule data for generating light emission modes of various LEDs, music There are sound generation schedule data for generating sound effects and the like, and electric drive source schedule data and the like for generating a drive mode of an electric drive source such as a motor and a solenoid. The screen generation schedule data is configured by arranging screen data defining the configuration of the screen in time series, and the order of the screen drawn on the game board liquid crystal display device 1900 and the upper dish liquid crystal display device 470 is defined. It is done. The light emission aspect generation schedule data is configured by arranging light emission data defining the light emission aspect of various LEDs in time series. The sound generation schedule data is configured by arranging sound command data in time series, and defines the order in which music and sound effects flow. The sound command data includes an output channel number for instructing which output channel is to be used among a plurality of output channels in the sound source built-in VDP 4160a of the liquid crystal and sound control unit 4160 described later, and the sound source built-in VDP 4160a Among the plurality of tracks in the built-in sound source, track numbers are specified for instructing which track to incorporate sound data such as music and sound effects. The electrical drive source schedule data is configured by arranging drive data of an electrical drive source such as a motor or a solenoid in time series, and defines the operation of the electrical drive source such as a motor or a solenoid.

  The various control programs stored in the peripheral control ROM 4150b may be read out directly from the peripheral control ROM 4150b and executed, but they may be copied to the various control program copy areas of the peripheral control RAM 4150c, which will be described later, when the power is turned on. Some are read and executed. When various data, various control data and various schedule data stored in peripheral control ROM 4150b are also directly read from peripheral control ROM 4150b, when power is turned on to various control data copy areas of peripheral control RAM 4150c described later, etc. In some cases, the copied one is read out.

  The peripheral control ROM 4150 b is used to correct the luminance of the game board liquid crystal display device 1900 according to the usage time of the game board liquid crystal display device 1900 as one of various control programs for controlling the RTC control unit 4165. A brightness correction program is included. This brightness correction program is for correcting the decrease in brightness due to the secular change of the game board side liquid crystal display device 1900 when the backlight of the game board side liquid crystal display device 1900 is equipped with an LED type. The date and time when the game board side liquid crystal display device 1900 is first powered on, the current date and time, the brightness setting information, etc. are acquired from the built-in RAM of the RTC control unit 4165 described later, and the acquired brightness setting information is based on the correction information. To correct. The correction information is stored in advance in the peripheral control ROM 4150 b. The brightness setting information is, as will be described later, brightness adjustment information for adjusting the range of the brightness of the LED of the game board side liquid crystal display device 1900 from 100% to 70% in 5% steps, and the present The brightness of the LED which is the backlight of the game board side liquid crystal display device 1900 being set is included, for example, the date and time when the game board side liquid crystal display device 1900 was first turned on and the current date and time Therefore, when June has already passed from the date when the game board side liquid crystal display device 1900 is first powered on, the corresponding correction information (for example, 5%) is acquired from the peripheral control ROM 4150b, and When the brightness of the LED included in the setting information is 75% and the backlight of the game board side liquid crystal display device 1900 is turned on, the correction information acquired for this 75% is used. To adjust the brightness of the backlight of the game board side liquid crystal display device 1900 based on the brightness adjustment information included in the brightness setting information so that the brightness of 80% is further added by 5%. When December has already passed since the date when the liquid crystal display device 1900 was first powered on, the corresponding correction information (for example, 10%) is acquired from the peripheral control ROM 4150b, and the LED included in the luminance setting information When the backlight of the game board side liquid crystal display device 1900 is turned on with a luminance of 75%, the luminance setting is made such that the luminance is 85% which is further added by 10% which is correction information acquired with respect to the 75%. Based on the brightness adjustment information included in the information, the brightness of the backlight of the game board side liquid crystal display device 1900 is adjusted and lighted.

7-4-1 c. Peripheral control RAM]
The peripheral control RAM 4150c externally attached to the peripheral control MPU 4150a is, as shown in FIG. 16, a backup that exclusively stores, among various information updated by execution of various control programs, the information to be backed up. Management target work area 4150ca, backup first area 4150cb and backup second area 4150cc for exclusive storage of copied various information stored in the backup management target work area 4150ca, and peripheral control ROM 4150b The various control program copy area 4150 cd, which exclusively stores the copied various control programs, and the various data, various control data, various schedule data, etc. stored in the peripheral control ROM 4150 b A control data copy area 4150ce that stores the copied data for exclusive use, and a backup non-management target that stores only the information that is not the backup target among the various information updated by the execution of the control program A work area 4150 cf is provided.

  When the pachinko machine 1 is powered on (including a momentary power failure or a power failure due to a power failure), the value 0 is forcibly written to the unmanaged backup work area 4150 cf and cleared to zero. For the management target work area 4150ca, backup first area 4150cb, and backup second area 4150cc, when the power supply of the pachinko machine 1 is started (when the power is turned on), the main control board 4100 (power on command output Power supply command (refer to FIG. 30) instructs the RAM clear effect start and respective state effect start (for example, shown in FIG. 12 within a predetermined period from the time of power on). It instructs the start of the effect when the operation switch 860a is operated. ) It is sometimes cleared to zero.

  The backup management target work area 4150 ca is various information that is updated in peripheral control unit steady processing executed each time a V blank signal from the sound source built-in VDP 4160 a of the liquid crystal and sound control unit 4160 described later is input. Bank0 (1fr), which exclusively stores 1fr) as a backup target, and effect information (1ms), which is various information updated in peripheral control unit 1ms timer interrupt processing executed each time a 1ms timer interrupt described later occurs It consists of Bank 0 (1 ms), which is exclusively stored as a backup target. Here, the names of Bank 0 (1 fr) and Bank 0 (1 ms) will be briefly described. “Bank” is a minimum management unit representing the size of a storage area for storing various types of information. The following “0” means that the storage area is normally used to store various information updated by execution of various control programs. That is, "Bank 0" means that the size of the storage area normally used is taken as the minimum management unit. Then, “Bank 1”, “Bank 2”, “Bank 3”, and “Bank 4” provided in the area ranging from backup first area 4150 cb to backup second area 4 150 cc to be described later are the same storage areas as “Bank 0”. It means that it has a size. As will be described later, when “(1fr)” outputs drawing data of one screen (one frame) to the game board side liquid crystal display device 1900 and the upper dish side liquid crystal display device 470 as described later, the peripheral control MPU 4150a The V blank signal is transmitted to the peripheral control MPU 4150a to indicate that it is ready to accept the screen data from V. Therefore, each time the V blank signal is input, in other words, one frame (1 frame) Since peripheral control unit steady processing is executed for each time, “Bank 0”, “Bank 1”, “Bank 2”, “Bank 3”, and “Bank 4” are additionally described (effect information (1 fr) and effects to be described later) The backup information (1fr) is also used in the same meaning) "(1 ms)" will be described later. As the peripheral control unit 1 ms timer interrupt processing is executed each time a 1 ms timer interrupt occurs, it is added to “Bank 0”, “Bank 1”, “Bank 2”, “Bank 3”, and “Bank 4” respectively. (The effect information (1 ms) and the effect backup information (1 ms) described later are also used in the same meaning).

  Bank 0 (1fr) includes a lamp drive board side transmission data storage area 4150 caa, a frame decoration drive amplifier board side LED transmission data storage area 4150 cab, a reception command storage area 4150 cac, an RTC information acquisition storage area 4150 cad, and a schedule data storage area 4150 cae Etc. are provided. The lamp drive board side transmission data storage area 4150caa has game board side light emission data SL-DAT for outputting lighting signals, blinking signals or gradation lighting signals to a plurality of LEDs provided on each decoration board of the game board 4 It is a storage area to be set, and the frame decoration drive amplifier board side LED transmission data storage area 4150cab is a lighting signal, a blinking signal or a gradation lighting signal to a plurality of LEDs etc. provided on each decoration board of the door frame 5. It is a storage area in which door side light emission data STL-DAT for output is set, and reception command storage area 4150 cac receives various commands transmitted from main control board 4100 and various received commands are set. It is a storage area, and the RTC information acquisition storage area 4150 cad is the RTC control unit 4165 (the RTC of the RTC 41654 a described later). The schedule data storage area 4150 cae is a storage area in which various information acquired from the stored RAM 4165 aa) is set, and based on the command received from the main control board 4100 (main control MPU 4100 a), various schedules corresponding to the received command. It is a storage area in which data is set. In the schedule data storage area 4150 cae, various schedule data copied from the peripheral control ROM 4150 b to various control data copy areas 4150 ce may be read and set, and various schedule data may be directly read from the peripheral control ROM 4150 b. Some are set.

  Bank 0 (1 ms), frame decoration drive amplifier substrate side motor transmission data storage area 4150 caf, motor drive substrate side transmission data storage area 4150 cag, movable body information acquisition storage area 4150 cah, operation unit information acquisition storage area 4150 cai, and history information A storage area 4150 caj and the like are provided. In the frame decoration drive amplifier substrate side motor transmission data storage area 4150 caf, door side motor drive data STM-DAT for outputting a drive signal to an electrical drive source such as the dial drive motor 414 provided in the door frame 5 is provided. It is a storage area to be set, for outputting a drive signal to an electric drive source such as a motor or a solenoid for operating various movable bodies provided on the game board 4 in the motor drive board side transmission data storage area 4150 cag. It is a storage area in which the game board motor drive data SM-DAT is set, and the movable body information acquisition storage area 4150 cah is provided in the game board 4 based on detection signals from various detection switches provided in the game board 4. It is a storage area in which various information obtained by acquiring the original position and movable position of various movable bodies is set, and an operation unit information acquisition storage area 4150 ca The various information (for example, the operation unit 400) which acquired the rotation (rotation direction) of the dial operation unit 401 and the operation of the pressing operation unit 405 based on detection signals from various detection switches provided in the operation unit 400. This is a storage area in which rotation (rotation direction) history information of the dial operation unit 401 and operation history information of the pressing operation unit 405 etc. created based on detection signals from various detection switches provided are set.

  The lamp drive board side transmission data storage area 4150caa of Bank0 (1fr) and the transmission data storage area 4150cab for the frame decoration drive amplifier board side LED, and the transmission data storage area 4150caf for the frame decoration drive amplifier board side motor of Bank0 (1 ms). The motor drive substrate side transmission data storage area 4150 cag is divided into two areas of a first area and a second area.

  In the lamp drive board side transmission data storage area 4150caa, when peripheral control unit steady processing described later is executed, the game board side light emission data SL-DAT is set in the first area of the lamp drive board transmission data storage area 4150caa. When the next peripheral control unit steady processing is executed, the game board side light emission data SL-DAT is set in the second area of the lamp drive substrate side transmission data storage area 4150caa, and the peripheral control unit steady state is set. Every time the process is executed, the game board side light emission data SL-DAT is alternately set in the first area and the second area of the lamp drive substrate side transmission data storage area 4150caa. When the peripheral control unit steady processing is executed, for example, when the game board side light emission data SL-DAT is set in the second area of the lamp drive substrate side transmission data storage area 4150caa in the present peripheral control unit steady processing, When the control unit steady process is executed, the process proceeds based on the game board side light emission data SL-DAT set in the first area of the lamp drive board side transmission data storage area 4150caa.

  In the frame decoration drive amplifier substrate side LED transmission data storage area 4150cab, when the peripheral control unit steady processing is executed, the door side emission data STL is stored in the first area of the frame decoration drive amplifier substrate side LED transmission data storage area 4150cab. When the DAT is set and the next peripheral control unit steady processing is executed, the door-side light emission data STL-DAT is set in the second area of the frame decoration drive amplifier substrate side LED transmission data storage area 4150 cab. The door side light emission data STL-DAT is alternately set in the first area and the second area of the frame decoration drive amplifier substrate side LED transmission data storage area 4150 cab each time the peripheral control unit steady process is executed. Ru. When peripheral control unit steady processing is executed, for example, when door side light emission data STL-DAT is set in the second region of frame decoration drive amplifier substrate side LED transmission data storage region 4150 cab in the current peripheral control unit steady processing, When the previous peripheral control unit steady process is executed, the process is advanced based on the door side light emission data STL-DAT set in the first area of the frame decoration drive amplifier substrate side LED transmission data storage area 4150 cab. It has become.

  When the peripheral control unit 1 ms timer interrupt process described later is executed, the frame decoration drive amplifier substrate side motor transmission data storage area 4150 caf opens to the first area of the frame decoration drive amplifier substrate side transmission data storage area 4150 caf. When the side motor drive data STM-DAT is set and the next peripheral control unit 1 ms timer interrupt processing is executed, the door side motor drive data STM is stored in the second area of the frame decoration drive amplifier substrate side motor transmission data storage area 4150 caf. -DAT is set, and each time the peripheral control unit 1 ms timer interrupt processing is executed, the first area and the second area of the frame decoration drive amplifier board side motor transmission data storage area 4150 caf are opened on the door side. Motor drive data STM-DAT are alternately set. The peripheral control unit 1 ms timer interrupt process is executed, for example, the door side motor drive data STM-DAT is stored in the second area of the frame decoration drive amplifier substrate side motor transmission data storage area 4150 caf in the peripheral control unit 1 ms timer interrupt process. When set, the door-side motor drive data STM-DAT set in the first area of the frame decoration drive amplifier board-side motor transmission data storage area 4150 caf when the previous peripheral control unit 1 ms timer interrupt process is executed It is designed to proceed with the process based on it.

  In the motor drive board side transmission data storage area 4150 cag, when the peripheral control unit 1 ms timer interrupt processing is executed, the game board side motor drive data SM-DAT is set in the first area of the motor drive board transmission data storage area 4150 cag. When the next peripheral control unit 1 ms timer interrupt processing is executed, the game board side motor drive data SM-DAT is set in the second area of the motor drive board side transmission data storage area 4150 cag, Each time the peripheral control unit 1 ms timer interrupt process is executed, the game board motor drive data SM-DAT is alternately set in the first area and the second area of the motor drive board side transmission data storage area 4150 cag. Peripheral control unit 1 ms timer interrupt processing is executed, for example, game board side motor drive data SM-DAT is set in the second area of motor drive substrate side transmission data storage area 4150 cag in the current peripheral control unit 1 ms timer interrupt processing At the time, when the previous peripheral control unit 1 ms timer interrupt processing is executed, the processing is advanced based on the game board side motor drive data SM-DAT set in the first area of the motor drive board side transmission data storage area 4150 cag. It is supposed to be.

  Next, a backup first area 4150 cb and a backup second area 4150 cc will be described, which exclusively stores the copy of the effect information which is various information stored in the backup management target work area 4150 ca. In the backup first area 4150 cb and the backup second area 4150 cc, two pairs of two banks as one pair are managed as one page. The effect information (1 fr), which is the content stored in Bank 0 (1 fr), which is a storage area normally used, is used as effect backup information (1 fr) each time peripheral control unit steady processing is executed every one frame (1 frame) The effect information (1 ms) which is the content to be copied to the backup first area 4150 cb and the backup second area 4150 cc at a high speed by the peripheral control DMA controller 4150 ac and to be stored in Bank 0 (1 ms) which is a storage area normally used. Each time the 1 ms timer interrupt is generated as effect backup information (1 ms), the peripheral control unit 1 ms timer interrupt process is executed, and the peripheral control DMA controller 41 is operated to the backup first area 4150 cb and the backup second area 4150 cc. It is copied to the high speed by 0ac. The consistency of one page is determined depending on whether or not the contents of the two banks making up the page match.

  Specifically, backup 1st area 4150cb manages Bank1 (1fr) and Bank2 (1fr) as one pair and Bank1 (1 ms) and Bank2 (1 ms) as one pair, and a total of 2 pairs are managed as one page. ing. The contents stored in Bank0 (1fr), which is a storage area normally used, are peripheral control DMAs in Bank1 (1fr) and Bank2 (1fr) each time peripheral control unit steady processing is executed for each frame (1 frame). The memory copied at high speed by the controller 4150ac and stored in the normally used storage area Bank 0 (1 ms) is stored each time the peripheral control unit 1 ms timer interrupt processing is executed each time a 1 ms timer interrupt occurs. The page is copied at high speed to Bank 1 (1 ms) and Bank 2 (1 ms) by the peripheral control DMA controller 4150 ac, and the consistency of this page is performed depending on whether the contents of Bank 1 (1 fr) and Bank 2 (1 fr) match or not. Bank 1 (1 ms) and Bank 2 ( It carried out by whether or not the contents of the ms) are the same.

  Also, in the backup second area 4150 cc, Bank 3 (1 fr) and Bank 4 (1 fr) form one pair, and Bank 3 (1 ms) and Bank 4 (1 ms) form one pair, and a total of 2 pairs are managed as one page. The contents stored in Bank 0 (1fr), which is a storage area normally used, are peripheral control DMAs in Bank 3 (1fr) and Bank 4 (1fr) each time peripheral control unit steady processing is executed for each frame (1 frame). The memory copied at high speed by the controller 4150ac and stored in the normally used storage area Bank 0 (1 ms) is stored each time the peripheral control unit 1 ms timer interrupt processing is executed each time a 1 ms timer interrupt occurs. The data is copied at high speed to Bank 3 (1 ms) and Bank 4 (1 ms) by the peripheral control DMA controller 4150 ac, and the consistency of this page is performed depending on whether the contents of Bank 3 (1 fr) and Bank 4 (1 fr) match or not. Bank 3 (1 ms) and Bank 4 ( It carried out by whether or not the contents of the ms) are the same.

  As described above, in the present embodiment, the backup first area 4150 cb has a total of two pairs of the Bank 1 (1 fr) and the Bank 2 (1 fr) as one pair and the Bank 1 (1 ms) and the Bank 2 (1 ms) as one pair. It is an area for managing as a page, and backup 2nd area 4150cc makes Bank 3 (1 fr) and Bank 4 (1 fr) as one pair, Bank 3 (1 ms) and Bank 4 (1 ms) as one pair in total It is an area for managing as one page. Different ID codes are stored at the beginning and the end of each page, that is, at the beginning and the end of the first backup area 4150 cb and the second backup area 4150 cc.

  Further, in the present embodiment, the effect information (1fr), which is the content stored in Bank 0 (1fr), which is a storage area normally used, is used as effect backup information (1fr) for each peripheral control unit for each frame (1 frame) Contents that are copied at high speed to the backup first area 4150 cb and backup second area 4150 cc by the peripheral control DMA controller 4150 ac and stored in Bank 0 (1 ms), which is a storage area normally used, every time steady-state processing is executed The effect information (1 ms) is the effect backup information (1 ms), and every time the 1 ms timer interrupt is generated, the peripheral control unit 1 ms timer interrupt processing is executed, the backup first area 4150 cb and the backup second area 4150 cc Peripheral control Although designed to be copied at a high speed by the MA controller 4150Ac, a program for executing a fast copy from these peripheral control DMA controller 4150Ac are common. That is, in the present embodiment, the effect information (1 fr) and the effect information (1 ms) are managed by a common management method (execution of a common program).

7-4-1 d. Peripheral control SRAM]
The peripheral control SRAM 4150 d externally attached to the peripheral control MPU 4150 a includes a backup management target work area 4150 da for exclusive storage of information to be backed up among various information updated by execution of various control programs; A first backup area 4150 db and a second backup area 4150 dc are provided, which exclusively store the copy of various information stored in the backup management target work area 4150 da. The content stored in the peripheral control SRAM 4150 d is that the power on command from the main control board 4100 (see FIG. 30) is RAM when the pachinko machine 1 is powered on (including a momentary power failure or a power failure due to a power failure). It instructs the start of the clear effect and the start of each state effect (for example, instructs the start of the effect when the operation switch 860a shown in FIG. 12 is operated within a predetermined period from when the power is turned on) Even when it is not cleared to zero. This point is completely different from the point that the backup management target work area 4150ca, the backup first area 4150cb, and the backup second area 4150cc of the peripheral control RAM 4150c described above are cleared to zero. Further, after the pachinko machine 1 is powered on, when the dial operation unit 401 or the press operation unit 405 of the operation unit 400 is operated within a predetermined time, a screen for performing the setting mode is displayed on the game board side liquid crystal display device 1900. It has become so. By operating the dial operation unit 401 or the press operation unit 405 of the operation unit 400 according to the screen of the setting mode, for each content (item) stored in the peripheral control SRAM 4150 d (for example, history of occurrence of the big hit gaming state etc.) The contents (items) stored in the peripheral control RAM 4150 c are not displayed at all, and can not be cleared in the setting mode, while they can be cleared. Also in this point, the peripheral control RAM 4150 c and the peripheral control SRAM 4150 d are completely different.

  The backup management target work area 4150 da is effect information (SRAM) which is various information continued across the day (for example, information for managing the history of occurrence of the big hit gaming state, and for managing a special effect flag It is comprised from Bank0 (SRAM) which memorize | stores information etc. for backup object exclusively. Here, to briefly describe the name of Bank 0 (SRAM), “Bank” is a minimum management unit representing the size of a storage area for storing various information, as described above, and “Bank” The following “0” means that the storage area is normally used to store various information updated by execution of various control programs. That is, "Bank 0" means that the size of the storage area normally used is taken as the minimum management unit. Then, “Bank 1”, “Bank 2”, “Bank 3”, and “Bank 4”, which are provided in an area ranging from backup first area 4150 db to backup second area 4 150 dc described later, are the same storage areas as “Bank 0”. It means that it has a size. The “(SRAM)” is backed up by various information stored in the peripheral control SRAM 4150 d externally attached to the peripheral control MPU 4150 a, so “Bank 0”, “Bank 1”, “Bank 2”, “Bank 3” And “Bank 4” respectively (the same applies to the effect information (SRAM) and effect backup information (SRAM) described later).

  Next, a backup first area 4150 db and a backup second area 4150 dc will be described, which exclusively stores the copy of effect information (SRAM) which is various information stored in the backup management target work area 4150 da. The backup first area 4150 db and the backup second area 4150 dc are managed as one page, in which two banks form one pair. The effect information (SRAM), which is the content stored in Bank 0 (SRAM), which is a storage area normally used, is used as effect backup information (SRAM) each time peripheral control unit steady processing is executed for each frame (1 frame). The data is copied at a high speed by the peripheral control DMA controller 4150 ac to the backup first area 4150 db and the backup second area 4150 dc. The consistency of one page is determined depending on whether or not the contents of the two banks making up the page match.

  Specifically, in the backup first area 4150 db, one pair of Bank 1 (SRAM) and Bank 2 (SRAM) is managed, and this one pair is managed as one page. The contents stored in Bank 0 (SRAM), which is a storage area normally used, are peripheral control DMAs to Bank 1 (SRAM) and Bank 2 (SRAM) each time peripheral control unit steady processing is executed for each frame (1 frame). The copy is performed at high speed by the controller 4150 ac, and the consistency of this page is performed depending on whether or not the contents of Bank 1 (SRAM) and Bank 2 (SRAM) match.

  Further, in the backup second area 4150 dc, one pair is made up of Bank 3 (SRAM) and Bank 4 (SRAM), and this one pair is managed as one page. The contents stored in Bank 0 (SRAM), which is a storage area normally used, are peripheral control DMAs to Bank 3 (SRAM) and Bank 4 (SRAM) each time peripheral control unit steady processing is executed for each frame (1 frame). The copy is performed at high speed by the controller 4150 ac, and the consistency of the page is performed depending on whether or not the contents of Bank 3 (SRAM) and Bank 4 (SRAM) match.

  As described above, in this embodiment, the backup first area 4150 db is an area for managing one pair as one page, in which Bank 1 (SRAM) and Bank 2 (SRAM) form one pair, and a backup second area An area 4150 dc is an area for managing one pair as one page, in which Bank 3 (SRAM) and Bank 4 (SRAM) form one pair. Different ID codes are stored at the head and the end of each page, that is, at the head and the end of the backup first area 4150 db and the backup second area 4150 dc.

7-4-2. Liquid Crystal and Sound Control Unit]
Loudspeaker of the game board side liquid crystal display device 1900 and the drawing control of the upper dish side liquid crystal display device 470 and the speaker housed in the speaker box 820 provided in the main body frame 3 and the music and sound effect flowing from the speaker 130 provided in the door frame 5 As shown in FIG. 15, the liquid crystal and sound control unit 4160 that performs sound control has a built-in sound source (hereinafter referred to as "built-in sound source") for sound control such as music and sound effects. A sound source built-in VDP (abbreviation for Video Display Processor) 4160a for performing drawing control of the game board side liquid crystal display device 1900 and the upper tray side liquid crystal display device 470, and display on the game board side liquid crystal display device 1900 and the upper tray side liquid crystal display device 470 Various sound data such as music and sound effects in addition to various character data of the screen to be displayed (and sprite data with a sprite number attached) A liquid crystal and sound control ROM4160b for storing includes a audio data transmission IC4160c to be transmitted towards the frame decoration drive amplifier board 194 and the like serialized music or sound effects as audio data. The liquid crystal and sound control ROM 4160b displays, for example, ring image data used for displaying a ring-shaped display (ring display) as sprite data used for displaying a screen or an image described later, and an operation menu background image described later. Operation menu background image data to be used, selection display object image data to be used to display at least one selection display object to be described later, tonal adjustment background image data to be used to display a volume adjustment screen including a volume scale to be described later Other than the volume setting icon image data etc. used for display, main frame rear image data, service mode screen used for displaying main frame rear image 740 C where the position of each part on the rear of main frame 3 can be seen from the player Service mode screen image data used for display, for displaying break timer setting screen That breaks timer setting screen image data, and, during breaks screen image data used for displaying the break in the screen is stored. The liquid crystal and sound control ROM 4160 b also stores the image data of the indication display object used to display the indication display for prompting the user to operate the display button displayed on the display area of the upper tray liquid crystal display device 470. There is.

  Peripheral control MPU 4150a of peripheral control unit 4150 extracts screen generation schedule data corresponding to the command from main control board 4100 from various control data copy areas 4150ce of peripheral control ROM 4150b of peripheral control unit 4150 or peripheral control RAM 4150c. The start screen data of the screen generation schedule data set in the schedule data storage area of the peripheral control RAM 4150c and set in the schedule data storage area 4150cae, various types of peripheral control ROM 4150b or peripheral control RAM 4150c of the peripheral control unit 4150 After extracted from the control data copy area 4150ce and output to the VDP 4160a with built-in sound source, schedule data is triggered by the input of a V blank signal described later. The next screen data following the top screen data is extracted from the various control data copy areas 4150ce of the peripheral control ROM 4150b of the peripheral control unit 4150 or the peripheral control RAM 4150c according to the screen generation schedule data set in the storage area 4150cae Output to VDP4160a. As described above, the peripheral control MPU 4150a receives the V blank signal every time the screen data arranged in time series in the screen generation schedule data is input according to the screen generation schedule data set in the schedule data storage area 4150 cae. The VDP 4160a with built-in sound source is output one by one from the top screen data.

  In addition, peripheral control MPU 4150a starts the sound command data of the top of the sound generation schedule data corresponding to the command from main control board 4100 from various control data copy areas 4150ce of peripheral control ROM 4150b of peripheral control unit 4150 or peripheral control RAM 4150c. The sound command data of the sound generation schedule data set in the schedule data storage area of the peripheral control RAM 4150 c and extracted in the schedule data storage area of the peripheral control RAM 4150 c is extracted with the peripheral control ROM 4150 b of the peripheral control unit 4150 or peripheral After being extracted from the various control data copy areas 4150ce of the control RAM 4150c and output to the VDP 4160a with built-in sound source, the schedule data is recorded in response to the V blank signal being input. The next sound command data following the first sound command data according to the sound generation schedule data set in the area 4150 cae is extracted from the various control data copy areas 4150 ce of the peripheral control ROM 4150 b of the peripheral control unit 4150 or the peripheral control RAM 4150 c Output to the built-in VDP4160a. Thus, according to the sound generation schedule data set in the schedule data storage area 4150 cae, the peripheral control MPU 4150 a receives the V blank signal as the sound command data arranged in time series in the sound generation schedule data. Each time, the sound command data at the head is output to the built-in VDP 4160a one by one.

7-4-2a. Sound source built-in VDP]
The sound source built-in VDP 4160a receives the screen data from the peripheral control MPU 4150a in addition to the above-mentioned built-in sound source, as shown in FIG. 17, based on the input screen data, from the liquid crystal and sound control ROM 4160b to the game board Extraction of character data on the side and upper dish character data to create sprite data, and drawing data for one screen (one frame) to be displayed on the game board liquid crystal display device 1900 and the upper dish liquid crystal display device 470 The VRAM for this purpose is also built-in (hereinafter referred to as "built-in VRAM"). Among the drawing data generated on the built-in VRAM, the sound source built-in VDP 4160a outputs image data for the game board side liquid crystal display device 1900 from the channel CH1 to the game board side liquid crystal display device 1900 and By outputting the image data from the channel CH2 to the upper tray side liquid crystal display device 470, synchronization between the game board side liquid crystal display device 1900 and the upper tray side liquid crystal display device 470 is achieved. Thus, when the peripheral control MPU 4150a outputs screen data of one screen (one frame) displayed on the game board liquid crystal display device 1900 and the upper dish liquid crystal display device 470 to the sound source built-in VDP 4160a, the sound source built-in VDP 4160a The character data is extracted from the liquid crystal and sound control ROM 4160b based on the input screen data to create sprite data and displayed on the game board side liquid crystal display device 1900 and the upper tray side liquid crystal display device 470 (1 The drawing data of the frame) is generated on the built-in VRAM, and among the generated drawing data, the image data for the game board side liquid crystal display device 1900 is output from the channel CH1 to the game board side liquid crystal display device 1900 and Image data for the liquid crystal display 470 is on the channel CH2. And outputs to the side the liquid crystal display device 470. In other words, “screen data for one screen (one frame)” is a built-in VRAM of drawing data for one screen (one frame) to be displayed on the game board side liquid crystal display device 1900 and the upper tray side liquid crystal display device 470. It is the data to generate above.

  Further, the VDP 4160a with built-in sound source outputs drawing data for one screen (one frame) from the channel CH1 to the game board side liquid crystal display device 1900, and the image data for the upper plate side liquid crystal display device 470 up from the channel CH2. When output to the plate-side liquid crystal display device 470, a V-blank signal is transmitted to the peripheral control MPU 4150a to indicate that the screen data from the peripheral control MPU 4150a can be received. In this embodiment, since the frame frequency (the number of screen updates per second) of the game board liquid crystal display device 1900 and the upper dish liquid crystal display device 470 is set to approximately 30 fps, a V blank signal is output. The interval is approximately 33.3 ms (= 1000 ms ÷ 30 fps). The peripheral control MPU 4150a is configured to execute peripheral control unit V blank signal interrupt processing to be described later in response to the input of the V blank signal. Here, the interval at which the V blank signal is output changes somewhat depending on the liquid crystal size of the game board side liquid crystal display device 1900 and the upper tray side liquid crystal display device 470. Also, in a manufacturing lot of the peripheral control board 4140 on which the peripheral control MPU 4150a and the sound source built-in VDP 4160a are mounted, the interval at which the V blank signal is output may change somewhat.

  The sound source built-in VDP 4160a adopts a frame buffer method. In this "frame buffer method", drawing data of one screen (one frame) to be drawn on the screens of the game board side liquid crystal display device 1900 and the upper plate side liquid crystal display device 470 is held in a frame buffer (built-in VRAM) The drawing data of one screen (one frame) held in the frame buffer (built-in VRAM) is output to the game board liquid crystal display device 1900 and the upper tray liquid crystal display device 470.

  When the sound command data is input from peripheral control MPU 4150a based on a command from main control board 4100, sound source built-in VDP 4160a stores the music stored in liquid crystal and sound control ROM 4160b as shown in FIG. And sound data such as sound effects are extracted and the built-in sound source is controlled to incorporate sound data such as music and sound effects into the track according to the track number specified in the sound command data, and used according to the output channel number It sets output channels and serializes music, sound effects, etc. flowing from the speaker housed in the speaker box 820 provided in the main body frame 3 and the speaker 130 provided in the door frame 5, and outputs it as audio data to the audio data transmission IC 4160c. .

  Note that the sound command data also includes sub-volume values for adjusting the volume of the track into which the sound data is to be incorporated, and the plurality of tracks in the built-in sound source of the built-in sound source VDP 4160a include effects such as music and sound effects. In addition to the sound data and the sub-volume value to adjust the volume, adjust the sound data of the notification sound and its volume to notify the store clerk etc. of the occurrence of the trouble of the pachinko machine 1 or the cheating on the pachinko machine 1 Subvolume values are incorporated. Specifically, for the effect sound, the substrate volume adjusted by rotating the knob portion of the volume adjustment volume 4140a described above is set as the sub volume value, and for the notification sound, the volume adjustment is performed. The maximum volume is set as a sub-volume value without depending on the volume adjustment based on the turning operation of the knob portion of the volume 4140a. The sub-volume value of the effect sound can be shifted to a setting mode to be described later and operated by operating the dial operation unit 401 and the press operation unit 405 of the operation unit 400.

  The sound designation data also includes a master volume value for adjusting the volume of the channel to be output, and a plurality of output channels in the built-in sound source of the built-in sound source VDP 4160a include a plurality of output sound sources in the built-in sound source Of the tracks, the sound data of the effect sound incorporated into the used track and the sub-volume value for adjusting the volume of the effect sound incorporated into the track used are synthesized, and the volume of this synthesized effect sound is Actually, it amplifies up to the master volume value which becomes the volume which flows from the speaker accommodated in the speaker box 820 provided in the main body frame 3 and the speaker 130 provided in the door frame 5, and amplifies the amplified effect sound as audio data The audio data transmission IC 4160 c is designed to output the data.

  In the present embodiment, the master volume value is set to a fixed value, and when the volume of the synthesized effect sound is at the maximum volume, the speaker volume 820 provided on the main body frame 3 is amplified by the master volume value. The volume of the sound flowing from the speakers housed in and the speaker 130 provided in the door frame 5 is set to be the maximum allowable volume. Specifically, for the effect sound, as a sub volume value for adjusting the volume of the effect sound incorporated into the used track and the sound data of the effect incorporated into the used track among a plurality of tracks The knob portion of the set volume adjustment volume 4140a is rotated to adjust the adjusted substrate volume, and the volume of the synthesized effect sound is actually transmitted to the speaker box 820 provided on the main body frame 3. It amplifies up to the master volume value which becomes the volume which flows from the speaker 130 provided in the speaker and the door frame 5 accommodated, serializes this amplified effect sound, and outputs it as audio data to the audio data transmission IC 4160c for the notification sound. Are the sound data of the notification sound incorporated into the used track and the sound of the notification sound incorporated into the used track The volume of the synthesized notification sound is actually synthesized by combining the maximum volume without depending on the volume adjustment at all based on the turning operation of the knob portion of the volume adjustment volume 4140a set as the sub-volume value to adjust the Amplify up to a master volume value which is a volume flowing from a speaker contained in the speaker box 820 provided in the main body frame 3 and the speaker 130 provided in the door frame 5, and amplify the amplified notification sound into audio data as audio data Output to transmission IC 4160 c.

  Here, when the effect sound flows from the speaker housed in the speaker box 820 provided in the main body frame 3 and the speaker 130 provided in the door frame 5, occurrence of a defect of the pachinko machine 1 or an illegal act against the pachinko machine 1 In order to inform store clerks in halls of the hall, etc., a brief explanation will be given of the control of sending an alarm sound. First, the sub-volume value of the track incorporating the effect sound is forcibly set to mute, and the track incorporating this effect sound Sound data, the sub-volume value set to the mute, the sound data of the track into which the notification sound is incorporated, and the sub-volume value at which the volume of the notification sound is set to the maximum volume Speakers provided in the speaker box 820 provided in the main body frame 3 and the speakers 130 provided in the door frame 5 Amplified to a master volume value becomes et flowing volume, and outputs the amplified effect sound and alarm sound as an audio data to the audio data transmission IC4160c Serialize.

  That is, only the notification sound of the maximum volume flows as the sound that flows from the speakers housed in the speaker box 820 provided in the main body frame 3 and the speakers 130 provided in the door frame 5 in practice. At this time, since the effect sound is muffled, although it does not flow from the speaker housed in the speaker box 820 provided in the main body frame 3 and the speaker 130 provided in the door frame 5, the effect sound is for the aforementioned sound generation Progressing according to schedule data. In the present embodiment, the notification sound is made to flow from the speaker housed in the speaker box 820 provided in the main body frame 3 and the speaker 130 provided in the door frame 5 for a predetermined period (for example, 90 seconds). When the time period has elapsed, the volume of the effect sound proceeding according to the sound generation schedule data forcibly set to mute so far is adjusted by rotating the knob portion of the volume adjustment volume 4140a and adjusting the substrate volume The volume value is set again (in this case, when it is shifted to the setting mode and operated by operating the display button, it is set to the subvolume value of the adjusted effect sound) and It flows from the speaker accommodated in the provided speaker box 820 and the speaker 130 provided in the door frame 5.

  As described above, when the effect sound flows from the speakers housed in the speaker box 820 provided in the main body frame 3 and the speakers 130 provided in the door frame 5, occurrence of a defect in the pachinko machine 1 or fraudulentness with respect to the pachinko machine 1 Speakers provided in the speaker box 820 provided in the main body frame 3 and the speakers provided in the door frame 5 when the notification sound flows in order to notify the store clerk or the like of the action that the volume of the effect sound is muted Since the effect sound that has become muffled although it flows from 130 is progressing according to the sound generation schedule data, the speaker and door housed in the speaker box 820 provided in the main body frame 3 after the notification sound has passed for a predetermined period When no sound flows from the speaker 130 provided in the frame 5, the effect sound does not start to flow again from the place where the notification sound starts to flow, and the notification sound So that the start flowing again from where it proceeds according to schedule data for generating sound until after the lapse of a predetermined period of time and begins to flow.

7-4-2 b. Liquid Crystal and Sound Control ROM]
As shown in FIG. 17, the liquid crystal and sound control ROM 4160 b draws in the display area of the game board side liquid crystal display device 1900 and the game board side character data for drawing in the display area of the game board side liquid crystal display device 1900. While upper character character data is stored in advance, various sound data such as music, sound effects, notification sounds, and notification sounds are also stored in advance.

7-4-2 c. Audio data transmission IC]
When serialized audio data is input from the VDP 4160a with a built-in sound source, the audio data transmission IC 4160c transmits it to the frame decoration drive amplifier board 194 as serial data of the difference system in which the right audio data is a plus signal and a minus signal. At the same time, the left side audio data is transmitted toward the frame decoration drive amplifier board 194 as serial data of a difference system in which a plus signal and a minus signal are used. Thus, music, sound effects, and the like according to various effects are reproduced in stereo from the speakers housed in the speaker box 820 provided in the main body frame 3 and the speakers 130 provided in the door frame 5.

  Note that the audio data transmission IC 4160 c outputs audio data as serial data of the difference system between the left and right, respectively, between the substrates ranging from the peripheral control substrate 4140 to the frame decoration drive amplifier substrate 194, for example, When combining the noise component on the positive signal and the noise component on the negative signal by the frame decoration drive amplifier substrate 194 into one left audio data, even if the negative signal is affected by noise, Since noise components are canceled by canceling each other, noise countermeasures can be taken.

7-4-3. RTC control unit]
The RTC control unit 4165, which holds calendar information for specifying a date and time information for specifying hours, minutes, and seconds, is configured around an RTC 4165a, as shown in FIG. In the RTC 4165a, a RAM 4165aa (time-keeping storage unit) in which calendar information and time information are stored is built in (hereinafter referred to as "RTC built-in RAM 4165aa"). The RTC 4165a is supplied with power from a battery 4165b (in this embodiment, a button battery is adopted) as a driving power supply and a backup power supply (second power supply) of the RTC built-in RAM 4165aa. That is, the RTC 4165a is supplied with power from the battery 4165b independently of the peripheral control board 4140 (pachinko machine 1) without any supply of power from the peripheral control board 4140 (pachinko machine 1). As a result, even if the power of the pachinko machine 1 is cut off, the RTC 4165a can update and hold calendar information and time information by the power supply from the battery 4165b. Battery 4165b supplies power (second power) in response to reception of a power failure notification signal described later, separately from the main power supply (first power) for supplying power (first power). The supply of power (second power) may be stopped upon the start of supply of power from the main power supply, and in such a power supply configuration, the RTC 4165a may be a main power supply or a battery 4165b. Power is supplied from

  The peripheral control MPU 4150a of the peripheral control unit 4150 acquires calendar information and time information from the RTC built-in RAM 4165aa of the RTC 4165a and sets it in the above-mentioned RTC information acquisition storage area 4150cad of the peripheral control RAM 4150c. Based on the above, the game board-side liquid crystal display device 1900 and the upper tray-side liquid crystal display device 470 can be deployed. As such an effect, for example, a screen on which a Christmas tree or a reindeer appears is unfolded by the game board side liquid crystal display device 1900 and the upper plate side liquid crystal display device 470 if it is December 25; And the like. The screen for executing the countdown to receive the message may be expanded on the game board side liquid crystal display device 1900 and the upper dish side liquid crystal display device 470, or the like. Calendar information and time information are set at the time of factory shipment. Although details will be described later in the RTC built-in RAM 4165aa of the RTC control unit 4165, the peripheral control board 4140 starts peripheral operation when it receives a power failure detection signal output as a power failure notice from the power failure monitoring circuit 4100e (first time). Information on the time until the control board 4140 receives the power on command output from the main control board 4100 (second time point), that is, information on the power failure time is stored.

  On the other hand, in addition to calendar information and time information, when the backlight of the game board side liquid crystal display device 1900 is equipped with an LED type, the brightness setting information of the LED is stored in the RTC built-in RAM 4165aa ing. When the backlight of the game board side liquid crystal display device 1900 is equipped with an LED type, the peripheral control MPU 4150a acquires luminance setting information from the RTC built-in RAM 4165aa and performs the luminance adjustment of the backlight by PWM control. . The brightness setting information includes the brightness adjustment information for adjusting the range of the brightness of the LED of the game board side liquid crystal display device 1900 from 100% to 70% in steps of 5%, and the currently set game. The brightness of the LEDs that are the backlights of the panel-side liquid crystal display device 1900 and the upper-dish-side liquid crystal display device 470 is included.

  In addition to calendar information, time information and brightness setting information, calendar information, time information, and brightness setting information are first stored in the RTC built-in RAM 4165aa in the RTC built-in RAM 4165aa as date and time information of the hour, minutes, and seconds. Input date and time information is also stored.

  When the backlight of the game board side liquid crystal display device 1900 and the upper dish side liquid crystal display device 470 is attached with a cold cathode tube type, the peripheral control MPU 4150a performs switching control of ON / OFF of the backlight or ON. It is supposed to be

  Various types of information such as calendar information, time information, brightness setting information, and input date and time information stored in the RTC built-in RAM 4165aa are set in the manufacturing line of the gaming machine maker. In the production line, for example, in order to perform various tests such as display tests of the game board side liquid crystal display device 1900, the year when the input date and time information is inputted in the production line as the date and time when the game board side liquid crystal display device 1900 is first powered on. It is set to the date of manufacture, which is the date of the month and the hour, minute, and second.

  As described above, in addition to calendar information and time information, brightness setting information when the backlight of the game board side liquid crystal display device 1900 is mounted on the RTC built-in RAM 4165aa, input date information, etc. , It is possible to store and hold information that needs to be maintained independently of model information of the pachinko machine 1 (for example, the probability of occurrence of a big hit gaming state with low probability and high probability).

  The brightness setting information etc. stored and held in the RTC built-in RAM 4165aa may be too bright for the brightness of the backlight of the game board side liquid crystal display device 1900 set as the manufacturing date depending on the environment of the hall where the pachinko machine 1 is installed. Sometimes it is too dark. Therefore, by operating the dial operation unit 401 and the press operation unit 405 of the operation unit 400, it is possible to shift to the setting mode and adjust the brightness of the backlight to a predetermined brightness. After turning on the power of the pachinko machine 1, when the dial operation unit 401 or the press operation unit 405 of the operation unit 400 is operated within a predetermined time, a screen for performing the setting mode is displayed on the game board side liquid crystal display device 1900 When the dial operation unit 401 or the press operation unit 405 of the operation unit 400 is operated during a period of waiting for a customer and demonstration by the game board side liquid crystal display device 1900 is performed, a screen for performing a setting mode Is displayed on the game board side liquid crystal display device 1900. Calendar information and time information are reset by operating the dial operation unit 401 and the press operation unit 405 of the operation unit 400 according to the screen of the setting mode, and the brightness of the backlight of the game board side liquid crystal display device 1900 is desired. It can be adjusted to the brightness. The adjusted desired luminance of the backlight of the game board side liquid crystal display device 1900 is overwritten (updated and stored) as the luminance of the LED stored in the luminance setting information.

  In the setting mode, the peripheral control MPU 4150a executes the brightness correction program described above, thereby providing a game board side liquid crystal when the backlight of the game board side liquid crystal display device 1900 is mounted with an LED type. The decrease in luminance due to the secular change of the display device 1900 is corrected. The peripheral control MPU 4150a acquires input date and time information from the RTC built-in RAM 4165aa of the RTC control unit 4165, identifies the date and time when the gaming board side liquid crystal display device 1900 is powered on first, Acquire the time information that specifies minutes and seconds to specify the current date and time, adjust the range in which the brightness of the LED that is the backlight of the game board side liquid crystal display device 1900 ranges from 100% to 70% in 5% steps Luminance setting information having luminance adjustment information to be used and the luminance of the LED which is the backlight of the game board-side liquid crystal display device 1900 currently set is acquired. The acquired luminance setting information is corrected based on the correction information stored in advance in the peripheral control ROM 4150b.

  For example, if June has already passed from the date when the gaming board side liquid crystal display device 1900 is first powered on from the date when the gaming board side liquid crystal display device 1900 was first powered on and the current date, When the corresponding correction information (for example, 5%) is acquired from the peripheral control ROM 4150b and the backlight of the game board liquid crystal display device 1900 is lit with the luminance of the LED included in the luminance setting information being 75%, this 75% The brightness of the backlight of the game board side liquid crystal display device 1900 is adjusted based on the brightness adjustment information included in the brightness setting information so that the brightness of 80% is obtained by adding 5% to the correction information acquired for the image. If it is already 12 months since the date when the game board liquid crystal display device 1900 was first turned on, the peripheral control ROM 41 has been turned on. When acquiring the corresponding correction information (for example, 10%) from 0b and when the brightness of the LED included in the brightness setting information is 75% and the backlight of the game board-side liquid crystal display device 1900 is turned on, The brightness of the backlight of the game board side liquid crystal display device 1900 is adjusted based on the brightness adjustment information included in the brightness setting information so that the brightness of 85% is further added by 10% which is correction information acquired Light.

  The current date and time may be specified by directly acquiring calendar information for specifying the date and time information for specifying the hour, minute, and second from the RTC built-in RAM 4165aa of the RTC control unit 4165. Current calendar information set in the calendar information storage unit in the RTC information acquisition storage area 4150 cad of the peripheral control RAM 4150 c and updated by the system of the peripheral control board 4140 in the current time information acquisition processing of step S 1002 in the control unit power on processing. And current time information set in the time information storage unit and updated by the system of the peripheral control board 4140 may be acquired to specify the current date and time.

7-4-4. Volume adjustment volume]
As described above, the volume adjustment volume 4140a rotates the knob such as the volume of music and sound effects flowing from the speakers contained in the speaker box 820 provided in the main body frame 3 and the speakers 130 provided in the door frame 5. It can be adjusted by operating. As described above, the volume adjustment volume 4140a is configured such that the resistance value can be varied by turning the knob portion, and the electrically connected peripheral control A / D converter 4150ak has the knob portion. The voltage divided by the resistance value at the rotational position is converted from an analog value to a digital value, and converted into 1024 steps of values from 0 to 1023. In the present embodiment, as described above, the values of 1024 steps are divided into seven and managed as substrate volumes 0 to 6. Mute is set for substrate volume 0, and maximum volume is set for substrate volume 6, and the volume is set to increase from substrate volume 0 to substrate volume 6. The speaker and door frame 5 provided in the speaker box 820 provided in the main body frame 3 by controlling the liquid crystal and sound control unit 4160 (the sound source built-in VDP 4160a) so as to obtain the volume set to the substrate volume Music and sound effects are made to flow from the speaker 130.

  As described above, music and sound effects are made to flow from the speaker housed in the speaker box 820 provided in the main body frame 3 and the speaker 130 provided in the door frame 5 by the sound volume adjustment based on the turning operation of the knob portion. . Further, in the present embodiment, as described above, in addition to music and sound effects, notification sounds for notifying a store clerk or the like in the hall of an occurrence of a problem with the pachinko machine 1 or cheating against the pachinko machine 1, (For example, the screen developed on the game board side liquid crystal display device 1900 is displayed as more powerful, or it is notified that there is a high possibility of transition to a gaming state advantageous to the player. However, the notification sound for the message also flows from the speaker housed in the speaker box 820 provided in the main body frame 3 and the speaker 130 provided in the door frame 5, but the notification sound and the notification sound Based on the volume control from the mute to the maximum volume by the program by the liquid crystal and sound control unit 4160 (with sound source built-in VDP 4160). ) And it is capable of controlled and adjusted.

  The volume adjusted by this program (corresponding to the effect control program described later) is different from the substrate volume divided into the above-described seven levels, and smoothes from the mute to the maximum volume as shown in FIGS. 78 to 83 described later. It can be changed. Thereby, for example, even if the store clerk or the like in the hall turns the knob portion of the volume adjustment volume 4140a to set the volume small, the speaker and the door housed in the speaker box 820 provided in the main body frame 3 Although the effect sound such as music and sound effects flowing from the speaker 130 provided in the frame 5 is reduced, a large volume is generated when the pachinko machine 1 is in trouble or the player is performing an illegal activity (this embodiment Then, the notification sound set to the maximum volume) can be made to flow. Therefore, even if the volume of the effect sound is reduced, it is possible to prevent the clerk or the like in the hall from becoming aware of the occurrence of a malfunction or the player's fraudulent act by the notification sound.

  Also, based on the current substrate volume set by the volume adjustment based on the turning operation of the knob portion, the volume of the advertisement sound is reduced to prevent interference with music and sound effects. To increase the volume of the sound and to add to music and sound effects to create a more powerful screen developed by the game board side liquid crystal display device 1900 and the upper dish side liquid crystal display device 470, which is advantageous for the player It can also be notified that there is a high possibility of transition to the gaming state.

  In this embodiment, in addition to adjusting the volume of music and sound effects by turning the knob of the volume adjustment volume 4140a, for example, the dial operation unit 401 of the operation unit 400. By operating the pressing operation unit 405, it is possible to shift to the setting mode and adjust the volume of music and sound effects. After turning on the power of the pachinko machine 1, if the dial operation unit 401 or the press operation unit 405 of the operation unit 400 is operated within a predetermined time, a screen for performing the setting mode is displayed on the game board side liquid crystal display device 1900 When the dial operation unit 401 or the press operation unit 405 of the operation unit 400 is operated during a period of waiting for a customer and demonstration by the game board side liquid crystal display device 1900 is performed, a screen for performing a setting mode Is displayed on the game board side liquid crystal display device 1900. By operating the dial operation unit 401 or the press operation unit 405 of the operation unit 400 in accordance with the screen of the setting mode, the volume of music or sound effects can be adjusted to a desired volume. Specifically, the peripheral control A / D converter 4150ak converts the voltage divided by the resistance value at the rotational position of the knob portion of the volume adjustment volume 4140a from an analog value to a digital value, and the converted value is obtained. The value of the substrate volume can be increased or decreased by adding or subtracting a predetermined value in accordance with the operation of the dial operation unit 401 or the pressing operation unit 405 of the operation unit 400. . The adjusted volume is set and updated as a sub-volume value for a track incorporating sound data of a rendering sound such as music or sound among a plurality of tracks in the built-in sound source of the VDP 4160a with built-in sound source, and the rendering sound Although it is reflected in the adjustment of the volume of the above, it is not reflected in the adjustment in the volume of the notification sound and the notification sound described above.

  As described above, in the present embodiment, when the volume of music or sound effects is adjusted by directly turning the knob portion of the volume adjustment volume 4140a, the dial operation unit 401 of the operation unit 400 or the pressure operation unit 405 There are two methods of adjusting the volume of music and sound effects by increasing or decreasing the value of the substrate volume by adding or subtracting a predetermined value according to the operation. Since the volume control volume 4140a is mounted on the peripheral control board 4140, it is necessary to make the main body frame 3 always open from the outer frame 2. Then, it is the store clerk in the hall that can turn the knob portion of the volume adjustment volume 4140a. However, at the volume adjusted by the store clerk in the hall, the player may feel small and may not be able to hear music and sound effects, or the player may feel large and feel loud music and sound effects. Therefore, after the pachinko machine 1 is powered on, the dial operation unit 401 or the press operation unit 405 of the operation unit 400 is operated within a predetermined time, or a customer waiting state is established, and a demonstration by the game board side liquid crystal display device 1900 is performed. When the dial operation unit 401 or the press operation unit 405 of the operation unit 400 is operated within the specified period, a screen for performing the setting mode is displayed on the game board side liquid crystal display device 1900, and this setting is performed. By operating the dial operation unit 401 and the press operation unit 405 of the operation unit 400 in accordance with the screen of the mode, the volume of music and sound effects can be adjusted to a desired volume. As a result, the player can adjust the volume of music and sound effects to a desired volume, so if it is difficult for the store clerk in the hall to feel the volume adjusted by the store clerk and it is difficult to hear the music and sound effects, The volume can be increased to a desired volume by operating the dial operation unit 401 or the pressing operation unit 405, or when the volume clerk adjusted in the hall feels loud and feels loud with music or sound effects, the operation unit 400 A desired volume can be reduced by operating the dial operation unit 401 or the press operation unit 405.

  Further, in the present embodiment, when the pachinko machine 1 does not play a game is continued for a predetermined time, and when waiting for a customer and the demonstration by the game board side liquid crystal display device 1900 is repeated (for example, 10 times) The volume adjusted by the player who was sitting on the front of the pachinko machine 1 and was playing a game last time is canceled, and the volume is initialized. In this initialization of the volume, the volume adjusted by the store clerk in the hall, that is, the volume adjusted by the store clerk in the hall directly operating the knob portion of the volume adjustment volume 4140a is adjusted. As a result, when it is difficult for the player who was sitting on the front of the pachinko machine 1 to feel the volume adjusted by the player who was playing the game, and to hear the music and sound effects, this time, he sits on the front of the pachinko machine 1 The player who plays the game can operate the dial operation unit 401 and the press operation unit 405 of the operation unit 400 to increase the volume to a desired level, and the player is seated by playing on the front of the pachinko machine 1 last time When the player feels loud and the volume adjusted by the player and feels loud with music and sound effects, the player who is sitting on the front of the pachinko machine 1 and plays a game this time operates the dial operation unit 401 of the operation unit 400 or pressing operation. The portion 405 can be operated to reduce the volume to a desired level.

7-4-5. Touch Panel and Configuration Associated therewith]
In addition to the game board side liquid crystal display device 1900 and the upper dish liquid crystal display device 470, the peripheral control board 4140 is connected with a touch panel 480 described later, attached matter detection sensors 483R and 483L and solid information recognition sensors 487R and 487L. There is. When the peripheral control board 4140 receives a detection signal according to the contact state of the operation surface of the touch panel 480 and receives the detection signal, the peripheral control substrate 4140 grasps the contact state of the operation surface of the touch panel 480 according to the contact information based on the detection signal. be able to. The adhesion detection sensors 483R and 483L are, for example, photosensors each having a light emitting element and a light receiving element arranged in a large number over the width of a film 488 described later. The attached matter detection sensors 483R and 483L are attached to the surface of the film 488 based on the reflectance according to the amount of light attenuation when the reflected light of the light output by the light emitting element is received using the light receiving element. It detects whether or not a kimono is present, and outputs a detection signal as a detection result to the peripheral control board 4140. On the other hand, the solid state information recognition sensors 487R and 487L each include, for example, charge coupled devices (ChargeCoupledDevice) arranged in large numbers across the width of the film 488 described later, and the surface of the film 488 is A video signal indicating the result of imaging is output to the peripheral control board 4140. The details of the touch panel 480, the attachment detection sensors 483R and 483L, and the solid state information recognition sensors 487R and 487L will be described later.

[8. Power supply system]
Next, the power supply system of the pachinko machine 1 will be described with reference to FIGS. 18 and 19. FIG. 18 is a block diagram showing a power supply system of a pachinko machine, and FIG. 19 is a block diagram showing the continuation of FIG. First, the power supply substrate will be described, and then the power supply supplied to each control substrate etc. will be described. Note that the grounds (GND) of various substrates and the grounds (GND) of various terminal boards are electrically connected to the ground (GND) of the power supply substrate 851, and are the same ground (GND).

[8-1. Power supply board]
The power supply substrate 851 is electrically connected to the power supply cord, and the plug of the power supply cord is inserted into the power outlet of the pachinko facility. When the power supply switch 852 shown in FIG. 3 is operated, the power supplied from the pachinko facility is supplied to the power supply substrate 851, and the power of the pachinko machine 1 can be turned on.

  As shown in FIG. 18, the power supply substrate 851 includes a power control unit 855 and a emission control unit 857. The power control unit 855 is a circuit that creates various DC voltages from AC 24 volts (AC 24 V) supplied from the pachinko island facility, and supplies backup power to the main control board 4100 and the payout control board 4110. The portion 857 is a circuit for controlling the drive of the launch solenoid 654 of the hitting and launching apparatus 650 shown in FIG. 5 and the ball feeding solenoid 585 of the ball feeding unit 580 shown in FIG.

  The power control unit 855 includes a synchronous rectification circuit 855a, a power factor correction circuit 855b, a smoothing circuit 855c, a power generation circuit 855d, and capacitors BC0 and BC1. The AC 24 V supplied from the pachinko island facility is supplied to the game ball lending device connection terminal plate 869 via the power supply substrate 851, and is also supplied to the synchronous rectification circuit 855a. The synchronous rectification circuit 855a rectifies 24 volts AC (AC 24 V) supplied from the pachinko island facility and supplies it to the power factor correction circuit 855b. The power factor improvement circuit 855b improves the power factor of the rectified power, creates DC +37 V (DC +37 V, hereinafter referred to as "+37 V"), and supplies it to the smoothing circuit 855 c. The smoothing circuit 855c removes the supplied + 37V ripple to smooth + 37V, and supplies the smoothed + 37V to the launch control circuit 857a and the power generation circuit 855d of the launch control unit 857, respectively.

  Capacitor BC0 supplies backup power to RAM (main control built-in RAM) built in main control MPU 4100a of main control board 4100, and capacitor BC1 is built in payout control MPU 4120a of payout control unit 4120 in payout control board 4110 It supplies backup power to the RAM (payout control built-in RAM).

  The launch control circuit 857a of the launch control unit 857 uses the +37 V supplied from the smoothing circuit 855c as a drive power source and provides gaming balls with launch strength (launch intensity) corresponding to the rotational position of the rotary handle front 506 shown in FIG. While adjusting the drive current for launching (projecting) toward the game area 1100 shown in FIG. 1 and performing control to output to the firing solenoid 654, a constant current is output to the ball sending solenoid 585 of the ball sending unit 580 Thus, the ball feeding member of the ball feeding unit 580 receives one game ball stored in the upper plate 301 of the plate unit 300 shown in FIG. 7 and sends the gaming ball received by the ball feeding member to the ball striking device 650 side. Take control.

  The power supply generation circuit 855d is supplied from the smoothing circuit 855c to +37 V to +5 V DC (+5 V DC, hereinafter referred to as "+5 V"), +12 V DC (+12 V DC, hereinafter to +12 V), and DC +24 V (DC + 24 V, hereinafter, described as “+24 V”) are respectively created and supplied to the payout control board 4110 and the frame peripheral relay terminal board 868, respectively. The power supply system supplied with +5 V is a +5 V power supply line, the power supply system supplied with +12 V is a +12 V power supply line, and the power supply system supplied with +24 V is a +24 V power supply line.

  The +5 V generated by the power supply generation circuit 855 d is supplied to the payout control board 4110 as described later. The +5 V supplied to the payout control board 4110 is applied to the power supply terminal of the payout control MPU 4120a through the payout control filter circuit 4110a, and is also applied to the power supply terminal of the payout control internal RAM through the diode PD0. ing. The +12 V generated by the power supply generation circuit 855 d is supplied to the +5 V generation circuit 4100 g of the main control substrate 4100 through the payout control substrate 4110. The +5 V production circuit 4100 g produces +5 V which is a control reference voltage of the main control MPU 4100 a from +12 V from the payout control substrate 4110. The +5 V created by the +5 V creation circuit 4100 g is supplied to the power supply terminal of the main control MPU 4100 a via the main control filter circuit 4100 h and is also supplied to the power supply terminal of the main control built-in RAM via the diode MD0. ing.

  The negative terminal of the capacitor BC1 of the power supply substrate 851 is grounded to the ground (GND), while the positive terminal of the capacitor BC1 is electrically connected to the power supply terminal of the payout control built-in RAM of the payout control substrate 4110. The cathode terminal of the diode PD0 of the control substrate 4110 is also electrically connected. That is, +5 V generated by the power supply generation circuit 855d of the power supply substrate 851 causes a current to flow toward the power supply terminal of the payout control MPU 4120a, and the power supply terminal of the payout control built-in RAM which is in the forward direction by the diode PD0 and the capacitor BC1. The current flows to the plus terminal. As described above, the capacitor BC1 is electrically connected by the electrical connection method in which the +5 V generated by the power generation circuit 855d of the power supply substrate 851 returns from the payout control substrate 4110 to the power supply substrate 851 again. Is supplied and can be charged. Thus, when +5 V generated by the power supply generation circuit 855d is not supplied to the payout control substrate 4110, the charge stored in the capacitor BC1 is supplied to the payout control substrate 4110 as the payout VBB. Therefore, although the current is blocked by the diode PD0 to the power supply terminal of the payout control MPU 4120a and the payout control MPU 4120a does not operate, the stored content is held by supplying the payout VBB to the power terminal of the payout control built-in RAM. It has become so.

  The negative terminal of the capacitor BC0 of the power supply substrate 851 is grounded to the ground (GND), while the positive terminal of the capacitor BC0 is electrically connected to the power control terminal of the main control built-in RAM of the main control substrate 4100 via the payout control substrate 4110. And the cathode terminal of the diode MD0 of the main control substrate 4100. That is, +5 V created by +5 V creation circuit 4100 g causes a current to flow toward the power supply terminal of main control MPU 4100 a, and the power supply terminal of the main control built-in RAM being in the forward direction by diode MD0 and the plus terminal of capacitor BC0 Current flows toward the As described above, the capacitor BC0 is charged by being supplied with +5 V by the electrical connection method in which +5 V created by the +5 V creation circuit 4100 g is supplied from the main control board 4100 and the payout control board 4110 to the power supply board 851. It can be done. As a result, +12 V created by the power supply creation circuit 855 d of the power supply substrate 851 is not supplied to the +5 V creation circuit 4100 g of the main control substrate 4100 via the payout control substrate 4110, and the +5 V creation circuit 4100 g can create +5 V. When the main control substrate 4100 is depleted, the charge stored in the capacitor BC0 is supplied as the main VBB to the main control substrate 4100 through the payout control substrate 4110, so the power supply terminal of the main control MPU 4100a is a diode. Although the main control MPU 4100a does not operate because the current is blocked by the MD0 and the main control MPU 4100a does not operate, the main VBB is supplied to the power supply terminal of the main control built-in RAM so that the stored contents are held.

[8-2. Voltage supplied to each control board etc.]
Next, an outline of the voltages supplied to the control boards and the like will be described, and subsequently, the voltages supplied mainly to the payout control board and the voltages supplied to the main control board will be described.

  Three types of voltages of +5 V, +12 V, and +24 V created by the power source creation circuit 855 d of the power source substrate 851 are supplied to the payout control substrate 4110 as shown in FIG. Two types of voltages of +24 V are supplied to the main control board 4100 via the payout control board 4110. Further, three types of voltages of +5 V, +12 V, and +24 V created by the power source creation circuit 855 d of the power source substrate 851 are supplied to the frame peripheral relay terminal plate 868 and peripheral circuits It is supplied to the control board 4140 and the peripheral door relay terminal plate 882, respectively.

  The three voltages of +5 V, +12 V, and +24 V supplied to the peripheral control substrate 4140 are, as shown in FIG. 19A, the drive source drive circuit of the lamp drive circuit 4170 a of the lamp drive substrate 4170 and the motor drive substrate 4180. It is supplied to 4180a respectively. The lamp drive circuit 4170a of the lamp drive board 4170 outputs various signals such as lighting signals, blinking signals and gradation lighting signals to various decoration boards of the game board 4, and the drive source drive circuit 4180a of the motor drive board 4180 A drive signal is output to an electric drive source such as a motor or solenoid of the board 4.

  The peripheral control board 4140 includes a +3.3 V creation circuit 4140 b for creating +5 V to 3.3 V DC (DC +3.3 V, hereinafter referred to as “+3.3 V”) supplied from the frame peripheral relay terminal plate 868. ing. The +3.3 V created by the +3.3 V creation circuit 4140 b is supplied to the liquid crystal module 1900 a of the game board side liquid crystal display device 1900, the liquid crystal module 470 a of the upper plate side liquid crystal display device 470 and the touch panel module 480 a of the touch panel 480. . Further, +12 V supplied to the peripheral control board 4140 is supplied to the backlight power supply 1900 b of the game board side liquid crystal display device 1900 and the backride power supply 470 b of the upper dish side liquid crystal display device 470.

  On the other hand, three types of voltages of +5 V, +12 V, and +24 V supplied to the peripheral door relay terminal plate 882 are supplied to the frame decoration drive amplifier substrate 194 as shown in FIG. 19 (b). The frame decoration drive amplifier substrate 194 includes a +9 V creation circuit 194 a that creates +12 V to +9 V DC (DC +9 V, hereinafter referred to as “+9 V”) supplied from the peripheral door relay terminal plate 882. A total of four voltages of +5 V, +12 V, and +24 V supplied from the peripheral door relay terminal plate 882 are supplied to various decoration substrates of the door frame 5 together with +9 V generated by the +9 V forming circuit 194 a.

[8-2-1. Voltage supplied to the payout control board]
The payout control board 4110, as shown in FIG. 18, includes a payout control filter circuit 4110a and the like in addition to the payout control MPU 4120a and the like. The payout control filter circuit 4110 a is supplied with +5 V from the power supply substrate 851 and removes noise from the +5 V. The +5 V is supplied to the capacitor BC1 of the power supply substrate 851 via the diode PD0, and is further supplied to, for example, the payout control MPU 4120a of the payout control unit 4120. For example, +12 V from the power supply substrate 851 is supplied to the payout control input circuit 4120 b and the like of the payout control unit 4120 and is also supplied to the external communication circuit 784 a of the external terminal board 784 through the payout control substrate 4110. The external communication circuit 784a of the external terminal board 784 is a circuit that outputs a signal for transmitting the number of balls of the gaming ball paid out by the pachinko machine 1, gaming information of the pachinko machine 1, etc. to the hall computer installed in the game hall. It is. The hall computer monitors the game of the player by grasping, from the signal output from the external communication circuit 784a, the number of balls of the gaming balls paid out by the pachinko machine 1, gaming information of the pachinko machine 1, and the like. Note that +24 from the power supply substrate 851 is supplied to the main control substrate 4100 via the payout control substrate 4110 without being used in the payout control substrate 4110 at all.

8-2-2. Voltage supplied to main control board]
As shown in FIG. 18, the main control board 4100 includes, in addition to the main control MPU 4100a etc., a +5 V creation circuit 4100g, a main control filter circuit 4100h, a power failure monitoring circuit 4100e etc. The +5 V creation circuit 4100 g is supplied with +12 V from the power supply substrate 851 via the payout control substrate 4110, and creates +5 V which is a control reference voltage of the main control MPU 4100 a from this +12 V. In the main control board 4100, a power supply system to which +5 V generated by the +5 V generation circuit 4100 g is applied and supplied is a +5 V power supply line. In this embodiment, the +5 V power supply line created by the power supply creation circuit 855 d of the power supply substrate 851 and the +5 V power supply line created by the +5 V creation circuit 4100 g of the main control board 4100 are not electrically connected. The +5 V power supply line created by the power supply creation circuit 855 d of the power supply substrate 851 is not electrically connected to various electronic components of the main control substrate 4100, and the +5 V of the main control substrate 4100 is configured. The +5 V power supply line created by the creation circuit 4100 g is not electrically connected to various electronic components such as other boards except the main control board 4100.

  The main control filter circuit 4100 h is supplied with +5 V created by the +5 V creation circuit 4100 g and removes noise from this +5 V. The +5 V is supplied to the capacitor BC0 of the power supply substrate 851 via the diode MD0 and, for example, to the main control MPU 4100a. For example, +12 V from the payout control board 4110 is supplied to the main control input circuit 4100 b and the like, and +24 V from the payout control board 4110 is supplied to the main control solenoid driving circuit 4100 d and the like.

  The power failure monitoring circuit 4100e is supplied with +12 V and +24 V from the power supply substrate 851 via the payout control substrate 4110, and monitors the signs of the +12 V and +24 V power failure or short interruption. When the blackout monitoring circuit 4100e detects the signs of blackouts or instantaneous blackouts of + 12V and + 24V, it outputs a blackout notice signal to the main control MPU 4100a as a blackout notice. The power failure notice signal is input to the payout control MPU 4120 a through the main control substrate 4100 and the payout control input circuit 4120 b of the payout control substrate 4110. Further, the power failure notice signal is input to the peripheral control board 4140 via the main control board 4100. Also, as shown in FIG. 19B, the blackout notice signal is input to the frame decoration drive amplifier board 194 via the peripheral control board 4140, the frame peripheral relay terminal board 868 and the peripheral door relay terminal board 882. At the same time, they are respectively input to the decoration substrate of the door frame and the like through the frame decoration drive amplifier substrate 194.

  In the present embodiment, the power failure monitoring circuit 4100 e applies the voltage to one of the +12 V power line or the +24 V power line by monitoring the voltages applied to the two power lines of the +12 V power line and the +24 V power line. As compared with the case where the voltage to be monitored is monitored, it is possible to more accurately grasp the symptom of the power failure such as a power failure or a momentary power failure.

[9. Main control board circuit]
Next, the circuit etc. of the main control board 4100 shown in FIG. 12 will be described with reference to FIGS. FIG. 20 is a circuit diagram showing a circuit of the main control board, FIG. 21 is a circuit diagram showing a power failure monitoring circuit, and FIG. 22 is a circuit showing an interface circuit for communication between the main control board and the peripheral control board FIG. First, the main control filter circuit 4100h shown in FIG. 18 will be described, and then the power supply created by the main control board 4100, main control system reset, main control crystal oscillator, main control input circuit, power failure monitoring circuit, main control MPU Various input / output signals to and from, and an interface circuit for communication between the main control board 4100 and the peripheral control board 4140 will be described.

  The main control board 4100 includes the main control MPU 4100a, the main control input circuit 4100b, the main control output circuit 4100c, the main control solenoid drive circuit 4100d, the power failure monitoring circuit 4100e, the + 5V creation circuit 4100g, and the main control board 4100 shown in FIGS. In addition to the control filter circuit 4100h, as a peripheral circuit, as shown in FIG. 20, a main control system reset MIC1 that outputs a reset signal, and a main control crystal oscillator MX0 that outputs a clock signal (in this embodiment, 24 MHz (MHz ) Is mainly composed.

9-1. Main control filter circuit]
As shown in FIG. 20, the main control filter circuit 4100 h mainly includes a main control three-terminal filter MIC0. The main control three-terminal filter MIC0 is a T-type filter circuit and is excellent in attenuation characteristics magnetically shielded by ferrite. The main control three-terminal filter MIC0 has its first terminal applied with +5 V created by the +5 V creation circuit 4100 g, its second terminal grounded to ground (GND), and its noise component removed from its third terminal +5 V is output. The +5 V applied to the first terminal is electrically connected at one end to the ground (GND) and the other end of the capacitor MC0 so that the ripple (AC component folded in voltage) is first removed. Are smoothed out.

  The +5 V output from the third terminal is electrically connected to the other end of the capacitor MC1 and the electrolytic capacitor MC2 (in the present embodiment, electrostatic capacity: 470 microfarads (μF)) whose one end is grounded to the ground (GND). The ripple is further removed and smoothed by being connected to. The smoothed +5 V is applied to the power supply terminal of the main control system reset MIC1, the VDD terminal which is the power supply terminal of the main control crystal oscillator MX0, and the VDD terminal which is the power supply terminal of the main control MPU 4100a.

  The VDD terminal of the main control MPU 4100a is electrically connected to the ground (GND) and the other end of the capacitor MC3 grounded, and the +5 V applied to the VDD terminal is smoothed by further removing the ripple. The VSS terminal which is a ground terminal of the main control MPU 4100a is grounded to the ground (GND).

  Further, the VDD terminal of the main control MPU 4100a is electrically connected to the anode terminal of the diode MD0 in addition to being electrically connected to the capacitor MC3. A cathode terminal of the diode MD0 is electrically connected to a VBB terminal which is a power supply terminal of a RAM (main control built-in RAM) built in the main control MPU 4100a, and a capacitor MC4 whose one end is grounded to the ground (GND) It is electrically connected to the other end of the The VBB terminal of the main control built-in RAM is electrically connected to the cathode terminal of the diode MD0 and the other end of the capacitor MC4, and via the resistor MR0, the plus of the capacitor BC0 of the power supply substrate 851 shown in FIG. It is electrically connected to the terminal. That is, +5 V smoothed by removing noise components by the main control filter circuit 4100h is applied to the VDD terminal of the main control MPU 4100a, and via the diode MD0, the VBB terminal of the main control built-in RAM and the capacitor BC0 Is applied to the plus terminal of the As a result, as described above, +12 V generated by the power generation circuit 855 d of the power supply substrate 851 shown in FIG. 18 is not supplied to the +5 V generation circuit 4100 g of the main control substrate 4100 via the payout control substrate 4110, and +5 V is generated. When the circuit 4100 g can not generate +5 V, the charge stored in the capacitor BC 0 is supplied to the main control substrate 4100 as the main VBB, and therefore, the VDD terminal of the main control MPU 4100 a Although the current is blocked by the diode MD0 and does not flow and the main control MPU 4100a does not operate, the main VBB is applied to the VBB terminal of the main control built-in RAM so that the stored contents are held.

9-2. Main control system reset]
As shown in FIG. 20, +5 V smoothed by removing noise components by the main control filter circuit 4100 h is applied to the power supply terminal of the main control system reset MIC1. The main control system reset MIC1 resets the main control MPU 4100a and the main control output circuit 4100ca with a reset function, and has a built-in delay circuit. The delay capacitance terminal of the main control system reset MIC1 is electrically connected to ground (GND) and the other end of the capacitor MC5 connected to ground, and the delay time by the delay circuit is set by the capacitance of the capacitor MC5 It can be done. Specifically, when +5 V input to the power supply terminal reaches a threshold (eg, 4.25 V), the main control system reset MIC1 outputs a system reset signal from the output terminal after the delay time has elapsed.

  The output terminal of the main control system reset MIC1 is electrically connected to the SRST terminal, which is a reset terminal of the main control MPU 4100a, and the reset terminal of the main control output circuit 4100ca with a reset function. The output terminal is an open collector output type, and one end is electrically connected to the other end of the pull-up resistor MR1 electrically connected to the +5 V power supply line, and one end is a capacitor connected to ground (GND) It is electrically connected to the other end of MC6. Ripple is removed and smoothed by the capacitor MC6. When the voltage input to the power supply terminal is higher than the threshold, the output terminal is pulled up to +5 V by the pull-up resistor MR1 and the logic becomes HI. This logic corresponds to the SRST terminal of the main control MPU 4100a and the main control output with reset function The logic becomes LOW when the voltage input to the power supply terminal is smaller than the threshold while being input to the reset terminal of the circuit 4100ca, and this logic corresponds to the SRST terminal of the main control MPU 4100a and the main control output circuit 4100ca with reset function. Respectively input to the reset terminal. Since the SRST terminal of the main control MPU 4100a and the reset terminal of the main control output circuit 4100ca with reset function are negative logic inputs, when the voltage input to the power supply terminal becomes smaller than the threshold, the main control MPU 4100a and the reset function The main control output circuit 4100 ca is reset. The power supply terminal is electrically connected to the ground (GND) and the other end of the capacitor MC7 whose one end is grounded, and +5 V input to the power supply terminal is smoothed by removing the ripple. The ground terminal is grounded to ground (GND), and the NC terminal is not electrically connected to the outside.

9-3. Main control crystal oscillator]
As shown in FIG. 20, +5 V smoothed by removing noise components by the main control filter circuit 4100 h is applied to the VDD terminal which is a power supply terminal of the main control crystal oscillator MX0. The VDD terminal is electrically connected to the ground (GND) and the other end of the capacitor MC8 whose one end is grounded, and +5 V input to the VDD terminal is smoothed by further removing ripples. In addition to the VDD terminal, the smoothed +5 V is also applied to the A terminal, the B terminal, the C terminal, and the ST terminal which are output frequency selection terminals. The main control crystal oscillator MX0 outputs a 24 MHz clock signal from the F terminal which is an output terminal by applying +5 V to the A terminal, B terminal, C terminal and ST terminal respectively.

  The F terminal of the main control crystal oscillator MX0 is electrically connected to the CLK terminal which is the clock terminal of the main control MPU 4100a, and a 24 MHz clock signal is input. The GND terminal, which is the ground terminal of the main control crystal oscillator MX0, is grounded to the ground (GND), and the D terminal for outputting the divided frequency of the F terminal of the main control crystal oscillator MX0 is not electrically connected to the outside It is in the state.

9-4. Main control input circuit]
The main control input circuit 4100 b is the detection signal from the general winning opening switches 3020 and 3020, the upper starting opening switch 3022, the lower starting opening switch 2109, the magnetic detection switch 304, the count switch 2110 and the gate switch 2352 shown in FIG. In addition, it is a circuit to which an operation signal (RAM clear signal) or the like from the operation switch 860a provided on the payout control substrate 4110 shown in FIG. 13 is input. The circuit configuration to which the detection signal from each switch is input is the same, so here, the circuit to which the operation signal (RAM clear signal) from the operation switch 860a is input will be described.

[9-4-1. Circuit to which operation signal (RAM clear signal) from operation switch is input]
First, as described above, the operation switch 860a is a RAM (dispense control built-in RAM) built in the payout control MPU 4120a of the payout control board 4110 within a predetermined period from the time of power on, and main control of the main control board 4100 It is operated when clearing the RAM (main control built-in RAM) built in the MPU 4100a, or when it is notified of an error after the power is turned on, it is operated to cancel the error. A function to clear the RAM within a predetermined period from the time of power on and an error release after power on (after a period of playing the function as a RAM clear, ie after a predetermined period from the time of power on) And the ability to Since the main control board 4100 does not have the function of canceling the error that the payout control board 4110 has, when the operation signal from the operation switch 860a is input within a predetermined period from the time of power on, the main control The main control built-in RAM is cleared by judging it as a RAM clear signal for clearing the built-in RAM.

  When the operation switch 860a is not operated, an operation signal whose logic is LOW is input to the main control board 4100 from the payout control board 4110, while when the operation switch 860a is operated, the logic from the payout control board 4110 is input. An operation signal with “HI” is input from the payout control board 4110 (a detailed description of this point will be described later).

  As shown in FIG. 20, the transmission line for transmitting the operation signal from the operation switch 860a provided on the payout control substrate 4110 within a predetermined period from the time of power on is a pull-up whose one end is electrically connected to the +12 V power supply line It is electrically connected to the other end of the resistor MR2 and to the base terminal of the transistor MTR0 via the resistor MR3. The base terminal of the transistor MTR0 is electrically connected to the resistor MR3, and also electrically connected to the ground (GND) and the other end of the resistor MR4 which is grounded. The emitter terminal of the transistor MTR0 is grounded to the ground (GND), and the collector terminal of the transistor MTR0 is electrically connected to the other end of the resistor MR5 whose one end is electrically connected to the +5 V power supply line and is a non-inverting buffer ICMIC 10 (non-inverted buffer ICMIC 10 includes eight non-inverted buffer circuits, and shapes and outputs without inverting the logic of the signal waveform input to one of them (MIC 10 A).) Main control It is electrically connected to the input terminal PA0 of the input port PA of the MPU 4100a.

  The circuit that outputs the operation signal from the operation switch 860a in the payout control board 4110 is configured as an open collector output type in which the emitter terminal is grounded to the ground (GND), and transmission that transmits the operation signal from the operation switch 860a The line is pulled up to +12 V by the pull-up resistor MR2. In the main control board 4100, when the operation switch 860a is not operated, the operation signal from the payout control board 4110 is pulled down to the ground (GND) side and the logic is input as LOW, while the operation switch 860a is operated. When this is the case, the operation signal from the payout control board 4110 is pulled up to +12 V by the pull-up resistor MR2, and the logic is input as HI.

  The circuit constituted by the resistors MR3 and MR4 and the transistor MTR0 is a switch circuit which is turned on / off by an operation signal from the operation switch 860a.

  When the operation switch 860a is not operated, the operation signal whose logic is LOW is input to the base terminal of the transistor MTR0, whereby the transistor MTR0 is turned off and the switch circuit is also turned off. As a result, the voltage applied to the collector terminal of the transistor MTR0 is pulled up to +5 V by the resistor MR5, and the operation signal from the operation switch 860a whose logic is HI is input to the input terminal PA0 of the input port PA of the main control MPU 4100a. Be done. When the logical value of the operation signal from operation switch 860a input to input terminal PA0 is HI, main control MPU 4100a does not instruct to perform the RAM clear for erasing the information stored in the main control internal RAM. to decide.

  On the other hand, when the operation switch 860a is operated, an operation signal pulled up to +12 V by the pull-up resistor MR2 and the logic becomes HI is input to the base terminal of the transistor MTR0, thereby turning on the transistor MTR0 The circuit is also turned on. As a result, the voltage applied to the collector terminal of the transistor MTR0 is pulled down to the ground (GND) side and the logic becomes LOW. The operation signal from the operation switch 860a is input to the input terminal PA0 of the input port PA of the main control MPU 4100a. Be done. The main control MPU 4100a instructs the RAM clear to erase the information stored in the main control built-in RAM when the logical value of the operation signal from the operation switch 860a input to the input terminal PA0 is LOW. I will judge.

  The operation signal from the operation switch 860a is pulled up to +12 V by the pull-up resistor MR2. This is because the operation signal from the operation switch 860a is input through the payout control board 4110. That is, between the substrates of the main control substrate 4100 and the delivery control substrate 4110, in order to suppress the influence of noise intruding into the wiring (harness) electrically connecting the substrates, the voltage is higher than +5 V which is the control reference voltage. The voltage of +12 V is used to increase the signal reliability. Therefore, in the present embodiment, detection signals from the general winning opening switch 3020, the upper starting opening switch 3022, and the lower starting opening switch 2109, which are directly input to the main control board 4100, are pulled up to +5 V by pull-up resistance. On the other hand, detection signals from the magnetic detection switch 3024, the count switch 2110, the general winning opening switch 3020, and the gate switch 2352, which are input through the panel relay terminal plate 4161 shown in FIG. 12, are directly transmitted to the main control board 4100. Since it is not input, it is pulled up to the +12 V side by the pull-up resistor, similarly to the operation signal from the operation switch 860a.

9-5. Blackout monitoring circuit]
As shown in FIG. 18, the main control board 4100 is supplied with two voltages of +12 V and +24 V from the power supply board 851 via the payout control board 4110, and +12 V and +24 V are input to the power failure monitoring circuit 4100e. ing. The blackout monitoring circuit 4100e monitors + 12V and + 24V blackouts or indications of a blackout, and detects a blackout or blackout as a blackout notice as a blackout notice, in addition to the main control MPU 4100a, a payout control board. It is output to the payout control MPU 4120 a of 4110 and the peripheral control board 4140. Here, first, the configuration of the power failure monitoring circuit will be described, and then monitoring of a +24 V power failure or a momentary power failure, monitoring of a +12 V power failure or a momentary power failure, and output of a power failure notice signal will be described.

[9-5-1. Configuration of blackout monitoring circuit]
As shown in FIG. 21, the power failure monitoring circuit 4100e mainly includes a shunt type stabilized power supply circuit MIC20, an open collector output type comparator MIC21, a D type flip flop MIC22, and transistors MTR20 to MTR23.

  The REF terminal which is a reference voltage input terminal of the shunt stabilized power supply circuit MIC20 and the K terminal which is a cathode terminal are electrically connected to the other end of the resistor MR20 whose one end is electrically connected to the +5 V power supply line +5 V is applied, and the current input to the REF terminal is limited by the resistor MR20. The K terminal outputs a reference voltage Vref (in this embodiment, 2.495 V is set), which is a comparison reference voltage of the comparator MIC21. The K terminal is electrically connected to the ground (GND) and the other end of the capacitor MC20 grounded at one end, and the reference voltage Vref output from the K terminal is rippled by the capacitor MC20 AC component is removed and smoothed. The A terminal, which is the anode terminal of the shunt-type stabilized power supply circuit MIC20, is grounded to the ground (GND).

  The comparator MIC21 includes two voltage comparison circuits, one of which (MIC21A) is used to compare the monitor voltage V1 of +24 V with the reference voltage Vref, and the remaining one (MIC21B) is used. , And used to compare the monitor voltage V2 of +12 V with the reference voltage Vref. The monitor voltage V1 of +24 V is applied to the third terminal which is the plus terminal of the MIC 21A, and the reference voltage Vref is applied to the second terminal which is the minus terminal of the MIC 21A. The monitor voltage V2 of +12 V is applied to the fifth terminal which is the plus terminal of the MIC 21B, and the reference voltage Vref is applied to the sixth terminal which is the minus terminal of the MIC 21B. These comparison results are input to the D-type flip flop MIC22. The D-type flip-flop MIC22 includes two D-type flip-flop circuits, one of which (MIC22A) is used in the present embodiment. The Vcc terminal, which is the power supply terminal of the comparator MIC21, is electrically connected to the ground (GND) and the other end of the capacitor MC21, which is grounded. The +5 V applied to the Vcc terminal, which is the power supply terminal of the comparator MIC21, is Ripple is removed and smoothed by the capacitor MC21, and the GND terminal which is the ground terminal of the comparator MIC21 is grounded to the ground (GND).

[9-5-2. Monitoring of +24 V blackout or momentary interruption]
As described above, the monitoring of the +24 V blackout or instantaneous blackout is performed by the MIC 21A of the comparator MIC 21 comparing the +24 V monitoring voltage V1 with the reference voltage Vref. The third terminal, which is the plus terminal of the MIC 21A of the comparator MIC21 to which the monitor voltage V1 of +24 V is applied, has one end connected to the other end of the resistor MR21 electrically connected to the +24 V power supply line and one end. Is electrically connected to the other end of the resistor MR22 which is grounded to the ground (GND), and the other ends of the resistors MR21 and MR22, and the other end of the capacitor MC23 whose one end is grounded to the ground (GND) Are electrically connected. The +24 V monitoring voltage V1 applied to the third terminal which is the plus terminal of the MIC 21 A of the comparator MIC 21 is divided by +24 V by the resistance ratio of the resistors MR 21 and MR 22, and the capacitor MC 23 removes the ripple and smoothes it. . The values of the resistances MR21 and MR22 become a power failure detection voltage V1 pf (in this embodiment, set to 21.40 V) which is set in advance when the +24 V fails or momentarily stops, and the voltage starts dropping from +24 V. At this time, the monitor voltage V1 of +24 V is set to have the same value as the reference voltage Vref.

  The first terminal which is the output terminal of the MIC 21A of the comparator MIC 21 is an open collector output, and one end thereof is electrically connected to the other end of the pull-up resistor MR23 electrically connected to the +5 V power supply line, One end is electrically connected to the ground (GND) and the other end of the capacitor MC24, and is electrically connected to the PR terminal which is a preset terminal of the D-type flip flop MIC22. The capacitor MC24 plays a role as a low pass filter.

  When the voltage of +24 V is larger than the power failure detection voltage V1 pf, the monitor voltage V1 of +24 V becomes larger than the reference voltage Vref, and the voltage applied to the first terminal which is the output terminal of MIC 21A of the comparator MIC 21 is +5 V by the pull-up resistor MR23. The signal which is pulled to the side and the logic becomes HI is input to the PR terminal which is a preset terminal of the D type flip flop MIC22.

  On the other hand, when the voltage of +24 V is smaller than the power failure detection voltage V1pf, the monitor voltage V1 of +24 V becomes smaller than the reference voltage Vref, and the voltage applied to the first terminal which is the output terminal of the MIC 21A of the comparator MIC21 is ground (GND) The signal pulled down to the side and the logic becomes LOW is input to the PR terminal which is the preset terminal of the D-type flip-flop MIC22.

[9-5-3. Monitoring of +12 V blackout or instantaneous blackout]
As described above, the monitoring of the +12 V blackout or instantaneous blackout is performed by the MIC 21B of the comparator MIC 21 comparing the +12 V monitoring voltage V2 with the reference voltage Vref. As shown in FIG. 21, the fifth terminal, which is the plus terminal of the MIC 21 B of the comparator MIC 21 to which the monitor voltage V 2 of +12 V is applied, has one end and the other end of the resistor MR 24 electrically connected to the +12 V power supply line, Is electrically connected to the other end of the resistor MR25 which is grounded to the ground (GND), and the other ends of the resistors MR24 and MR25, and the other end of the capacitor MC25 whose one end is grounded to the ground (GND) Are electrically connected. The +12 V monitoring voltage V2 applied to the fifth terminal which is the plus terminal of the MIC 21 B of the comparator MIC 21 is +12 V divided by the resistance ratio of the resistors MR 24 and MR 25 and the ripple is removed by the capacitor MC 25 and smoothed. . The values of the resistors MR24 and MR25 become a power failure detection voltage V2pf (in this embodiment, set to 10.47 V) which is set in advance when the +12 V causes a power failure or a momentary power failure and the voltage starts dropping from the +12 V. At this time, the monitor voltage V2 of +12 V is set to have the same value as the reference voltage Vref.

  The seventh terminal, which is the output terminal of the MIC 21 B of the comparator MIC 21, is an open-collector output, and is electrically connected to the first terminal, which is the output terminal of the MIC 21 A described above. Of the D-type flip-flop MIC22, which is electrically connected to the other end of the pull-up resistor MR23 connected at one end and electrically connected to the ground (GND) and the other end of the capacitor MC24 connected to ground. It is electrically connected to the terminal PR. As described above, the capacitor MC24 plays a role as a low pass filter.

  When the +12 V voltage is higher than the power failure detection voltage V2 pf, the +12 V monitoring voltage V2 becomes larger than the reference voltage Vref, and the voltage applied to the seventh terminal, which is the output terminal of the MIC 21 B of the comparator MIC 21, is +5 V by the pull-up resistor MR23. The signal which is pulled to the side and the logic becomes HI is input to the PR terminal which is a preset terminal of the D type flip flop MIC22.

  On the other hand, when the voltage of +12 V is smaller than the power failure detection voltage V2pf, the monitor voltage V2 of +12 V becomes smaller than the reference voltage Vref, and the voltage applied to the seventh terminal which is the output terminal of the MIC 21B of the comparator MIC 21 is ground (GND) The signal pulled down to the side and the logic becomes LOW is input to the PR terminal which is the preset terminal of the D-type flip-flop MIC22.

[9-5-4. Output of blackout notice signal]
The D-type flip flop MIC22 stores the value (logic) of the signal input to the D input terminal 1D terminal by the change of the edge of the clock signal input to the clock input terminal 1CK terminal, and this stored value While outputting (logic) from the 1Q terminal which is an output terminal, a value obtained by inverting the stored value (logic) is output from a negative logic 1Q terminal which is an output terminal. In addition, when a signal whose logic is LOW is input to the CLR terminal which is a clear terminal, the D type flip-flop MIC22 releases the latch state and the logic of the signal input to the PR terminal which is a preset terminal is The inverted signal is output from the 1Q terminal, which is the output terminal (at this time, the same as the logic of the signal inverted from the logic of the signal output from 1Q, that is, the signal input to the PR terminal, which is the preset terminal. When the signal whose logic has become HI is input to the CLR terminal which is a clear terminal, the latch state is set. Also, when the D type flip-flop MIC22 is configured to input a signal whose logic is HI to the CLR terminal which is a clear terminal to set the latch state, the logic is LOW to the PR terminal which is a preset terminal. When the signal that is input is input, the state in which the signal whose logic is HI is output from the 1Q terminal which is the output terminal is maintained (at this time, the signal obtained by inverting the logic of the signal output from 1Q is negative logic 1) Maintain the output state from the Q terminal).

  In this embodiment, the D-type flip-flop MIC22 is grounded at the 1D terminal, which is the D input terminal, and the 1CK terminal, which is the clock input terminal, to the ground (GND). The circuit is configured so that there is no change in the edge of the input clock signal, and the value (logic) of the signal input to the 1D terminal that is the D input terminal is stored and not output from the 1Q terminal that is the output terminal. ing. As described above, the D-type flip-flop MIC22 receives a signal from the first terminal, which is the output terminal of the MIC 21A of the comparator MIC21 that monitors a +24 V power failure or a momentary power failure, as described above Alternatively, a signal from the seventh terminal, which is the output terminal of the MIC 21B of the comparator MIC21 that monitors a momentary power failure, is input, and a signal is output from the 1Q terminal, which is the output terminal, based on these signals. The Vcc terminal, which is a power supply terminal, is electrically connected to the ground (GND) and the other end of the capacitor MC22, which is grounded, and is applied to the Vcc terminal, which is a power supply terminal of the D type flip-flop MIC22. Ripple is removed by capacitor MC22 and +5 V is smoothed, and the GND terminal which is the ground terminal is grounded with the ground (GND), and the negative logic 1Q terminal which inverts the logic of the 1Q terminal which is the output terminal is the external It is in an unconnected state.

  In the D type flip-flop MIC22, in the present embodiment, a power failure clear signal from the main control MPU 4100a is input to the CLR terminal which is a clear terminal through the main control output circuit 4100ca with a reset function. The power failure clear signal is started to be output and stopped after a predetermined time has elapsed in the main control side power-on process to be described later performed by the main control MPU 4100a. Since the CLR terminal is a negative logic input, the power failure clear signal from the main control MPU 4100a is input to the CLR terminal as its logic becomes LOW via the main control output circuit 4100ca with a reset function. The D type flip flop MIC22 is configured to release the latch state when the power failure clear signal is input to the CLR terminal, and at this time, the logic input to the PR terminal as the preset terminal is inverted to output the output terminal. Output from the 1Q terminal.

  On the other hand, when the output of the power failure clear signal from the main control MPU 4100a is stopped, the logic thereof becomes HI via the main control output circuit 4100ca with a reset function, and is input to the CLR terminal. When the power failure clear signal is not input to the CLR terminal, the D-type flip flop MIC22 sets the latch state, and the logic becomes LOW at the PR terminal to latch the input state.

  The 1Q terminal, which is the output terminal of D-type flip-flop MIC22, is electrically connected to input terminal PA1 of input port PA of main control MPU 4100a through main control input circuit 4100b, and is the output terminal of D-type flip-flop MIC22 A signal output from the 1Q terminal is input to the input terminal PA1 of the input port PA of the main control MPU 4100a as a power failure advance notification signal. Further, the 1Q terminal which is the output terminal of D type flip flop MIC22 is electrically connected to the main control output circuit 4100 cb without reset function, and the signal outputted from the 1 Q terminal which is the output terminal of D type flip flop MIC22 is reset The non-function main control output circuit 4100cb outputs it as a payout blackout notice signal to the payout control board 4110, and outputs it as a peripheral blackout notice signal to the peripheral control board 4140.

  The main control input circuit 4100b electrically connecting the 1Q terminal which is the output terminal of the D type flip flop MIC22 to the input terminal PA1 of the input port PA of the main control MPU 4100a is, as shown in FIG. The 1Q terminal which is the output terminal of the MIC 22 is electrically connected to the other end of the resistor MR26 whose one end is electrically connected to the +5 V power supply line and electrically connected to the base terminal of the transistor MTR20 via the resistor MR27. It is connected. The base terminal of the transistor MTR20 is electrically connected to the resistor MR27, and also electrically connected to the ground (GND) and the other end of the resistor MR28 which is grounded. The emitter terminal of the transistor MTR20 is grounded to the ground (GND), and the collector terminal of the transistor MTR20 is electrically connected to the other end of the resistor MR29 electrically connected to the +5 V power supply line at one end and also non-inverting buffer ICMIC 23 (non-inverted buffer ICMIC 23 includes eight non-inverted buffer circuits, and shapes and outputs without inverting the logic of the signal waveform input to one of them (MIC 23A).) Main control It is electrically connected to the input terminal PA1 of the input port PA of the MPU 4100a.

  The circuit constituted by the resistors MR27 and MR28 and the transistor MTR20 is a switch circuit which is turned on / off by a signal outputted from the 1Q terminal which is an output terminal of the D type flip flop MIC22.

  When the logic of the signal output from the 1Q terminal which is the output terminal of the D type flip-flop MIC22 is LOW, the voltage applied to the base terminal of the transistor MTR20 is pulled down to the ground (GND) side and the transistor MTR20 turns off. The switch circuit is also turned off. On the other hand, when the logic of the signal outputted from the 1Q terminal which is the output terminal of the D type flip flop MIC22 is HI, the voltage applied to the base terminal of the transistor MTR20 is pulled up to +5 V side, and the transistor MTR20 is turned on. The switch circuit is also turned on.

  When both the condition that the voltage of + 24V is larger than the power failure detection voltage V1pf and the condition that the voltage of + 12V is larger than the power failure detection voltage V2pf are satisfied, the signal whose logic becomes HI is preset by the D type flip flop MIC22 Since the signal output from the 1Q terminal, which is the output terminal of the D-type flip flop MIC22, is input to the base terminal of the transistor MTR20 because the logic thereof is LOW and is input to the base terminal of the transistor MTR20. Turn off. As a result, the voltage applied to the collector terminal of the transistor MTR20 is pulled up to +5 V by the resistor MR29, and the power failure notice signal whose logic becomes HI via the non-inverting buffer ICMIC23 is the input terminal of the input port PA of the main control MPU 4100a It is input to PA1.

  On the other hand, when either of the conditions that the voltage of +24 V is smaller than the power failure detection voltage V1pf and the condition that the voltage of +12 V is smaller than the power failure detection voltage V2pf, the signal whose logic is LOW is D The signal output from the 1Q terminal, which is the output terminal of the D type flip flop MIC22, is input to the base terminal of the transistor MTR20 as its logic becomes HI because it is input to the PR terminal, which is the preset terminal of the type flip flop MIC22. As a result, the transistor MTR20 is turned on. As a result, the voltage applied to the collector terminal of the transistor MTR20 is pulled down to the ground (GND) side, and the power failure notice signal whose logic becomes LOW via the non-inverting buffer ICMIC 23 is the input terminal of the input port PA of the main control MPU 4100a It is input to PA1.

  Further, as shown in FIG. 21, the main control output circuit 4100cb having no reset function for outputting a signal outputted from the 1Q terminal which is an output terminal of the D type flip flop MIC22 to the payout control board 4110 as a payout blackout notification signal is open. The output terminal of the D type flip-flop MIC22 is electrically connected to the resistor MR26 of the main control input circuit 4100b described above, and the transistor MTR21 of the previous stage is connected via the resistor MR30. It is electrically connected to the base terminal. The base terminal of the transistor MTR21 of the previous stage is electrically connected to the resistor MR30, and also electrically connected to the ground (GND) and the other end of the resistor MR31 which is grounded. The emitter terminal of the transistor MTR21 of the previous stage is grounded to the ground (GND), and the collector terminal of the transistor MTR21 of the previous stage is electrically connected to the other end of the resistor MR32 whose one end is electrically connected to the +5 V power supply line At the same time, it is electrically connected to the base terminal of the transistor MTR22 in the rear stage via the resistor MR33. The base terminal of the rear-stage transistor MTR22 is electrically connected to the resistor MR33, and also electrically connected to the ground (GND) and the other end of the resistor MR34 which is grounded. The emitter terminal of the transistor MTR22 in the rear stage is grounded to ground (GND), and the collector terminal of the transistor MTR22 in the rear stage is electrically connected to the ground (GND) and the other end of the capacitor MC26 grounded. It is electrically connected to the payout control board 4110 via the (harness). When the collector terminal of the transistor MTR22 in the latter stage is electrically connected to the payout control substrate 4110 through the wiring (harness), the payout control input of the payout control unit 4120 shown in FIG. 13 in the payout control substrate 4110. In circuit 4120b, one end is electrically connected to the other end of the pull-up resistor (not shown) electrically connected to the +12 V power supply line, and the input terminal of the predetermined input port of payout control MPU 4120a shown in FIG. Connected.

  The circuit formed of the resistors MR30 and MR31 and the transistor MTR21 of the previous stage is a switch circuit of the former stage, and the circuit formed of the resistors MR33 and MR34 and the transistor MTR22 of the latter stage is a switch circuit of the latter stage. It is turned on / off by a signal output from the 1Q terminal which is an output terminal of the MIC 22.

  When the logic of the signal output from the 1Q terminal which is the output terminal of the D type flip flop MIC22 is LOW, the voltage applied to the base terminal of the transistor MTR21 of the previous stage is pulled down to the ground (GND) side and the transistor of the previous stage The MTR 21 is turned off, and the switch circuit in the previous stage is also turned off, and the voltage applied to the collector terminal of the transistor MTR21 in the previous stage, which is the voltage applied to the base terminal of the transistor MTR22 in the subsequent stage, is pulled up to +5 V by the resistor MR32. As a result, the transistor MTR22 in the rear stage is turned on, and the switch circuit in the rear stage is also turned on. On the other hand, when the logic of the signal outputted from the 1Q terminal which is the output terminal of the D type flip flop MIC22 is HI, the voltage applied to the base terminal of the transistor MTR21 is pulled up to +5 V side, and the transistor MTR21 is turned on. The switch circuit in the previous stage is also turned on, and the voltage applied to the collector terminal of the transistor MTR21 in the previous stage, which is the voltage applied to the base terminal of the transistor MTR22 in the subsequent stage, is lowered to the ground (GND) side. The transistor MTR22 is turned off, and the switch circuit in the subsequent stage is also turned off.

  When both the condition that the voltage of + 24V is larger than the power failure detection voltage V1pf and the condition that the voltage of + 12V is larger than the power failure detection voltage V2pf are satisfied, the signal whose logic becomes HI is preset by the D type flip flop MIC22 The signal output from the 1Q terminal, which is the output terminal of the D-type flip-flop MIC22, is input to the base terminal of the transistor MTR21 of the previous stage because its logic becomes LOW because the signal is input to the PR terminal, which is the terminal. Transistor MTR21 turns off. As a result, the voltage applied to the collector terminal of the transistor MTR21 in the front stage is pulled up to +5 V by the resistor MR32 and applied to the base terminal of the transistor MTR22 in the rear stage, thereby turning on the transistor MTR22 in the rear stage. As a result, the voltage applied to the collector terminal of the transistor MTR22 in the subsequent stage is pulled down to the ground (GND) side in the payout control substrate 4110 via the wiring (harness), and the payout blackout notification signal whose logic is LOW is dispensed It is input to the control board 4110.

  On the other hand, when either of the conditions that the voltage of +24 V is smaller than the power failure detection voltage V1pf and the condition that the voltage of +12 V is smaller than the power failure detection voltage V2pf, the signal whose logic is LOW is D The signal output from the 1Q terminal, which is the output terminal of the D-type flip-flop MIC22, is input to the PR terminal, which is the preset terminal of the type flip-flop MIC22, and the logic thereof becomes HI to the base terminal of the transistor MTR21 of the previous stage. The transistor MTR21 in the previous stage is turned ON by being input. As a result, the voltage applied to the collector terminal of the transistor MTR21 in the front stage is lowered to the ground (GND) and applied to the base terminal of the transistor MTR22 in the rear stage, thereby turning off the transistor MTR22 in the rear stage. As a result, the voltage applied to the collector terminal of the transistor MTR22 in the latter stage is pulled up to +12 V by the pull-up resistor in the payout control input circuit 4120b of the payout control unit 4120 in the payout control substrate 4110 via the wiring (harness) A payout blackout notice signal whose logic is HI is input to the payout control board 4110.

  Also, as shown in FIG. 21, the main control output circuit 4100 cb having no reset function for outputting a signal output from the 1Q terminal, which is the output terminal of the D type flip flop MIC22, to the peripheral control board 4140 as a peripheral power failure notice signal is open. The circuit is configured as a collector output type, and the 1Q terminal which is the output terminal of the D type flip flop MIC22 is electrically connected to the resistor MR26 of the main control input circuit 4100b described above, and the base terminal of the transistor MTR23 via the resistor MR35 And are electrically connected. The base terminal of the transistor MTR23 is electrically connected to the resistor MR35, and also electrically connected to the ground (GND) and the other end of the resistor MR36 which is grounded. The emitter terminal of the transistor MTR23 is grounded to the ground (GND), and the collector terminal of the transistor MTR23 is electrically connected to the peripheral control substrate 4140 via a wiring (harness). When the collector terminal of transistor MTR23 is electrically connected to peripheral control board 4140 via a wiring (harness), a peripheral control input circuit (not shown) of peripheral control unit 4150 in peripheral control board 4140 shown in FIG. , And one end is electrically connected to the other end of the pull-up resistor (not shown) electrically connected to the +12 V power supply line, and electrically connected to the input terminal of the predetermined input port of peripheral control MPU 4150a shown in Connected

  The circuit constituted by the resistors MR35 and MR36 and the transistor MTR23 is a switch circuit which is turned on / off by a signal outputted from the 1Q terminal which is an output terminal of the D type flip flop MIC22.

  When the logic of the signal outputted from the 1Q terminal which is the output terminal of the D type flip flop MIC22 is LOW, the voltage applied to the base terminal of the transistor MTR23 is pulled down to the ground (GND) side and the transistor MTR23 turns off. The switch circuit is also turned off. On the other hand, when the logic of the signal outputted from the 1Q terminal which is the output terminal of the D type flip flop MIC22 is HI, the voltage applied to the base terminal of the transistor MTR23 is pulled up to +5 V side, and the transistor MTR23 is turned on. The switch circuit is also turned on.

  When both the condition that the voltage of + 24V is larger than the power failure detection voltage V1pf and the condition that the voltage of + 12V is larger than the power failure detection voltage V2pf are satisfied, the signal whose logic becomes HI is preset by the D type flip flop MIC22 Since the signal output from the 1Q terminal, which is the output terminal of the D-type flip-flop MIC22, is input to the base terminal of the transistor MTR23 because its logic is LOW and is input to the base terminal of the transistor MTR23. Turn off. As a result, the voltage applied to the collector terminal of the transistor MTR23 is pulled up to +12 V by the pull-up resistor in the payout control input circuit of the peripheral control unit 4150 in the peripheral control board 4140 via the wiring (harness) The peripheral power failure notice signal is input to the peripheral control board 4140.

  On the other hand, when either of the conditions that the voltage of +24 V is smaller than the power failure detection voltage V1pf and the condition that the voltage of +12 V is smaller than the power failure detection voltage V2pf, the signal whose logic is LOW is D The signal output from the 1Q terminal, which is the output terminal of the D type flip flop MIC22, is input to the base terminal of the transistor MTR23 as its logic becomes HI because it is input to the PR terminal, which is the preset terminal of the type flip flop MIC22. As a result, the transistor MTR23 is turned on. As a result, the voltage applied to the collector terminal of the transistor MTR23 is pulled down to the ground (GND) side in the peripheral control board 4140 via the wiring (harness), and the peripheral power failure notification signal whose logic is LOW is the peripheral control board. It is input to 4140.

  Thus, the main control input circuit 4100b which transmits the signal outputted from the 1Q terminal which is the output terminal of the D type flip flop MIC22 to the main control MPU 4100a as a power failure notice signal, and the 1Q terminal which is the output terminal of the D type flip flop MIC22 The reset control-free main control output circuit 4100cb outputs the signal output from the peripheral control board 4140 as a peripheral power failure notice signal, and there is one transistor in each, and the power failure notice signal input to the main control MPU 4100a and the peripheral While the logic with the peripheral power failure notice signal input to the control board 4140 is the same logic, the signal output from the 1Q terminal which is the output terminal of the D-type flip flop MIC22 is dispensed to the payout control board 4110 No reset function to output as a power failure notice signal Main There are two transistors in the control output circuit 4100cb at the former and latter stages, and the logic of the payout blackout notice signal is the logic of the blackout notice signal input to the main control MPU 4100a and the peripheral blackout notice input to the peripheral control board 4140 It is a logic obtained by inverting the logic of the signal, and is different from the logic of the power failure notification signal and the logic of the peripheral power failure notification signal.

  The collector terminal of transistor MTR20 of main control input circuit 4100b is electrically connected to the other end of resistor MR29, one end of which is electrically connected to the +5 V power supply line, and main control MPU 4100a via non-inverting buffer ICMIC23. The collector terminal of the transistor MTR22 at the rear stage of the main control output circuit 4100cb without the reset function is electrically connected to the input terminal PA1 of the input port PA of the second embodiment via the wiring (harness). In the dispensing control input circuit 4120b of the dispensing control unit 4120 in 4110, one end is electrically connected to the other end of the pull-up resistor electrically connected to the +12 V power supply line, and the main control output circuit 4100cb having no reset function The collector terminal of the transistor MTR23 is Wiring through a (harness), the payout control input circuit of the peripheral control unit 4150 in the peripheral control board 4140, which is a pull-up resistor electrically connected to one end of which is connected + 12V power supply line and electrically. This is because the transistor MTR20 of the main control input circuit 4100b and the main control MPU 4100a are connected between the collector terminal of the transistor MTR20 of the main control input circuit 4100b and the input terminal PA1 of the input port PA of the main control MPU 4100a. Since it is mounted on the 4100, the main control board 4100 and the payout control board are used to make a blackout notice by the logic (ON / OFF signal) of the blackout notice signal using +5 V which is the control reference voltage of the main control MPU 4100a. In order to suppress the influence of noise intruding into the wiring (harness) electrically connecting the substrates between the substrates with the substrate 4110 and between the substrates of the main control substrate 4100 and the peripheral control substrate 4140, the main control MPU 4100a, Payout control MPU 4120a and peripheral control MPU 4150a Is performed blackout notice by the logic of a control reference voltage + 5V is at a higher voltage than the + with 12V power failure warning signal (ON / OFF signal).

9-6. Various input / output signals to main control MPU]
Next, various input / output signals to the main control MPU 4100a will be described with reference to FIG. The serial data input terminal of the serial control port of the main control MPU 4100a receives serial data from the payout control board 4110 shown in FIG. 12 as a payment serial data reception signal via the main control input circuit 4100b. . On the other hand, the TXA terminal and TXB terminal which are serial data output terminals of the serial output port of the main control MPU 4100a do not have the reset function as the main payment serial data transmission signal and transmit the main data to the payout control board 4110 from the TXA terminal. The circuit 4100cb transmits the main payment serial data transmission signal from the main control output circuit 4100cb to the payout control board 4110 without the reset function, and the serial data to be transmitted to the peripheral control board 4140 shown in FIG. A main circuit serial data transmission signal is transmitted from the main control output circuit 4100cb having no reset function as a peripheral serial data transmission signal to the main control output circuit 4100cb having no reset function to the peripheral control board 4140.

  In addition to the operation signal (RAM clear signal) described above being input to each input terminal of the predetermined input port of the main control MPU 4100a, for example, a payout that indicates the normal reception completion of the main payment serial data reception signal A payer ACK signal from control board 4110 is input through main control input circuit 4100b, and detection signals from various switches such as upper start port switch 3022 shown in FIG. 12 are each input through main control input circuit 4100b. Input, etc.

  On the other hand, from each output terminal of the predetermined output port of the main control MPU 4100a, for example, a main payment ACK signal notifying the completion of normal reception of the above-described payee serial data reception signal is output to the main control output circuit 4100ca with a reset function The main control output circuit 4100ca with reset function outputs a main payment ACK signal to the payout control board 4110, or the drive signal to the main control output circuit 4100ca with reset function for the start port solenoid 2105 shown in FIG. To output a drive signal from the main control output circuit 4100ca with reset function to the start port solenoid 2105 via the main control solenoid drive circuit 4100d, and various displays such as the upper special symbol display 1185 shown in FIG. Drive signal to the main control output circuit 4100ca with reset function. Output to the equally and outputs a drive signal respectively to various indicator from resetting function main control output circuit 4100Ca.

9-7. Interface circuit for communication between main control board and peripheral control board]
Next, a communication interface circuit between the main control board 4100 and the peripheral control board 4140 will be described with reference to FIG. The main control board 4100 is supplied with +12 V from the power supply board 851 shown in FIG. 18 via the payout control board 4110, and the +5 V creation circuit 4100 g creates +5 V which is a control reference voltage of the main control MPU 4100a from this +12 V. ing. The main cycle serial data transmission signal transmitted from the main control board 4100 to the peripheral control board 4140 is affected by noise intruding into the wiring (harness) electrically connecting the main control board 4100 and the peripheral control board 4140. In order to suppress this, the reliability is enhanced by transmitting using +12 V which is a voltage higher than +5 V which is a control reference voltage of the main control MPU 4100 a.

  Specifically, the main control board 4100 causes the main control output circuit 4100cb without reset function to function as a communication interface circuit, and the communication interface circuit mainly includes the resistor MR50, the resistors MR51 and MR52, and the transistor MTR50. It is done. On the other hand, in the peripheral control substrate 4140, as a communication interface circuit, a diode AD10, an electrolytic capacitor AC10 (in the present embodiment, electrostatic capacity: 47 μF), and a photocoupler AIC10 (infrared LED and photo IC) are incorporated. Is mainly configured.).

  The +12 V supplied from the power supply substrate 851 is applied to the anode terminal of the diode MD50 of the main control substrate 4100 via the payout control substrate 4110, and the cathode terminal of the diode MD50 is grounded to the ground (GND). It is electrically connected to the positive terminal of the electrolytic capacitor MC50 (in the present embodiment, the capacitance: 220 microfarads (.mu.F)). The cathode terminal of the diode MD50 is electrically connected to the positive terminal of the electrolytic capacitor MC50, and electrically connected to the anode terminal (No. 1 terminal) of the photocoupler AIC10 of the peripheral control substrate 4140 via a wiring (harness). It is connected to the. Thereby, for example, when the power from power supply substrate 851 is not supplied to main control substrate 4100 via discharge control substrate 4110 due to a power failure or a momentary stop, the charge stored in electrolytic capacitor MC50 is generated. The voltage can be continuously applied to the anode terminal of the photocoupler AIC 10 of the peripheral control substrate 4140 from the main control substrate 4100 as + 12V.

  As described above, when a power failure or an instantaneous stop occurs in the power supply terminal VDD of the main control MPU 4100a, the electrolytic capacitor MC2 (in the present embodiment, the electrostatic capacitance: 470 μF) shown in FIG. The main charge serial transmission port 4100ae built in the main control MPU 4100a at least serial-controls the command set by the main control CPU core 4100aa in its transmission buffer register 4100aeb. The data can be transferred to the transmission shift register 41 aea by the unit 4100 aec and transmission complete as main cycle serial data from the transmission shift register 4100 aea.

  The main cycle serial data transmission signal sent from the main control board 4100 to the peripheral control board 4140 is, as described above, to the wiring (harness) electrically connecting the main control board 4100 and the peripheral control board 4140. In order to suppress the influence of intruding noise, the reliability is enhanced by transmitting using +12 V which is a voltage higher than +5 V which is a control reference voltage of the main control MPU 4100 a.

  Therefore, in the present embodiment, when a power failure or a momentary interruption occurs, the charge stored in the electrolytic capacitor MC50 is applied as +12 V from the main control substrate 4100 to the anode terminal of the photocoupler AIC10 of the peripheral control substrate 4140. Because the main control MPU 4100a is incorporated in the main control MPU 4100a, the serial management unit 4100 aec transfers the command set by the main control CPU core 4100 aa in the transmission buffer register 4100 aeb to the transmission shift register 41 aea for transmission When transmission is performed from the shift register 4100aea as main cycle serial data, a main cycle serial data transmission signal whose logic is HI can be transmitted from the collector terminal of the transistor MTR50 at +12 V.

  In this embodiment, the storage capacity of the transmission buffer register 4100 aeb of the main transmission serial transmission port 4100 ae incorporated in the main control MPU 4100 a has 32 bytes, and one packet is composed of 3 bytes of data Therefore, data of 10 packets at maximum is stored in the transmission buffer register 4100 aeb. Further, in this embodiment, the transfer bit rate of the main cycle serial data transmitted from the main control MPU 4100a is set to 19200 bps.

  The cathode terminal (third terminal) of the photocoupler AIC10 is electrically connected to the collector terminal of the transistor MTR50 of the main control board 4100 via the resistor AR10 and its wiring (harness). The resistor AR10 of the peripheral control board 4140 is a limiting resistor for limiting the current flowing to the built-in infrared LED of the photocoupler AIC10.

  The TXB terminal for outputting the main cycle serial data transmission signal from the main control MPU 4100a shown in FIG. It is electrically connected to the base terminal of the transistor MTR50 through the same. The base terminal of the transistor MTR50 is electrically connected to the resistor MR51, and also electrically connected to the ground (GND) and the other end of the resistor MR52 which is grounded. The emitter terminal of the transistor MTR50 is grounded to the ground (GND).

  The circuit formed of resistors MR51 and MR52 and transistor MTR50 is a switch circuit, and when the logic of the main cycle serial data transmission signal is HI, the voltage applied to the base terminal of transistor MTR50 is on the ground (GND) side. When pulled down, the transistor MTR50 is turned off and the switch circuit is also turned off. As a result, no current flows in the forward direction to the built-in infrared LED of the photocoupler AIC10 of the peripheral control substrate 4140, so the photocoupler AIC10 is turned off. On the other hand, when the logic of the main cycle serial data transmission signal is LOW, the voltage applied to the base terminal of the transistor MTR50 is pulled up to +5 V by the resistor MR50, the transistor MTR50 is turned ON, and the switch circuit is also turned ON. . As a result, a forward current flows in the built-in infrared LED of the photocoupler AIC10 of the peripheral control substrate 4140, so the photocoupler AIC10 is turned ON.

  The +5 V supplied from the power supply substrate 851 is applied to the anode terminal of the diode AD10 of the peripheral control substrate 4140 through the frame peripheral relay terminal plate 868, and the cathode terminal of the diode AD10 is connected to the ground (GND). It is electrically connected to the positive terminal of the electrolytic capacitor AC10 to be grounded. The cathode terminal of the diode AD10 is electrically connected to the positive terminal of the electrolytic capacitor AC10, and also electrically connected to the Vcc terminal (the sixth terminal) which is a power supply terminal of the photocoupler AIC10. The emitter terminal (No. 4 terminal) of the photocoupler AIC10 is grounded to the ground (GND), and the collector terminal (No. 5 terminal) of the photocoupler AIC10 is electrically connected to the positive terminal of the electrolytic capacitor AC10. It is pulled up to the +5 V side by the AR 11 and electrically connected to the input terminal of the serial control I / O port for the main control board of the peripheral control MPU 4150 a. When the photocoupler AIC10 is turned ON / OFF, the logic of the signal output from the collector terminal of the photocoupler AIC10 changes, and the signal is used as a main cycle serial data transmission signal. Is input to the input terminal of.

  Thereby, as described above, for example, when +5 V supplied from the power supply substrate 851 is not supplied to the peripheral control substrate 4140 via the frame peripheral relay terminal plate 868 by a power failure or a momentary power failure, The charge stored in the electrolytic capacitor AC10 can be continuously applied as the +5 V to the Vcc terminal of the photocoupler AIC10. The main cycle serial data transmission signal transmitted from the TXB terminal of the main control MPU 4100a to the peripheral control board 4140 is applied to the main control MPU 4100a when +5 V is applied from the electrolytic capacitor AC10 when a power or instantaneous interruption occurs. The data set in the transmission buffer register 4100 aeb of the built-in main cycle serial transmission port 4100 ae can be transmitted completely, and the main cycle serial data transmission signal in the middle of transmission, that is, the main cycle serial data is cut off The peripheral control board 4140 is reliably received without being lost or being dropped.

  When the logic of the main cycle serial data transmission signal transmitted from the TXB terminal of main control MPU 4100a to peripheral control substrate 4140 is HI, the voltage applied to the base terminal of transistor MTR50 is pulled down to the ground (GND) side and the transistor Since the photocoupler AIC10 is turned off when the MTR 50 is turned off, the voltage applied to the collector terminal of the photocoupler AIC10 is pulled up to +5 V by the pull-up resistor AR11 and the logic becomes HI. Logic of the main cycle serial data transmission signal transmitted from the TXB terminal of the main control MPU 4100a to the peripheral control board 4140 while the serial data transmission signal is input to the input terminal of the main control board serial I / O port of the peripheral control MPU 4150a When is LOW Is applied to the collector terminal of the photocoupler AIC10 because the voltage applied to the base terminal of the transistor MTR50 is pulled up to +5 V by the resistor MR50 and the transistor MTR50 is turned ON to turn on the photocoupler AIC10. The main voltage serial data transmission signal whose voltage is pulled down to the ground (GND) side and the logic becomes LOW is input to the input terminal of the main control board serial I / O port of the peripheral control MPU 4150a. Thus, the logic of the main cycle serial data transmission signal output from the collector terminal of the photocoupler AIC10 is the same as the logic of the main cycle serial data transmission signal transmitted to the peripheral control board 4140 from the TXB terminal of the main control MPU 4100a. It is the logic of

  As described above, in this embodiment, the +5 V power supply line to which +5 V which is the control reference voltage of the main control MPU 4100a is applied, and the +12 V power supply line to which +12 V which is the communication voltage applied via the diode MD50 is applied. However, measures are taken when the control reference voltage and the communication voltage drop due to the occurrence of a power failure or an instantaneous power failure. That is, for the main cycle serial transmission port 4100ae built in the main control MPU 4100a, the +5 V power supply line, and the plus terminal of the electrolytic capacitor MC2 using the electrolytic capacitor MC2 of the main control filter circuit 4100h as the first auxiliary power, Are electrically connected in parallel, and even if a power failure or a momentary interruption occurs and the control reference voltage applied from the +5 V power supply line decreases, the electrolytic capacitor of the main control filter circuit 4100h which is the first auxiliary power supply By applying the control reference voltage from the plus terminal of MC2, the state in which the control reference voltage is applied can be maintained, and is configured from resistance MR50, resistance MR51, MR52, and transistor MTR50. Reset function to function as a communication interface circuit For the output circuit 4100 cb, +12 V applied to the +12 V power supply line is applied to the anode terminal of the diode MD50 as a communication voltage, and the cathode terminal of the diode MD50 and the plus of the electrolytic capacitor MC50 which is the second auxiliary power supply Even if a voltage for communication applied from the +12 V power supply line via the diode MD 50 drops due to a power failure or a momentary interruption due to the parallel connection of the terminal and the circuit, the second auxiliary power supply By applying the communication voltage from the plus terminal of the electrolytic capacitor MC50, the state in which the communication voltage is applied can be maintained. Thereby, it is possible to prevent the disconnection of the command being transmitted from the main control board 4100 to the peripheral control board 4140 and to prevent the dropout, so the peripheral control board 4140 reliably receives the command being transmitted. can do. Therefore, it is possible to eliminate the dropout of the command immediately after the occurrence of the power failure or at the momentary power failure.

  Further, a plurality of commands set in the transmission buffer register 4100 aeb of the main transmission serial transmission port 4100 ae incorporated in the main control MPU 4100 a are all constituted of the resistance MR50, the resistances MR51 and MR52, and the transistor MTR50 as main transmission serial data. 470 μF is set as the capacitance of the electrolytic capacitor MC2 of the main control filter circuit 4100h so that transmission to the peripheral control board 4140 can be completed via the reset function-free main control output circuit 4100cb that functions as a communication interface circuit. And 220 μF is set as the electrostatic capacitance of the electrolytic capacitor MC50. As a result, even if a power failure or momentary stoppage occurs during transmission from the main control board 4100 to the peripheral control board 4140, all the commands set in the transmission buffer register 4100aeb are functioned as interface circuits as main cycle serial data. Since the transmission to the peripheral control board 4140 can be completed via the function-free main control output circuit 4100 cb, the peripheral control board 4140 may drop without dropping or disconnecting a plurality of commands set in the transmission buffer register 4100 aeb. Can be received reliably.

[10. Circuit of payout control board]
Next, the circuit etc. of the payout control board 4110 shown in FIG. 13 will be described with reference to FIGS. FIG. 23 is a circuit diagram showing the circuit etc. of the payout control unit, FIG. 24 is a circuit diagram showing the payout control input circuit, FIG. 25 is a circuit diagram showing the continuation of FIG. 27 is a circuit diagram showing a CR unit input / output circuit, and FIG. 28 is an input / output diagram showing various input / output signals with the main control board and various output signals to the external terminal board. It is. First, the payout control filter circuit will be described, and then the circuit of the payout control unit, various input / output signals with the main control board, and various output signals to the external terminal board will be described.

10-1. Dispensing control filter circuit]
As shown in FIG. 23, the payout control filter circuit 4110a mainly includes a payout control 3-terminal filter PIC0. This payout control three-terminal filter PIC0 is a T-type filter circuit and is excellent in attenuation characteristics magnetically shielded by ferrite. The first terminal of the payout control 3-terminal filter PIC0 is applied with +5 V from the power supply substrate 851 shown in FIG. 18 and electrically connected at one end to the ground (GND) and the other end of the capacitor PC0 grounded. The capacitor PC0 removes +5 V from the power supply substrate 851 first to remove ripple (AC component folded to voltage) and smoothes the voltage. The second terminal of the payout control 3-terminal filter PIC0 is grounded with the ground (GND), and the third terminal of the payout control 3-terminal filter PIC0 outputs +5 V from which the noise component is removed.

  The third terminal of the payout control 3-terminal filter PIC0 has one end connected to ground (GND), the other end of the capacitor PC1 and the other end of the electrolytic capacitor PC2 (in the present embodiment, electrostatic capacity: 180 microfarads (μF)) By being electrically connected to each other, ripples are further removed from +5 V output from the third terminal of the payout control three-terminal filter PIC0 and smoothed. The smoothed +5 V is applied to the power supply terminal of the payout control system reset PIC1, the VCC terminal as the power supply terminal of the payout control crystal oscillator PX0, and the VDD terminal as the power supply terminal of the payout control MPU 4120a, which will be described later. .

  The VDD terminal of the payout control MPU 4120a is electrically connected to the ground (GND) and the other end of the capacitor PC3 whose one end is grounded, and +5 V applied to the VDD terminal is smoothed with the ripple removed by the capacitor PC3 ing. The VSS terminal, which is the ground terminal of the payout control MPU 4120a, is grounded to the ground (GND).

  The VDD terminal of the payout control MPU 4120a is electrically connected to the anode terminal of the diode PD0 in addition to being electrically connected to the capacitor PC3. The cathode terminal of the diode PD0 is electrically connected to a VBB terminal which is a power supply terminal of a RAM (a discharge control built-in RAM) built in the discharge control MPU 4120a, and a capacitor PC4 having one end grounded (ground). It is electrically connected to the other end of the The VBB terminal of the discharge control built-in RAM is electrically connected to the cathode terminal of the diode PD0 and the other end of the capacitor PC4, and via the resistor PR0, the plus of the capacitor BC1 of the power supply substrate 851 shown in FIG. It is electrically connected to the terminal. That is, +5 V smoothed by removing noise components by the payout control filter circuit 4110a is applied to the VDD terminal of the payout control MPU 4120a, and the VBB terminal of the payout control internal RAM and the capacitor BC1 via the diode PD0. Is applied to the plus terminal of the Thus, as described above, when +5 V generated by the power supply generation circuit 855d of the power supply substrate 851 shown in FIG. 18 is not supplied to the payout control substrate 4110, the charge stored in the capacitor BC1 is paid off. Because it is supplied to the payout control board 4110 as a current, the diode PD0 blocks the current to the VDD terminal of the payout control MPU 4120a and the payout control MPU 4120a does not operate, but the VBB terminal of the payout control built-in RAM The stored contents are kept by applying a payment VBB.

10-2. Circuit of payout control section]
The payout control unit 4120 is reset as a peripheral circuit as shown in FIG. 23, in addition to the payout control MPU 4120a, the payout control input circuit 4120b, the payout control output circuit 4120c, the payout motor drive circuit 4120d and the CR unit input / output circuit 4120e. A payout control system reset PIC1 that outputs a signal and a payout control crystal oscillator PX0 (8 MHz in this embodiment) that outputs a clock signal are mainly configured. Here, the payout control system reset will be described first, and then the payout control crystal oscillator, the payout control input circuit, the payout motor drive circuit, the CR unit input / output circuit, and various input / output signals to the payout control MPU will be described.

[10-2-1. Dispensing control system reset]
As shown in FIG. 23, +5 V smoothed by removing noise components by the payout control filter circuit 4110a is applied to the power supply terminal of the payout control system reset PIC1. The payout control system reset PIC1 is for resetting the payout control MPU 4120a and the payout control output circuit 4120ca with a reset function, and has a built-in delay circuit. One end of the delay capacitance terminal of the payout control system reset PIC1 is electrically connected to the ground (GND) and the other end of the capacitor PC5, and the delay time of the delay circuit is set by the capacitance of the capacitor PC5. It can be done. Specifically, when +5 V input to the power supply terminal reaches a threshold (for example, 4.25 V), the payout control system reset PIC1 outputs a system reset signal from the output terminal after the delay time has elapsed.

  The output terminal of the payout control system reset PIC1 is electrically connected to the SRT0 terminal, which is a reset terminal of the payout control MPU 4120a, and the reset terminal of the payout control output circuit 4120ca with a reset function. The output terminal is an open collector output type, and one end thereof is electrically connected to the other end of pull-up resistor PR1 electrically connected to the +5 V power supply line, and one end is a capacitor connected to ground (GND) It is electrically connected to the other end of the PC 6. The capacitor PC6 plays a role as a low pass filter. When the voltage input to the power supply terminal is higher than the threshold, the output terminal is pulled up to +5 V by the pull-up resistor PR1 and the logic becomes HI. This logic corresponds to the SRT0 terminal of the payout control MPU 4120a and the payout control output with reset The logic becomes LOW when the voltage input to the power supply terminal is smaller than the threshold while being input to the reset terminal of the circuit 4120ca, and this logic corresponds to the SRT0 terminal of the payout control MPU 4120a and the payout control output circuit 4120ca with reset function. Respectively input to the reset terminal. Because the SRT0 terminal of the payout control MPU 4120a and the reset terminal of the payout control output circuit 4120ca with reset function are negative logic inputs, the payout control MPU 4120a and the reset function are operated when the voltage input to the power supply terminal becomes smaller than the threshold. A reset is applied to the attached payout control output circuit 4120 ca. The power supply terminal is electrically connected to the ground (GND) and the other end of the capacitor PC7, and +5 V input to the power supply terminal is smoothed by removing the ripple. The ground terminal is grounded to ground (GND), and the NC terminal is not electrically connected to the outside.

10-2-2. Dispensing Control Crystal Oscillator]
As shown in FIG. 23, +5 V smoothed by removing the noise component by the payout control filter circuit 4110a is input to the VCC terminal which is a power supply terminal of the payout control crystal oscillator PX0. The VCC terminal is electrically connected to the ground (GND) and the other end of the capacitor PC8 at one end, and +5 V input to the VCC terminal is smoothed by removing ripples further. In addition to the VCC terminal, the smoothed +5 V is also applied to the OE terminal which is an output enable terminal of the payout control crystal oscillator PX0. The payout control crystal oscillator PX0 outputs a clock signal of 8 MHz from an OUT terminal which is an output terminal by applying +5 V to its OE terminal.

  The OUT terminal of the payout control crystal oscillator PX0 is electrically connected to the MCLK terminal which is a clock terminal of the payout control MPU 4120a, and a clock signal of 8 MHz is input to the payout control MPU 4120a. The GND terminal, which is the ground terminal of the payout control crystal oscillator PX0, is grounded with the ground (GND).

[10-2-3. Dispensing control input circuit]
The payout control input circuit 4120b receives the payout blackout notice signal from the blackout monitor circuit 4100e provided in the door frame open switch 618, the main body frame open switch 619 shown in FIG. 13 and the main control board 4100 shown in FIG. The circuit includes a handle relay terminal board 192 shown in FIG. 13, a circuit to which a detection signal from the full switch 550 is input through the power supply substrate 851, and a circuit to which an operation signal from the operation switch 860a is input. First, the circuit to which the detection signal from the door frame opening switch is input will be described, and subsequently, the circuit to which the detection signal from the body frame opening switch is input, and the circuit to which the payout blackout notification signal from the blackout monitoring circuit is input, A circuit to which a detection signal from a full switch is input and a circuit to which an operation signal from an operation switch is input will be described. In addition, since various detection switches such as the full tank switch 550 and the out-of-ball switch 750, the count switch 751, and the rotation angle switch 752 shown in FIG. Since the circuit configuration to which the detection signal of is input is substantially the same, here, a circuit to which the detection signal from the full switch is input will be described.

[10-2-3 (a). Circuit to which detection signal from door frame open switch is input]
The door frame opening switch 618 uses a normally closed type (normally closed (NC)), and when the door frame 5 is opened from the main body frame 3 as shown in FIG. The switch 5 is turned off (disconnected) in a state where the body frame 3 is closed. The second terminal of the door frame open switch 618 is grounded to the ground (GND), while the first terminal of the door frame open switch 618 is other than the pull-up resistor PR20 whose one end is electrically connected to the +5 V power supply line. It is electrically connected to the end and electrically connected to the base terminal of the transistor PTR20 via the resistor PR21. The base terminal of the transistor PTR20 is electrically connected to the resistor PR21, and also electrically connected to the ground (GND) and the other end of the resistor PR22 which is grounded. Further, the first terminal of the door frame open switch 618 is electrically connected to the pull-up resistor PR20, and also electrically connected to the ground (GND) and the other end of the capacitor PC20 which is grounded. . The emitter terminal of transistor PTR20 is grounded to ground (GND), and the collector terminal of transistor PTR20 is electrically connected to the other end of resistor PR23, one end of which is electrically connected to the +5 V power supply line, and a non-inverting buffer ICPIC 20 (non-inverted buffer ICPIC 20 includes eight non-inverted buffer circuits, and shapes and outputs without inverting the logic of the signal waveform input to one of the (PIC 20 A)). It is electrically connected to the input terminal PA0 of the input port PA of the MPU 4120a. When the transistor PTR20 is turned ON / OFF, the logic of the signal output from the collector terminal of the transistor PTR20 changes, and the signal is input as the door open signal to the input terminal PA0 of the input port PA of the payout control MPU 4120a.

  Further, the first terminal of the door frame open switch 618 is pulled up to +5 V by the pull-up resistor PR20 and electrically connected to the base terminal of the transistor PTR20 through the resistor PR21, and on the +5 V side by the pull-up resistor PR20. And is electrically connected to the base terminal of the transistor PTR21 via the resistor PR24. The base terminal of the transistor PTR21 is electrically connected to the resistor PR24, and also electrically connected to the ground (GND) and the other end of the resistor PR25 which is grounded. The emitter terminal of the transistor PTR21 is grounded to the ground (GND), and the collector terminal of the transistor PTR21 is electrically connected to the external terminal plate 784 via a wiring (harness). When the collector terminal of the transistor PTR21 is electrically connected to the external terminal board 784 via a wiring (harness), one end of the external terminal board 784 is electrically connected to the +12 V power supply line, not shown. It is electrically connected to the other end of the up resistor. When the transistor PTR21 is turned ON / OFF, the logic of the signal output from the collector terminal of the transistor PTR21 changes, and the signal is input to the external terminal board 784 as an outer end frame door open information output signal.

  Further, the first terminal of the door frame open switch 618 is pulled up to +5 V by the pull-up resistor PR20 and electrically connected to the base terminal of the transistor PTR20 through the resistor PR21, and on the +5 V side by the pull-up resistor PR20. And is electrically connected to the base terminal of the transistor PTR21 through the resistor PR24, and is pulled up to +5 V by the pull-up resistor PR20 and electrically connected to the base terminal of the transistor PTR22 through the resistor PR26. ing. The base terminal of the transistor PTR22 is electrically connected to the resistor PR26, and also electrically connected to the ground (GND) and the other end of the resistor PR27 which is grounded. The emitter terminal of the transistor PTR22 is grounded to the ground (GND), and the collector terminal of the transistor PTR22 is electrically connected to the main control board 4100 shown in FIG. 12 via a wiring (harness). When the collector terminal of the transistor PTR22 is electrically connected to the main control board 4100 through a wiring (harness), one end of the main control input circuit 4100b of the main control board 4100 shown in FIG. It is electrically connected to the other end of a pull-up resistor (not shown) electrically connected to the line. As the transistor PTR22 is turned ON / OFF, the logic of the signal output from the collector terminal of the transistor PTR22 changes, and the signal is input to the main control board 4100 as a main frame door open signal.

  The circuit composed of the pull-up resistor PR20 and the capacitor PC20 is a switch signal generating circuit, and when the door frame 5 is opened from the main body frame 3 or when the door frame 5 is closed to the main body frame 3, The contact constituting the door frame opening switch 618 is configured as a circuit also having a function of absorbing the fluctuation of the voltage from the door frame opening switch 618 due to the fluttering phenomenon of repeating ON / OFF for a short time.

  A circuit composed of resistors PR21 and PR22 and transistor PTR20, a circuit composed of resistors PR24 and PR25 and transistor PTR21, and a circuit composed of resistors PR26 and PR27 and transistor PTR22 It is a switch circuit which is turned on / off by a detection signal from 618.

  In the state where the door frame 5 is opened from the main body frame 3, since the door frame open switch 618 is ON, the voltage applied to the base terminal of the transistor PTR20 is pulled down to the ground (GND) side. It turns off and the switch circuit also turns off. As a result, a voltage applied to the collector terminal of the transistor PTR20 is pulled up to +5 V by the pull-up resistor PR23, and a door frame open signal whose logic is HI is input to the input terminal PA0 of the input port PA of the payout control MPU 4120a. Ru. Further, in a state where the door frame 5 is opened from the main body frame 3, the door frame open switch 618 is ON, so that the voltage applied to the base terminal of the transistor PTR21 is pulled down to the ground (GND) side. The PTR 21 is turned off and the switch circuit is also turned off. Thus, the voltage applied to the collector terminal of the transistor PTR21 is pulled up to +12 V by the pull-up resistor of the external terminal plate 784 through the wiring (harness), and the outer end frame door open information output signal whose logic is HI Is input to the external terminal board 784. Further, in a state where the door frame 5 is opened from the main body frame 3, the door frame open switch 618 is ON, so that the voltage applied to the base terminal of the transistor PTR22 is pulled down to the ground (GND) side. The PTR 22 is turned off and the switch circuit is also turned off. As a result, the voltage applied to the collector terminal of the transistor PTR22 is pulled up to +12 V by the pull-up resistance of the main control input circuit 4100b of the main control board 4100 via the wiring (harness), and the logic becomes HI. A door open signal is input to the main control board 4100.

  On the other hand, when the door frame 5 is closed from the main body frame 3, the door frame open switch 618 is off, so that the voltage applied to the base terminal of the transistor PTR20 is pulled up to +5 V by the pull-up resistor PR20. Thus, the transistor PTR20 is turned on, and the switch circuit is also turned on. As a result, the door frame open signal in which the voltage applied to the collector terminal of the transistor PTR20 is pulled down to the ground (GND) side and the logic becomes LOW is input to the input terminal PA0 of the input port PA of the payout control MPU 4120a. Further, in a state where the door frame 5 is closed from the main body frame 3, since the door frame open switch 618 is off, the voltage applied to the base terminal of the transistor PTR21 is pulled up to +5 V side to turn on the transistor PTR21. And the switch circuit is also turned on. As a result, the voltage applied to the collector terminal of the transistor PTR21 is pulled down to the ground (GND) side and the logic becomes LOW. Further, in a state where the door frame 5 is closed from the main body frame 3, since the door frame open switch 618 is off, the voltage applied to the base terminal of the transistor PTR22 is pulled up to +5 V side to turn on the transistor PTR22. And the switch circuit is also turned on. As a result, the main frame door open signal in which the voltage applied to the collector terminal of the transistor PTR22 is pulled down to the ground (GND) side and the logic becomes LOW is input to the main control board 4100.

  As described above, when the door frame 5 is opened from the main body frame 3, the door frame open switch 618 is turned on, whereby the door frame open signal whose logic is HI is the input terminal of the input port PA of the payout control MPU 4120 a. An outer end frame door open information output signal input to PA0 and having logic HI is input to the external terminal board 784, and a main frame door open signal having logic HI is input to the main control board 4100, In the state where the door frame 5 is closed to the main body frame 3, the door frame open switch 618 is turned off, and a door frame open signal whose logic is LOW is input to the input terminal PA 0 of the input port PA of the payout control MPU 4120 a An outer end frame door open information output signal whose logic is LOW is input to the external terminal board 784, and a main frame door open signal whose logic is LOW is input to the main control board 4100.

[10-2-3 (b). Circuit to which detection signal from main frame open switch is input]
The body frame open switch 619 uses a normally closed type (normally closed (NC)), and the switch is turned on (conductive) in a state where the body frame 3 is opened from the outer frame 2 shown in FIG. When 3 is closed to the outer frame 2, the switch is turned off (disconnected). The second terminal of the main frame opening switch 619 is grounded to the ground (GND), while the first terminal of the main frame opening switch 619 is the other of the pull-up resistor PR28 whose one end is electrically connected to the +5 V power supply line. It is electrically connected to the end and electrically connected to the base terminal of the transistor PTR23 through the resistor PR29. The base terminal of the transistor PTR23 is electrically connected to the resistor PR29, and one end is electrically connected to the ground (GND) and the other end of the resistor PR30 which is grounded. The first terminal of the body frame open switch 619 is electrically connected to the pull-up resistor PR28, and also electrically connected to the ground (GND) and the other end of the capacitor PC21 which is grounded. . The emitter terminal of the transistor PTR23 is grounded to the ground (GND), and the collector terminal of the transistor PTR23 is electrically connected to the collector terminal of the transistor PTR21 described above, and connected with the external terminal plate 784 via a wiring (harness). It is electrically connected. When the collector terminal of the transistor PTR23 is electrically connected to the external terminal board 784 through a wiring (harness), one end of the external terminal board 784 is electrically connected to the +12 V power supply line, and not shown. It is electrically connected to the other end of the up resistor. As the transistor PTR23 turns ON / OFF, the logic of the signal output from the collector terminal of the transistor PTR23 changes, and the signal is input to the external terminal plate 784 as an outer end frame door open information output signal.

  The No. 1 terminal of the body frame open switch 619 is pulled up to +5 V by the pull-up resistor PR28 and electrically connected to the base terminal of the transistor PTR23 through the resistor PR29, and on the +5 V side by the pull-up resistor PR28. And is electrically connected to the base terminal of the transistor PTR24 via the resistor PR31. The base terminal of the transistor PTR24 is electrically connected to the resistor PR31, and also electrically connected to the ground (GND) and the other end of the resistor PR32 which is grounded. The emitter terminal of the transistor PTR24 is grounded to the ground (GND), and the collector terminal of the transistor PTR24 is electrically connected to the collector terminal of the transistor PTR22 described above and is shown in FIG. 12 via a wiring (harness). It is electrically connected to the main control board 4100. When the collector terminal of the transistor PTR24 is electrically connected to the main control board 4100 via a wiring (harness), one end of the main control input circuit 4100b of the main control board 4100 shown in FIG. It is electrically connected to the other end of a pull-up resistor (not shown) electrically connected to the line. When the transistor PTR24 is turned ON / OFF, the logic of the signal output from the collector terminal of the transistor PTR24 changes, and the signal is input to the main control board 4100 as a main frame door open signal.

  The circuit composed of the pull-up resistor PR28 and the capacitor PC21 is a switch signal generating circuit, and when the body frame 3 is opened from the outer frame 2, or when the body frame 3 is closed to the outer frame 2, The contact constituting the main body frame open switch 619 is configured as a circuit also having a function of absorbing the fluctuation of the voltage from the main body frame open switch 619 due to the fluttering phenomenon of repeating ON / OFF for a short time.

  The circuit composed of the resistors PR 29 and PR 30 and the transistor PTR 23 and the circuit composed of the resistors PR 31 and PR 32 and the transistor PTR 24 are switch circuits that are turned on / off by a detection signal from the main body frame open switch 619.

  When the main body frame 3 is released from the outer frame 2, the main body frame open switch 619 is ON, so that the voltage applied to the base terminal of the transistor PTR23 is pulled down to the ground (GND) side. It turns off and the switch circuit also turns off. Thus, the voltage applied to the collector terminal of the transistor PTR23 is pulled up to +12 V by the pull-up resistor of the external terminal board 784 through the wiring (harness), and the outer end frame door open information output signal whose logic is HI Is input to the external terminal board 784. Further, when the main body frame 3 is opened from the outer frame 2, the main body frame open switch 619 is ON, so that the voltage applied to the base terminal of the transistor PTR 24 is pulled down to the ground (GND) side. The PTR 24 is turned off and the switch circuit is also turned off. Thereby, the voltage applied to the collector terminal of the transistor PTR24 is pulled up to +12 V by the pull-up resistance of the main control input circuit 4100b of the main control board 4100 via the wiring (harness), and the logic becomes HI. A door open signal is input to the main control board 4100.

  On the other hand, when the main body frame 3 is closed to the outer frame 2, the main body frame open switch 619 is off, so that the voltage applied to the base terminal of the transistor PTR23 is pulled up to +5 V by the pull-up resistor PR28. Thus, the transistor PTR23 is turned on, and the switch circuit is also turned on. As a result, the voltage applied to the collector terminal of the transistor PTR23 is pulled down to the ground (GND) side in the external terminal plate 784 via the wiring (harness), and the outer end frame door open information output signal whose logic is LOW is It is input to the external terminal board 784. Further, when the main body frame 3 is closed to the outer frame 2, the main body frame open switch 619 is off, so that the voltage applied to the base terminal of the transistor PTR24 can be pulled up to +5 V by the pull-up resistor PR28. Thus, the transistor PTR24 is turned on, and the switch circuit is also turned on. As a result, the voltage applied to the collector terminal of the transistor PTR24 is pulled down to the ground (GND) side in the main control board 4100 via the wiring (harness), and the main frame door open signal whose logic is LOW is the main control board It is input to 4100.

  As described above, when the main body frame 3 is opened from the outer frame 2, when the main body frame open switch 619 is turned on, the outer end frame door open information output signal whose logic is HI is input to the external terminal board 784 The main frame door open signal whose logic has become HI is input to the main control board 4100, while the main body frame 3 is closed to the outer frame 2, the main body frame open switch 619 is turned OFF to The outer end frame door open information output signal with the LOW being input is input to the external terminal board 784, and the main frame door open signal with the logic set to LOW is input to the main control board 4100.

  In the present embodiment, as described above, one or both of the state in which the door frame 5 is closed to the main body frame 3 and the state in which the main body frame 3 is opened from the outer frame 2. Even in this case, since the main frame door open signal is input to the main control board 4100, the main control MPU 4100a of the main control board 4100 shown in FIG. Although it can not be determined whether the door frame 5 is open from the main body frame 3 or the main body frame 3 is open from the outer frame 2 on the basis of the door frame 5 and / or It can be determined that a state in which the player does not occur during normal game that the main body frame 3 is open is generated, and the external terminal frame 784 has an outer end frame door open information output signal. This outer end is designed to be input The door open information output signal is transmitted to the hall computer through the external terminal board 784, and the hall computer is in a state where the door frame 5 is opened from the main body frame 3 based on the outer end frame door open information output signal, Or although it can not be determined whether the main body frame 3 is in the state of being released from the outer frame 2, there is a state where the player that the door frame 5 and / or the main body frame 3 is open does not occur during the normal game. It can be determined that it is occurring.

  Further, in the present embodiment, as described above, the door frame opening switch 618 and the main body frame opening switch 619 are normally closed switches, so that the door frame opening switch 618 is shorted for some reason and the switch is turned on ( Even in the state of conduction, the door frame 5 is opened from the body frame 3, and the body frame open switch 619 is shorted for some reason and the switch is turned on (conduction), the body frame 3 is in a state of being released from the outer frame 2. As described above, by adopting the door frame open switch 618 and the main body frame open switch 619 as a normally closed switch, the main frame door open signal can be output to the main control board 4100 even at the time of a short circuit, and the outer end A frame door open information output signal can be transmitted to the hall computer via the external terminal board 784.

  When the door frame opening switch 618 and the body frame opening switch 619 are replaced with a normally closed switch (normally open (NO)) switch (door frame opening switch 618 'and body frame opening switch 619') The door frame opening switch 618 'is turned on (conductive) in a state where the door frame 5 is closed from the main body frame 3, and is turned off (disconnected) in a state where the door frame 5 is opened to the main body frame 3. . When the main body frame 3 is closed from the outer frame 2, the switch is turned on (conductive) and when the main body frame 3 is opened to the outer frame 2, the switch is turned off (disconnected). Then, even if the door frame opening switch 618 'is broken for some reason and the switch is turned off (disconnected), the door frame 5 is kept open from the main body frame 3, and the main body for some reason Even when the frame opening switch 619 'is disconnected and the switch is turned OFF (disconnected), the main frame 3 is opened from the outer frame 2. As described above, even when the door frame opening switch 618 'and the body frame opening switch 619' are normally open switches, the main frame door opening signal can be output to the main control board 4100 even at the time of disconnection. The outer end frame door open information output signal can be transmitted to the hall computer via the external terminal board 784.

[10-2-3 (c). Circuit to which the delivery blackout notice signal from the blackout monitoring circuit is input]
The transmission line for transmitting the delivery blackout notice signal from the blackout monitoring circuit 4100e included in the main control board 4100 is electrically connected to the other end of the pull-up resistor PR40 electrically connected to the +12 V power supply line at one end and It is electrically connected to the base terminal of the transistor PTR40 through the PR41. The base terminal of the transistor PTR40 is electrically connected to the resistor PR41, and also electrically connected to the ground (GND) and the other end of the resistor PR42 which is grounded. The emitter terminal of transistor PTR40 is grounded to ground (GND), and the collector terminal of transistor PTR40 is electrically connected to the other end of resistor PR43, one end of which is electrically connected to the +5 V power supply line, and a non-inverting buffer ICPIC 40 (non-inverted buffer ICPIC 40 includes eight non-inverted buffer circuits, and shapes and outputs without inverting the logic of the signal waveform input to one of the (PIC 40 A)). It is electrically connected to the input terminal PA1 of the input port PA of the MPU 4120a. When the transistor PTR40 is turned ON / OFF, the logic of the signal output from the collector terminal of the transistor PTR40 changes, and the signal is input as the payout failure notification signal to the input terminal PA1 of the input port PA of the payout control MPU 4120a.

  A circuit configured of the resistors PR41 and PR42 and the transistor PTR40 is a switch circuit that is turned on / off by a payout blackout notification signal from the blackout monitoring circuit 4100e included in the main control board 4100.

  As described above, the blackout monitoring circuit 4100e monitors the signs of blackouts or instantaneous blackouts of two voltages of +12 V and + 24V from the power supply substrate 851, and detects no signs of blackouts or instantaneous blackouts, and does not have a reset function. A payout blackout notice signal is output to the payout control board 4110 as a blackout notice via the main control output circuit 4100 cb. The blackout monitoring circuit 4100e monitors the signs of blackouts or instantaneous blackouts of the + 12V and + 24V voltages, and as described above, the condition that the + 24V voltage is larger than the blackout detection voltage V1pf, and the + 12V voltage is higher than the blackout detection voltage V2pf When both conditions of large condition are satisfied, the voltage applied to the collector terminal of the transistor MTR22 in the subsequent stage is pulled down to the ground (GND) side in the payout control substrate 4110 through the wiring (harness), and the logic is LOW. While the paid out blackout notification signal is input to the payout control board 4110, one of the conditions that the voltage of + 24V is smaller than the blackout detection voltage V1pf and the condition that the voltage of + 12V is smaller than the blackout detection voltage V2pf When the condition is met, the transistor MTR22 Payout power failure warning signal of the voltage applied to the collector terminal wiring logic by via (harness) is pulled up to + 12V side by the pull-up resistor PR40 described above it becomes HI is input to the payout control board 4110.

  When both the condition that the voltage of + 24V is larger than the detection failure voltage V1pf and the condition that the voltage + 12V is larger than the detection failure voltage V2pf are satisfied, that is, there is no sign of a blackout or an instantaneous blackout At the same time, since the payout blackout notification signal whose logic has become LOW is input to the payout control substrate 4110, the voltage applied to the base terminal of the transistor PTR40 is pulled down to the ground (GND) side, and the transistor PTR40 is turned OFF. The voltage applied to the collector terminal of the transistor PTR40 is pulled up to the +5 V side by the resistor PR43. As a result, the payout blackout notification signal whose logic has become HI from the collector terminal of the transistor PTR40 is input to the input terminal PA1 of the input port PA of the payout control MPU 4120a.

  On the other hand, when one of the conditions that the voltage of +24 V is smaller than the power failure detection voltage V1pf and the condition that the voltage of +12 V is smaller than the power failure detection voltage V2pf, that is, +12 V and / or +24 V When there is a sign of a power failure or a momentary power failure, a payout blackout notification signal whose logic has become HI is input to the payout control board 4110, and is thus applied to the base terminal of the transistor PTR40 by the payout blackout notification signal from the blackout monitoring circuit 4100e. Is pulled up to +12 V by the pull-up resistor PR40, the transistor PTR40 is turned on, and the voltage applied to the collector terminal of the transistor PTR40 is pulled down to the ground (GND) side. As a result, the payout blackout notification signal in which the logic of the collector terminal of the transistor PTR 40 becomes LOW is input to the input terminal PA 1 of the input port PA of the payout control MPU 4120 a.

  Thus, when there is a sign of a power failure or a momentary loss of voltage of +12 V and / or +24 V, a payout blackout notification signal whose logic has become HI is input to the input terminal PA1 of the input port PA of the payout control MPU 4120a, When there is no sign of a power failure or a momentary power failure of the voltages of +12 V and +24 V, a payout blackout notification signal whose logic has become LOW is input to the input terminal PA1 of the input port PA of the payout control MPU 4120a. This is because, as described above, when there is a sign of a power failure or a momentary loss of voltage of +12 V and / or +24 V, a power failure notice signal whose logic is HI is input to input terminal PA1 of input port PA of main control MPU 4100a. On the other hand, when there is no indication of a power failure or a momentary loss of voltage of +12 V and +24 V, a power failure notification signal is input to the input terminal PA1 of the input port PA of the main control MPU 4100a. The logic of the payout blackout notification signal input to the payout control MPU 4120a and the logic of the blackout notification signal input to the main control MPU 4100a are the same logic.

[10-2-3 (d). Circuit to which detection signal from full tank switch is input]
A detection signal from the full switch 550 provided in the fal cover unit 540 shown in FIG. 1 is sent to the payout control board 4110 via the handle relay terminal board 192 shown in FIG. 1 and the power supply board 851 shown in FIG. It has been input. The output terminal of the full tank switch 550 is configured as an open collector output type in which the emitter terminal is grounded to the ground (GND), and one end of the payout control substrate 4110 is electrically connected to the +12 V power supply line. It is electrically connected to the other end of the pull-up resistor PR44a and to the first terminal of the full switch 3-terminal filter PIC50. The full switch three-terminal filter PIC50 is a T-type filter circuit, and is excellent in attenuation characteristics magnetically shielded by ferrite.

  The second terminal of the full tank switch 3-terminal filter PIC50 is grounded with the ground (GND), and the third terminal of the full tank switch 3-terminal filter PIC50 is connected through the resistor PR44b to the full tank switch 3-terminal filter PIC50 And the base terminal of the transistor PTR41 via the resistor PR45. As a result, the detection signal of the full tank switch 550 is input to the base terminal of the transistor PTR 41 after the noise component is removed in the full switch three-terminal filter PIC 50. The base terminal of the transistor PTR41 is electrically connected to the other end of the resistor PR46 whose one end is connected to the ground (GND) in addition to the electrical connection to the resistor PR45, and one end is connected to the ground (GND) It is electrically connected to the other end of the capacitor PC40 which is electrically connected. The capacitor PC40 plays a role as a low pass filter. The emitter terminal of the transistor PTR41 is grounded to the ground (GND), and the collector terminal of the transistor PTR41 is electrically connected to the other end of the resistor PR47 whose one end is electrically connected to the +5 V power supply line and also a non-inverting buffer ICPIC 40 (non-inverted buffer ICPIC 40 includes eight non-inverted buffer circuits, and shapes and outputs without inverting the logic of the signal waveform input to one of them (PIC 40 B).) Payout control It is electrically connected to the input terminal PA2 of the input port PA of the MPU 4120a. As the transistor PTR41 is turned ON / OFF, the logic of the signal output from the collector terminal of the transistor PTR41 changes, and the signal is input as the full signal to the input terminal PA2 of the input port PA of the payout control MPU 4120a.

  The circuit constituted by the resistors PR45 and PR46 and the transistor PTR41 is a switch circuit which is turned on / off by a detection signal from the full switch 550.

  As described above, the full tank switch 550 detects whether or not the storage space in the second ball passage of the far cover unit 540 is full with the stored gaming balls. In the present embodiment, when the storage space is not filled with the gaming balls stored, the voltage applied to the output terminal of the full switch 550 is dispensed via the handle relay terminal board 192 and the power supply substrate 851. When the signal which is pulled up to +12 V by pull-up resistance 44a and becomes HI in control board 4110 is inputted to payout control board 4110, when the storage space is full with the stored gaming balls, The voltage applied to the output terminal of the full tank switch 550 is pulled down to the ground (GND) side in the dispensing control substrate 4110 through the handle relay terminal board 192 and the power supply substrate 851, and the signal whose logic is LOW is dispensed It is input to the control board 4110.

  When the storage space is not full with the gaming balls stored, the voltage applied to the output terminal of the full switch 550 is pulled at the payout control board 4110 via the handle relay terminal board 192 and the power supply board 851. The signal that is pulled up to +12 V by the up resistor 44 a and whose logic is HI is input to the base terminal of the transistor PTR 41 described above, so that the transistor PTR 41 is turned on and the switch circuit is also turned on. As a result, the voltage applied to the collector terminal of the transistor PTR41 is pulled down to the ground (GND) side and the logic becomes LOW, the full signal is input to the input terminal PA2 of the input port PA of the payout control MPU 4120a.

  On the other hand, when the storage space is full with the gaming balls stored, the voltage applied to the output terminal of the full switch 550 is the payout control board 4110 through the handle relay terminal board 192 and the power supply board 851. In the above, the signal pulled down to the ground (GND) side and the logic becomes LOW is input to the base terminal of the transistor PTR 41 described above, so that the transistor PTR 41 is turned off and the switch circuit is also turned off. As a result, the voltage applied to the collector terminal of the transistor PTR41 is pulled up to +5 V by the resistor PR47, and a full signal whose logic is HI is input to the input terminal PA2 of the input port PA of the payout control MPU 4120a.

  In this embodiment, the detection signal from the full tank switch 550 is input to the switch circuit configured of the resistor PR45, the resistor PR46, and the transistor PTR41 through the full tank switch 3-terminal filter PIC50. However, detection signals from various detection switches such as the ball break switch 750, the count switch 751, and the rotation angle switch 752 shown in FIG. 13 are T-type filter circuits such as a full switch three-terminal filter PIC50. The circuit configuration is to be directly input to each switch circuit without an intervening. Since the full tank switch 550 is provided in the far cover unit 540 attached to the door frame 5, the full ball switch 750, the counting switch 751, and the rotation angle switch 752 provided in the prize ball device 740 attached to the main body frame 3. Compared to etc., the path for transmitting the detection signal becomes extremely long and extremely susceptible to noise.

  The full tank switch 550 is for detecting whether or not the storage space in the second ball passage of the far cover unit 540 is full with stored gaming balls, and the payout control MPU 4120 a is for using the full tank switch 550. Based on the detection signal of, when it is judged that the gaming space in which the storage space is full is full, the control for forcibly stopping the drive control of the payout motor 744 and stopping the payout of the gaming ball by the payout rotating body is performed. It is supposed to be done. That is, when noise intrudes into the transmission path (transmission line) for transmitting the detection signal from the full tank switch 550, the payout control MPU 4120a drives the payout motor 744 even though the storage space is neither full nor full. There is a case that the control is forcibly stopped and the payout of the game balls by the payout rotating body is stopped, and the drive control of the payout motor 744 is performed regardless of whether the storage space is full with the stored game balls. When the game ball is filled up to the upstream side of the above-mentioned winning ball passage by rotating the payout rotary body and continuing the payout of the gaming ball, the payout rotary body itself can not rotate and the payout motor 744 is The load is applied abnormally, and the discharge motor 744 is overloaded to generate abnormal heat, causing a failure, or transmitting the rotation shaft of the discharge motor 744 to the rotational movement of the discharge rotor. Sometimes referred to 構等 is or failure. Therefore, in the present embodiment, in order to prevent such a problem, the circuit configuration is adopted such that the noise component is removed from the detection signal from the full switch 550 in the three-terminal filter PIC50 for full switch first. .

[10-2-3 (e). Circuit to which operation signal from operation switch is input]
The 1st and 2nd terminals which are the output terminals of the operation switch 860a are grounded to the ground (GND), and the 3rd and 4th terminals which are the output terminals of the operation switch 860a are on the +5 V side by the pull-up resistor PR48. It is pulled up and electrically connected to the base terminal of the transistor PTR42 of the previous stage through the resistor PR49. The base terminal of the previous-stage transistor PTR42 is electrically connected to the resistor PR49, and also electrically connected to the ground (GND) and the other end of the resistor PR50 whose ground is grounded. The fourth terminal, which is the output terminal of the operation switch 860a, is electrically connected to the pull-up resistor PR48, and also electrically connected to the ground (GND) and the other end of the capacitor PC41 whose ground is grounded. ing. The emitter terminal of transistor PTR42 in the previous stage is grounded to ground (GND), and the collector terminal of transistor PTR42 in the previous stage is electrically connected to the other end of resistor PR51 whose one end is electrically connected to the +5 V power supply line At the same time, it is electrically connected to the base terminal of the transistor PTR43 in the rear stage via the resistor PR52. The base terminal of the rear-stage transistor PTR43 is electrically connected to the resistor PR52, and also electrically connected to the ground (GND) and the other end of the resistor PR53 whose ground is grounded. The emitter terminal of the rear stage transistor PTR43 is grounded to the ground (GND), and the collector terminal of the rear stage transistor PTR43 is electrically connected to the other end of the resistor PR54 whose one end is electrically connected to the +5 V power supply line And the non-inversion buffer ICPIC 40 (the non-inversion buffer ICPIC 40 includes eight non-inversion buffer circuits, and shapes and outputs the logic of the signal waveform input to one (PIC 40 C) without inverting it). It is electrically connected to the input terminal PA3 of the input port PA of the payout control MPU 4120a. The logic of the signal output from the collector terminal of the transistor PTR43 in the rear stage is changed by turning on / off the transistors PTR42 and PTR43 in the front and rear stages, and the signal becomes an RWMCLR signal as the input terminal PA3 of the input port PA of the payout control MPU 4120a Is input to

  The third and fourth terminals, which are the output terminals of the operation switch 860a, are pulled up to +5 V by the pull-up resistor PR48 and electrically connected to the base terminal of the transistor PTR42 in the previous stage via the resistor PR49. It is pulled up to the +5 V side by the pull-up resistor PR48 and electrically connected to the base terminal of the transistor PTR44 through the resistor PR55. The base terminal of the transistor PTR44 is electrically connected to the resistor PR55, and also electrically connected to the ground (GND) and the other end of the resistor PR56 which is grounded. The emitter terminal of the transistor PTR44 is grounded to the ground (GND), and the collector terminal of the transistor PTR44 is electrically connected to the main control board 4100 via a wiring (harness). When the collector terminal of transistor PTR 44 is electrically connected to main control substrate 4100 via a wiring (harness), one end of main control input circuit 4100 b of main control substrate 4100 shown in FIG. It is electrically connected to the other end of pull-up resistor MR2 electrically connected to the power supply line. As the transistor PTR 44 is turned ON / OFF, the logic of the signal output from the collector terminal of the transistor PTR 44 changes, and the signal is input to the input terminal PA 0 of the input port PA of the main control MPU 4100 a as a RAM clear signal.

  The circuit formed of the pull-up resistor PR48 and the capacitor PC41 is a switch signal generating circuit, and when the operation switch 860a is pressed, the contact constituting the operation switch 860a repeats the ON / OFF for a short time. The circuit is also configured as a circuit having a function of absorbing fluctuations in voltage from the operation switch 860a.

  The circuit composed of the resistors PR49 and PR50 and the transistor PTR42 is a switch circuit at the former stage, and the circuit composed of the resistors PR52 and PR53 and the transistor PTR43 is a switch circuit at the latter stage, and the resistors PR55 and PR56 and the transistor PTR44 Is a switch circuit, which is turned on / off by an operation signal from the operation switch 860a.

  As described above, the operation switch 860a is connected to the RAM (dispense control built-in RAM) built in the payout control MPU 4120a of the payout control board 4110 within a predetermined period from the time of power on and the main control MPU 4100a It is operated when clearing the built-in RAM (main control built-in RAM), or when it is notified of an error after the power is turned on, it is operated to clear the error. A function to clear the RAM within a predetermined period from time to time, and an error release after the power is turned on (after a period of playing the function as a RAM clear, that is, after a predetermined period has passed from the time of power on) It has a function. The operation signal from the operation switch 860a becomes a RAM clear signal in the function of clearing the RAM within a predetermined period after the power is turned on, while after the power is turned on (after a predetermined period has passed since the power was turned on) In the function to perform the error cancellation in the above, it becomes an error cancellation signal.

  When the operation switch 860a is not operated, the third and fourth terminals which are the output terminals of the operation switch 860a are pulled up to +5 V by the pull-up resistor PR48, and the operation signal whose logic is HI is the transistor of the previous stage The transistor PTR42 of the previous stage is turned ON while the switch circuit of the previous stage is also turned ON, and is applied to the collector terminal of the transistor PTR43 of the previous stage, which is a voltage applied to the base of the transistor PTR43 of the subsequent stage. When the voltage is lowered to the ground (GND) side, the transistor PTR 43 in the rear stage is turned off, and the switch circuit in the rear stage is also turned off. As a result, the voltage applied to the collector terminal of the transistor PTR43 in the subsequent stage is pulled up to +5 V by the resistor PR54 and the RWMCLR signal whose logic is HI is input to the input terminal PA3 of the input port PA of the payout control MPU 4120a. The payout control MPU 4120a performs the RAM clear for erasing the information stored in the payout control internal RAM when the logic of the RWMCLR signal input to the input terminal PA3 is HI within a predetermined period from when the power is turned on. It is determined that the instruction is not to be issued, and the error is canceled when the logic of the RWMCLR signal input to the input terminal PA3 is HI after power on (after a predetermined period has elapsed from the time of power on). Judge not to indicate.

  In addition, when the operation switch 860a is not operated, the operation signal with the logic HI which is pulled up to +5 V by the pull-up resistor PR48 is the transistor PTR44. The transistor PTR 44 is turned on and the switch circuit is also turned on. As a result, the RAM clear signal in which the voltage is pulled down to the ground (GND) side in the main control board 4100 via the wiring (harness) and the logic becomes LOW is transmitted to the main control board 4100. It is input. The main control MPU 4100a of the main control board 4100, as described above, when the RAM clear signal whose logic is LOW is input within a predetermined period from when the power is turned on, this logic is LOW as shown in FIG. When the RAM clear signal is input to the base terminal of the transistor MTR0, the transistor MTR0 is turned off, and the switch circuit is also turned off. As a result, the RAM clear signal in which the voltage applied to the collector terminal of the transistor MTR0 is pulled up to +5 V by the resistor MR5 and the logic becomes HI is input to the input terminal PA0 of the input port PA of the main control MPU 4100a. When the logic of the RAM clear signal input to the input terminal PA0 is HI, the main control MPU 4100a determines that it does not instruct to perform the RAM clear for erasing the information stored in the main control internal RAM.

  On the other hand, when the operation switch 860a is operated, the third and fourth terminals which are the output terminals of the operation switch 860a are pulled down to the ground (GND) side, so that the operation signal whose logic is LOW becomes the transistor of the previous stage. The transistor PTR42 at the front stage is turned off and the switch circuit at the front stage is also turned off when input to the base terminal of the PTR42, and is applied to the collector terminal of the transistor PTR42 at the front stage. Is pulled up to +5 V by the resistor PR51, so that the transistor PTR43 in the subsequent stage is turned on, and the switch circuit in the subsequent stage is also turned on. As a result, the RWMCLR signal whose voltage is lowered to the ground (GND) side and the logic becomes LOW is input to the input terminal PA3 of the input port PA of the payout control MPU 4120a. The payout control MPU 4120a performs the RAM clear for erasing the information stored in the payout control internal RAM when the logic of the RWMCLR signal input to the input terminal PA3 is LOW within a predetermined period from when the power is turned on. It is determined that the command is to be issued, and the error is canceled when the logic of the RWMCLR signal input to the input terminal PA3 is LOW after the power is turned on (after a predetermined period has elapsed from the time of power on). Judge that it is something to indicate.

  In addition, when the operation switch 860a is operated, the operation becomes logic LOW by the third and fourth terminals which are the output terminals of the operation switch 860a being pulled down to the ground (GND) side by the pull-up resistor PR48. A signal is input to the base terminal of the transistor PTR44, the transistor PTR44 is turned off, and the switch circuit is also turned off. Thus, the voltage applied to the collector terminal of the transistor PTR44 is pulled up to +12 V by the pull-up resistor MR2 of the main control input circuit 4100b of the main control board 4100 via the wiring (harness), and the logic becomes HI. A clear signal is input to the main control board 4100. The main control MPU 4100a of the main control board 4100 receives the logic HI shown in FIG. 20 as described above when the RAM clear signal whose logic is HI is input within a predetermined period from the time of power on. When the RAM clear signal is input to the base terminal of the transistor MTR0, the transistor MTR0 is turned on and the switch circuit is also turned on. As a result, the RAM clear signal in which the voltage applied to the collector terminal of the transistor MTR0 is pulled down to the ground (GND) side and the logic becomes LOW is input to the input terminal PA0 of the input port PA of the main control MPU 4100a. When the logic of the RAM clear signal input to the input terminal PA0 is LOW, the main control MPU 4100a determines that it instructs to clear the RAM stored in the main control internal RAM.

10-2-4. Dispensing motor drive circuit]
Next, a payout motor drive circuit 4120 d for outputting a drive signal to the payout motor 744 of the winning ball device 740 shown in FIG. 5 will be described. As shown in FIG. 26, the payout motor drive circuit 4120 d mainly includes a voltage switching circuit 4120 da and a drive IC PIC 60. The power supply input terminals 1 and 2 of the voltage switching circuit 4120 da are electrically connected to the +12 V power supply line and the +5 V power supply line, respectively, and +12 and +5 V are applied respectively. The ground terminal of the voltage switching circuit 4120 da is connected to the ground (GND) It is grounded. A voltage switching signal is input to the power switching input terminal of the voltage switching circuit 4120 da. The voltage switching signal is output from the output terminal of the predetermined output port of the payout control MPU 4120a to the payout control output circuit 4120ca with reset function, and is output from the reset control with payout control output circuit 4120ca to the power switching input terminal of the voltage switching circuit 4120da. It is supposed to be The power supply output terminal of voltage switching circuit 4120 da is electrically connected to the third and tenth terminals which are the cathode terminals of drive IC PIC 60 via Zener diode PZD 60, and electrically connected to the power supply terminal of payout motor 744. No. 3 which is the cathode terminal of the drive IC PIC 60 via the Zener diode PZD60 with +12 V or +5 V as the motor drive voltage based on the voltage switching signal connected to the voltage switching circuit 4120 da. While supplying to a terminal and a 10th terminal, it supplies to the payout motor 744.

  The drive IC PIC 60 includes four Darlington power transistors. In the present embodiment, the sixth and seventh terminals, which are the emitter terminals of the drive IC PIC 60, are grounded to ground (GND) and are the base terminals of the drive IC PIC 60. A payout motor drive signal is input to the first terminal, the fifth terminal, the eighth terminal, and the twelfth terminal via the resistors PR60 to PR63, respectively. The second, fourth, ninth, and eleventh terminals of the drive IC PIC 60, which are collector terminals, are the first, fifth, eighth, and twelfth terminals of the drive IC PIC 60, respectively. When the payout motor drive signal is input to the 1st terminal, the 5th terminal, the 8th terminal and the 12th terminal which are the base terminals of the drive IC PIC 60 respectively via the resistors PR60 to PR63, the excitation signal is used. A certain drive pulse is output to each phase (/ B phase, B phase, A phase, / A phase) corresponding to the dispensing motor 744. The payout motor drive signal is output from the output terminal of the predetermined output port of the payout control MPU 4120 a to the payout control output circuit 4120 ca with a reset function, and from the payout control output circuit 4120 ca with a reset function via the resistors PR60 to PR63 of the drive ICPIC60 It is outputted to the first terminal, the fifth terminal, the eighth terminal and the twelfth terminal which are base terminals respectively. These drive pulses are performed by switching the excitation current flowing in each phase (/ B phase, B phase, A phase, / A phase) of the dispensing motor 744 to rotate the dispensing motor 744. In addition, when the drive pulse (excitation signal) of each phase (/ B phase, B phase, A phase, / A phase) is interrupted | blocked by this switching, counter electromotive force generate | occur | produces. If this back electromotive force exceeds the withstand voltage of the drive IC PIC 60, the drive IC PIC 60 is damaged. Therefore, as protection, the zener diode PZD0 described above is electrically connected to the third stage and the tenth stage of the cathode terminal of the drive IC PIC 60. Adopted the circuit configuration.

[10-2-5. CR unit input / output circuit]
Next, a CR unit input / output circuit 4120e for inputting / outputting various signals to / from CR unit 6 shown in FIG. 14 will be described. As described above, the payout control board 4110 receives the game ball request signal BRDY from the CR unit 6 via the gaming ball lending device connection terminal plate 869 and the payout operation start request signal BRQ. , And the predetermined voltage VL (+12 V) and the ground LG created from the AC 24 V supplied from the power supply substrate 851 shown in FIG. Through terminal plate 869, an EXS signal indicating that a single dispensing operation has been started or ended, and a PRDY signal indicating that a dispensing operation for paying out a rental ball is possible or impossible And output. As shown in FIG. 27, the input / output circuit for inputting / outputting these various signals and the like mainly includes photocouplers PIC70 to PIC74 (in which an infrared LED and a phototransistor are incorporated).

  The predetermined voltage VL from the CR unit 6 is applied to the anode terminal of the photocoupler PIC70 via the resistor PR70. The cathode terminal of the photocoupler PIC70 is electrically connected to the ground LG from the CR unit 6. The resistor PR60 is a limiting resistor for limiting the current flowing to the built-in infrared LED of the photocoupler PIC70. When the predetermined voltage VL from the CR unit 6 is applied to the anode terminal of the photocoupler PIC70, the photocoupler PIC70 turns ON, but the predetermined voltage VL from the CR unit 6 is not applied to the anode terminal of the photocoupler PIC70 Sometimes, the photocoupler PIC70 is turned off. The emitter terminal of the photocoupler PIC70 is grounded to the ground (GND), and the collector terminal of the photocoupler PIC70 is electrically connected to the base terminal of the transistor PTR70 via the resistor PR71, and also via the resistor PR72 It is electrically connected to the base terminal of PTR71. The collector terminal of the photocoupler PIC70 is electrically connected to the resistor PR71, and also electrically connected to the other end of the pull-up resistor PR73 whose one end is electrically connected to the +5 V power supply line.

  The base terminal of the transistor PTR70 is electrically connected to the resistor PR71, and also electrically connected to the ground (GND) and the other end of the resistor PR74 which is grounded. The emitter terminal of the transistor PTR70 is grounded to the ground (GND), and the collector terminal of the transistor PTR70 is electrically connected to the other end of the resistor PR75 whose one end is electrically connected to the +5 V power supply line and a non-inverting buffer FIG. 23 through ICPIC80 (non-inverted buffer ICPIC80 includes eight non-inverted buffer circuits, and shapes and outputs without inverting the logic of the signal waveform input to one of the (PIC80A)). It is electrically connected to the input terminal of the predetermined input port of the payout control MPU 4120a shown in FIG. As the transistor PTR70 turns ON / OFF, the logic of the signal output from the collector terminal of the transistor PTR70 changes, and the signal is input as the CR connection signal 1 to the input terminal of the predetermined input port of the payout control MPU 4120a.

  On the other hand, the base terminal of the transistor PTR71 is electrically connected to the resistor PR72, and also electrically connected to the ground (GND) and the other end of the resistor PR76 which is grounded. The emitter terminal of the transistor PTR71 is grounded to the ground (GND), and the collector terminal of the transistor PTR71 is electrically connected to the power supply substrate 851 via a wiring (harness). When the collector terminal of transistor PTR71 is electrically connected to power supply substrate 851 via a wiring (harness), one end of power supply substrate 851 is electrically connected to the +12 V power supply line, and not shown. Electrically connected to the other end of the As the transistor PTR71 turns ON / OFF, the logic of the signal output from the collector terminal of the transistor PTR71 changes, and the signal is input to the power supply substrate 851 as a CR connection signal.

  The circuit configured of the resistors PR71 and PR74 and the transistor PTR70 is a switch circuit that is turned on / off by turning on / off the photocoupler PIC70.

  When the predetermined voltage VL from the CR unit 6 is not applied to the anode terminal of the photocoupler PIC70, the photocoupler PIC70 is turned off, and pulled up to +5 V by the pull-up resistor PR73, thereby turning on the transistor PTR70 and switching circuit It will turn on. Thereby, the CR connection signal 1 in which the voltage applied to the collector terminal of the transistor PTR70 is pulled down to the ground (GND) side and the logic becomes LOW is input to the input terminal of the predetermined input port of the payout control MPU 4120a.

  On the other hand, when the predetermined voltage VL from the CR unit 6 is applied to the anode terminal of the photocoupler PIC70, the photocoupler PIC70 is turned ON, and the voltage applied to the base terminal of the transistor PTR70 is pulled down to the ground (GND) side As a result, the transistor PTR70 is turned off, and the switch circuit is also turned off. Thus, the CR connection signal 1 in which the voltage applied to the collector terminal of the transistor PTR70 is pulled up to +5 V by the pull-up resistor PTR75 and the logic becomes HI is input to the input terminal of the predetermined input port of the payout control MPU 4120a. Ru.

  The circuit composed of the resistors PR72 and PR76 and the transistor PTR71 is also a switch circuit that is turned on / off by turning on / off the photocoupler PIC70.

  When the predetermined voltage VL from the CR unit 6 is not applied to the anode terminal of the photocoupler PIC70, the photocoupler PIC70 is turned off, and pulled up to +5 V by the pull-up resistor PR73, thereby turning on the transistor PTR71 and switching circuit It will turn on. As a result, the CR connection signal whose logic is LOW is pulled down to the power supply substrate 851 when the voltage applied to the collector terminal of the transistor PTR71 is pulled down to the ground (GND) side in the power supply substrate 851 via the wiring (harness). Ru.

  On the other hand, when the predetermined voltage VL from the CR unit 6 is applied to the anode terminal of the photocoupler PIC70, the photocoupler PIC70 is turned ON, and the voltage applied to the base terminal of the transistor PTR71 is pulled down to the ground (GND) side As a result, the transistor PTR 71 is turned off and the switch circuit is also turned off. As a result, the voltage applied to the collector terminal of the transistor PTR71 is pulled up to +12 V by the pull-up resistor of the power supply substrate 851 through the wiring (harness), and the CR connection signal whose logic becomes HI is input to the power supply substrate 851 Be done.

  The predetermined voltage VL from the CR unit 6 is applied to the anode terminal of the photocoupler PIC71 via the resistor PR77 in addition to the anode terminal of the photocoupler PIC70. BRDY from the CR unit 6 is input to the cathode terminal of the photocoupler PIC71. The resistor PR77 is a limiting resistor for limiting the current flowing to the built-in infrared LED of the photocoupler PIC71. When the predetermined voltage VL from the CR unit 6 is applied to the anode terminal of the photocoupler PIC71 and the logic of BRDY from the CR unit 6 is LOW, the photocoupler PIC71 turns ON, When the predetermined voltage VL from the CR unit 6 is applied to the anode terminal of the coupler PIC 71 and the logic of BRDY from the CR unit 6 is HI, the photocoupler PIC 71 is turned off. There is. The emitter terminal of the photocoupler PIC71 is grounded to the ground (GND), and the collector terminal of the photocoupler PIC71 is electrically connected to the other end of the pull-up resistor PR78 whose one end is electrically connected to the +5 V power supply line And the non-inversion buffer ICPIC80 (the non-inversion buffer ICPIC80 includes eight non-inversion buffer circuits, and shapes and outputs the logic of the signal waveform input to one of the (PIC80 B) without inverting). It is electrically connected to the input terminal of the predetermined input port of the payout control MPU 4120a. When the photocoupler PIC71 is turned ON / OFF, the logic of the signal output from the collector terminal of the photocoupler PIC71 changes, and the signal is input as the BRDY signal to the input terminal of the predetermined input port of the payout control MPU 4120a.

  Since the photocoupler PIC71 turns ON when the predetermined voltage VL from the CR unit 6 is applied to the anode terminal of the photocoupler PIC71 and the logic of BRDY from the CR unit 6 is LOW, The BRDY signal in which the voltage applied to the collector terminal of the coupler PIC 71 is pulled down to the ground (GND) side and the logic becomes LOW is input to the input terminal of the predetermined input port of the payout control MPU 4120 a. On the other hand, when the predetermined voltage VL from the CR unit 6 is applied to the anode terminal of the photocoupler PIC71 and the logic of BRDY from the CR unit 6 is HI, the photocoupler PIC71 is turned off. The BRDY signal in which the voltage applied to the collector terminal of the photocoupler PIC71 is pulled up to +5 V by the pull-up resistor PR78 and the logic becomes HI is input to the input terminal of the predetermined input port of the payout control MPU 4120a. Thus, the logic of the BRDY signal output from the collector terminal of the photocoupler PIC71 is the same logic as the logic of BRDY from the CR unit 6.

  The predetermined voltage VL from the CR unit 6 is applied to the anode terminal of the photocoupler PIC72 via the resistor PR79 in addition to the anode terminal of the photocoupler PIC70 and the anode terminal of the photocoupler PIC71. The BRQ from the CR unit 6 is input to the cathode terminal of the photocoupler PIC72. The resistor PR79 is a limiting resistor for limiting the current flowing to the built-in infrared LED of the photocoupler PIC72. When the predetermined voltage VL from the CR unit 6 is applied to the anode terminal of the photo coupler PIC 72 and the logic of BRQ from the CR unit 6 is LOW, the photo coupler PIC 72 is turned on, while the photo When the predetermined voltage VL from the CR unit 6 is applied to the anode terminal of the coupler PIC 72 and the logic of BRQ from the CR unit 6 is HI, the photocoupler PIC 72 is turned off. There is. The emitter terminal of the photocoupler PIC72 is connected to ground (GND), and the collector terminal of the photocoupler PIC72 is electrically connected to the other end of the pull-up resistor PR80 whose one end is electrically connected to the +5 V power supply line And the non-inversion buffer ICPIC80 (the non-inversion buffer ICPIC80 includes eight non-inversion buffer circuits, and shapes and outputs the logic of the signal waveform input to one (PIC80C) without inverting it). It is electrically connected to the input terminal of the predetermined input port of the payout control MPU 4120a. When the photocoupler PIC72 is turned ON / OFF, the logic of the signal output from the collector terminal of the photocoupler PIC72 changes, and the signal is input as a BRQ signal to the input terminal of the predetermined input port of the payout control MPU 4120a.

  Since the photocoupler PIC72 turns ON when the predetermined voltage VL from the CR unit 6 is applied to the anode terminal of the photocoupler PIC72 and the logic of BRQ from the CR unit 6 is LOW, The BRQ signal in which the voltage applied to the collector terminal of the coupler PIC 72 is pulled down to the ground (GND) side and the logic becomes LOW is input to the input terminal of the predetermined input port of the payout control MPU 4120 a. On the other hand, when the predetermined voltage VL from the CR unit 6 is applied to the anode terminal of the photocoupler PIC72 and the logic of BRQ from the CR unit 6 is HI, the photocoupler PIC72 is turned off. The BRQ signal in which the voltage applied to the collector terminal of the photocoupler PIC72 is pulled up to +5 V by the pull-up resistor PR80 and the logic becomes HI is input to the input terminal of the predetermined input port of the payout control MPU 4120a. Thus, the logic of the BRQ signal output from the collector terminal of the photocoupler PIC72 is the same logic as the logic of BRQ from the CR unit 6.

  An EXS signal indicating that a single dispensing operation has been started or ended from the output terminal of a predetermined output port of the dispensing control MPU 4120a is output to the dispensing control output circuit 4120cb without the reset function, and the dispensing control output circuit without the reset function 4120 cb is input to the cathode terminal of the photocoupler PIC 73 via the resistor PR 81. The anode terminal of the photocoupler PIC73 is electrically connected to the other end of the resistor PR82 whose one end is electrically connected to the +12 V power supply line. The resistor PR82 is a limiting resistor for limiting the current flowing to the built-in infrared LED of the photocoupler PIC73. When +12 V is applied to the anode terminal of the photocoupler PIC73 via the resistor PR82, EXS is output from the output terminal of the predetermined output port of the payout control MPU 4120a without the reset function via the payout control output circuit 4120cb When the logic of the signal is LOW, the photocoupler PIC73 turns ON, and +12 V is applied to the anode terminal of the photocoupler PIC73 via the resistor PR82, and a predetermined output port of the payout control MPU 4120a The photocoupler PIC73 is turned off when the logic of the EXS signal output from the output terminal of the output terminal via the reset function-free output control circuit 4120cb is HI. The emitter terminal of the photocoupler PIC73 is grounded to the ground LG from the CR unit 6, and the collector terminal of the photocoupler PIC73 is connected to the CR unit 6 via the game ball lending device connection terminal plate 869 by the pull-up resistor PR83. At a predetermined voltage VL and electrically connected to the built-in control device. The logic of the signal output from the collector terminal of the photocoupler PIC73 changes as the photocoupler PIC73 turns ON / OFF, and the signal is input to the built-in control device of the CR unit 6 as EXS.

  When +12 V is applied to the anode terminal of the photocoupler PIC73 via the resistor PR82, EXS is output from the output terminal of the predetermined output port of the payout control MPU 4120a without the reset function via the payout control output circuit 4120cb When the logic of the signal is LOW, the photocoupler PIC73 turns ON, so the voltage applied to the collector terminal of the photocoupler PIC73 is pulled down to the ground (GND) side and the logic goes LOW. 6 is input to the built-in control device. On the other hand, when +12 V is applied to the anode terminal of the photocoupler PIC73 via the resistor PR82, the signal is output from the output terminal of the predetermined output port of the payout control MPU 4120a without the reset function via the payout control output circuit 4120cb. When the logic of the EXS signal is HI, the photocoupler PIC73 is turned off, so the voltage applied to the collector terminal of the photocoupler PIC73 is pulled up to a predetermined voltage VL by the pull-up resistor PR83 and the logic is HI The EXS is input to the built-in control unit of the CR unit 6. As described above, the logic of EXS output from the collector terminal of the photocoupler PIC73 is the logic of the EXS signal output from the output terminal of the predetermined output port of the payout control MPU 4120a via the reset function-free payout control output circuit 4120cb It is the same logic.

  The PRDY signal which indicates that the dispensing operation for dispensing the lent ball from the output terminal of the predetermined output port of the dispensing control MPU 4120a is possible or impossible is the cathode terminal of the photocoupler PIC74 via the resistor PR84. Has been entered. The anode terminal of the photocoupler PIC74 is electrically connected to the other end of the resistor PR85 whose one end is electrically connected to the +12 V power supply line. The resistor PR85 is a limiting resistor for limiting the current flowing to the built-in infrared LED of the photocoupler PIC74. When +12 V is applied to the anode terminal of the photocoupler PIC74 via the resistor PR85, PRDY output from the output terminal of the predetermined output port of the payout control MPU 4120a via the reset function-free payout control output circuit 4120cb When the logic of the signal is LOW, the photocoupler PIC74 is turned ON, and +12 V is applied to the anode terminal of the photocoupler PIC74 via the resistor PR85, and a predetermined output port of the payout control MPU 4120a The photocoupler PIC74 is turned off when the logic of the PRDY signal output from the output terminal of the signal output via the output control terminal without the reset function 4120cb is HI. The emitter terminal of the photocoupler PIC74 is grounded with the ground LG from the CR unit 6, and the collector terminal of the photocoupler PIC74 is connected to the CR unit 6 via the game ball lending device connection terminal plate 869 by the pull-up resistor PR86. At a predetermined voltage VL and electrically connected to the built-in control device. When the photocoupler PIC74 turns ON / OFF, the logic of the signal output from the collector terminal of the photocoupler PIC74 changes, and the signal is input to the built-in control device of the CR unit 6 as PRDY.

  When +12 V is applied to the anode terminal of the photocoupler PIC74 via the resistor PR85, PRDY output from the output terminal of the predetermined output port of the payout control MPU 4120a via the reset function-free payout control output circuit 4120cb When the logic of the signal is LOW, the photocoupler PIC74 turns ON, so the voltage applied to the collector terminal of the photocoupler PIC74 is pulled down to the ground (GND) side and the logic goes LOW. 6 is input to the built-in control device. On the other hand, when +12 V is applied to the anode terminal of the photocoupler PIC74 via the resistor PR85, it is outputted from the output terminal of the predetermined output port of the payout control MPU 4120a via the reset function-free payout control output circuit 4120cb. When the logic of the PRDY signal is HI, the photocoupler PIC74 is turned off, so the voltage applied to the collector terminal of the photocoupler PIC74 is pulled up to a predetermined voltage VL by the pull-up resistor PR86 and the logic is HI PRDY is input to the built-in control unit of the CR unit 6. As described above, the logic of PRDY output from the collector terminal of the photocoupler PIC 74 is the logic of the PRDY signal output from the output terminal of the predetermined output port of the payout control MPU 4120 a via the reset function-free payout control output circuit 4120 cb It is the same logic.

[10-2-6. Various input / output signals to the payout control MPU]
Next, various input / output signals input / output from input / output terminals of various input / output ports of the payout control MPU 4120a will be described.

  As shown in FIG. 23, the RXD terminal, which is the serial data input terminal of the serial input port of the payout control MPU 4120a, receives serial data from the main control board 4100 as a main payout serial data reception signal via the payout control input circuit 4120b. Be done. On the other hand, serial data to be transmitted to the main control board 4100 is transmitted as a payment serial data transmission signal to the payout control output circuit 4120cb without reset function from the TXD terminal which is a serial data output terminal of the serial output port of the payout control MPU 4120a. A reset function-free delivery control output circuit 4120 cb transmits a payment serial data transmission signal to the main control board 4100.

  The RWMCLR signal, the payout blackout notification signal, the door open signal, the full signal, the various signals from the CR unit 6 (BRQ signal, BRDY signal, CR connection) are connected to the input terminals of the predetermined input port of the payout control MPU 4120a. In addition to the signal 1 etc.) being input, for example, the main payment ACK signal from the main control board 4100 for notifying the completion of the normal reception of the above-described payee serial data reception signal is output via the payout control input circuit 4120b. The detection signals from the out-of-ball switch 750, the count switch 751, the rotation angle switch 752, etc. shown in FIG. 13 are respectively input via the payout control input circuit 4120b.

  On the other hand, the EXS signal and the PRDY signal described above are respectively output from the output terminals of the predetermined output port of the payout control MPU 4120a to the non-refundable payout control output circuit 4120cb, and the EXS signal from the non-refundable payout control output circuit 4120cb The PRDY signal is output to the CR unit input / output circuit 4120e, or the voltage switching signal described above is output to the payout control output circuit 4120ca with a reset function, and the voltage switching signal is output from the reset control payout control output circuit 4120ca to the voltage switching circuit 4120da. Output a payout motor drive signal to the payout control output circuit 4120ca with a reset function, and output a payout motor drive signal from the payout control output circuit 4120ca with a reset function to the payout motor 744 through the payout motor drive circuit 4120d. In addition to the above, for example, a payer ACK signal notifying the completion of normal reception of the main pay serial data reception signal described above is output to the payout control output circuit 4120 ca with a reset function and paid out from the payout control output circuit 4120 ca with a reset function. The main ACK signal is output to the main control board 4100, and the drive signal of the error LED indicator 860b shown in FIG. 13 is output to the payout control output circuit 4120ca with the reset function, and the drive signal from the payout control output circuit 4120ca with the reset function. Are output to the error LED indicator 860b or the like.

10-3. Various input / output signals with the main control board and various output signals to the external terminal board]
Next, various input / output signals between the payout control board 4110 and the main control board 4100 and various output signals from the payout control board 4110 to the external terminal board 784 will be described with reference to FIG.

[10-3-1. Various input and output signals with the main control board]
The payout control board 4110 exchanges various input / output signals with the main control board 4100. Specifically, as shown in FIG. 28A, the payout control board 4110 includes the above-described payee serial data transmission signal, payer ACK signal, operation signal (RAM clear signal), main frame door open signal, etc. Are output to the main control board 4100. These output signals are pulled up to +12 V by the pull-up resistor of the main control input circuit 4100 b of the main control board 4100.

  On the other hand, in addition to the main payment serial data reception signal, the main payment ACK signal, and the operation signal (RAM clear signal), the payout control board 4110 has 15 round big hit information output signals and 2 round big hit information output signals Big hit information output signal, probability fluctuation in-progress information output signal, special symbol display information output signal, normal symbol display information output signal, time information output signal in the short time, starting opening winning information output signal etc A signal or the like is input from the main control board 4100. These input signals are pulled up to +12 V by the pull-up resistance of the payout control input circuit 4120 b of the payout control unit 4120 of the payout control substrate 4110.

10-3-2. Various output signals to external terminal board]
The payout control board 4110 outputs various signals to the external terminal board 784. Specifically, as shown in FIG. 28 (b), in addition to the above-mentioned outer end frame door opening information output signal, an award ball number information output signal indicating the number of gaming balls actually paid out by the payout motor 744. In addition to the big hit information output signal such as 15 round big hit information output signal and 2 round big hit information output signal from the main control board 4100 via the payout control board 4110, the probability fluctuation information output signal, special symbol display information output A game information signal such as a signal, a normal symbol display information output signal, a time information output signal, and a starting opening winning information output signal is output to the external terminal board 784. These output signals are pulled up to +12 V by the pull-up resistance of the external terminal plate 784.

  A signal output from the external terminal board 784 is transmitted to a hall computer installed in a game hall (not shown), and the hall computer monitors the player's game or the like. When the 15 round big hit information output signal or the 2 round big hit information output signal is output to the hall computer as one big hit information output signal, the hall computer counts the number of times the round has become 2 rounds (2 round big hit) The number of times of occurrence of the jackpot), the number of times of big hit when the round has become 15 times (number of times of occurrence of big hit of 15 rounds), and the sum is the number of jackpots of the pachinko machine 1. For this reason, since the hole computer can not grasp the number of occurrences of the 2 round big hit and the number of occurrences of the 15 land big hit from the total number of big hits, the number of big hits actually generated by the pachinko machine 1 is large It can not be grasped whether it is a two round big hit or a 15 round big hit. Further, a data counter (not shown) is arranged above the pachinko machine 1, and among the players, it is selected whether or not to play a game with reference to the number of occurrences of the big hit gaming state displayed on the data counter. Some people do.

  However, since the number of occurrences of the big hit gaming state displayed on the data counter may actually be biased to the number of occurrences of the 2 round big hit, even if the player starts the game, only the 2 round big hit occurs. There are times when the 15 round big hit does not occur easily. As described above, although the number of occurrences of the big hit gaming state displayed on the data counter can give the player a sense of expectation, the player's irritability may be more than necessary.

  Therefore, in the present embodiment, the hall computer generates two rounds of big hit occurrences by separately outputting 15 round big hit information output signals and two round big hit information output signals to the hole computer as big hit information output signals. It has become possible to accurately grasp the number of occurrences of the 15 round big hit. Therefore, the hall computer can grasp whether the number of big hits actually generated by the pachinko machine 1 is the 2 round big hit or the 15 round big hit, and the data counter has 15 rounds. Since the number of occurrences of the big hit and the number of occurrences of the 2 round big hit can be displayed separately or only the number of occurrences of the 15 round big hit as the number of occurrences of the big hit gaming state Absent.

  In the present embodiment, the 2-round big hit information output signal is output to the hall computer in the period until the 2 round big hit occurs and ends, and the 15 round big hit information output signal is also 15 round big hits. It is in the state of being output to the hall computer in the period from the generation to the end. As in the present embodiment, in addition to the method of outputting the 2 round big hit information output signal and the 15 round big hit information output signal to the hall computer, for example, when 2 round big hit occurs, the 2 round big hit information output signal is only for a predetermined period. Such a two round big hit information output signal and 15 round big hit information such that the 15 round big hit information output signal is output to the hole computer for a predetermined period when it is output to the hole computer and 15 round big hit occurs There is also a method of outputting an output signal to the hall computer for the same predetermined period.

[11. Various commands related to sending and receiving of main control board]
Next, various commands transmitted from the main control board 4100 to the payout control board 4110 and various commands transmitted from the main control board 4100 to the peripheral control board 4140 will be described with reference to FIGS. FIG. 29 is a table showing an example of various commands transmitted from the main control board to the payout control board, and FIG. 30 is a table showing an example of various commands transmitted from the main control board to the peripheral control board. 30 is a table showing continuation of various commands transmitted from the main control board to the peripheral control board in FIG. 30, and FIG. 32 is a table showing one example of various commands from the payout control board received by the main control board. First, the prize ball command, which is a command related to the payout transmitted from the main control board to the payout control board, will be described, and then various commands transmitted from the main control board to the peripheral control board will be described. The various commands from the payout control board will be described.

[11. Various commands sent from the main control board to the payout control board]
The main control MPU 4100a of the main control board 4100 receives detection signals from various winning switches such as general winning opening switches 3020 and 3020, upper starting opening switch 3022, lower starting opening switch 2109, and count switch 2110 shown in FIG. When it is input, based on these detection signals, it transmits to the payout control board a winning ball command for paying out a gaming ball having a predetermined number of balls as a winning ball. The prize ball command is a command having a storage capacity of 1 byte (8 bits). In the present embodiment, the upper tray 301 and the lower tray 302, which are storage trays, communicate with the pachinko machine 1 and the CR unit 6 (in communication with the pachinko machine 1 and drive the dispensing motor 744 of the pachinko machine 1 (prize ball device 740)). If the player is electrically connected to a device for paying out the game ball as a rental ball (such a pachinko machine is referred to as a “CR machine”), as shown in FIG. 29 (a), the main control Commands 10H to 1EH ("H" represents a hexadecimal number) are prepared for the award ball command transmitted from the substrate 4100 to the payout control substrate 4110, and one award ball is designated in the command 10H, and the command In 11H, two prize balls are designated, and in command 1EH, fifteen prize balls are designated. The payout control board 4110 controls the payout motor 744 to payout the gaming balls by the designated number of winning balls.

  In addition, a pachinko machine 1 and a ball lending machine (a device that pays out game balls directly as a storage ball to the upper plate 301 or the lower plate 302 as a storage dish) are installed adjacent to a game arcade (hole). When the ball lending machine is electrically connected to 1 (such a pachinko machine is referred to as a "general machine"), as shown in FIG. The commands 20H to 2EH are prepared for the prize ball command to be sent to, and one prize ball is designated in the command 20H, two prize balls are designated in the command 21H,... Fifteen balls are specified. The payout control board 4110 controls the payout motor 744 to payout the gaming balls by the designated number of winning balls.

  As shown in FIG. 29C, a command 30H is prepared as a command common to the CR machine and the general machine, and a self check is designated in this command 30H. The transmitting side transmits the command 30H and checks whether or not the ACK signal is input, when the ACK signal to be output as acknowledgment of reception of the command is not input from the receiving side for a predetermined period after the command transmission. Check the connection status. In the case of the CR machine in the present embodiment, the payout control board 4110 confirms the connection state with the CR unit 6.

11-2. Various commands sent from the main control board to the peripheral control board]
Next, various commands transmitted from the main control board 4100 to the peripheral control board 4140 will be described. The main control MPU 4100a of the main control board 4100 transmits various commands to the peripheral control board 4140 based on the progress of the game. These various commands are commands having a storage capacity of 2 bytes (16 bits), and as shown in FIGS. 30 and 31, a status indicating the type of command having a storage capacity of 1 byte (8 bits), And a mode indicating a variation of the effect having a storage capacity of 1 byte (8 bits).

  Various commands, as shown in FIG. 30 and FIG. 31, are special figure 1 tuning effect related, special figure 2 tuning effect related, jackpot related, power on, flat figure tuning effect related, general electric circuit board related effects, notification display, status It is classified into the display and others.

[11-2-1. Special figure 1 tune production related]
The special figure 1 tuning effect related is based on the detection signal from the upper starting opening switch 3022 shown in FIG. 12, and in that section, as shown in FIG. 30, of the function display substrate 1191 shown in FIG. It is comprised from a command named special figure 1 tuning effect start, special symbol 1 specification, special figure 1 tuning effect end, and fluctuation state specification regarding the upper special symbol display 1185. These various commands are assigned "A * H" as the status and "** H"("H" represents a hexadecimal number) as a mode ("*" is a specific hexadecimal number) , And is predetermined by the specification contents of the pachinko machine 1).

  The special figure 1 tuning effect start command is an instruction to start special figure tuning effect with the effect pattern specified in the mode, and the special symbol 1 designation command is for designating a specific jackpot, a non-specified jackpot, and the like The special figure 1 tuning effect end command is for instructing the special figure 1 tuning effect end, and the fluctuation state specifying command is for specifying the probability and the time saving state.

  As the transmission timing of these various commands, the special figure 1 tuning effect start command is sent at the start of the special symbol 1 fluctuation start, the special symbol 1 specification command is sent immediately after the special figure 1 tuning effect start, special figure 1 tuning The effect end command is transmitted when the special symbol 1 fluctuation time elapses (when the special symbol 1 is determined), and the fluctuation state state designation command is transmitted immediately after the special symbol falling information designation. Note that these various commands are actually transmitted in the peripheral control board command transmission process of step S92 in the main control timer interrupt process described later.

11-2-2. Special figure 2 tune production related]
The special figure 2 tuning effect related is based on the detection signal from the lower starting opening switch 2109 shown in FIG. 12, and in that section, as shown in FIG. The lower special symbol display 1186 is composed of commands named special image 2 tuning effect start, special symbol 2 designation, and special image 2 tuning effect end. For these various commands, "B * H" is assigned as the status, and "** H"("H" represents a hexadecimal number) as a mode ("*" is a specific hexadecimal number). , And is predetermined by the specification contents of the pachinko machine 1).

  The special figure 2 tuning effect start command is an instruction to start special figure tuning effect with the effect pattern designated in the mode, and the special symbol 2 designation command is for designating disapproval, specific big hit, non specific big hit The special figure 2 tuning effect end indicates the special figure 2 tuning effect end.

  As transmission timing of these various commands, special figure 2 tuning effect start command is transmitted at the time of special symbol 2 fluctuation start, special symbol 2 designated command is sent immediately after special figure 2 tuning effect start, special figure 2 tuning The effect end command is transmitted when the special symbol 2 fluctuation time has elapsed (when the special symbol 2 is determined). Note that these various commands are actually transmitted in the peripheral control board command transmission process of step S92 in the main control timer interrupt process.

[11-2-3. Jackpot related]
In the category of big hit related, as shown in FIG. 30, big hit opening, big winning opening 1 open N-th display, big winning opening 1 closed indication, big winning opening 1 count indication, big hit ending, big hit symbol display, small hit opening , A small hit open indication, a small hit count indication, and a command named small hit ending. For these various commands, "C * H" is assigned as the status, and "** H"("H" represents a hexadecimal number) as a mode ("*" is a specific hexadecimal number) , And is predetermined by the specification contents of the pachinko machine 1).

  The big hit opening command instructs the big hit opening start, and the big winning opening 1 open Nth display command is starting while the big winning opening 1 is open for the 1st to 16th rounds (shown in FIG. 9, of the attacker unit 2100 During the opening or opening of the Nth round of the large winning opening 2103, the large winning opening 1 closing display command is started during the opening of the large winning opening 1 between rounds (large winning opening of the attacker unit 2100 During the closing between the rounds of 2103 or instructing the start of closing), the large winning opening 1 count display command indicates that 0 to 10 counts have been counted (detected by the count switch 2110 shown in FIG. 12, It is to convey the ball number of the game ball entered the big winning opening 2103, and the big hit ending command is the big hit endin Is intended to instruct the start, big hit symbol display command is for instructing the big hit symbol information display.

  Also, the small hit opening command instructs the small hit opening start, and the small hit open display command is started during the small hit open (when the small winning opening 2103 of the attacker unit 2100 is opened or opened at the small hit) The small hit count display command is a small hit middle large winning opening winning combination (in the case of small hit, when the game ball entered the large winning opening 2103 is detected by the count switch 2110 The small hit ending command is an instruction to start small hit ending.

  As the transmission timing of these various commands, the big hit opening command is sent at the beginning of the big hit opening, and the big winning opening 1 open Nth display command is when the big winning opening 1 is opened in the 1st to 16th rounds (large for attacker unit 2100 Sent to the opening of the Nth round of the winning opening 2103), the special winning opening 1 closing display command is sent to the closing of the special winning opening 1 (closing start of the special winning opening 2103 of the attacker unit 2100), the big winning The mouth 1 count display command is when the large winning opening 1 is opened and when the count changes to the large winning opening 1 (when the large winning opening 2103 of the attacker unit 2100 is opened and the gaming ball entered in the large winning opening 2103 is a count switch Sent when the jackpot is detected by the 2110) and the jackpot ending command is Transmitted, big hit symbol display command is sent during the special winning opening open (when opening the special winning opening 2103 attacker unit 2100).

  Also, the small hit opening command is sent at the start of the small hit opening, and the small hit open display command is sent at the small hit open (when the big winning opening 2103 of the attacker unit 2100 is opened at the small hit), small The hit count display command is transmitted at the time of the small hit medium large winning opening (when the game ball entering the large opening 2103 in the small hit is detected by the count switch 2110), the small hitting ending command is Sent at the start of small hit ending. Note that these various commands are actually transmitted in the peripheral control board command transmission process of step S92 in the main control timer interrupt process.

[11-2-4. Power on]
The division of power on, as shown in FIG. 30, includes various commands named power on. In this power on command, “D * H” is assigned as a status, and “** H” (“H” represents a hexadecimal number) is assigned as a mode (“*” is a specific hexadecimal number) , And is predetermined by the specification contents of the pachinko machine 1).

  The power-on command instructs start of RAM clear effect start and respective state effect start (for example, start of effect when the operation switch 860a of the payout control board 4110 is operated at the time of power-on shown in FIG. To direct).

  As the transmission timing of the power-on command, it is transmitted at the time other than the RAM clear and the RAM clear at the time of main control board power-on. Specifically, when the pachinko machine 1 is powered on, it returns from a power failure or momentary power interruption, and when the operation switch 860a of the payout control board 4110 is operated, the main control side power on process described later is performed. The power on command is transmitted in the peripheral control board command transmission process of step S92 in the main control timer interrupt process.

[11-2-5. General drawing tuning production related]
The regular-tune-related performance is based on the detection signal from the gate switch 2352 shown in FIG. 12, and in that section, as shown in FIG. 30, the normal symbol display of the function display substrate 1191 shown in FIG. It is comprised from the command of the name of common figure tuning production start, common design designation, common figure tuning production completion, and fluctuation state specification regarding vessel 1189. These various commands are assigned status "E * H" and mode "** H"("H" represents a hexadecimal number) ("*" is a specific hexadecimal number) , And is predetermined by the specification contents of the pachinko machine 1).

  The popular drawing tuning effect start command instructs the starting of the common pattern tuning effect in the rendering pattern specified in the mode, and the common symbol designation command is for designating a specific jackpot, a non-specified jackpot, and The figure tuning effect end command is for instructing the end of the common figure tuning effect, and the variation state designation command is for instructing the probability and the time saving state.

  As transmission timings of these various commands, a common figure synchronization effect start command is transmitted at the time of normal symbol 1 fluctuation start, a common pattern designation command is transmitted immediately after the common figure synchronization effect start, and a common pattern synchronization effect end command is Usually, it is transmitted when the symbol fluctuation time has elapsed (when the symbol is decided normally), and the fluctuation state specification command is transmitted immediately after the common map win information specification. Note that these various commands are actually transmitted in the peripheral control board command transmission process of step S92 in the main control timer interrupt process.

[11-2-6. Regular Drama Director Related]
The regular electric rendition related to the pair relates to the pair of movable pieces 2106 shown in FIG. 9 which are opened and closed by the drive of the starting port solenoid 2105 shown in FIG. It consists of commands named Opening, Common Power Release Display, and Ending, Common Drawing. These various commands are assigned status "F * H" and mode "** H"("H" represents a hexadecimal number) ("*" is a specific hexadecimal number) , And is predetermined by the specification contents of the pachinko machine 1).

  The opening command per drawing is an instruction to start the opening per drawing, and the release command for general release is started during the release of the power (a pair of movable pieces 2106 are expanded in the left and right direction by the drive of the start port solenoid 2105 State or when it is expanded), and the ending command per common figure indicates the start of ending per common figure.

  As the transmission timing of these various commands, the opening command per common drawing is transmitted at the start of opening per common drawing, and the common power release display command is used when the common power is open (a pair of movable pieces 2106 are driven by the starting port solenoid 2105 (When expanding in the left and right direction), the ending command per common drawing is transmitted at the beginning of the ending per common drawing. Note that these various commands are actually transmitted in the peripheral control board command transmission process of step S92 in the main control timer interrupt process.

[11-2-7. Notification display]
As shown in FIG. 31, the classification of the notification display is composed of commands such as a winning abnormality display, a connection abnormality display, a disconnection / short circuit abnormality display, a magnetic detection switch abnormality display, a door open, and a door closed. These various commands are assigned status "6 * H" and mode "** H"("H" represents a hexadecimal number) ("*" is a specific hexadecimal number) , And is predetermined by the specification contents of the pachinko machine 1).

  In the prize failure display command, the game ball enters the big winning opening 2103 of the attacker unit 2100 when the player wins a big winning opening other than during a big hit (during operating condition device) (even if it is not even a big hit) When the count switch 2110 detects the start of notification of a winning abnormality, the connection error display command is, for example, an electrical connection in a route between the main control board 4100 and the payout control board 4110. When there is an abnormality, it instructs the start of connection abnormality notification. For example, the disconnection / short circuit abnormality display command includes the main control board 4100, the upper start opening switch 3022, the lower start opening switch 2109, the count switch 2110, etc. Command to indicate the start of the open circuit / short circuit error indication when the open circuit / short circuit of the electrical connection occurs. Display command is for instructing the start of magnetic detection switch abnormality notification when an abnormality occurs in the magnetic detection switch 3024 shown in FIG. 12.

  In addition, the door opening command is sent to the main body frame 3 based on the detection signal (opening signal) from the door opening switch 618 which is input via the payout control board 4110 shown in FIG. When the door frame 5 is open, the door frame closing command instructs the door frame 5 to be closed with respect to the main body frame 3 based on a detection signal from the door frame opening switch 618. When the door is in the closed state, the door open notification end is instructed. On the other hand, based on the detection signal (open signal) from the main frame open switch 619 shown in FIG. 13 which is input via the payout control board 4110 shown in FIG. When the main frame opening notification is issued, the main frame closing command instructs the main frame 3 to the outer frame 2 based on a detection signal from the main frame opening switch 619. When it is in the closed state, the main body frame open notification end is instructed.

  As a transmission timing of these various commands, a winning abnormality display command is transmitted when winning in the large winning opening other than during a big hit (during operating condition device), and a connection abnormality display command is paid out from the main control board 4100 Is sent when there is no ACK response (ACK signal) from the payout control board 4110 at the time of command transmission, and the disconnection / short circuit abnormality display command is one of the upper start port switch 3022, lower The magnetic detection switch abnormality display command is transmitted when any of the magnetic detection switch abnormality display commands is detected when the magnetic detection switch 3024 detects an abnormality. Further, the door open command is transmitted when the door open is detected (when the door frame 5 is opened to the main body frame 3 based on the detection signal from the door frame open switch 618), the door The frame closing command is transmitted when the door closing is detected (when the door frame 5 is closed to the main body frame 3 based on the detection signal from the door frame opening switch 618). The main body frame open command is transmitted when the main body frame open is detected (when the main body frame 3 is open to the outer frame 2 based on the detection signal from the main body frame open switch 619), the main body The frame closing command is transmitted when the main frame closing is detected (when the main frame 3 is closed to the outer frame 2 based on the detection signal from the main frame opening switch 619). Note that these various commands are actually transmitted in the peripheral control board command transmission process of step S92 in the main control timer interrupt process.

[11-2-8. Status display]
As shown in FIG. 31, the status display section comprises a frame status 1 command (corresponding to an error occurrence command), an error release navigation command (corresponding to an error release command) and a command named frame status 2 command. There is. These various commands are assigned status "7 * H" and mode "** H"("H" represents a hexadecimal number) ("*" is a specific hexadecimal number) , And is predetermined by the specification contents of the pachinko machine 1).

  The frame state 1 command, the error cancellation navi command and the frame state 2 command are commands each having a storage capacity of 1 byte (8 bits) transmitted from the payout control board 4110, and the detailed description thereof will be described later. . When the main control MPU 4100a of the main control board 4100 receives the frame state 1 command, the error cancel navi command, and the frame state 2 command from the payout control board 4110, as shown in FIG. 31, “7 * H” While setting as a status, the received command is set as it is as a mode. That is, when the main control MPU 4100a receives the frame state 1 command, the error cancel navi command, and the frame state 2 command from the payout control board 4110, it adds “7 * H” which is additional information to these received commands. According to the above, it is formatted into a command having a storage capacity of 2 bytes (16 bits).

  The frame status 1 command, which has been shaped, is sent at power recovery, when the frame status changes, and at error release navigation, the error release navigation command is sent at error release navigation, and the frame status 2 command is at power recovery , And when the frame status changes. The frame state 1 command, the error cancellation navi command, and the frame state 2 command, which are shaped, are actually transmitted in the peripheral control board command transmission process of step S92 in the main control timer interrupt process.

[11-2-9. Test related]
As shown in FIG. 31, the test-related section is composed of various commands named test. In this test command, “8 * H” is assigned as the status, and “** H” (“H” represents a hexadecimal number) is assigned as a mode (“*” is a specific hexadecimal number) , And is predetermined by the specification contents of the pachinko machine 1).

  The test command instructs various inspections of the peripheral control board 4140 (for example, the peripheral control unit 4150, the liquid crystal and sound control unit 4160, the lamp drive board 4170, the motor drive board 4180, and the frame shown in FIG. Inspection of various substrates such as the decoration drive amplifier substrate 194 etc.).

  As a transmission timing of a test command, it is transmitted at the time other than RAM clear and RAM clear at the time of main control board power-on. Specifically, when the pachinko machine 1 is powered on, it returns from a power failure or momentary power interruption, and when the operation switch 860a of the payout control board 4110 is operated, the main control side power on process described later is performed. The test command is transmitted in the peripheral control board command transmission process of step S92 in the main control timer interrupt process.

11-2-10. Other]
Other divisions, as shown in FIG. 31, include start-up winning, variable shortening operation termination designation, high probability termination designation, special symbol 1 memory, special symbol 2 memory, ordinary symbol memory, special symbol 1 memory prefetching effect, and It is comprised from the command of the name of special symbol 2 memory pre-reading effect. These various commands are assigned status "9 * H" and mode "** H"("H" represents a hexadecimal number) ("*" is a specific hexadecimal number) , And is predetermined by the specification contents of the pachinko machine 1).

  The starting opening winning combination command is for instructing the start opening starting winning effect start, the start of the effect when the game ball enters the upper starting opening 2101 based on the detection signal from the upper starting opening switch 3022, The start of the effect when the game ball enters the lower starting opening 2102 based on the detection signal from the starting opening switch 2109 is instructed respectively, and the variation shortening operation end designation command is from the variation shortening operation state The state transition to the fluctuation shortening non-operation state is instructed, the high probability end designation command instructs the state transition from the high probability state to the low probability state, and the special symbol 1 memory command is a special symbol 1 Hold 0 to 4 (The game ball enters the upper starting opening 2101 shown in FIG. 9 and the special symbol display 1185 on the function display board 1191 still displays the variation of the special symbol The special symbol 2 memory command is to convey the number of balls not being used (the number of reserved balls), and the special symbol 2 memory command is 0 to 4 special symbol 2 suspension (the game ball enters the lower starting opening 2102 shown in FIG. 9) The special symbol display 1186 under the function display board 1191 is used to convey the number of balls (number of reservations) not yet used for the variable display of special symbols, and the ordinary symbol memory command is ordinary symbol 1 with 0 to 4 pieces (The game ball passes through the gate 2350 shown in FIG. 9 and the normal symbol display 1189 of the function display substrate 1191 conveys the number of balls not yet used for the variable display of the normal symbol) , Special symbol 1 memory pre-reading effect command is read based on the special symbol 1 hold before special symbol 1 hold is used to display special symbols at the special symbol display 1185 on the function display board 1191 special The special symbol 2 storage pre-reading effect command is to instruct the advance notice of the display result by the pattern display 1185, and the special symbol 2 storage pre-reading effect command is a special symbol 2 special feature in the special symbol display 1186 under the function display board 1191 Before being used for the variable display of, it instructs the start of the pre-reading effect of pre-reading and notifying the notice of the display result by the lower special symbol display 1186 based on the special symbol 2 suspension.

  As the transmission timing of these various commands, the starting opening winning command is the starting opening winning time (when the game ball enters the upper starting opening 2101 based on the detection signal from the upper starting opening switch 3022, or the lower starting opening switch The speaker housed in the speaker box 820 provided on the main body frame 3 shown in FIG. 5 and the door frame shown in FIG. 2 when the game ball enters the lower starting opening 2102 based on the detection signal from 2109) The variation reduction operation end specification command transmitted mainly from the speaker 130 provided in 5 to notify of that with voice is at the end of the stop period after the fluctuation is determined which has settled the fluctuation reduction of the specified number of times. Is sent, and the high probability end specification command is sent at the end of the stop period (after the lapse of the stop period) after the fluctuation is determined which has digested the high probability frequency in the case of “high probability N times”. , Special symbol 1 memory command, when special symbol 1 operation pending ball number change (The game ball enters the upper starting opening 2101 and it is still used for the variation display of the special symbol in the special symbol indicator 1185 on the function display board 1191 In the state where there is a number of reservations not being made, when the game ball enters the upper starting opening 2101 further and the number of reservations increases, or from the number of reservations, it is used for variation display of special symbols in the special symbol display 1185 The special symbol 2 memory command is sent when the number of reservations is reduced, and the special symbol 2 operation command is changed when the special symbol 2 operation holding ball number changes (the game ball enters the lower starting opening 2102 and the special symbol below the function display board 1191 When the number of game balls enters the lower starting opening 2102 and the number of reservations increases further while there is a number of reservations not yet used for the variable display of special symbols on the display 1186, or the number of reservations below the special symbol table It is transmitted when the number of reservations is reduced by using the special symbol in the variable display of the container 1186), and the normal symbol memory command is normal symbol 1 operation when the number of balls is changed (the game ball passes through the gate 2350) When the number of game balls passes through the gate 2350 and the number of reservations increases while the number of reservations is not yet used for variation display of normal symbols in the normal symbol display 1189 of the function display substrate 1191, Special symbol 1 memory look-ahead effect command is sent when the number of special symbol 1 operation holding balls increases (starting on the special symbol 1 operation) When the game ball enters the mouth 2101 and the number of reservations increases, it is transmitted, and the special symbol 2 memory pre-reading effect command is when the number of special symbol 2 operation hold balls increase (the game ball enters the lower starting opening 2102) Sent when the number of reservations increases). Note that these various commands are actually transmitted in the peripheral control board command transmission process of step S92 in the main control timer interrupt process.

  By the way, as described above, when the game ball enters the upper starting opening 2101 based on the detection signal from the upper starting opening switch 3022, the starting opening winning command is from the lower starting opening switch 2109. (When the game ball enters the lower starting opening 2102 based on the detection signal of), the speaker housed in the speaker box 820 provided in the main body frame 3 and the speaker 130 provided in the door frame 5 mainly with voice Although transmitted to notify that effect, how the peripheral control board 4140 shown in FIG. 15 uses the starting opening winning command may differ depending on the specifications of the pachinko machine. For example, in the pachinko machine 1 according to the present embodiment, in addition to audio notification from the speaker accommodated in the speaker box 820 provided in the main body frame 3 and the speaker 130 provided in the door frame 5, the presence or absence of fraudulent activity is monitored. It is a thing of the specification that it uses also. On the other hand, in the other pachinko machine, the speakers contained in the speaker box 820 provided in the main body frame 3 and the speakers 130 provided in the door frame 5 simply by the peripheral control board 4140 simply receiving the starting opening winning command. There is also a thing of the specification which does not notify by voice from.

11-3. Various commands from the payout control board received by the main control board]
Next, various commands from the payout control board 4110 received by the main control board 4100 will be described.

  As shown in FIG. 32, the classification of various commands from the payout control board 4110 is made up of commands with the names frame state 1, error cancellation navigation and frame state 2, and the frame state 1, error cancellation navigation, and so on. The priority is set in the order of the frame state 2.

  In the frame status 1 command (corresponds to the error generation command), out of sphere, full, in 50 or more stocks, connection abnormality and CR non-connection are prepared, and in out of sphere bit 0 (B0, "B" Represents a bit)), the value 1 is set to bit 1 (B1) if full, bit 2 (B2) is set to 1 in more than 50 stocks, and A value 1 is set to bit 3 (B3), and a value 1 is set to bit 4 (B4) when CR is not connected. In the bit 5 (B5) to bit 7 (B7) of the frame status 1 command, the value 1 is set to B5, the value 0 is set to B6, and the value 0 is set to B7.

  In the error cancellation navi command (corresponding to the error cancellation command), a ball is found, and a counting switch error and a retry error are prepared. If the ball is set to bit 2 (B2), the value 1 is set. The value 1 is set to bit 3 (B3), and the value 1 is set to bit 4 (B4) in a retry error. Here, “counting switch error” indicates whether or not the malfunction of the counting switch 751 shown in FIG. 13 has occurred. The "retry error" indicates that the payout of the inconsistent game ball due to the retry operation is repeated. In the error cancellation navi command bit (B0), bit (B1), and bit 5 (B5) to bit 7 (B7), B0 is the value 0, B1 is the value, B5 is the value, B5 is the value, B6 is the value 1, And the value 0 is set to B7.

  In the frame state 2 command, the ball removal is prepared, and during the ball removal, the value 1 is set to bit 0 (B0). The bit 1 (B1) to bit 7 (B7) of the frame state 2 command has the value 0 for B1, 0 for B2, 0 for B3, 0 for B4, 0 for B4, 1 for B5 and 1 for B6. The value 0 is set to B7.

  As the transmission timing of these various commands, the frame state 1 command is transmitted at the time of power recovery, change of the frame state, and error release navigation, and the error release navigation command is transmitted at error release navigation, frame state 2 command Is sent when power is restored and when the frame status changes. Note that these various commands are actually transmitted in the command transmission process of step S558 in the payout control unit main process of the payout control unit power-on process described later.

[12. Various control processing of main control board]
Next, various control processes performed by the main control board 4100 shown in FIG. 12 according to the progress of the game of the pachinko machine 1 will be described with reference to FIGS. FIG. 33 is a flow chart showing an example of the main control side power on process, FIG. 34 is a flow chart showing the continuation of the main control side power on process of FIG. 33, and FIG. 35 is an example of the main control timer interrupt process Is a flowchart showing First, various random numbers used for game control will be described, and then the operation of the initial value update type counter, the main control side power-on process, and the main control timer interrupt process will be described.

12-1. Various random numbers]
As a random number used for game control, a jackpot determination random number for use in determining whether or not to generate a big hit gaming state, and a jackpot determination initial value determination for use in determining an initial value of the jackpot determination random number For the random number, the random number for reach judgment to be used to decide whether to generate reach (reach is not) when not generating the big hit gaming state, and shown in FIG. 12, the upper special symbol display 1185 and the lower special A random number for a variable display pattern to be used for determining a variable display pattern of a special symbol variably displayed on the symbol display 1186, and a special symbol display 1185 and a lower special symbol display 1186 when generating a big hit gaming state A jackpot symbol random number for use in determining the jackpot symbol to be displayed derivedly and a jackpot symbol for use in determining the initial value of the jackpot symbol random number The random number for initial value determination, the small random number for small hit symbol to be used for the determination of the small hit symbol derived and displayed by the upper special symbol display 1185 and the lower special symbol display 1186 when generating the small hit gaming state, this small A random number for determining an initial value for a small hit symbol for use in determining an initial value of a random number for a winning symbol is prepared. Also, in addition to these random numbers, for determination of an ordinary symbol determination random number for use in determining whether to open or close the movable piece 2106 shown in FIG. 9 and determination of the initial value of this ordinary symbol determination random number A random number for determining an initial value for determination of an ordinary symbol to be used, a random number for an ordinary symbol variation display pattern for use in determining a variation display pattern of an ordinary symbol variably displayed on the ordinary symbol display 1189 shown in FIG. Is prepared.

  For example, the counter for updating the jackpot determination random number is updated within a predetermined fixed numerical range (from the minimum value to the maximum value from 32767 in this embodiment) ranging from the minimum value to the maximum value. The range from the minimum value to the maximum value is counted up by being incremented by one each time the main control timer interrupt processing described later is performed. The counter counts up from the initial value determination random number for big hit determination to the maximum value, and then counts up from the minimum value to the random number determination for big hit determination. When the counter has counted up the range from the minimum value to the maximum value of the jackpot determination random number, the jackpot determination initial value determination random number is updated. Such a method of updating the counter is called "initial value update type counter". The jackpot determination initial value determination random number can be obtained by executing an initial value lottery process for extracting one value from a fixed numerical range of a counter that updates the jackpot determination random number. Further, the random number for determining the normal symbol per pattern, and the random number for determining the initial value for determining the normal symbol per symbol are the same as the updating method of the random number for determining the big hit as described above.

  In the present embodiment, as described above, when the counter for updating the big hit determination random number has counted up the range from the minimum value to the maximum value of the big hit determination random number, as described above, for determining the initial value for the big hit determination. The random number is updated by executing the initial value lottery process, but when the operation switch 860a of the payout control board 4110 shown in FIG. 13 is operated when the power is turned on, or the main control side described later The value (sum value) of the checksum obtained by calculating the sum of the gaming information stored in the main control built-in RAM of the main control MPU 4100a shown in FIG. When clearing the entire area of the main control built-in RAM, such as when it does not match the value (sum value) of the checksum stored in the power-off process (power-off) The random number for determining the jackpot determining initial value is a counter that the main control MPU 4100a shown in FIG. 12 takes out the ID code from its built-in nonvolatile RAM and updates the jackpot judging random number based on the taken out ID code. An initial value derivation process for always deriving the same fixed value from the fixed numerical range is executed, and the derived fixed value is set. That is, for the jackpot determination initial value determination random number, the same fixed value derived based on the ID code is always overwritten and updated by the execution of the initial value derivation process. Thus, the value set for the jackpot determination initial value determination random number is derived using the ID code, and the manufacturer of the main control MPU 4100a uses the ID of the non-volatile RAM incorporated in the main control MPU 4100a. Based on the ID code by executing the initial value derivation process when clearing the entire area of the main control built-in RAM, with the first security measure that the ID code can not be rewritten even if an external device is stored if the code is stored. The second security measure that derives the same fixed value, and the two-step security measure by preventing it from being analyzed.

  Here, an advantage will be described in which the ID code is taken out from the non-volatile RAM built in the main control MPU 4100a and this taken out ID code is used as a random number for determining the big hit judgment. For example, a person who intends to illegally acquire a game ball to be paid out as a prize ball somehow acquires the game board 4 and disassembles it, and an ID code stored in advance in the non-volatile RAM built in the main control MPU 4100a Even if it is possible to grasp the timing at which the value of the counter that acquires fraudulently and updates the jackpot judgment random number matches the jackpot judgment value, the unique code for identifying the individual is given to the ID code. The ID code is completely different from the ID code stored in advance in the non-volatile RAM built in the main control MPU 4100a ′ provided in another game board 4 ′. That is, in the other game boards 4 ′, the timing at which the value of the counter for updating the jackpot judgment random number matches the jackpot judgment value is completely different from that of the acquired game board 4. In other words, the ID code obtained by disassembling and analyzing the obtained game board 4 is completely useless in another game board 4 ', that is, another pachinko machine 1', so it was disassembled and analyzed A big hit is made even if you aim for the start winning combination of generating the game ball into the upper starting opening 2101 and the lower starting opening 2102 shown in FIG. Unable to generate a condition.

12-2. Movement of counter of initial value update type]
When the initial value update type counter clears the whole area of the main control internal RAM (when the RAM is cleared), the main control MPU 4100a takes out the ID code from its built-in nonvolatile RAM, and based on the taken out ID code An initial value derivation process for always deriving the same fixed value from the fixed numerical range of the counter for updating the jackpot determination random number is executed, and the derived fixed value is set. The initial value update type counter counts up from the fixed value to the maximum value in the first cycle, and then counts up from the minimum value to the fixed value. When the counter has counted up the range from the minimum value to the maximum value of the jackpot judgment random number, it draws a value from the fixed numerical range of the counter for updating the jackpot judgment random number as a jackpot judgment initial value determination random number. The initial value lottery process is executed, and the value obtained by this lottery is set. In the second cycle, the initial value update type counter counts up from the value obtained by lottery to the maximum value, and then counts up from the minimum value toward the value obtained by lottery. When the counter has counted up the range from the minimum value to the maximum value of the jackpot determination random number, the initial value lottery process is executed again, the value obtained by this lottery is set, and the initial value update type counter is As the third cycle, the value obtained by the lottery is counted up toward the maximum value. In the present embodiment, values 32668 to 32767 are set as the range of the big hit determination value (big hit determination range) with low probability and are read from the normal determination table, while value 31768 with the high probability 32767 is set, and it is read from the probability variation judgment table. In the present embodiment, the counter for updating the jackpot determination random number is configured to update a predetermined fixed numerical value range ranging from the value 0 to the value 32767 as the minimum value. In other words, the range of the big hit judgment value (big hit judgment range) is the range from the middle value (value 16384) of the minimum value and the maximum value to the maximum value side in both the low probability and the high probability. It is set.

  Here, as a range of the big hit judgment value (big hit judgment range), the value 10 to the value 209 is set in the low probability, and the value 10 to the value 339 is set in the high probability. The range of values (big hit judgment range) is set to a range closer to the minimum value side from the middle value (value 16384) of the minimum value and the maximum value in both the low probability and the high probability. . In such a case, a period from the timing when the value of the initial value update type counter becomes 0 to the timing when the first value 10 in the range of the big hit judgment value (big hit judgment range), and this value 10 When the period from the next value 11 to the maximum value (value 32767) is compared, the probability of being drawn by the above-described initial value lottery process is extremely low in the former period compared to the latter period. In other words, the range from the timing when the value of the initial value update type counter becomes 0 to the last value (value 209 for low probability, value 339 for high probability) of the range of the big hit judgment value (big hit judgment range) The former range is the latter range compared to the range following the last value (value 210 for low probability, value 340 for high probability) to maximum value (value 32767). The probability of being drawn by the initial value lottery process is extremely low compared to the range. Then, for example, the game ball starts up by irradiating the radio wave toward the upper starting opening 2101 or the lower starting opening 2102 by illegally acquiring the timing when the value of the initial value update type counter becomes 0 by some method. If cheating is done as if entering the mouth 2101 or the lower start mouth 2102, the value of the initial value update type counter becomes any value within the range of the big hit judgment value (big hit judgment range) It can be said that the probability is high.

  On the other hand, as in the present embodiment, in any of the low probability and the high probability, the range of the big hit determination value (the big hit determination range) is an intermediate value (value 16384) of the minimum value and the maximum value. When the value is set in the range close to the maximum value side, the timing when the value of the initial value update type counter becomes value 0 is before the first value in the range of the big hit determination value (big hit determination range) The period between the time when the value (value 32667 for low probability, value 31767 for high probability) and the period from the first value (value 32668 for low probability, value 31768 for high probability) to the maximum value (value 32767) In comparison with the above, the probability of being drawn by the above-described initial value lottery process is extremely high in the former period compared to the latter period. In other words, the value before the first value in the range of the big hit judgment value (big hit judgment range) from the timing when the value of the initial value update type counter becomes the value 0 (value 32667 for low probability, value 31767 for high probability) Comparing the range over to the range from the first value (the value 32668 for the low probability, the value 31768 for the high probability) to the maximum (the value 32767), the former range is more comparable to the latter range The probability of being drawn by the initial value lottery process is extremely high. Then, the initial value update type counter has a range from the value 0 to the value before the first value (value 32667 for low probability, value 31767 for high probability) of the range of the big hit determination value (big hit determination range) Among them, one of the values will be the value selected by the initial value lottery process and will be set to the above-mentioned random number for determining the initial value for the big hit determination. It counts up and then counts up from the minimum value toward the value obtained by lottery. When the counter has counted up the range from the minimum value to the maximum value of the jackpot determination random number, the initial value lottery process is executed again, the value obtained by this lottery is set, and the initial value update type counter is , It will count up toward the maximum value from the value obtained by lottery.

  That is, as in the present embodiment, in any of the low probability and the high probability, the range of the big hit determination value (big hit determination range) is the median value (value 16384) from the minimum value to the maximum value to the maximum value side If the value is set in a range close to 0, the value before the first value in the range of the big hit judgment value (big hit judgment range) from the timing when the value of the initial value update type counter becomes 0 is low (low The period over which the probability is 32667 and the probability is 31767) is irregular and random. Thus, for example, the game ball is raised by irradiating the radio wave toward the upper starting opening 2101 or the lower starting opening 2102 by illegally acquiring the timing when the value of the initial value update type counter becomes 0 in some way. Even if cheating is done as if entering the starting opening 2101 or the lower starting opening 2102, the value of the initial value update type counter is either of the ranges of the big hit judgment value (big hit judgment range), It can be said that the probability of becoming a value is low.

  The initial value update type counter is repeatedly updated in the range from the minimum value to the maximum value. From the initial value to the minimum value (first value) of the range of the big hit judgment value (big hit judgment range) to the minimum value (first value) of the big hit judgment value range (big hit judgment range) by the counter in the second cycle The required time is time T0. The time required for the counter to reach the minimum value (the first value) of the big hit judgment value range (big hit judgment range) in the third cycle from time T0 is time T1 and time T1 is shorter than time T0. . The time required for the counter to reach the minimum value (initial value) of the big hit judgment value range (big hit judgment range) from time T1 to the fourth cycle is time T2, and time T2 is shorter than time T1. . As described above, in the initial value update type counter, the fluctuation is given to the time when the updated counter is the minimum value (the first value) of the range of the big hit judgment value (big hit judgment range) (periodicity The player is not aware of this by leaving the

12-3. Main control side power on process]
When the pachinko machine 1 is powered on, the main control program described above performs processing at the time of main control side power on as shown in FIGS. 33 and 34 under the control of the main control MPU 4100a of the main control board 4100. . When the main control side power-on process is started, the main control program sets the stack pointer under the control of the main control MPU 4100a (step S10). The stack pointer indicates, for example, an address stacked on the stack to temporarily store the contents of a storage element (register) in use, or temporarily returns the return address of this routine when the subroutine is ended and the process returns to this routine. It indicates the address stacked on the stack for storage, and the stack pointer advances each time the stack is stacked. In step S10, the main control program sets the initial address in the stack pointer, and the contents of the register, the return address, etc. are stacked on the stack from this initial address. Then, the stack pointer returns to the initial address by sequentially reading from the stack stacked last to the stack stacked first.

  Following step S10, the main control program starts output of the power failure clear signal to the power failure monitoring circuit 4100e shown in FIG. 21 (step S11). The blackout monitoring circuit 4100e is composed of a comparator MIC21, which is a voltage comparison circuit, and a D-type flip flop MIC22. The comparator MIC21 which is a voltage comparison circuit compares the voltage of +24 V with the reference voltage or compares the voltage of +12 V with the reference voltage to output the comparison result. The comparison result is that when no power failure or momentary interruption occurs, the logic becomes HI and is input to the PR terminal, which is a preset terminal of the D-type flip-flop MIC22. The logic becomes LOW and is input to the PR terminal which is a preset terminal of the D-type flip flop MIC22. In step S11, the output of the power failure clear signal is started to the CLR terminal which is the clear terminal of the D type flip flop MIC22. This blackout clear signal is input to the CLR terminal which is the clear terminal of the D type flip flop IC via the main control output circuit with reset function 4100ca, with its logic being LOW from the output terminal of the predetermined output port of the main control MPU 4100a Be done. Thereby, the main control MPU 4100a can release the latch state of the D type flip flop MIC22, and the logic input to the PR terminal which is the preset terminal of the D type flip flop MIC22 is set until the latch state is set. The signal can be inverted and output from the 1Q terminal which is an output terminal, and the signal from the 1Q terminal can be monitored.

  Following step S12, the main control program performs wait timer processing 1 (step S12), and determines whether or not a power failure advance signal is input (step S14). The voltage does not rise immediately between the time the power is turned on and the predetermined voltage. On the other hand, when a power failure or a momentary power failure occurs (a phenomenon in which the supply of power is suspended), when the voltage drops and becomes smaller than the power failure notification voltage, a power failure notification signal is input from the power failure monitoring circuit 4100e as a power failure notification. Similarly, when the voltage becomes lower than the power failure notification voltage during the period from the power-on to the predetermined voltage, a power failure notification signal is input from the power failure monitoring circuit 4100 e. Therefore, wait timer process 1 in step S12 is a process for waiting for the voltage to become larger than the power failure notice voltage and become stable after the power is turned on. In this embodiment, 200 milliseconds (wait timer) is used as a waiting time (wait timer). ms) is set. In the determination of step S14, it is determined whether the power failure advance signal is input. This determination is performed based on the signal output from the 1Q terminal which is the output terminal of the above-described D-type flip-flop MIC22 as a power failure advance signal.

  If there is no input of a power failure notice signal after waiting for the voltage to become higher than the power failure warning voltage and stabilized after power-on in step S14, the main control program causes a power failure at the CLR terminal which is the clear terminal of D type flip flop MIC22. The output of the clear signal is stopped (step S15). Here, the power failure clear signal changes its logic from the output terminal of the predetermined output port of the main control MPU 4100a to HI, and the CLR terminal which is the clear terminal of the D type flip flop IC via the main control output circuit 4100ca with reset function. Is input to As a result, the main control MPU 4100a can set the D type flip flop MIC22 in the latch state. The D-type flip-flop MIC22 outputs a power failure notice signal from the 1Q terminal which is an output terminal, when a state in which the logic becomes LOW to be input to the PR terminal which is a preset terminal is latched.

  Subsequent to step S15, the main control program makes it possible to execute the RAM clear process for initializing the main control built-in RAM (game storage unit) for a predetermined time from when the power is turned on (when the game side power is turned on) Operation control means). Specifically, the main control program first determines whether the operation switch 860a of the payout control board 4110 shown in FIG. 13 is operated (step S16). In this determination, the main control program inputs, to the main control MPU 4100a, an error release navi command (first error release command) based on an operation signal (detection signal) accompanying operation of the operation switch 860a of the payout control board 4110. It does depending on whether it is done or not. Based on the logical value of the operation signal, the main control program determines that the RAM clear is not instructed when the logical value of the operation signal from the operation switch 860a is HI, and the operation switch 860a is operated. On the other hand, when it is determined that the logical value of the operation signal from the operation switch 860a is LOW, it is determined that the instruction is to clear the RAM, and it is determined that the operation switch 860a is operated.

  In step S16, the main control program sets the value 1 to the RAM clear notification flag RCL-FLG when the operation switch 860a is operated (step S18). On the other hand, when the operation switch 860a is not operated in step S16, the main control program sets the value 0 to the RAM clear notification flag RCL-FLG (step S20). That is, the main control program can execute the RAM clear process for initializing the RAM (hereinafter, referred to as "main control built-in RAM") built in the main control MPU 4100a for a predetermined time from when the power is turned on. State (game control side power on operation control means). The RAM clear notification flag RCL-FLG described above determines whether or not to delete game information related to games such as probability fluctuation and unpaid award balls stored in the main control built-in RAM (game storage unit) of the main control MPU 4100a. It is a flag indicating that it is set to a value of 1 when erasing game information, and a value of 0 when not deleting gaming information. The value of the RAM clear notification flag RCL-FLG set in step S18 and step S20 is stored in a general purpose storage element (general purpose register) of the main control MPU 4100a.

  Following step S18 or step S20, the main control program performs wait timer process 2 (step S22). In this weight timer process 2, a system for performing drawing control of the game board side liquid crystal display device 1900 and the upper tray side liquid crystal display device 470 by the liquid crystal and sound control unit 4160 of the peripheral control board 4140 shown in FIG. Waiting for boot). In this embodiment, 2 seconds (s) is set as a time (boot timer) until boot.

  Subsequent to step S22, the main control program determines whether the RAM clear notification flag RCL-FLG has a value of 0 (step S24). As described above, the RAM clear notification flag RCL-FLG is set to a value 1 when the game information is deleted and a value 0 when the game information is not deleted. When the RAM clear notification flag RCL-FLG has the value 0 in step S24, that is, when the game information is not deleted, the checksum is calculated (step S26). This checksum is to calculate the total by regarding the game information stored in the main control built-in RAM as a numerical value.

  Subsequent to step S26, the main control program causes the calculated checksum value (sum value) to be the checksum value (sum value) stored in the main control side power-off process (described at power-off) described later. It is determined whether there is a match (step S28). If they match, the main control program determines whether the backup flag BK-FLG has a value 1 (step S30). The backup flag BK-FLG stores game backup information such as game information, checksum value (sum value), and backup flag BK-FLG value in the main control built-in RAM in the main control side power-off process described later. It is a flag indicating whether or not it has been set, and is set to a value 1 when the main control side power-off process has ended normally, and a value 0 when the main control side power-off process has not ended normally.

  When the backup flag BK-FLG has the value 1 in step S30, that is, when the main control side power-off process is ended normally, the main control program sets the work area of the main control internal RAM as power recovery ( Step S32). In this setting, in addition to setting the backup flag BK-FLG to the value 0, the power recovery information is read out from the ROM built in the main control MPU 4100a (hereinafter referred to as "main control built-in ROM"). The time information is set in the work area of the main control built-in RAM. Note that “power recovery” refers to the state where power has been turned on after the power has been shut off, as well as the state where power has been restored since a power failure or a momentary power failure, and detection of high frequency irradiation being detected. Also includes the state of recovery after that.

  Subsequent to step S32, the main control program performs power-on command creation processing (step S34). In this power-on command creation process, game information is read from the game backup information, and various commands corresponding to the game information are stored in a predetermined storage area of the main control built-in RAM.

  On the other hand, when the RAM clear notification flag RCL-FLG is not 0 (it is 1) at step S24, that is, when deleting the game information, or when the checksum values (sum values) do not match at step S28. When the backup flag BK-FLG is not 1 (value 0) at step S30, that is, when the main control side power-off process has not been completed normally, the main control program generates the entire main control internal RAM. The area is cleared (step S36). That is, the main control program executes the game control control side RAM clear processing triggered by the input of the detection signal accompanying the operation of the operation switch 860a described above (payout control side power on operation control means). Specifically, the main control program is performed by writing the value 0 to the main control built-in RAM. Alternatively, the main control program may read and set a predetermined value from the main control built-in ROM as an initial value. Further, when the logical value of the operation signal from the operation switch 860a instructs the RAM clear when erasing the game information, the main control MPU 4100a does not match the process when the sum values do not match, or when the main control power is turned off. When not terminated normally, the unique ID code stored in advance in the non-volatile RAM of the main control MPU 4100a is taken out, and based on the taken out ID code, the big hit judgment random number is always updated from the fixed numerical range of the counter. An initial value derivation process for deriving the same fixed value is performed, and this fixed value is set to the jackpot determination initial value determination random number for use in determining the initial value of the above-described jackpot determination random number.

  Following step S36, the main control program sets a work area of the main control built-in RAM as an initial setting (step S38). This setting is performed by reading out the initial information from the main control built-in ROM and setting the initial information in the work area of the main control built-in RAM.

  Subsequent to step S38, the main control program performs RAM clear notification and test command creation processing (step S40). In this RAM clear notification and test command creation processing, a power on command divided into power on shown in FIG. 30 for clearing the main control built-in RAM and reporting that initialization has been performed is created and peripheral The test commands classified into the test relation shown in FIG. 31 for performing various inspections of the control board 4140 are created and stored as transmission information in the transmission information storage area of the main control internal RAM.

  Subsequent to step S34 or step S40, the main control program performs interrupt initialization (step S42). This setting is to set an interrupt cycle when the main control side timer interrupt process to be described later is performed. In this embodiment, it is set to 4 ms.

  Following step S42, the main control program performs interrupt permission setting (step S44). By this setting, the main control timer interrupt process is repeatedly performed at the interrupt cycle set in step S42, that is, every 4 ms.

  Subsequent to step S44, when a predetermined time has elapsed from the time of power on, that is, when the main control-side main process is started, the main control program generates an error cancel navigation command It will regulate execution of game control side RAM clear processing which is triggered by receipt (normal time operation control expedient). As described above, according to the concept of time sharing, the main control program detects the detection signal input following the operation of the operation switch 860a, as described above, for the error cancellation navigation command for a predetermined time from the time of power on. The RAM clear process is executed triggered by the input (game control side power on operation control means), and after the predetermined time has elapsed, the execution of the RAM clear process is restricted even if the error cancellation navigation command is input ( The game control side normal operation control means), is handled as a release switch for releasing the error notification accompanying the error that has occurred. In other words, the operation switch 860a (error cancellation unit), which was originally used to cancel an error that occurred in relation to the payout operation, is used as a game storage unit for a predetermined time after the power is turned on. The main control built-in RAM (and the payout control built-in RAM as a payout storage unit to be described later) functions as an operation unit for executing a RAM clear process for starting initialization of the RAM, or after the lapse of the predetermined time It can function as an operation unit for canceling an error that has occurred in relation to the ball dispensing operation.

  Next, the main control program sets the value A in the watchdog timer clear register WCL (step S46). The value A, the value B and the value C are sequentially set in the watchdog timer clear register WCL to clear the watchdog timer.

  Following step S46, the main control program determines whether or not a power failure notice signal is input (step S48). As described above, when the power of the pachinko machine 1 is shut down or a power failure or momentary stop occurs, a power failure notification signal is input from the power failure monitoring circuit 4100e as a power failure notification when the voltage becomes lower than the power failure notification voltage. The determination in step S48 is performed based on the power failure advance signal.

  If there is no input of the power failure advance notice signal in step S48, the main control program performs non-attrition random number update processing (step S50). In this non-coincidence random number update process, the random number for reach determination, the random number for variation display pattern, the random number for big hit symbol initial value determination, the random number for small hit symbol initial value determination, etc. are updated. As described above, in the non-coincidence random number update process, the random number regardless of the collision judgment (big hit judgment) is updated. In addition, the random number for determining a normal symbol, the random number for determining an initial value for determining a normal symbol, the random number for determining a normal symbol variation pattern, and the like described above are also updated by the non-falling random number updating process.

  Following step S50, the process returns to step S46, the main control program sets the value A in the watchdog timer clear register WCL, and determines in step S48 whether or not there is an input of a power failure notification signal, and this power failure notification If there is no signal input, the non-coincidence random number updating process is performed in step S50, and steps S46 to S50 are repeated. The process of steps S46 to S50 is referred to as "main control side main process".

  On the other hand, when the power failure notice signal is input in step S48, the main control program performs interrupt disable setting (step S52). By this setting, the main control side timer interrupt process to be described later is not performed, the writing to the main control built-in RAM is prevented, and the rewriting of the game information is protected.

  Following step S52, the main control program starts outputting a power failure clear signal (step S53). Here, the same processing as the processing for starting output of the power failure clear signal in step S11 is performed. Thus, the main control program can release the latch state of the D-type flip flop MIC22 under the control of the main control MPU 4100a.

  Subsequent to step S53, the main control program is the start port solenoid 2105, the attachment solenoid 2108, the upper special symbol display 1185, the lower special symbol display 1186, the upper special symbol memory display 1184, and the lower special shown in FIG. The drive signal being output to the symbol storage indicator 1187, the normal symbol indicator 1189, the normal symbol storage indicator 1188, the game state indicator 1183, the round indicator 1190, etc. is stopped (step S54).

  Subsequent to step S54, the main control program calculates a checksum and stores the calculated value (step S56). This checksum is calculated by regarding the gaming information in the work area of the main control built-in RAM as a numerical value, excluding the storage area of the checksum value (sum value) and the backup flag BK-FLG described above.

  Following step S56, the main control program sets the backup flag BK-FLG to the value 1 (step S58). This completes the storage of game backup information.

  Subsequent to step S58, the main control program performs setting for clearing the watchdog timer (step S60). This clear setting is performed by sequentially setting the value A, the value B, and the value C in the watchdog timer clear register WCL as described above.

  Following step S60, an infinite loop is entered. In this infinite loop, since the value A, the value B and the value C are not sequentially set in the watchdog timer clear register WCL, the watchdog timer is not set to be cleared. Therefore, the main control MPU 4100a is reset, and then the main control MPU 4100a performs this main control side power-on process again. The process of step S52 to step S60 and the infinite loop are referred to as "main control side power-off process".

  The pachinko machine 1 (main control MPU 4100a) is reset when a power failure or a momentary power failure occurs, and the main control side power-on process is performed when the power is restored thereafter.

  In step S28, it is checked whether the game backup information stored in the main control built-in RAM is normal or not, and in step S30, whether or not the main control side power-off process has ended normally. Is examining. As described above, by double checking the game backup information stored in the main control built-in RAM, it is checked whether the game backup information is stored by fraud or not.

12-4. Main control timer interrupt processing]
Next, the main control timer interrupt process will be described. The main control timer interrupt process is repeatedly performed every interrupt cycle (4 ms in the present embodiment) set in the main control power-on process shown in FIGS.

  When the main control side timer interrupt processing is started, in the main control board 4100, the main control program sets the value B in the watchdog timer clear register WCL as shown in FIG. 35 under the control of the main control MPU 4100a. (Step S70). At this time, the value B is set in the watchdog timer clear register WCL following the value A set in step S46 of the main control side power-on process (main control side main process).

  Following step S70, the main control program clears the interrupt flag (step S72). By clearing this interrupt flag, the interrupt cycle is initialized, and the next interrupt cycle is clocked from its initial value.

  Following step S72, the main control program performs switch input processing (step S74). In this switch input process, various signals input to input terminals of various input ports of the main control MPU 4100a are read and stored as input information in the input information storage area of the main control built-in RAM. Specifically, this main control program detects, for example, a game ball having entered the general winning opening 2104 or 2201 shown in FIG. 9, a detection signal from the general winning opening switch 3020 or 3020 shown in FIG. A detection signal from the count switch 2110 shown in FIG. 12 which detects the game ball entered in the special winning opening 2103 shown in FIG. 9 and a game ball detected in the upper starting opening 2101 shown in FIG. A detection signal from the upper starting opening switch 3022 shown in FIG. 12, a detecting signal from the lower starting opening switch 2109 shown in FIG. 12 for detecting gaming balls having entered the lower starting opening 2102 shown in FIG. The detection signal from the gate switch 2352 shown in FIG. 12 which detects the game ball having passed through the gate portion 2350 shown, and the magnetic detection sensor which detects a fraudulent action using the magnet shown in FIG. The payout ACK signal from the payout control board 4110 which indicates that the payout control board 4110 shown in FIG. 12 has normally received the detection signal from the touch 3024 and the prize ball command transmitted in the prize ball control processing described later. It reads and stores it as input information in the input information storage area. In addition, the detection signal from the upper starting opening switch 3022 which detects the game ball which entered the upper starting opening 2101 and the detection signal from the lower starting opening switch 2109 which detects the game ball which entered the lower starting opening 2102 are read respectively. The start-up winning command divided into the other parts shown in FIG. 31 corresponding to this is stored as the transmission information in the transmission information storage area described above. That is, when there is a detection signal from the upper starting opening switch 3022, the corresponding starting opening winning command is stored as transmission information in the transmission information storage area, and when there is a detection signal from the lower starting opening switch 2109, A starting opening winning command corresponding to this is stored as transmission information in the transmission information storage area.

  In this embodiment, a detection signal from the general winning opening switches 3020 and 3020 for detecting gaming balls entering the general winning openings 2104 and 2201, and a count switch 2110 for detecting gaming balls entering the large winning opening 2103. Detection signal from the upper starting opening 2101, detection signal from the upper starting opening switch 3022 for detecting gaming balls entering the upper starting opening 2101, detection signal from the lower starting opening switch 2109 for detecting gaming balls entering the lower starting opening 2102 The detection signal from the gate switch 2352 for detecting gaming balls having passed through the gate unit 2350 is first read as the first time when the switch input processing is started, and after a predetermined time (for example, 10 μs) has elapsed , Read again as the second time. Then, the result of the second reading is compared with the result of the first reading. Among the comparison results, it is determined whether there is one that is the same result. If the result is not the same, the result is further read again as the third time, and the result of the third read is compared with the result of the second read. Among the comparison results, it is determined again whether or not there is the same result. If the result is not the same, it is read again as the fourth time, and the result of the fourth read is compared with the result of the third read. Among the comparison results, it is determined again whether or not there is the same result. We treat the same result and the one that there is no game ball entering.

  As described above, in the switch input process, the main control program first detects the detection signals from the general winning opening switches 3020 and 3020, the count switch 2110, the upper starting opening switch 3022, the lower starting opening switch 2109, and the gate switch 2352. False detection due to the influence of chattering or noise, etc. by performing a total of two readings by two readings which are compared over the 3rd time and 2 times reading which is compared over the 2nd time and the 4th time Can increase the reliability of detection signals from the general winning opening switches 3020 and 3020, the count switch 2110, the upper starting opening switch 3022, the lower starting opening switch 2109, and the gate switch 2352. be able to.

  Following step S74, the main control program performs timer subtraction processing (step S76). In this timer subtraction process, for example, the time during which the upper special symbol display 1185 and the lower special symbol display 1186 are lighted in accordance with the special symbol to be described later and the variable display pattern determined in the special electric character control process, the ordinary symbol to be described later The payout control board 4110 is normal for various commands transmitted by the main control board 4100 (main control MPU 4100a) in addition to the time for the normal symbol display 1189 to light in accordance with the normal symbol variation display pattern determined in the normal motor combination control process. When it is determined whether or not the payer ACK signal for notifying that it has been received is input, time management such as an ACK signal input determination time set as the determination condition is performed. Specifically, when the fluctuation time of the fluctuation display pattern or the normal symbol fluctuation display pattern is 5 seconds, the timer interruption period is set to 4 ms, so the fluctuation time is subtracted by 4 ms each time this timer subtraction processing is performed. When the subtraction result becomes 0, the fluctuation time of the fluctuation display pattern or the normal symbol fluctuation display pattern is accurately measured.

  In the present embodiment, the ACK signal input determination time is set to 100 ms. Each time the timer subtraction processing is performed, the ACK signal input determination time is reduced by 4 ms, and when the subtraction result becomes 0, the ACK signal input determination time is accurately counted. The various times and the ACK signal input determination time are stored as time management information in the time management information storage area of the main control built-in RAM.

  Subsequent to step S76, the main control program performs a false random number update process (step S78). In this success random number update process, the above-described random number for big hit determination, the random number for big hit symbol, and the random number for small hit symbol are updated. Moreover, in addition to these random numbers, random numbers for jackpot symbol initial value determination updated in the non-falling random number update process of step S50 in the main control side power-on process (main control side main process) shown in FIG. And the random number for the initial value decision for small hitting design is renewed. The random number for determining the initial value for the big hit symbol and the random number for determining the initial value for the small hit symbol are further improved in the main control side main processing and the main control side timer interrupt processing by being updated in randomness. . On the other hand, since the big hit determination random number, the big hit symbol random number, and the small hit symbol random number are random numbers involved in the hit determination (big hit determination), each counter is only executed each time this hit random number update processing is performed. Count up.

  For example, as described above, the counter for updating the jackpot determination random number is an initial value update type counter, and a predetermined fixed numerical range from the minimum value to the maximum value (in the present embodiment, the value is set as the minimum value) The range from the minimum value to the maximum value is incremented by one each time the main control timer interrupt processing is performed, and the range from the minimum value to the maximum value is incremented by one. It counts up from the initial value determination random number for big hit determination to the maximum value (value 32767), and then counts up from the minimum value (value 0) to the random number determination for big hit determination. When the counter for updating the big hit determination random number has counted up the range from the minimum value to the maximum value of the big hit determination random number, the big hit determination initial value determination random number is updated by this false random number updating process. The jackpot determination initial value determination random number can be obtained by executing an initial value lottery process for extracting one value from a fixed numerical range of a counter that updates the jackpot determination random number. In addition, the random number per normal symbol determination described above and the random number per normal symbol determination initial value determination random number are also updated by this success random number update processing. The normal symbol determination random number is the same as the above-described method for updating the jackpot determination random number, and the description thereof will be omitted.

  In this embodiment, the main control side power on process shown in FIG. 34 (main control shown in FIG. 34) random number for determining the big hit determination initial value, big hit symbol initial value determination random number, and small hit symbol initial value determination random number The main process is updated in step S50 of the non-incidence random number update process in step S50 and in the main control side timer interrupt process of step S78 in the main control side timer interrupt process, but this routine is updated each time the interrupt timer is generated. When the number of times of execution of the non random random number update process in step S50 becomes random by repeatedly executing the main control side main process within the remaining time from the occurrence of unevenness in the processing time of the next to the generation of the next interrupt timer. Step S50: A random number for determining the initial value for the big hit, a random number for determining the initial value for the large hit symbol, and a random number for determining the initial value for the small hit symbol Or as a mechanism to update only in non Toraku random number update process.

  Subsequent to step S78, the main control program performs a winning ball control process (step S80). In this prize ball control processing, input field is read out from the above-mentioned input information storage area, and based on this input field, a prize ball command shown in FIG. The self-check command shown in FIG. 29 is generated to confirm the connection state between the delivery control substrate 4110 and the substrate. Then, the prize ball command and the self check command that have been created are transmitted to the payout control board 4110 as the main payment serial data. For example, when one game ball enters the big winning opening 2103 shown in FIG. 9, a prize ball command to pay out 15 balls as a prize ball is created and transmitted to the payout control board 4110 or this prize ball command When a dispenser ACK signal notifying that the payout control substrate 4110 has been received normally is not input within a predetermined time, a self check command is generated to confirm the connection between the main control substrate 4100 and the payout control substrate 4110. And sends it to the payout control board 4110.

  Following step S80, the main control program performs frame command reception processing (step S82). In the payout control board 4110, the payout control program is various commands of 1 byte (8 bits) divided into the status display shown in FIG. 32 (for example, frame status 1 command, error cancellation navi command, and frame status 2 command) Send On the other hand, as described later, the payout control program outputs an error occurrence command when an error occurs in the payout operation, or outputs an error cancellation navi command based on a detection signal of the operation switch 860a. In the frame command reception process described above, when the main control program normally receives the various commands as the payee serial data, the information for conveying that fact to the payout control board 4110 is stored as the output information of the main control internal RAM output information. Store in the area. Further, the main control program reshapes the command normally received as the payee serial data into a 2-byte (16-bit) command (various commands classified into the status display of FIG. 31 (frame status 1 command, error cancellation) The navigation command and the frame state 2 command) are stored in the transmission information storage area described above as transmission information. Here, the frame status 1 command corresponds to a first error generation command, and the error release navigation command corresponds to a first error release command.

  Subsequent to step S82, the main control program performs a fraud detection process (step S84). In this fraudulent action detection process, the abnormal state regarding the winning balls is confirmed. For example, when the input information is read from the above-described input information storage area and the detection signal from the count switch 2110 is input when the game is not in the big hit gaming state (when the gaming ball enters the big winning opening 2103) A prize failure display command divided into the notification display shown in FIG. 31 as an abnormal state is created, and is stored in the transmission information storage area described above as transmission information.

  Subsequent to step S84, the main control program performs a special symbol and special electric combination product control process (step S86). In this special symbol and special motorized product control process, the value of the counter for updating the above-mentioned big hit judgment random number is taken out and it is judged whether it matches with the big hit judgment value stored in advance in the main control built-in ROM (big hit Determine whether or not to generate a gaming state (referred to as "special lottery".) Or take out the value of the counter for updating the jackpot symbol random number, and with the probability variation hit determination value stored in advance in the main control built-in ROM It is determined whether or not they match (determination of whether or not to generate a probability change). Here, “probability fluctuation” means that the probability of hitting a jackpot changes to a high probability (probability variation) set higher than that at normal time (low probability). In the present embodiment, values 32668 to 32767 are set as the range (big hit determination range) of the above-described big hit determination values with low probability and are read out from the normal determination table, while the value is 31768 with high probability. A value of 32767 is set and read out from the probability variation judgment table. As described above, in the special symbol and special motorized product control process in step S86, whether or not the value of the counter for updating the jackpot determination random number matches the jackpot determination value stored in advance in the main control internal ROM When determining whether or not the jackpot determination random number is updated, it is determined whether the value of the counter for updating the jackpot determination random number is included in the jackpot determination range.

  When these determination results are based on the upper starting opening switch 3022, various commands related to the special view 1 tuning effect shown in FIG. 30 are created, while the lottery results are based on the lower starting opening switch 2109 In addition to creating various commands related to the special figure 2 tuning effect shown in FIG. 30 and storing it as transmission information in the transmission information storage area, the special symbol display 1185 or the upper special symbol display according to the determined variation display pattern of the special symbol The output of the lighting signal to the upper special symbol display 1185 or the lower special symbol display 1186 is set so that the lower special symbol display 1186 is turned on, and is stored in the above-described output information storage area as output information. In addition, according to the gaming state to be generated, for example, when it becomes a big hit gaming state, various commands (big hit opening command, big winning opening 1 open N-th display command, big winning opening 1 shown in FIG. A close display command, a big winning opening 1 count display command, a big hit ending command, and a big hit symbol display command) are created and stored in the sending information storage area as sending information, or the opening / closing member 2107 shown in FIG. Set the output of the drive signal to the attacker solenoid 2108 and store it in the output information storage area as output information, or when the number of times the big winning opening 2103 is opened from the closed state is two times (round), as shown in the figure. 2 to turn on the 2 round indicator lamp 1190a of the round indicator 1190 shown in 11 The output of the lighting signal to the sound display lamp 1190a is set and stored as output information in the output information storage area, or when the round is 15 times, the 15 round display lamp 1190b of the round display 1190 shown in 89 is lighted The output of the lighting signal to the 15-round display lamp 1190b is set to be stored, and stored in the output information storage area as output information, or the presence or absence of occurrence of probability fluctuation is lit in a predetermined color to the gaming state indicator 1183 The output of the lighting signal is set and stored as output information in the output information storage area.

  Subsequent to step S86, the main control program performs normal symbol and normal motorized product control processing (step S88). In this ordinary symbol and ordinary motor combination control process, input information is read out from the above-described input information storage area, and gate winning processing is performed based on the input information. In this gate winning process, it is determined from the input information whether or not the detection signal from the gate switch 2352 is input to the input terminal. Based on the determination result, when the detection signal is input to the input terminal, the value etc. of the counter for updating the above-mentioned random number per symbol for determination is extracted and gate information storage area of the main control internal RAM as gate information Remember to

  In this gate information storage area, the 0th to third partitions (four partitions) are provided, and gate information is stored in the order of the 0th partition, the first partition, the second partition, and the third partition. It is supposed to be. For example, when gate information is stored in the 0th to 2nd sections of the gate information storage, the gate information is stored in the 3rd section of the gate information storage when the detection signal from the gate switch 2352 is input to the input terminal Do.

  The gate information stored in the zeroth section of the gate information storage is set in the work area of the main control built-in RAM. When this gate information is set, the gate information of the first section of the gate information storage is gated to the 0th section of the gate information storage, the gate information of the second section of the gate information storage is gated to the first section of the gate information storage, The gate information of the third section of the information storage is shifted to the second section of the gate information storage, and the third section of the gate information storage becomes an empty area. For example, when gate information is stored in the first to second sections of the gate information storage, the gate information of the first section of the gate information storage is stored in the zeroth section of the gate information storage. The gate information of the two partitions is shifted to the first partition of the gate information storage, and the second partition of the gate information storage and the third partition of the gate information storage become vacant areas. Here, when the gate information is stored in the first to third sections of the gate information storage, the gate information described above causes the normal symbol storage indicator 1188 to light up with the total number of stored gate information as a holding ball. The output of the lighting signal of the normal symbol storage indicator 1188 is set based on the above, and stored as the output information in the above-mentioned output information storage area.

  Following the gate winning process, the gate information set in the work area of the main control built-in RAM is read out, and the value of the random symbol determination per normal symbol is taken out from the read gate information and stored in advance in the main control built-in ROM. It is determined whether or not it matches the normal symbol hit determination value (referred to as a "normal lottery"). Whether or not the movable piece 2106 is operated to open and close is determined based on the determination result (lottery result by normal lottery). When the opening and closing operation is performed by this determination, the pair of movable pieces 2106 is expanded in the left and right direction, and the game ball can be accepted to the lower starting opening 2102 and the game state becomes advantageous to the player. It becomes gaming state. The variation display pattern of the normal symbol corresponding to this determination is determined based on the random number for the normal symbol variation display pattern described above, and various commands classified into the common figure synchronization effect related shown in FIG. The output of the lighting signal to the normal symbol display 1189 is set so as to light the normal symbol display 1189 according to the determined variation display pattern of the normal symbol while being stored in the transmission information storage area described above, and the above mentioned output information Store in the output information storage area. In addition, for example, when the value of the random number for determining the normal symbol taken out matches the determination value for the normal symbol stored in advance in the main control built-in ROM, various commands relating to the ordinary electric circuit production shown in FIG. Are stored in the transmission information storage area as transmission information, and the output of the drive signal to the starting port solenoid 2105 is set to open and close the movable piece 2106, and is stored in the above-described output information storage area as output information. On the other hand, when the value of the random number for determination for the selected ordinary symbol does not match the determination value for the ordinary symbol stored in advance in the main control built-in ROM, the ordinary symbol is displayed based on the random number for the ordinary symbol variation display pattern described above. The variable display pattern is determined, and various commands classified into the general drawing tuning effect related shown in FIG. 30 are created, and are described above as transmission information. The output of the lighting signal to the normal symbol display 1189 is set to light the normal symbol display 1189 according to the determined normal symbol variation display pattern while being stored in the communication information storage area, and the output information storage described above as the output information Store in the area.

  Following step S88, the main control program performs port output processing (step S90). In this port output processing, output information is read from the output information storage area described above from the output terminals of various output ports of the main control MPU 4100a, and various signals are output based on the output information. The main control program, for example, outputs a main payout ACK signal to the payout control substrate 4110 when various commands from the payout control substrate 4110 are normally received from the output terminal of the predetermined output port of the main control MPU 4100a based on the output information. When the jackpot is in a big hit game state, a drive signal is output to an attacker solenoid 2108 that opens and closes the opening and closing member 2107 of the big winning opening 2103. A drive signal is output to a start opening solenoid 2105 that opens and closes the movable piece 2106. In addition to output, 15 round big hit information output signal, 2 round big hit information output signal, probability variation in progress information output signal, special symbol display information output signal, normal symbol display information output signal, time short and middle information output information, start Pay various information (gaming information) signals about the game such as mouth winning information output signal And outputs to the control board 4110.

  Subsequent to step S90, the main control program performs peripheral control board command transmission processing (step S92). In the peripheral control board command transmission process, the main control program reads transmission information from the transmission information storage area described above, and transmits the transmission information to the peripheral control board 4140 as main cycle serial data. In this transmission information, various commands classified in the special figure 1 tuning effect related shown in FIG. 30 created in the main control timer interrupt processing which is this routine, various types classified in the special figure 2 synchronous effect related When the gaming ball entered the various commands (for example, large winning a prize mouth 2103 (see Figure 9) which is classified to command, big hit relation is detected, it is the big winning based on the detection signal from count switch 2110 (see Figure 12) 31. A large winning opening 1 count display command corresponding to a mouth count command), various commands classified as power on, various commands classified as general drawing entrainment related, various commands classified as ordinary electric circuit related director, FIG. 31 The various commands (door opening command, door frame closing command, body frame opening command, body frame closing command, etc.) classified into the notification display shown in Various commands (frame state 1 command, error reset navigation command and the frame state 2 command), various commands and various commands are classified into other are divided into test-related are stored. In the main cycle serial data, one packet is configured into 3 bytes. Specifically, the main cycle serial data has a status indicating the type of command having a storage capacity of 1 byte (8 bits), a mode indicating a variation of effects having a storage capacity of 1 byte (8 bits), and a status And a sum value obtained by calculating the sum of the modes as numerical values, and this sum value is created at the time of transmission.

  In this peripheral control board command transmission process, when the main control program receives a frame state 1 command (first error occurrence command) from the payout control board 4110 by the reception port of the RXA terminal, the peripheral control board 4140 (effect control unit And the frame state 1 command (second error generation command) is transmitted (error command transmission means). In this case, the main control program transfers the frame state 1 command having the form shown in FIG. 32 received from the payout control board 4110 to the peripheral control board 4140 as the frame state 1 command having the form shown in FIG.

  On the other hand, in the peripheral control board command transmission process, when the main control program receives an error cancellation navigation command (first error cancellation command) from the payout control board 4110 through the reception port of the RXA terminal, the peripheral control board 4140 An error release navi command (second error release command) is transmitted to the (error command sending means). In this case, the main control program transfers the error release navi command in the form shown in FIG. 32 received from the payout control board 4110 to the peripheral control board 4140 as an error release navi command in the form shown in FIG.

  Furthermore, in the peripheral control board command transmission process, when the main control program receives the main body frame open command (first main body frame open command) from the payout control board 4110 through the reception port of the RXA terminal, the peripheral control board 4140 A main body frame open command (second main body frame open command) is transmitted to (effect control unit) (main body frame command transmission means, second main body frame transmission means). In this case, the main control program transfers the main body frame open command having the form shown in FIG. 32 received from the payout control board 4110 to the peripheral control board 4140 as the main body frame open command having the form shown in FIG. On the other hand, in the peripheral control board command transmission process, when the main control program receives the main body frame closing command (first main body frame closing command) from the payout control board 4110 by the reception port of the RXA terminal, the peripheral control board 4140 ( A main body frame closing command (second main body frame closing command) is transmitted to the effect control unit) (main body frame command transmission means, second main body frame command transmission means). In this case, the main control program transfers the main body frame closing command having the form shown in FIG. 32 received from the payout control board 4110 to the peripheral control board 4140 as the main body frame closing command having the form shown in FIG.

  In the peripheral control board command transmission process, when the main control program receives a door open command (first door open command) from the payout control board 4110 by the reception port of the RXA terminal, the peripheral control board 4140 (effect control) Section) sends a door open command (second door frame open command) (door frame command transmission means, second door frame command transmission means). In this case, the main control program transfers the door frame closing command having the form shown in FIG. 32 received from the payout control board 4110 to the peripheral control board 4140 as the door closing command having the form shown in FIG. On the other hand, in the peripheral control board command transmission process, when the main control program receives the door closing command (first door closing command) from the payout control board 4110 by the reception port of the RXA terminal, the peripheral control board 4140 (effect control) Section) sends a door closing command (second door closing command) (a door frame command sending means, a second door frame command sending means). In this case, the main control program transfers the door closing command having the form shown in FIG. 32 received from the payout control board 4110 to the peripheral control board 4140 as the door closing command having the form shown in FIG.

  Following step S92, the main control program sets the value C in the watchdog timer clear register WCL (step S94). The value C is set in the watchdog timer clear register WCL in step S94, whereby the value C is set in the watchdog timer clear register WCL following the value B set in step S70. As a result, the value A, the value B, and the value C are sequentially set in the watchdog timer clear register WCL, and the watchdog timer is cleared.

  Following step S94, the main control program switches (returns) the register (step S96), and ends this routine. Here, when the main control timer interrupt processing, which is the present routine, is started, the main control MPU 4100a loads the contents of the general purpose register on the stack in a hardware manner and saves it. This prevents the destruction of the contents of the general purpose register used in the main control side main processing. At step S96, the contents stored in the stack and read out are read out and written in the original register. The main control MPU 4100a sets the interrupt permission after the return in step S96.

[13. Various control processing of payout control board]
Next, various control processes performed by the payout control board 4110 shown in FIG. 13 will be described with reference to FIGS. FIG. 36 is a flow chart showing an example of the processing when the payout control unit is turned on, and FIG. 37 is a flowchart showing the continuation of the processing when the power is turned on of FIG. FIG. 39 is a flowchart showing an example of a payout control unit timer interrupt process, FIG. 40 is a flowchart showing an example of a rotation angle switch history creation process, and FIG. 41 is a sprocket FIG. 42 is a flow chart showing an example of a ball look determination process, and FIG. 43 is a flow chart showing an example of a prize ball stock number addition process for a prize ball. 44 is a flow chart showing an example of a winning ball stock number addition process for a rental ball, and FIG. 45 shows an example of a stock monitoring process. FIG. 46 is a flow chart showing an example of the payout ball look-up operation determination setting process, FIG. 47 is a flow chart showing an example of the payout setting process, and FIG. 48 is an example of the ball look-up action setting process 49 is a flowchart showing an example of the retry operation monitoring process, FIG. 50 is a flowchart showing an example of the inconsistency counter reset determination process, and FIG. 51 is a flowchart showing an example of the error release operation determination process FIG. 52 is a timing chart showing the signal processing (a) at the time of payout operation by ball lending and the input signal confirmation processing (b) from the CR unit.

  First, the payout control unit power-on processing will be described, and then, the payout control unit timer interrupt processing, ball removal switch operation determination processing, rotation angle switch history creation processing, sprocket fixed position determination skip processing, ball coverage determination processing, prize Ball prize ball stock number addition processing, prize ball stock number addition processing for rental balls, stock monitoring processing, withdrawal ball look operation judgment setting processing, payout setting processing, ball look operation setting processing, retry operation monitor processing, inconsistency The counter reset determination process and the error release operation determination process will be described. In addition, ball removal switch operation determination processing, rotation angle switch history creation processing, sprocket fixed position determination skip processing, ball sight determination processing, prize ball prize ball stock number addition processing, rental ball prize ball stock number addition processing, stock The monitoring process, the payout ball viewing operation determination setting process, the retry operation monitoring process, the inconsistency counter reset determination process, and the error release operation determination process are one of the main operation setting processes in step S562 in the payout control unit power-on process described later. Performed as processing, rotation angle switch history creation processing, sprocket fixed position determination skip processing, ball look determination processing, retry operation monitoring processing, inconsistency counter reset determination processing, error release operation determination processing, prize ball stock ball number Addition processing, winning ball stock number addition processing for rental balls, stock monitoring processing, and the processing for setting out the movement of the balls to be judged Priority in turn has been set.

13-1. Processing when the dispensing control unit is turned on]
When the pachinko machine 1 is powered on, the payout control program in the payout control unit 4120 of the payout control board 4110 turns on the payout control unit under the control of the payout control MPU 4120a, as shown in FIGS. Perform time processing. When the payout control unit power-on process is started, the payout control program causes the payout control MPU 4120a to set an interrupt mode (step S500). This interrupt mode is to set the priority of the interrupt of the payout control MPU 4120a. In the present embodiment, a payout control unit timer interrupt process described later is set to the highest priority, and when an interrupt of the payout control unit timer interrupt process occurs, the process is preferentially performed.

  Following step S500, the payout control program performs input / output setting (input / output setting of I / O) (step S502). In this I / O input / output setting, settings and the like of various input ports and various output ports of the payout control MPU 4120 a are performed.

  Subsequent to step S502, the payout control program performs weight timer process 1 (step S506), and determines whether or not a power failure notice signal is input (step S508). The voltage does not rise immediately between the time the power is turned on and the predetermined voltage. On the other hand, when a power failure or a momentary power failure occurs (a phenomenon in which the supply of power is suspended), if the voltage drops and becomes smaller than the power failure warning voltage, the power failure monitoring circuit 4100e shown in FIG. A notice signal (delivery blackout notice signal) is input. Similarly, when the voltage becomes lower than the power failure warning voltage during the period from power-on to a predetermined voltage, a power failure notification signal (payout failure notification signal) is input from the power failure monitoring circuit 4100e of the main control board 4100. Therefore, wait timer process 1 in step S506 is a process for waiting until the voltage becomes larger than the power failure notice voltage and becomes stable after power on. In the present embodiment, 200 milliseconds (wait timer) is used as a waiting time (wait timer). ms) is set. The determination in step S508 is performed based on the power failure notification signal (payout failure notification signal) from the power failure monitoring circuit 4100e of the main control board 4100.

  Subsequent to step S508, the payout control program determines whether the operation switch 860a is operated (step S512). This determination is based on the logical value of the operation signal from the operation switch 860a, and when the logical value of the operation signal from the operation switch 860a is HI, it is judged that it does not instruct to perform the RAM clear and the operation switch When it is determined that the RAM clear is instructed when the logical value of the operation signal from the operation switch 860a is LOW while it is determined that the 860a is not operated, and the operation switch 860a is operated. judge.

  When the operation switch 860a is operated in step S512, the payout control program sets the payout RAM clear notification flag HRCL-FLG to the value 1 (step S514). That is, the payout control program can execute the RAM clear process for initializing the RAM (hereinafter, referred to as “payout control built-in RAM”) built in the payout control MPU 4120a for a predetermined time from when the power is turned on. State (the discharge control side power on operation control means). On the other hand, when the operation switch 860a is not operated in step S512, the payout control program sets the payout RAM clear notification flag HRCL-FLG to the value 0 (step S516). The payout RAM clear notification flag HRCL-FLG is stored in the payout control built-in RAM (payout storage unit) of the payout control MPU 4120a, for example, various flags, various information stored in various information storage areas (for example, The number of ball stock numbers PBS, the number of real ball counts PB, the number of drive commands DRV, the mismatch counter INCC, etc. stored in the prize ball information storage area, the logic of the PRDY signal logic stored in the CR communication information storage area This flag is a flag indicating whether or not to delete the payout information related to the payout of the PRDY signal output setting information etc. in which the state is set, and is set to 1 when the payout information is erased and to 0 when the payout information is not erased. Be done. The payout RAM clear notification flag HRCL-FLG set in step S514 and step S516 is stored in the general-purpose storage element (general-purpose register) of the payout control MPU 4120a.

  Following step S514 or step S516, the payout control program performs setting for permitting access to the payout control internal RAM (step S518). By this setting, the payout control built-in RAM can be accessed, and for example, writing (storage) or reading of the payout information can be performed.

  Following step S518, the payout control program sets a stack pointer (step S520). The stack pointer indicates, for example, an address stacked on the stack to temporarily store the contents of a storage element (register) in use, or temporarily returns the return address of this routine when the subroutine is ended and the process returns to this routine. It indicates the address stacked on the stack for storage, and the stack pointer advances each time the stack is stacked. In step S520, an initial address is set in the stack pointer, and the contents of the register, the return address, etc. are stacked on the stack from this initial address. Then, the stack pointer returns to the initial address by sequentially reading from the stack stacked last to the stack stacked first.

  Following step S520, the payout control program determines whether or not the payout RAM clear notification flag HRCL-FLG has a value of 0 (step S522). As described above, the payout RAM clear notification flag HRCL-FLG is set to a value 1 when the payout information is erased, and to a value 0 when the payout information is not erased.

  When it is determined in step S522 that the payout RAM clear notification flag HRCL-FLG has a value of 0, that is, when the payout information is not erased, the payout control program calculates a checksum (step S524). This checksum is to calculate the total by regarding the payout information stored in the payout control built-in RAM as a numerical value.

  Subsequent to step S524, the payout control program determines whether the calculated checksum value matches the checksum value stored in the payout control unit power-off process (described at power-off) described later. (Step S526). If they match, the payout control program determines whether the payout backup flag HBK-FLG has a value 1 (step S528). The payout backup flag HBK-FLG is a flag indicating whether or not payout backup information such as the payout information and the checksum value is stored and held in the payout control internal RAM in the payout control unit power-off process described later. The value is set to 1 when the control unit power-off process is ended normally, and to 0 when the payout control unit power-off process is not ended normally.

  When the payout backup flag HBK-FLG is 1 in step S528, that is, when the payout control unit power-off process is ended normally, the payout control program sets the working area of the payout control internal RAM as the power recovery time. (Step S530). In this setting, in addition to the value 0 being set to the payout backup flag HBK-FLG, the power recovery information is read out from the ROM built in the payout control MPU 4120a (hereinafter referred to as the “payment control internal ROM”) This power recovery information is set in the work area of the payout control internal RAM. Thus, the above-described payout backup information stored in the payout control built-in RAM, various flags, various information stored in various information storage areas, and the like (for example, an award stored in the prize ball information storage area) PRDY signal output setting information in which the logic state of the PRDY signal is set, which is stored in the ball stock number PBS, real ball count PB, drive command number DRV, mismatch counter INCC, etc. and CR communication information storage area Information to be used for various processes is set based on the payout information related to the payout of the inconsistency counter reset determination time etc. stored in the time management information storage area. Note that “power recovery” includes the state where power is turned on after the power is shut off, as well as the state where power is restored after a power failure or momentary power failure.

  On the other hand, when the payout RAM clear notification flag HRCL-FLG is not 0 (is the value 1) in step S522, that is, when the payout information is erased, or the checksum values do not match in step S526 When the payout backup flag HBK-FLG is not 1 (value 0) in S528, that is, when the payout control unit power-off process has not ended normally, the payout control program executes the entire region of the payout control internal RAM It clears (step S532). That is, the payout control program executes the payout control side RAM clear processing triggered by the detection of the operation signal of the operation switch 860a (payout control side power on operation control means). As a result, the payout backup information stored in the payout control built-in RAM is cleared.

  Following step S532, the payout control program sets a work area of the payout control internal RAM as an initial setting (step S534). In this setting, the initial information is read out from the dispensing control built-in ROM, and the initial information is set in the working area of the payout control internal RAM.

  Subsequent to step S530 or step S534, the payout control program performs interrupt initialization (step S536). This setting is to set an interrupt cycle when a payout control unit timer interrupt process described later is performed. In this embodiment, it is set to 2 ms.

  Subsequent to step S536, the payout control program performs interrupt permission setting (step S538). With this setting, the payout control unit timer interrupt process is repeatedly performed at the interrupt cycle set in step S536, that is, every 2 ms.

  Following step S538, the payout control program sets the value A in the watchdog timer clear register HWCL (step S539). The value A, the value B and the value C are sequentially set in the watchdog timer clear register HWCL to clear the watchdog timer.

  Following step S539, the payout control program determines whether or not a power failure advance notification signal (payout failure notification signal) is input (step S540). As described above, when the power of the pachinko machine 1 is shut down or a power failure or momentary stop occurs, the power failure notification signal (the payout failure notification signal) is sent to the main control board 4100 as a power failure notification when the voltage becomes lower than the power failure notification voltage. Is input from the blackout monitoring circuit 4100e. The determination in step S540 is performed based on the power failure advance signal.

  If there is no input of the power failure advance notice signal in step S540, the payout control program determines whether the 2 ms elapsed flag HT-FLG is equal to 1 (step S542). The 2 ms elapsed flag HT-FLG is a flag that counts 2 ms in the payout control unit timer interrupt processing that is processed every 2 ms, which will be described later. When 2 ms has elapsed, the value 1 and 2 ms have not elapsed. It is set.

  If the 2 ms elapsed flag HT-FLG is 0 in step S542, that is, if 2 ms has not elapsed, the process returns to step S540, and the payout control program determines whether or not the blackout notice signal (payout blackout notice signal) is input. Determine

  On the other hand, when the 2 ms elapsed flag HT-FLG is 1 in step S542, that is, 2 ms has elapsed, the payout control program sets the 2 ms elapsed flag HT-FLG to the value 0 (step S544).

  Following step S544, the payout control program sets the value B in the watchdog timer clear register HWCL (step S546). At this time, the value B is set in the watchdog timer clear register HWCL following the value A set in step S539.

  Following step S546, the payout control program performs port output processing (step S548). In this port output process, various information is read from the output information storage area of the payout control built-in RAM, and various signals are output from the output terminals of various output ports of the payout control MPU 4120a based on the various information. In the output information storage area, for example, payer ACK information that indicates that various commands related to the payout from the main control board 4100 (the award ball command and the self check command shown in FIG. 29) are properly received, and the payout motor 744 There are stored various information such as drive information for performing drive control, winning ball number information of the number of balls for which the payout motor 744 has actually paid out game balls, and LED display information displayed on the error LED indicator 860b. When various commands relating to the payout from the main control board 4100 are normally received from the output terminal of the predetermined output port of the payout control MPU 4120a based on the output information, a payout ACK signal is output to the main control board 4100 or a payout motor The drive signal is output to 744 or the payout motor 744 actually pays out the number of balls for which the game balls have been paid out. (In this embodiment, the payout ball number information signal is output to the external terminal board 784 every time the payout motor 744 actually pays out 10 game balls). A display signal is output to the error LED display 860b.

  Following step S548, the payout control program performs port input processing (step S550). In this port input process, various signals input to the input terminals of the various input ports of the payout control MPU 4120a are read and stored as input information in the input information storage area of the payout control internal RAM. For example, an operation signal of the operation switch 860a, a detection signal from the rotation angle switch 752, a detection signal from the counting switch 751, a detection signal from the full tank switch 550, a BRQ signal from the CR unit 6, a BRDY signal and a CR connection signal A main payment ACK signal or the like from the main control board 4100 for notifying that the main control board 4100 has normally received various commands transmitted in a command transmission process to be described later is read, and stored as input information in the input information storage area.

  Following step S550, the payout control program performs a timer update process (step S552). In this timer update process, when it is determined whether or not the ball is in a state of being seen by the payout rotary body to which the rotation of the rotary shaft of the payout motor 744 is transmitted, the spherical light set as the determination condition is determined Time is set when the game balls stored in the prize ball tank 720 and the tank rail 731 shown in FIG. 3 are discharged, and the skip determination time set when the fixed position determination of the payout rotating body is not performed. When it is determined whether or not the holding space for the ball cover unit 540 shown in FIG. 1 is full, it is determined whether the ball is full or not. When it is determined whether or not the number of gaming balls taken into the supply path of the winning ball device 740 is greater than or equal to a predetermined number based on the detection signal from the ball breaking switch 750 for a time, as the determination condition Besides performing time management such as the ball out determination time which has been determined, etc., the number of balls of the gaming balls received and paid out by the recess of the payout rotating body, the number of balls actually detected by the count switch 751, Inconsistencies that are set as the criteria for determining whether or not to reset the inconsistency counter INCC for monitoring whether or not the payout of the inconsistent game ball due to the inconsistencies is repeated. Manage time of counter reset judgment time. For example, when the ball judging time is set to 5005 ms, the timer interrupt period is set to 2 ms, so every time this timer update processing is performed, the ball judging time is reduced by 2 ms and the subtraction result When the value becomes 0, the ball is accurately measuring the judgment time.

  In this embodiment, the skip determination time is set to 22.75 ms, the ball removal determination time is 60060 ms, the full determination time is 504 ms, the ball out determination time is 119 ms, and the inconsistency counter reset determination time is set to 7000 s (approximately 2 hours). Each time the timer update process is performed, the ball removal determination time, the full tank determination time, the ball out determination time, and the mismatch counter reset determination time are each reduced by 2 ms, and the result of the subtraction becomes 0. The extraction determination time, the full tank determination time, the ball out determination time, and the mismatch counter reset determination time are accurately measured. These various determination times are stored as time management information in the time management information storage area of the payout control built-in RAM.

  Following step S552, the payout control program performs CR communication processing (step S554). In this CR communication processing, whether or not various signals (BRQ signal, BRDY signal, and CR connection signal) from the CR unit 6 are input based on the input information read out from the input information storage area described above Determine The payout control MPU 4120 a exchanges various signals with the CR unit 6 based on various signals from the CR unit 6. In the process of setting the work area of the payout control internal RAM in step S530, as described above, various flags which are payout backup information stored in the payout control internal RAM, and various information stored in the various information storage area (For example, the number of ball stock PBS, the number of real ball count PB, the number of drive command DRV, the number of misaligned counters INCC, etc. stored in the prize ball information storage area, and the PRDY stored in the CR communication information storage area Information to be used for various processes is set based on the payout information on the payout of the PRDY signal output setting information etc. in which the logic state of the signal is set.

  By this process, for example, even if there is a momentary power failure or power failure, values such as the number of ball stock PBS, actual ball count PB, number of drive commands DRV, inconsistency counter INCC, etc. at power recovery are stored as payout backup information. The values can be restored to values such as the winning ball stock number PBS, the real ball count PB, the driving command number DRV, the mismatch counter INCC, etc. immediately before the instantaneous stop or power failure. As a result, even when the payout operation of the game ball by the prize ball device 740 is being executed, even if the payout operation can not be continued due to a momentary stop or power failure, the payout operation is continued at the time of power recovery. The game balls can be paid out to the upper plate 301 and the lower plate 302 without excess or deficiency. In other words, in the CR communication process, the payout control MPU 4120a causes a momentary stop or power failure when the gaming ball is paid out to the upper plate 301 or the lower plate 302 while exchanging various signals with the CR unit 6. Even if the exchange of various signals with the unit 6 is interrupted and the payout of the game balls can not be continued, the number of ball stock PBS, real ball count PB, number of drive commands DRV, mismatch counter INCC at the time of power recovery Etc. by being restored to values such as the prize ball stock number PBS, the actual ball count PB, the drive command number DRV, the mismatch counter INCC, etc. immediately before the momentary power failure or power failure, which is stored as payout backup information. Exchange of various signals between the pachinko machine 1 (the payout control MPU 4120a) and the CR unit 6 immediately before the instantaneous stop or power failure It is possible to continue from the time of power restoration, so that it is possible to continue to payout of game balls.

  In this manner, the exchange of various signals between the pachinko machine 1 (the payout control MPU 4120a) and the CR unit 6 is restored to the state immediately before the instantaneous stop or stop at the time of power recovery even if the instantaneous stop or stop The various signals by the pachinko machine 1 (the payout control MPU 4120a) and the CR unit 6 are not changed by the influence of the instantaneous stop or stop. Therefore, the reliability of exchange of various signals by the pachinko machine 1 (the payout control MPU 4120a) and the CR unit 6 can be enhanced.

  In addition, as described above, various information stored in the CR communication information storage area is included in the payout backup information. In the CR communication process, when the power returns, the PRDY signal output setting information is read out from the CR communication information storage area stored in the payout control internal RAM, which is set in the process for setting the work area of the payout control internal RAM in step S530. For example, when the read PRDY signal output setting information is set to the logic state of the PRDY signal which indicates that the payout operation for paying out the rental ball is impossible, for example, the payout control of the PRDY signal is performed. It outputs to the CR unit 6 from the output terminal of the predetermined output port of the MPU 4120a. Then, for example, in the retry operation monitoring process performed as one process of the main operation setting process, the value of the inconsistency counter INCC of the award ball information storage area stored in the payout control internal RAM, which is included in the payout backup information. It is determined whether the value of the mismatch counter INCC is smaller than the mismatch threshold INCTH based on and if the value of the mismatch counter INCC is not smaller than the mismatch threshold INCTH, the retry operation operates abnormally. It is determined that the payout operation of the game ball by the winning ball device 740 is abnormal, that is, the retry error flag RTERR-FLG is set to a value of 1, and the payout ball is subjected to the operation judgment setting processing. As an output of the error state to the CR unit 6, for example, when not in communication with the CR unit 6 The logic state of the PRDY signal informing of dispensing operation is not possible (LOW) is set to PRDY signal output setting information stored in the CR communication information storage area for dispensing.

  Thus, in the CR communication process, the logic state of the PRDY signal is read out from the CR communication information storage area at the next timer interrupt from the time of power recovery, and the PRDY signal is an output terminal of a predetermined output port of the payout control MPU 4120a. Output to CR unit 6. Thus, for example, immediately before the momentary stop, if the payout operation of the gaming ball by the winning ball device 740 is in an abnormal state, since the state is restored at the time of the power recovery, it is extremely after the power recovery. At an early stage, a PRDY signal can be output to the CR unit 6 from the output terminal of the predetermined output port of the payout control MPU 4120a, which informs that the payout operation for paying out the rental ball is impossible. It can be informed that the payout operation of the gaming ball by the winning ball device 740 is in an abnormal state. As a result, it is possible to prevent the output of BRDY, which is a useless ball rental request signal from the CR unit 6, at an extremely early stage after power recovery.

  Also, in the CR communication process, in the port input process of step S550, the CR connection signal is read out from the input information storage area of the payout control built-in RAM, and the logic is HI based on this CR connection signal, that is, pachinko machine When 1 is powered on, and the payout control board 4110 and the CR unit 6 are electrically connected via the game ball lending device connection terminal plate 869, to pay out the lent ball In order to indicate that the dispensing operation is possible, the logic state of the PRDY signal is set to HI and output from the output terminal of a predetermined output port of the dispensing control MPU 4120a to the CR unit 6, while the logic is LOW, that is, When the pachinko machine 1 is powered on, the payout control board 4110 and the CR unit 6 are connected to a game ball connection device such as a game ball When it is not electrically connected via 869, the logic state of the PRDY signal is set to LOW to indicate that the dispensing operation for dispensing the rental ball is impossible, and a predetermined output port of the dispensing control MPU 4120a. Output to the CR unit 6 from the output terminal of The state of the logic of the EXS signal which indicates that one dispensing operation has been started or ended is stored in the CR communication information storage area of the dispensing control internal RAM as EXS signal output setting information, and is used together with the dispensing control board 4110. A CR connection signal that indicates whether or not the CR unit 6 is electrically connected is stored as CR connection information in the state information storage area.

  Following step S554, the payout control program performs full tank and out-of-balls check processing (step S556). In this full tank and out-of-ball check process, the input information is read from the above-described input information storage area, and the storage space of the above-described far cover unit 540 is stored by the detection signal from the full switch 550 based on this input information. It is determined whether the game ball is full or not, or the number of balls of the game ball taken into the supply passage of the prize ball device 740 described above by the detection signal from the out-of-ball switch 750 becomes a predetermined number or more. It is determined whether or not the For example, the determination as to whether or not the accommodation space of the far cover unit 540 is full with stored gaming balls uses a timer interrupt cycle of 2 ms to check that the current full tank and full ball check process are full. When the detection signal from 550 is ON and the detection signal from full switch 550 is OFF in the previous full (2 ms before) and full ball check process, that is, the detection signal from full switch 550 is from OFF to ON If it is determined that the time has passed, counting of the full tank determination time (504 ms) described above is started in the timer update process of step S552. When the full tank determination time becomes 0 in the timer update process, that is, when the full tank determination time is reached, whether or not the detection signal from the full tank switch 550 is ON in this full tank and out-of-ball check process Determine if In this determination, when the detection signal from the full tank switch 550 is ON, the state information storage described above indicates the full tank information indicating that the storage space of the far cover unit 540 is full with the gaming balls stored therein. Store in the area. On the other hand, when the detection signal from full tank switch 550 is OFF, full tank information is stored in the state information storage area to indicate that the storage space of far cover unit 540 is not full with gaming balls stored therein. .

  It is also determined whether or not the number of gaming balls taken into the supply passage of the prize ball device 740 is equal to or greater than a predetermined number using the timer interrupt cycle 2 ms in the current tank full / ball out check process. When the detection signal from the disconnection switch is ON, and the detection signal from the disconnection switch is turned off in the previous (2 ms before) full tank and ball disconnection check processing, that is, the detection signal from the disconnection switch 750 is turned on When it is transitioned to the timing of the ball out determination time (119 ms) described above in the timer update process of step S552 is started. When the ball out determination time becomes 0 in the timer update process, that is, when the ball out determination time is reached, whether or not the detection signal from the out of ball switch 750 is ON in this full tank and out of ball check process Determine if In this determination, when the detection signal from the out-of-ball switch 750 is ON, the out-of-ball information notifying that the number of gaming balls taken into the supply passage of the winning ball device 740 is a predetermined number or more While storing in the information storage area, when the detection signal from the out-of-ball switch 750 is OFF, it is determined that the number of gaming balls taken into the supply passage of the winning ball device 740 is not more than a predetermined number. Information is stored in the state information storage area.

  Following step S556, the payout control program performs command reception processing (step S558). In this command reception process, various commands related to the payout from the main control board 4100 (a prize ball command and a self check command shown in FIG. 29) are received. When the various commands are normally received, the payer ACK information to that effect is stored in the output information storage area described above. On the other hand, when various commands can not be received normally, a connection error is transmitted that indicates that the connection between the main control substrate 4100 and the payout control substrate 4110 is abnormal (the various command signals are abnormal). Information is stored in the state information storage area described above.

  Subsequent to step S558, the payout control program performs command analysis processing (step S560). In this command analysis process, the command received in step S558 is analyzed, and the analyzed command is stored as reception command information in the reception command information storage area of the payout control internal RAM.

  Subsequent to step S560, the payout control program performs main operation setting processing (step S562). In this main operation setting process, operation settings such as winning balls, lent balls, ball removal and ball sighting are performed, determination of retry operation is performed, and the number of unpaid balls (number of prize balls stock) is monitored. Do.

  Following step S562, the payout control program performs LED display data creation processing (step S564). In this LED display data creation process, various information is read from the above-described state information storage area, and display data to be displayed on the error LED indicator 860b of the payout control board 4110 is created and is output information storage area described above as LED display information. Remember. For example, when the above-mentioned ball out information is read out from the state information storage area, and the number of balls of the game balls taken into the supply passage of the winning ball device 740 is not more than a predetermined number based on this ball out information, the corresponding display data (In the present embodiment, the display value 1 (number "1") is created and the LED display information is stored in the output information storage area.

  Following step S564, the payout control program performs command transmission processing (step S566). In this command transmission process, various types of information are read out from the above-described state information storage area, and various commands (door open command, door frame close command, main body frame open) divided into the state display shown in FIG. The main control board 4100 is created by creating a command, body frame closing command, frame status 1 command (corresponding to the first error generation command), error cancellation navigation command (corresponding to the first error cancellation command) and frame status 2 command. Send to For example, when the out-of-ball information is read out from the state information storage area, when the number of gaming balls taken into the supply passage of the winning ball device 740 is not more than a predetermined number based on the out-of-ball information, It is created and transmitted to the main control board 4100 or the like. In addition, in this command transmission process, the payout control program is, for example, when there is a change in the frame state such as an error in the game ball payout operation occurring, the information on the portion where the error occurs in the payout operation A frame state 1 command (first error cancellation command) including “error occurrence position information” is generated (error occurrence command generation means). On the other hand, in this command transmission process, the above-described error occurs when the payout control program determines that the payout RAM clear notification flag HRCL-FLG is the value 1, that is, the operation signal corresponding to the operation of the operation switch 860a is detected. A cancellation navi command (first error cancellation command) is output (command transmission means). The payout control program transmits a main body frame open command (first main body frame open command) when the main body frame open detection signal from the main body frame open switch 619 is input (main body frame command sending means, Main unit frame command sending means 1). When the main frame closing detection signal from the main frame opening switch 619 is input, the payout control program transmits a main frame closing command (first main frame closing command) (main frame command sending means , 1st main body frame command sending means). Further, the payout control program transmits a door frame open command (first door frame open command) when the door frame open detection signal from the door frame open switch 618 is input (a door frame command sending means, Door frame command sending means 1). On the other hand, the payout control program transmits a door frame closing command (first door frame closing command) when the door frame closing detection signal from the door frame opening switch 618 is input (a door frame command sending means, Door frame command sending means 1). In addition, the payout control program reads out error information including error contents from the above-mentioned status information storage area in the above-mentioned command transmission process (step S566), and machine number information for identifying itself with other pachinko machines and An error information signal based on the error information is output to the hall computer via the external terminal board 784. When the hall computer receives the error information signal, the hall clerk provides the machine number information and the error information to the wireless device possessed by the hall clerk, and the hall clerk is a pachinko machine with a machine number based on the machine number information. In the above, it is possible to recognize that an error content included in the error information has occurred.

  Following step S566, the payout control program sets the value C in the watchdog timer clear register HWCL (step S568). The value C is set in the watchdog timer clear register HWCL in step S568, so that the value C is set in the watchdog timer clear register HWCL following the value B set in step S546. As a result, the value A, the value B and the value C are sequentially set in the watchdog timer clear register HWCL, and the watchdog timer is cleared.

  Following step S568, the payout control program returns to step S539 again, sets the value A in the watchdog timer clear register HWCL, and in step S540 determines whether or not the power failure notification signal (delivery power failure notification signal) is input. If it is determined that there is no input of the power failure notice signal (disbursed power failure notice signal), it is determined whether or not the 2 ms elapsed flag HT-FLG has a value 1 in step S542, and the 2 ms elapsed flag HT-FLG has a value 1 If it is, that is, if 2 ms has elapsed, the value 2 is set to the 2 ms elapsed flag HT-FLG in step S544, the value B is set in the watchdog timer clear register HWCL in step S546, and port output processing is performed in step S548. Port input processing in step S550, and in step S552 The image update process is performed, the CR communication process is performed in step S554, the full tank and ball out check process is performed in step S556, the command reception process is performed in step S558, the command analysis process is performed in step S560, and the main process is performed in step S562. Operation setting processing is performed, LED display data creation processing is performed in step S564, command transmission processing is performed in step S566, value C is set in the watchdog timer clear register HWCL in step S568, and steps S539 to S568 are repeated. . The process of steps S539 to S568 is referred to as "payout control unit main process".

  The processing content of the payout control unit main processing varies in accordance with the progress of the game by the main control board 4100. For this reason, the time required for the processing of the payout control MPU 4120a changes. Therefore, in the port output process of step S548, the payout control MPU 4120a preferentially outputs to the main control substrate 4100 a payment acknowledgment signal indicating that various commands related to the payment from the main control substrate 4100 have been normally received. There is. As a result, the payout control MPU 4120a secures the processing time so that other processing that fluctuates can be sufficiently performed.

  On the other hand, when there is an input of the power failure advance notification signal (payout failure notification signal) in step S540, the interrupt prohibition setting is performed (step S570). With this setting, a payout control unit timer interrupt process to be described later is not performed, the writing to the payout control internal RAM is prevented, and the rewriting of the payout information described above is protected.

  Following step S570, the payout control program stops the output of the drive signal to the payout motor 744 (step S574). Thereby, the payout of the game ball is stopped.

  Subsequent to step S574, the payout control program performs setting for clearing the watchdog timer (step S60). This clear setting is performed by sequentially setting the value A, the value B and the value C in the watchdog timer clear register HWCL as described above.

  Following step S576, the payout control program calculates a checksum and stores the calculated value (step S578). This checksum is calculated by regarding the payout information of the work area of the payout control built-in RAM as a numerical value, excluding the storage area of the value of the checksum and the value of the payout backup flag HBK-FLG calculated in step S524.

  Following step S578, the payout control program sets the payout backup flag HBK-FLG to the value 1 (step S580). This completes the storage of the payout backup information.

  Subsequent to step S580, the payout control program performs setting to prohibit access to the payout control built-in RAM (step S582). By this setting, access to the payout control internal RAM is inhibited and writing and reading can not be performed, and the payout backup information stored in the payout control internal RAM is protected.

  Following step S 582, the payout control program enters an infinite loop. In this infinite loop, since the value A, the value B and the value C are not sequentially set in the watchdog timer clear register HWCL, the watchdog timer is not cleared. For this reason, the payout control MPU 4120a is reset, and thereafter, the payout control program performs the payout control unit power-on process again under the control of the payout control MPU 4120a. The process of step S570 to step S582 and the infinite loop are referred to as "payout control unit power-off process".

  The pachinko machine 1 (the payout control MPU 4120a) is reset when a power failure occurs or when it is momentarily stopped, and the payout control unit power-on process is performed when the power is restored thereafter.

  In step S526, it is checked whether the payout backup information stored in the payout control built-in RAM is normal or not, and in step S528, whether or not the processing upon power-off of the payout control unit has been normally completed. Is examining. As described above, by checking the payout backup information stored in the payout control built-in RAM in duplicate, it is checked whether or not the payout backup information is stored due to fraud.

13-2. Disbursement control unit timer interrupt processing]
Next, the payout control unit timer interrupt processing will be described. The payout control unit timer interrupt process is repeatedly performed every interrupt cycle (2 ms in the present embodiment) set in the payout control unit power-on process shown in FIGS.

  When the payout control unit timer interrupt processing is started, in the payout control unit 4120 of the payout control board 4110, the payout control program sets the timer interrupt to be prohibited as shown in FIG. Then, switching (saving) of the register is performed (step S590). Here, the general-purpose storage element (general-purpose register) used in the above-described payout control unit main processing is switched to the auxiliary register. By using this auxiliary register in the dispensing control unit timer interrupt processing, the value of the general purpose register is not overwritten. This prevents the destruction of the contents of the general purpose register used in the payout control unit main processing.

  Following step S590, the payout control program sets the 2 ms elapsed flag HT-FLG to the value 1 (step S592). This 2 ms elapsed flag HT-FLG is a flag that counts 2 ms every time 2 ms of this payout control unit timer interrupt processing is performed, that is, a value of 0 when 1 ms or 2 ms has not elapsed when 2 ms has elapsed. Each is set.

  Following step S592, the payout control program switches (returns) the register (step S594). This return is switched from the auxiliary register used in the dispensing control unit timer interrupt processing to the general-purpose storage element (general-purpose register). By using this general-purpose register in the payout control unit main processing, the value of the auxiliary register is not overwritten. This prevents the destruction of the contents of the auxiliary register used in the dispensing control unit timer interrupt processing.

  Following step S594, the payout control program sets the interrupt permission (step S596), and ends this routine.

13-3. Rotation angle switch history creation processing]
Next, rotation angle switch history creation processing will be described. In this rotation angle switch history creation processing, a history of detection signals from the rotation angle switch 752 shown in FIG. 13 is created.

  When the rotation angle switch history creation process is started, in the payout control unit 4120 of the payout control board 4110, the payout control program controls the rotation angle from the payout control built-in RAM as shown in FIG. 40 under the control of the payout control MPU 4120a. The switch detection history information RSW-HIST is read out (step S610). The rotation angle switch detection history information RSW-HIST is of 1 byte (8 bits: most significant bits B7, B6, B5, B4, B3, B2, B1, least significant bits B0, "B" represents a bit). It has a storage capacity, and the history of detection signals from the rotation angle switch 752 is stored in the rotation angle switch history information storage area of the payout control built-in RAM as the rotation angle switch detection history information RSW-HIST. In step S610, the rotation angle switch detection history information RSW-HIST is read out from the rotation angle switch history information storage area.

  Following step S610, the payout control program determines whether or not there is a detection signal from the rotation angle switch 752 (step S612). This determination is performed based on the detection signal from the rotation angle switch 752 in the port input process of step S550 in the payout control unit power-on process (payout control unit main process) shown in FIG. Specifically, the detection signal is stored as input information in the input information storage area of the payout control built-in RAM. In step S612, the input information is read out from the input information storage area, and it is determined whether or not there is a detection signal from the rotation angle switch 752. When there is a detection signal from the rotation angle switch 752 in the input information, the payout control program detects the light of the rotation angle switch 752 for detecting the rotational position of the payout rotating body to which the rotation of the rotation shaft of the payout motor 744 is transmitted. It is determined that the axis is in a transition state from the blocking state to the non-blocking state. On the other hand, when there is no detection signal from the rotation angle switch 752 in the input information, the payout control program determines that the detection slit has shifted the optical axis of the rotation angle switch 752 from the non-blocking state to the blocking state.

  If it is determined in step S612 that the detection slit has shifted the optical axis of the rotation angle switch 752 from the blocking state to the non-blocking state, the payout control program performs shift processing of the rotation angle switch detection history information (step S614). In the shift process of the rotation angle switch detection history information, the rotation angle switch detection history information RSW-HIST read in step S610 is converted to the most significant bits B7 ← B6, B6 ← B5, B5 ← B4, B4 ← B3, B3 ← B2 , B 2 B B 1, B 1 ビ ッ ト least significant bit B 0, etc., shift from the least significant bit B 0 to the most significant bit B 7 by one bit at a time.

  Following step S614, the payout control program sets the value 1 to the least significant bit B0 of the rotational angle switch detection history information RSW-HIST (step S616), and ends this routine.

  On the other hand, when the detection slit shifts the optical axis of the rotation angle switch 752 from the non-blocking state to the blocking state in step S612, the payout control program shifts the rotation angle switch detection history information (step S618). . In the shift process of the rotation angle switch detection history information, the payout control program performs the same process as the shift process of the rotation angle switch detection history information in step S614, and the rotation angle switch detection history information RSW-HIST read in step S610. B7 B B6, B6 B B5, B5 B B4, B4 B B3, B3 B B2, B2 最 下 位 B1, B1 最 下 位 least significant bit B0, etc. from the least significant bit B0 to the most significant bit B7 Shift one bit at a time.

  Subsequent to step S618, the payout control program sets the value 0 to the least significant bit B0 of the rotational angle switch detection history information RSW-HIST (step S620), and ends this routine.

  As described above, every time the rotation angle switch history creation processing is performed, the rotation angle switch detection history information RSW-HIST is shifted by 1 bit from the least significant bit B0 toward the most significant bit B7, and then the detection slit is rotated. The least significant bit B0 has a value of 1 or 1 according to a state in which the optical axis of the angle switch 752 has transitioned from the blocking state to the non-blocking state or a detection slit transitions the optical axis of the rotation angle switch 752 from the non-blocking state to the blocking state Since the value 0 is set, a history of the detection signal from the rotation angle switch 752 can be created.

13-4. Sprocket fixed position determination skip process]
Next, the sprocket fixed position determination skip process will be described. In the sprocket fixed position determination skip process, the determination as to whether or not the payout rotary member to which the rotation of the rotary shaft of the payout motor 744 is transmitted is at the regular position is skipped when a predetermined condition is satisfied. The fixed position determination of the payout rotating body is also performed when the payout of the game balls by the winning ball device 740 is finished. This makes it possible to reliably start the rotation of the rotary shaft of the payout motor 744 in a state where no ball is generated.

  When the sprocket fixed position determination skip process is started, in the payout control unit 4120 of the payout control board 4110, the payout control program is controlled by the payout control MPU 4120a and as shown in FIG. It is determined whether FLG is the value 0 (step S630). The fixed position determination skip flag SKP-FLG is a flag indicating whether or not fixed position determination of the payout rotating body is performed, and the value of 1 when the fixed position determination of the payout rotating body is not performed (when skipping) The value is set to 0 when the body position determination is performed (when not skipping).

  When it is determined in step S630 that the home position determination skip flag SKP-FLG has a value of 0 (does not skip), that is, when performing home position determination of the payout rotating body, the payout control program determines the rotation angle switch history information of the payout control internal RAM. The rotation angle switch detection history information RSW-HIST is read out from the storage area (step S632), and it is determined whether or not it matches the home position determination value (step S634). The home position determination value is stored in the payout built-in ROM, and in the present embodiment, "00001111B (" B "represents a bit)", and the upper 4 bits B7 to B4 have a value of 0, and a lower 4 Bits B3 to B0 have a value of 1. In step S634, it is determined whether the lower 4 bits B3 to B0 of the rotational angle switch detection history information RSW-HIST match the lower 4 bits B3 to B0 of the home position determination value.

  Here, when the lower 4 bits B3 to B0 of the rotation angle switch detection history information RSW-HIST have the value 1, the detection slit is the optical axis of the rotation angle switch 752 continuously in four timer interrupt cycles. It means that it is the state which changed to the non-blocking state from the blocking state. In the generation of the four timer interrupt cycles, the payout motor 744 shown in FIG. 13 rotates four steps. The rotation of the dispensing motor 744 is the rotation of the dispensing rotating body of the rotation detection board via the first gear, the second gear, and the third gear. Since the first gear, the second gear, and the third gear have play (backlash), the discharge rotating body rotates clockwise or counterclockwise. The rotation is designed to be equivalent to about two steps of rotation of the dispensing motor 744. Therefore, in the present embodiment, when the fixed position of the dispensing rotating body is determined, the rotation angle switch 752 is used. History of detection signal, rotation angle switch detection history information RSW-HIST is created by rotation angle switch history creation processing shown in FIG. 40, and lower 4 bits B3 to B0 of the created rotation angle switch detection history information RSW-HIST, ie This is performed based on the detection signal from the rotation angle switch 752 due to the generation of the latest four timer interrupt cycles. Thus, in the four timer interrupt cycles, the payout motor 744 rotates four steps, so it rotates more than the rotation of the payout rotor due to the backlash, and absorbs the rotation of the payout rotor due to the backlash. Can. Therefore, since the erroneous detection of the fixed position of the dispensing rotating body due to the backlash can be prevented, the rotational position of the dispensing rotating body can be properly managed by the rotational position of the dispensing motor 744. In the present embodiment, the four timer interrupt cycles are 8 ms (= 2 ms × 4 times), and are set as the backlash absorption time.

  In step S634, when the lower 4 bits B3 to B0 of the rotational angle switch detection history information RSW-HIST read out in step S632 matches the lower 4 bits B3 to B0 of the home position determination value, the payout control program The fixed position determination skip flag SKP-FLG is set to the value 1 (step S636). Thereby, it can be set so as not to perform fixed position determination of the payout rotating body (skip). The payout control MPU 4120a sets the rotational position of the payout rotating body at step S636 as the fixed position of the payout rotating body.

  Following step S636, the payout control program sets the skip determination time to be valid (step S638), and ends this routine. Here, the number of detection slits is three, which is the same as the number of concave portions of the dispensing rotating body, and is formed equally (every 120 degrees) on the outer periphery of the rotation detection board. Further, as described above, the rotation of the dispensing motor 744 is the rotation of the dispensing rotating body of the rotation detection board via the first gear, the second gear, and the third gear. In the present embodiment, the rotation (120 degrees) between the detection slits of the rotation detection board (dispensing rotor) is designed to correspond to the rotation of 18 steps of the dispensing motor 744.

  The payout control program manages the rotational position of the payout rotating body based on the number of steps of the payout motor 744 under the control of the payout control MPU 4120 a. Specifically, (1) a transition state in which the detection slit causes the optical axis of the rotation angle switch 75 to transition from the blocking state to the non-blocking state (referred to as "edge detection state"); A state where the optical axis of the switch 752 is shifted from the blocking state to the non-blocking state (referred to as “fixed position determined state”), and (3) a detection slit transitions the optical axis of the rotation angle switch 752 from the non-blocking state to the blocking state It manages in three states of the state ("fixed position determination skip state"), and. The edge detection state of (1) corresponds to one step rotation of the dispensing motor 744, and the fixed position determination state of (2) corresponds to the four step rotation of the dispensing motor 744, and the fixed position determination skip state of (3) In this case, the rotation position corresponds to 13 steps of the dispensing motor 744, and the rotation position between the detection slits (120 degrees) between the detection slits of the rotation detection board, that is, the rotation position of the dispensing rotating member, is managed by a total of 18 steps of rotation.

  In the fixed position determination skip state of (3), the detection slit changes the optical axis of the rotation angle switch 752 from the non-blocking state to the blocking state, so that the skip determination time is the time during which the dispensing motor 744 rotates by 13 steps. Is set. As described above, since the timer interrupt cycle is set to 2 ms, the skip determination time is 26 ms (= 2 ms × 13 steps).

  Since the skip determination time becomes valid in step S638, subtraction of the skip determination time is performed in the timer update process of step S552 in the payout control unit power-on process (payout control unit main process) shown in FIG. The payout control MPU 4120a subtracts the skip determination time, and sets the initial value 0 to the home position determination skip flag SKP-FLG when the subtraction result becomes the value 0.

  On the other hand, when the home position determination skip flag SKP-FLG is not 0 (is the value 1) (when skipping) in step S630, that is, when home position determination of the payout rotating body is not performed, or in step S634, step S632. If the lower 4 bits B3 to B0 of the rotational angle switch detection history information RSW-HIST read out in step 4 and the lower 4 bits B3 to B0 of the fixed position determination value do not match, the payout control program ends this routine as it is. . The home position determination skip flag SKP-FLG set in step S636 is stored in the general-purpose storage element (general-purpose register) of the payout control MPU 4120a.

  The gaming balls supplied from the pachinko island facility are stored in the prize ball tank 720 and the tank rail 731, taken into the supply passage of the prize ball device 740, and guided to the prize ball device 740. When the gaming balls are charged against each other and charged, they are electrostatically discharged to generate noise. For this reason, the prize ball device 740 is under the influence of noise and is in the file environment. The rotation angle switch substrate 753 of the prize ball device 740 shown in FIG. 3 is provided with a rotation angle switch 752, and a detection signal from the rotation angle switch 752 is affected by noise due to electrostatic discharge of the gaming ball. Cheap. In addition, the wiring (harness) connecting between the payout control board 4110 and the in-prize ball case inner board 754 in the prize ball device 740 shown in FIG. 3 is also affected by noise due to electrostatic discharge of the game ball. Cheap.

  Therefore, in the present embodiment, in order to suppress erroneous detection due to the influence of noise, the fixed position determination skip state of (3) described above, that is, the detection slit changes the optical axis of the rotation angle switch 752 from unblocked to blocked In the transitioned state, the fixed position determination of the dispensing rotating body is not performed. Thereby, the accuracy of the fixed position determination of the payout rotating body is enhanced. In addition, since the period and period required to detect the fixed position of the payout rotating body can be obtained by calculation in advance as described above, the skip determination time can be easily set and adjusted.

13-5. Ball sight judging process]
Next, the ball look determination process will be described. In this ball sight judging process, it is judged whether or not the ball sighting state by the payout rotating body to which the rotation of the rotation shaft of the payout motor 744 is transmitted is generated.

  When the ball judging process is started, the payout control MPU 4120a of the payout control unit 4120 in the payout control board 4110 is, as shown in FIG. 42, a rotation angle from the rotation angle switch history information storage area of the above-mentioned payout control built-in RAM. The switch detection history information RSW-HIST is read (step S640).

  Following step S640, the payout control program determines whether or not there is a detection signal from the rotation angle switch 752 described above (step S642). In this determination, it is determined whether or not the rotation angle switch detection history information RSW-HIST read out in step S640 matches the home position determination value. As described above, the home position determination value is stored in the payout built-in ROM, and in the present embodiment, "00001111B (" B "represents a bit)", and the upper four bits B7 to B4 are. The value 0 and the lower 4 bits B3 to B0 have a value 1. In step S642, it is determined whether the lower 4 bits B3 to B0 of the rotational angle switch detection history information RSW-HIST match the lower 4 bits B3 to B0 of the home position determination value.

  In step S642, when the lower 4 bits B3 to B0 of the rotational angle switch detection history information RSW-HIST read out in step S640 matches the lower 4 bits B3 to B0 of the home position determination value, the payout control program This routine is ended assuming that the detection slit has shifted the optical axis of the rotation angle switch 752 from the non-blocking state to the blocking state, that is, the payout rotating body is rotating, and the ball is not visible. Do.

  On the other hand, if the lower 4 bits B3 to B0 of the rotational angle switch detection history information RSW-HIST read out in step S640 do not match the lower 4 bits B3 to B0 of the home position determination value in step S642 The value 1 is set to the middle flag PBE-FLG (step S644). This ball is a medium flag PBE-FLG is a flag indicating whether or not the ball is in a state of being seen by the payout rotating body, value 1 when the payout motor 744 is performing a blind movement The value is set to 0 when no operation is performed.

  Subsequent to step S644, the payout control program sets the ball sighting determination time to be valid (step S646), and ends this routine. By making this ball look determination time effective, subtraction of the ball look determination time is performed in the timer update process of step S552 in the payout control unit power-on process (payout control unit main process) shown in FIG. 38. .

13-6. Various prize ball stock number addition processing]
Next, various prize ball stock number addition processing will be described. The various prize ball stock number addition processing includes prize ball prize ball stock number addition processing and rental ball prize ball stock number addition processing, and the prize ball prize ball stock number addition processing is from the main control board 4100. The processing for adding the number of balls to be paid out on the basis of the winning ball command described later, the processing for adding the number of balls for winning ball stock number for rental balls is a processing for adding the number of balls for payout is there. First, a winning ball stock number adding process for winning balls will be described, and then, a winning ball stock number adding process for rental balls will be described. In the present embodiment, it is set that the winning ball stock number adding process for the winning balls is preferentially performed, and the winning ball stock number adding process is performed according to the winning ball stock number adding process. After the gaming balls have been paid out by the prize ball device 740, it is set to carry out the processing for adding the number of balls for the number of balls for the ball for rental.

13-6-1. Prize Ball Stock Ball Addition Number Processing]
When the prize ball stock number addition process for the prize balls is started, the payout control program in the payout control unit 4120 of the payout control board 4110 is controlled by the payout ball program as shown in FIG. 43 under the control of the payout control MPU 4120a. It is determined whether there is any (step S650). This determination is performed based on the command analyzed in the command analysis process of step S560 in the payout control unit power-on process (payout control unit main process) shown in FIG. Specifically, the analyzed command is stored as reception command information in the reception command information storage area of the payout control internal RAM. In step S650, the payout control program reads out the received command information from the received command information storage area and determines whether or not it is a prize ball command.

  If the received command information is not the winning ball command in step S650, the payout control program ends this routine as it is, while if the received command information is the winning ball command in step S650, the payout control program changes the winning ball command to this winning ball command. The corresponding winning ball number PBV is read out from the winning ball number information table (step S652). Although this prize ball number information table will be described in detail later, the prize ball number information table is an information table stored in advance in the payout built-in ROM in association with the prize ball command and the prize ball number PBV.

  Subsequent to step S652, the payout control program reads out the prize ball stock number PBS from the payout control built-in RAM (step S654). The prize ball stock number PBS represents the number of game balls not yet paid out by the prize ball device 740, that is, the number of unpaid balls, and has a storage capacity of 2 bytes (16 bits) in this embodiment. ing. As a result, the winning ball stock number PBS can store the number of unpaid balls from the value 0 to the value 32767. The prize ball stock number PBS is stored in the prize ball information storage area of the payout control built-in RAM. In step S652, the winning ball stock number PBS is read out from the winning ball information storage area.

  The payout control program adds the winning ball number PBV read in step S652 to the winning ball stock number PBS read in step S654 (step S656), and ends this routine. After the addition in step S656, the prize ball command read out in step S650 is erased from the received command information storage area.

[13-6-2. Prize ball stock number addition processing for rental balls]
Next, a winning ball stock number addition process for a rental ball will be described. When the winning ball stock number addition processing for this rental ball is started, the payout control program in the payout control unit 4120 of the payout control board 4110 requests a rental ball as shown in FIG. 44 under the control of the payout control MPU 4120a. It is determined whether there is a signal (step S660). This determination is made based on the lent ball request signal from the CR unit 6 in the port input process of step S550 in the payout control unit power-on process (dispense control unit main process) shown in FIG. Specifically, the rental ball request signal is stored as input information in the input information storage area of the payout control built-in RAM. In step S660, the payout control program reads out the input information from the input information storage area and determines whether or not there is a rental ball request signal.

  When there is no rental ball request signal at step S660, the payout control program ends this routine as it is, but when there is a rental ball request signal at step S660, the payout control program receives the winning ball information of the above-mentioned payout control built-in RAM. The prize ball stock number PBS is read out from the storage area (step S662), and the number of balls RBV is added to the prize ball stock number PBS (step S664), and this routine is ended. The number of balls to be lent RBV is a fixed value, and is stored in advance in the payout built-in ROM. In the present embodiment, the value 25 is set as the number of balls to be lent RBV. After the addition in step S664, the payout control program erases the rental ball request signal read out in step S660 from the input information storage area. Further, in the present embodiment, since the winning balls are prioritized (the winning balls and the lent balls are managed separately), the lent ball request signal is held even when there is a lent ball request signal. , Pay out the rental balls with the completion of the delivery of the winning balls. Therefore, in the present embodiment, the winning balls stock number PBS is set to 0 and the payout of the rental balls is performed.

13-7. Stock surveillance process]
Next, stock monitoring processing will be described. In this stock monitoring process, it is monitored whether the game is not continued in a state (stocked state) in which the storage space of the far cover unit 540 shown in FIG. Processing.

  When stock monitoring processing is started, in the payout control unit 4120 of the payout control board 4110, the payout control program is under the control of the payout control MPU 4120a, and as shown in FIG. The prize ball stock number PBS is read out from the storage area (step S670), and it is determined whether the read prize ball stock number PBS is equal to or more than the caution threshold TH (step S672). The caution threshold value TH is a fixed value and is stored in advance in the dispensing built-in ROM. In the present embodiment, the value 50 is set as the caution threshold value TH.

  If it is determined in step S672 that the winning ball stock number PBS is equal to or greater than the caution threshold TH, the payout control program sets the caution flag CA-FLG to the value 1 (step S674), and terminates this routine. In this caution flag CA-FLG, the player starts stocking the gaming balls in the accommodation space of the far cover unit 540, and the number of unpaid gaming balls (the number of prize balls stocked above) becomes equal to or more than the caution threshold TH It is a flag indicating that it has reached, and is set to a value of 1 when it has reached the caution threshold TH or more, and a value of 0 when it has not reached the caution threshold TH or more.

  On the other hand, when the winning ball stock number PBS is less than the caution threshold TH in step S672, the payout control program sets the caution flag CA-FLG to the value 0 (step S676), and ends this routine.

  If the game state is a big hit and the player is relaxed and looks forward to the effects developed on the game board side liquid crystal display device 1900 and the upper dish side liquid crystal display device 470 shown in FIG. 15, the player is carelessly During the first round, the gaming balls paid out as winning balls may not be removed from the lower plate 302 by operating the lower plate removing button 354 shown in FIG. When the game is continued in this state, the lower tray 302 is filled with gaming balls, and the gaming balls accumulate in the accommodation space of the far cover unit 540. When the accommodation space of the foul cover unit 540 is filled with gaming balls, as described above, the value of the winning ball stock number PBS increases and becomes equal to or more than the caution threshold TH, and provided in the door frame 5 as a caution effect Several LEDs of various decoration boards blink. By this blinking, for example, it is possible to tell the store clerk in the hall that the player's game is to be watched. Thus, the store clerk in the hall can notify the player that the game ball should be removed from the lower plate 302, and the player fills the lower plate 302 (the housing space of the far cover unit 540) with the game ball full. It is possible to prevent the continuation of the game.

  In the present embodiment, the caution threshold value TH is set to a value 50 corresponding to about one fifth of the upper limit value 255 which can be represented by one byte (8 bits). This makes it possible to notify the store clerk in the hall to warn the player of the game at the earliest possible stage.

13-8. Disbursement ball look operation judgment setting process]
Next, the payout ball look-up operation determination setting process will be described. In this payout ball look-up operation determination setting process, the game ball is paid out to the upper plate 301 or the lower plate 302 shown in FIG. It is the processing which sets up whether it does not carry out or discharge etc.

  When the payout ball look-up operation determination setting process is started, in the payout control unit 4120 of the payout control board 4110, the payout control program is under the control of the payout control MPU 4120a, as shown in FIG. The rotation angle switch detection history information RSW-HIST is read out from the rotation angle switch history information storage area of the RAM (step S680).

  Following step S680, the payout control program determines whether or not there is a detection signal from the rotation angle switch 752 shown in FIG. 13 (step S682). In this determination, it is determined whether or not the rotation angle switch detection history information RSW-HIST read out in step S 680 matches the home position determination value. As described above, the home position determination value is stored in the payout built-in ROM, and in the present embodiment, "00001111B (" B "represents a bit)", and the upper four bits B7 to B4 are. The value 0 and the lower 4 bits B3 to B0 have a value 1. In step S682, it is determined whether the lower 4 bits B3 to B0 of the rotational angle switch detection history information RSW-HIST match the lower 4 bits B3 to B0 of the home position determination value.

  In step S682, when the lower 4 bits B3 to B0 of the rotational angle switch detection history information RSW-HIST read out in step S680 and the lower 4 bits B3 to B0 of the home position determination value match, the payout control program It is determined whether the retry error flag RTERR-FLG has a value 1 (step S684). The retry error flag RTERR-FLG is a flag indicating whether or not the retry operation described below is operating abnormally, value 1 when the retry operation is operating abnormally, and when the retry operation is not operating abnormally (retry) When the operation is operating normally), the values are respectively set to 0.

  If, in step S682, the lower 4 bits B3 to B0 of the rotational angle switch detection history information RSW-HIST read out in step S680 do not match the lower 4 bits B3 to B0 of the home position determination value, or in step S684. If the retry error flag RTERR-FLG is not the value 1 (is the value 0), that is, the retry operation is not in an abnormal operation, the payout control program determines whether the ball watching flag PBE-FLG is the value 1 or not. It is determined (step S686). The flag PBE-FLG is a flag indicating whether or not the ball is viewed by the payout rotating body to which the rotation of the rotary shaft of the payout motor 744 is transmitted, and the ball for the payout motor 744 is spherical A value of 1 is set when the operation is being performed, and a value of 0 is set when the ball is not looking down.

  When the flag PEB-FLG is not 1 in step S686 (ie, the value 0), that is, when the ball is not moving, the payout control program determines whether or not the prize ball information storage of the above-mentioned payout control internal RAM. The prize ball stock number PBS is read out from the area (step S688), and it is determined whether the read prize ball stock number PBS is larger than the value 0 (step S690). In this determination, it is determined whether or not there is a number of unpaid balls in the payout of the game balls by the payout motor 744.

  When the prize ball stock number PBS is larger than the value 0 in step S690, that is, when there are unpaid ball numbers, the payout control program determines whether the storage space of the fal cover unit 540 is full with the reserved game balls. It is determined (step S692). This determination is performed based on the fullness information stored in the fullness and step-out check processing of step S556 in the payout control portion power-on process (dispense control portion main process) shown in FIG. Specifically, the full tank information is stored in the state information storage area of the above-described payout control built-in RAM. In step S692, the full tank information is read out from the state information storage area, and it is determined whether or not the storage space of the far cover unit 540 is full with the stored gaming balls.

  If it is determined in step S692 that the accommodation space of the foul cover unit 540 is not full of the stored gaming balls, the payout control program performs a payout setting process described later (step S694), and this routine is ended. In this payout setting process, a payout operation of paying out the gaming balls to the upper tray 301 and the lower tray 302 is performed.

  On the other hand, when it is determined in step S692 that the storage space of the foul cover unit 540 is full of the stored gaming balls, the payout control program ends this routine. In the pachinko machine 1 of the present embodiment, the payout motor 744 is forcibly stopped when the game ball filled with the storage space of the fal cover unit 540 is full. If a winning ball occurs while the dispensing motor 744 is forcibly stopped, the number of unpaid balls by the dispensing motor 744 increases, and the winning ball stock number PBS is added by the prize ball stock number addition process shown in FIG. Will increase.

  On the other hand, when the winning ball stock number PBS is not larger than 0 (is the value 0) at step S690, that is, when there is no unpaid ball number, the payout control program ends this routine as it is. Thus, the game balls are not paid out.

  On the other hand, in step S686, when the ball is in-flag flag PBE-FLG is the value 1, that is, the ball is moving, the payout control program performs the ball setting operation processing described later (step S700) Finish. In this ball facing operation setting process, a ball facing operation is performed to eliminate the state of the ball by the payout rotating body of the winning ball device 740.

  On the other hand, in step S684, when the retry error flag RTERR-FLG is the value 1, that is, when the retry operation is in an abnormal operation, the payout control program sets the output stop (stop) of the drive signal to the payout motor 744. (Step S702). In this setting, drive information for stopping the drive signal is set in the payout motor 744 and stored in the output information storage area of the above-described payout control built-in RAM.

  Following step S702, the payout control program sets an output of an error state to the CR unit 6 (step S704), and ends this routine. In step S704, when the payout control program is not in communication with the CR unit 6 under the control of the payout control MPU 4120a in order to notify the CR unit 6 that the ball rental can not be made at present (CR unit 6 The logic of PRDY signal is held LOW, that is, held down, when the logic of BRDY from is held low (in other words, falling and held), the logic state of PRDY signal is set to PRDY signal output setting information And store it in the CR communication information storage area. Thereby, in the CR communication process of step S554 in the payout control unit main process of the payout control unit power-on process of FIG. 38, the PRDY signal output setting information is read out from the CR communication information storage area stored in the payout control built-in RAM. The PRDY signal output setting information read out, that is, the PRDY signal whose logic is LOW, is output from the output terminal of the predetermined output port of the payout control MPU 4120a of the payout control unit 4120 via the game ball lending device connection terminal plate 869 CR. Output to unit 6 On the other hand, when communicating with the CR unit 6 (when the logic of BRDY from the CR unit 6 is HI, that is, rising and held), the logic state of the EXS signal is maintained and the logic state of the EXS signal Is set as EXS signal output setting information and stored in the CR communication information storage area. Thus, in the CR control process of step S554 in the payout control section main process of the payout control section power-on process of FIG. 38, the EXS signal output setting information is read out from the CR communication information storage area stored in the payout control internal RAM. The read EXS signal output setting information, that is, the EXS signal whose logic is maintained, is output from the output terminal of the predetermined output port of the payout control MPU 4120a to the CR unit 6 via the game ball connection device connection plate 869. . Note that, “maintain the logic state of the EXS signal” means that when the logic of the EXS signal is LOW (when the EXS signal falls and held) the logic LOW is maintained and the logic of the EXS signal is HI If at all (EXS signal is held rising) is to maintain its logic HI.

13-8. Disbursement setting process]
Next, the payout setting process will be described. In this payout setting process, the payout motor 744 is driven to perform the setting for paying out the gaming balls.

  When the payout setting process is started, the payout control program in the payout control unit 4120 of the payout control board 4110 controls the number of drive commands DRV from the payout control built-in RAM as shown in FIG. 47 under the control of the payout control MPU 4120a. Read out (step S710). The drive command number DRV is used to command the number of game balls to be paid out by the payout motor 744, and is equal to the number of stock balls PBS. The number of drive commands DRV is stored in the award ball information storage area of the payout control built-in RAM. At step S710, the number DRV of drive instructions is read out from the prize ball information storage area.

  Following step S710, the payout control program determines whether or not the drive command number DRV is a value 0 (step S712). This determination is made based on the drive command number DRV whether or not the number of gaming balls to be paid out by the payout motor 744 remains.

  When the drive command number DRV is 0 in step S712, that is, when the number of balls of the gaming balls to be paid out by the payout motor 744 is zero, the payout control program stops the output of the drive signal to the payout motor 744 (stop ) Is set (step S714). In this setting, drive information for stopping the drive signal is set to the payout motor 744 and stored in the output information storage area of the above-described payout control built-in RAM.

  Following step S714, the payout control program reads out the prize ball stock number PBS from the prize ball information storage area of the payout control built-in RAM (step S716), and reads the actual ball count PB (step S718). The actual ball count PB is obtained by counting the number of game balls actually paid out by the payout motor 744. Although this count will be described in detail later, the port input process of step S550 in the payout control unit power-on process (payout control unit main process) shown in FIG. 38 is performed from the count switch 751 shown in FIG. Based on the detection signal. The actual ball count PB is stored in the prize ball information storage area of the payout control internal RAM. At step S 718, the real ball count PB is read out from the prize ball information storage area.

  Subsequent to step S718, the payout control program sets a value obtained by subtracting the actual ball count PB read out in step S718 from the winning ball stock number PBS read out in step S716 in the award ball stock number PBS and the drive command number DRV. (Step S720) The real ball count PB is set to the value 0 (step S722), and this routine is ended. When the drive command number DRV and the actual ball count PB are the value 0, at step S722, the value of the award ball stock number PBS read out at step S716 is directly set to the drive command number DRV.

  On the other hand, when the drive instruction number DRV is not 0 in step S712, that is, when there is the number of gaming balls to be dispensed by the payout motor 744, the payout control program sets the output of the drive signal to the payout motor 744. (Step S724). In this setting, drive information for stopping the drive signal is set to the payout motor 744 and stored in the output information storage area of the payout control built-in RAM.

  Following step S724, the payout control program subtracts (decrements, 1 step) the drive command number DRV by 1 and determines whether there is a detection signal from the count switch 751 (step S728). This determination is performed based on the detection signal from the count switch 751 in the port input process of step S550 in the payout control unit power-on process (payout control unit main process) shown in FIG. Specifically, the detection signal is stored as input information in the input information storage area of the payout control built-in RAM. In step S728, the payout control program reads input information from the input information storage area and determines whether there is a detection signal from the count switch 751 or not.

  If there is a detection signal from the count switch 751 in step S728, the payout control program adds (increment) the real ball count PB by the value 1 (step S730), and terminates this routine. In step S730, the real ball count PB is incremented by incrementing the real ball count PB.

  On the other hand, when there is no detection signal from the count switch 751 in step S728, the payout control program ends this routine as it is. As described above, the payout control program is a case where the drive command number DRV is decremented in step S726 under the control of the payout control MPU 4120a, and when there is no detection signal from the counting switch 751 in the determination of step S728, In the case where the ball count PB is not incremented, it is assumed that one game ball can not be paid out because the game ball is not received by the recess of the payout rotary body to which the rotation of the rotary shaft of the payout motor 744 is transmitted. to decide. Therefore, the payout control program sets a value obtained by subtracting the real ball count PB from the winning ball stock number PBS in the drive command number DRV in step S720 described above in order to pay out the one ball to be paid out again. Thereby, when there is no detection signal from the count switch 751 in the determination of step S728, that is, when the real sphere count PB is not incremented, the value 1 which is one sphere to be paid out may be included in the prize sphere stock number PBS. Yes, in other words, since the value 1 which is the one ball to be paid out can be rounded into the winning ball stock number PBS, it is possible to perform a retry operation to again pay out the one ball to be paid out. By performing this retry operation, it is possible to extremely reduce the possibility that the game balls will not be paid out to the player, and the disadvantage of the player due to the non-payment of the game balls can be prevented.

[13-8-2. Ball clasp movement setting process]
Next, the ball look-up operation setting process will be described. In this ball facing operation setting process, setting is performed to eliminate the state of the ball from the payout rotating body to which the rotation of the rotation shaft of the payout motor 744 of the winning ball device 740 is transmitted.

  When the ball setting operation setting process is started, in the payout control unit 4120 of the payout control board 4110, the payout control program is under the control of the payout control MPU 4120a and, as shown in FIG. It is determined whether or not it has been (step S750). This determination is performed based on the sphere determination time which is subtracted in the timer update process of step S552 in the payout control unit power-on process (dispense control unit main process) shown in FIG. Specifically, the ball judging time is stored in the time management information storage area of the payout control built-in RAM described above as time management information. In step S750, the time management information is read out from the time management information storage area, and it is determined whether or not the ball has passed the determination time.

  If it is determined in step S750 that the ball determination time has not elapsed, the payout control program reads out the rotation angle switch detection history information RSW-HIST from the rotation angle switch history information storage area of the payout control built-in RAM (step S752). .

  Following step S752, the payout control program determines whether or not there is a detection signal from the rotation angle switch 752 described above (step S754). In this determination, it is determined whether or not the rotation angle switch detection history information RSW-HIST read out in step S752 matches the home position determination value. As described above, the home position determination value is stored in the payout built-in ROM, and in the present embodiment, "00001111B (" B "represents a bit)", and the upper four bits B7 to B4 are. The value 0 and the lower 4 bits B3 to B0 have a value 1. In step S754, it is determined whether the lower 4 bits B3 to B0 of the rotational angle switch detection history information RSW-HIST match the lower 4 bits B3 to B0 of the home position determination value.

  In step S754, when the lower 4 bits B3 to B0 of the rotational angle switch detection history information RSW-HIST read out in step S752 and the lower 4 bits B3 to B0 of the home position determination value do not match, the payout control program The output of the drive signal to the dispensing motor 744 is set so that the ball can be turned on (step S756), and this routine is ended. In this setting, drive information for outputting a drive signal to the payout motor 744 is set and stored in the output information storage area of the above-described payout control built-in RAM.

  On the other hand, when the lower 4 bits B3 to B0 of the rotational angle switch detection history information RSW-HIST read out in step S752 match the lower 4 bits B3 to B0 of the home position determination value in step S754, the payout control program Sets the stop of the drive signal to the payout motor 744 (step S758). In this setting, drive information for stopping the drive signal is set to the payout motor 744 and stored in the output information storage area of the payout control built-in RAM.

  Following the step S758, the payout control program sets the ball watching flag PBE-FLG to the value 0 as the ball watching operation ends (step S760), and ends this routine. This ball is a medium flag PBE-FLG is a flag indicating whether or not the ball is in a state of being seen by the payout rotating body, value 1 when the payout motor 744 is performing a blind movement The value is set to 0 when the operation is not being performed (the end of the ball leaning operation).

  On the other hand, when it is determined in step S750 that the ball has been determined, the payout control program sets the stop of the drive signal to the payout motor 744 (step S762). In this setting, drive information for stopping the drive signal is set in the payout motor 744 and stored in the output information storage area of the payout control built-in RAM.

  Following step S762, the payout control program sets an output of an error state to the CR unit 6 (step S764). Here, when the payout control MPU 4120a is not in communication with the CR unit 6 to notify the CR unit 6 that it is currently in a state that it is not possible to lend a ball (the logic of BRDY from the CR unit 6 is LOW, that is, (When falling and held), the logic of the PRDY signal is held LOW, ie, held down, and the logic state of the PRDY signal is set in the PRDY signal output setting information and stored in the CR communication information storage area Do. Thereby, in the CR communication process of step S554 in the payout control unit main process of the payout control unit power-on process of FIG. 38, the PRDY signal output setting information is read out from the CR communication information storage area stored in the payout control built-in RAM. The PRDY signal output setting information read out, that is, the PRDY signal whose logic is LOW, is output from the output terminal of the predetermined output port of the payout control MPU 4120a of the payout control unit 4120 via the game ball lending device connection terminal plate 869 CR. Output to unit 6 On the other hand, when communicating with the CR unit 6 (when the logic of BRDY from the CR unit 6 is HI, that is, rising and held), the logic state of the EXS signal is maintained and the logic state of the EXS signal Is set as EXS signal output setting information and stored in the CR communication information storage area. Thus, in the CR control process of step S554 in the payout control section main process of the payout control section power-on process of FIG. 38, the EXS signal output setting information is read out from the CR communication information storage area stored in the payout control internal RAM. The read EXS signal output setting information, that is, the EXS signal whose logic is maintained, is output from the output terminal of the predetermined output port of the payout control MPU 4120a to the CR unit 6 via the game ball connection device connection plate 869. . As described above, “maintain the logic state of the EXS signal” maintains the logic LOW of the EXS signal when the logic of the EXS signal is LOW (when the EXS signal falls and is held), the EXS signal is maintained. When the logic of H is HI (EXS signal is held rising) is to maintain that logic HI.

  Subsequent to step S764, the payout control program sets the ball watching flag PBE-FLG to the value 0 as the end of the ball watching operation (step S766), and ends this routine.

[13-9. Retry operation monitoring process]
Next, retry operation monitoring processing will be described. In this retry operation monitoring process, it is a process of monitoring whether or not the retry operation of paying out the gaming ball to be paid out again is normally performed.

  When the retry operation monitoring process is started, in the payout control unit 4120 of the payout control board 4110, the payout control program is under the control of the payout control MPU 4120a, and as shown in FIG. The rotation angle switch detection history information RSW-HIST is read out from the switch history information storage area (step S770).

  Following step S770, the payout control program determines whether or not there is a detection signal from the above-described rotation angle switch 752 (step S772). In this determination, it is determined whether or not the rotation angle switch detection history information RSW-HIST read out in step S770 matches the home position determination value. As described above, this home position determination value is stored in the payout control built-in ROM, and in the present embodiment, it is "00001111B (" B "represents a bit)", and the upper four bits B7 to B4 Has a value of 0, and the lower 4 bits B3 to B0 have a value of 1. In step S772, it is determined whether the lower 4 bits B3 to B0 of the rotational angle switch detection history information RSW-HIST match the lower 4 bits B3 to B0 of the home position determination value.

  In step S772, when the lower 4 bits B3 to B0 of the rotational angle switch detection history information RSW-HIST read out in step S770 match the lower 4 bits B3 to B0 of the home position determination value, the payout control program The mismatch counter INCC is incremented by 1 (increment, step S774). This misalignment counter INCC is received by the recess of the payout rotary body to which the rotation of the rotary shaft of the payout motor 744 is transmitted, and the number of balls of the gaming balls dispensed and the number of balls detected by the counting switch 751; Because the number of balls of the game balls received and paid out by the depressions of the payout rotary body is usually the same as the number of balls detected by the counting switch 751. , The value 0. The payout control program performs a retry operation in the payout installation process shown in FIG. 47, and thus the number of balls of the gaming ball paid out by being received by the recess of the payout rotating body by the retry operation and the count switch actually It is determined by monitoring the inconsistency counter INCC whether or not the game balls which are inconsistent due to the incoincidence detected at 751 are repeatedly paid out by monitoring the incoherence counter INCC. The inconsistency counter INCC is stored in the award ball information storage area of the payout control built-in RAM. In step S774, the payout control program increments the inconsistency counter INCC stored in the prize ball information storage area.

  Subsequent to step S774 or in step S772, lower 4 bits B3 to B0 of rotational angle switch detection history information RSW-HIST read out in step S770 do not match lower 4 bits B3 to B0 of the fixed position determination value At this time, the payout control program determines whether there is a detection signal from the counting switch 751 (step S776). This determination is performed based on the detection signal from the count switch 751 in the port input process of step S550 in the payout control unit power-on process (payout control unit main process) shown in FIG. Specifically, as described above, the detection signal is stored as the input information in the input information storage area of the above-described payout control built-in RAM. In step S776, the payout control program reads input information from the input information storage area and determines whether there is a detection signal from the counting switch 751 or not.

  When there is a detection signal from the count switch 751 in step S776, the payout control program subtracts the value 1 from the mismatch counter INCC stored in the prize ball information storage area of the payout control internal RAM (decrement, step S778) .

  Subsequent to step S778 or when there is no detection signal from the count switch 751 in step S776, the payout control program determines whether the value of the mismatch counter INCC is smaller than the mismatch threshold INCTH (step S780 ). In the pachinko machine 1, it is experimentally obtained that the probability that one unintended gaming ball due to the retry operation is paid out is about one in several million, and in the present embodiment, the inconsistency threshold INCTH As the value 5 is set.

  In the processing for setting the work area of the payout control internal RAM in step S530 in the processing at power on of the payout control unit of FIG. 38, as described above, it is the payout backup information stored in the payout control internal RAM at power recovery. Information to be used for the retry operation monitoring process is set based on the inconsistency counter INCC stored in the prize ball information storage area. By this processing, for example, even if a momentary power failure or a power failure occurs, the value of the inconsistency counter INCC or the like at the time of power recovery is restored to a value such as the inconsistency counter INCC immediately before the momentary power failure or power failure. It can be done. Thereby, in the determination of step S780, it is possible to continue monitoring of the payout operation (retry operation) of the gaming ball by the winning ball device 740, which has been performed immediately before the momentary power failure or power failure, from the time of power recovery. ing. Therefore, for example, when the value of the incompatibility counter INCC is smaller than the inconsistency threshold INCTH in the determination of step S780, for example, immediately before the instantaneous interruption or power failure, it is determined that the retry operation is operating normally. It can be determined that the payout operation of the gaming ball by the device 740 is in the normal state, and even at the time of power recovery, the payout operation of the gaming ball by the prize ball device 740 is in the normal status by the determination of step S780. On the other hand, if it is determined in step S780 that the value of the incompatibility counter INCC is not smaller than the incompatibility threshold INCTH, it is determined that the retry operation is in abnormal operation, that is, the payout operation of the gaming ball by the winning ball device 740 is abnormal. It is determined that the game is in the state, and even at the time of power recovery, it can be determined that the payout operation of the gaming ball by the winning ball device 740 is in the abnormal state in the determination of step S780.

  If it is determined in step S780 that the value of the mismatch counter INCC is smaller than the mismatch threshold INCTH, this routine ends. On the other hand, when the value of the mismatch counter INCC is not smaller than the mismatch threshold INCTH in step S780, that is, when the value of the mismatch counter INCC is equal to or greater than the mismatch threshold INCTH, the payout control program The payout control built-in RAM described above is configured to set retry error information for displaying the number “5” on the error LED display 860b, which is a segment display mounted on the payout control board 4110, in order to notify that it is It is set (stored) in the state information storage area of (step S782). On the other hand, when notifying that it is "in prize ball stock", the payout control program sets the prize ball in-progress information for displaying the number "9" on the error LED display 860b and incorporates the above-mentioned payout control. It is set (stored) in the state information storage area of the RAM (step S 782).

  Following step S782, the payout control program sets the value 0 (initial value 0) to the inconsistency counter INCC stored in the award ball information storage area of the payout control internal RAM (step S784). In step S784, when the value of mismatch counter INCC is not smaller than mismatch threshold INCTH in step S780, that is, the value of mismatch counter INCC is greater than mismatch threshold INCTH, step S784 is performed. It is designed to be initialized upon the occurrence of this internal factor. When the operation switch 860a is operated to clear the RAM when the power is turned on, the mismatch counter INCC is initialized in response to the occurrence of the external factor. When the operation switch 860a is operated when the power is turned on, as described above, an operation signal corresponding to the operation is input as a RAM clear signal to the main control MPU 4100a of the main control board 4100 shown in FIG. As described above, the main control program described above erases all the various information stored in the main control built-in RAM under the control of the main control MPU 4100a, and the RAM clear notification command is displayed on the peripheral control board shown in FIG. Output to 4140. Thus, the RAM clear notification sound is made to flow from the speaker housed in the speaker box 820 provided in the main body frame 3 shown in FIG. 5 and the speaker 130 provided in the door frame 5 shown in FIG.

  Subsequently to step S784, the retry error flag RTERR-FLG is set to the value 1 (step S786), and this routine is ended. The retry error flag RTERR-FLG is a flag indicating whether or not the retry operation is operating abnormally, value 1 when the retry operation is operating abnormally, and when the retry operation is not operating abnormally (the retry operation is It is respectively set to the value 0 when operating normally.

  The payout control program shows retry error information (or winning ball stock status information) set (stored) in the output information storage area of the payout control internal RAM in step S782 under the control of the payout control MPU 4120a, as shown in FIG. In the command transmission process of step S566 in the payout control unit power-on process (payout controller main process), a retry error status command is created and sent to the main control board 4100, and LED display data creation in step S564 in the same process The display data to be displayed on the error LED indicator 860b in the process is created and stored as LED display information in the output information storage area, and the LED display information stored in the output information storage area in the port output process of step S548 in the same process Outputs a drive signal to the error LED indicator 860b based on To display the number "5" on the error LED display device 860b. In the main control board 4100 that has received the status command, the main control program transmits it to the peripheral control board 4140 in the peripheral control board command transmission process of step S92 in the main control timer interrupt process shown in FIG. The periphery control board 4140 causes the door frame side lighting blink command to output a lighting signal to emit a plurality of LEDs of various decoration boards provided in the door frame 5 in a predetermined color (red in this embodiment). The light is output to the frame decoration drive amplifier substrate 194 shown in FIG. The store clerk or the like in the hall who noticed the light emission of the plurality of LEDs, as described above, opens the main body frame 3 to the outer frame 2 to set the numeral “on the error LED display 860 b mounted on the payout control board 4110. It can be confirmed that a “retry error” has occurred by visually observing that “5” is displayed. As a result, the store clerk or the like in the hall checks the malfunction of the counting switch 751, disconnection of various harnesses extending to the payout control board 4110 from the counting switch 751, contact failure of various connectors, etc. As compared with the case where the light emission of the plurality of LEDs and the display content of the error LED indicator 860b are not notified, it can be performed extremely quickly.

  In addition, by intentionally putting the counting switch 751 into the inoperative state, the above-described detection of the gaming balls paid out by being received by the recess of the payout rotating body to which the rotation of the rotation shaft of the payout motor 744 is transmitted If the value of the above-mentioned inconsistency counter INCC becomes equal to or more than the inconsistency threshold INCTH, even if a fraudulent action is made to forcibly generate a retry operation and illegally acquire the gaming ball paid out by this retry operation. Since a plurality of LEDs of various decoration substrates provided on the door frame 5 emit light, a clerk or the like in a hall rushes to check the state of the pachinko machine 1. In this case, the player who performs the injustice is forced to interrupt so as not to find the action, and can not continuously acquire the illegal gaming ball due to the injustice. Even if the value of the inconsistence counter INCC matches the inconsistency threshold INCTH, the number of gaming balls that can be acquired by the player who cheats is the same as the inconsistency threshold INCTH, that is, five balls As a result, damage to the hole due to the act of intentionally deactivating the count switch 751 can be minimized.

  Furthermore, as described above, the mismatch counter INCC is determined in step S780 when the value of the mismatch counter INCC is not smaller than the mismatch threshold INCTH, that is, the value of the mismatch counter INCC is greater than the mismatch threshold INCTH. It is designed to be initialized upon the occurrence of an internal factor that has become an issue. Thus, the mismatch counter INCC is not initialized, for example, in response to the occurrence of an external factor such as operating the operation switch 860a to clear the error. Therefore, even if the operation switch 860a or the like is altered illegally and the operation signal is input to the payout control MPU 4120a, the incoincidence counter INCC may be forcibly initialized by such an unauthorized action. Absent.

13-10. Mismatched counter reset judgment processing]
Next, mismatch counter reset processing will be described. In this misalignment counter reset process, the number of balls of the gaming balls paid out by being received by the recess of the payout rotary body to which the rotation of the rotary shaft of the payout motor 744 is transmitted, and the number of balls detected by the count switch 751. It is a process which determines whether the inconsistency counter INCC which calculates the difference of, is reset.

  When the inconsistency counter reset determination processing is started, in the payout control unit 4120 of the payout control board 4110, the payout control program determines the inconsistency counter reset determination time as shown in FIG. 50 under the control of the payout control MPU 4120a. It is determined whether it has elapsed (step S790). This determination is performed based on the mismatch counter reset determination time updated in the timer update process of step S 552 in the payout control unit power-on process (payout control unit main process) shown in FIG. Specifically, the inconsistency counter reset determination time is stored as time management information in the time management information storage area of the above-described payout control built-in RAM. In step S 790, the time management information is read out from the time management information storage area, and it is determined whether the inconsistency counter reset determination time has elapsed.

  If it is determined in step S790 that the inconsistency counter reset determination time has not elapsed, the payout control program ends this routine. On the other hand, when the mismatch counter reset determination time has elapsed in step S790, the payout control program initializes the mismatch counter reset determination time (step S792). By this initialization, the mismatch counter reset determination time is set to the initial value 7000 s (about 2 hours).

  Subsequent to step S 792, the payout control program sets the value 0 (initial value 0) to the inconsistency counter INCC stored in the above-mentioned award ball information storage area of the payout control internal RAM (step S 794). Finish. As described above, the misalignment counter INCC is detected by the counting switch 751 and the number of balls of the gaming balls paid out by being received by the recess of the payout rotary body to which the rotation of the rotary shaft of the payout motor 744 is transmitted. This is a counter for calculating the difference between the number of balls and the number of balls of the gaming balls normally received by the concave portion of the payout rotating body and paid out, and the number of balls detected by the count switch 751 Because it does, it becomes the value 0. The payout control program performs a retry operation in the payout setting process shown in FIG. 47 under the control of the payout control MPU 4120a, and the ball of the gaming ball paid out by being received by the recess of the payout rotating body by this retry operation. It is determined by monitoring with the mismatch counter INCC whether or not the game balls which are inconsistent due to the mismatch between the number and the number of balls actually detected by the count switch 751 are being repeatedly repeated. In the pachinko machine 1 of the present invention, it has been experimentally obtained that the probability that one game ball which is inconsistent due to the retry operation is paid out is about one in several million.

  Here, as described above, the pachinko machine 1 is made up of a game board 4 and a frame body such as a main body frame 3 or the like on which the game board 4 is mounted, and the game board 4 is replaced by replacing the game board 4 Since the specification is configured to be changeable, the payout control substrate 4110 for controlling the winning ball device 740, the power supply for the winning ball device 740 and the power supply 851 for generating the control power for the payout control substrate 4110 have common functions. It is equipped on the frame side as. Under the control of the payout control MPU 4120a, the payout control unit 4120 in the payout control board 4110 monitors whether the retry operation is repeated by monitoring the inconsistency counter INCC as described above. The operation can be determined, and in the payout control section power-off process in the payout control section power-on process shown in FIG. 38, the inconsistency counter INCC immediately before the shut-off is stored when the power is shut off. In the process of step S530 (setting at power recovery of the RAM work area) in the process at power-on of the payout control unit shown at 37, the process is started again from the stored mismatch counter INCC at the time of power-on.

  Then, when the game board 4 mounted on the pachinko machine 1 is shut off and the game board 4 'of another game specification different from the game board 4 is replaced to turn on the power, the payout control board The payout control MPU 4120a of the payout control unit 4120 in 4110 starts processing again from the mismatch counter INCC stored when the gaming board 4 is attached to the pachinko machine 1. That is, when the player plays the pachinko machine 1 to which the gaming board 4 'is attached, the inconsistency counter INCC in the pachinko machine 1 to which the gaming board 4 before replacement is attached is directly taken over. For this reason, the player plays the pachinko machine 1 on which the game board 4 'is mounted, and by chance the number of balls of the game ball which does not match is generated with a probability of one-millionth, and the inconsistency counter INCC When this inconsistency counter INCC becomes equal to or more than the above-mentioned inconsistency value INCTH, it is determined as an abnormal operation of the retry operation by the payout control MPU 4120a in a short period by replacing the gaming board 4 with the gaming board 4 '. There is a fear. That is, during a short time after the game board 4 is replaced with the game board 4 ', the malfunction of the count switch 751, the disconnection of various harnesses extending from the count switch 751 to the payout control board 4110, the contact failure of various connectors, etc. There is a possibility that the abnormal operation of the retry operation may be determined suddenly even though

  As described above, when it is determined that the game board 4 is replaced with the game board 4 'and the retry operation is determined to be an abnormal operation in a short period, the exchanged game board 4' has an impression of being easily broken despite being new. It may be given to the player. The probability of 1-millionth that one game ball which is inconsistent due to retry operation is paid out is one-millionth, when pachinko machine 1 is installed in the hall and operated continuously during the business hours of the hall for one week, Since it is the same as the probability that the game ball which is inconsistent by the retry operation is paid out one ball, the process of step S778 in the retry operation monitoring process shown in FIG. The value 1 is not drawn. Then, in one week, the mismatch counter INCC is incremented by 1 and the mismatch counter INCC becomes 1; in 2 weeks, the mismatch counter INCC is further incremented by 1 and the mismatch counter INCC becomes 2. In week, mismatch counter INCC is further incremented by 1 and mismatch counter INCC becomes 3, and in 4 weeks, mismatch counter INCC is further incremented by 1 and mismatch counter INCC is 4, and in 5 weeks When the mismatch counter INCC is further incremented by the value 1, the mismatch counter INCC becomes the value 5, which matches the above-mentioned mismatch threshold INCTH. That is, when five weeks have passed, the payout control program proceeds to step S776 in the retry operation monitoring process shown in FIG. 49 under the control of the payout control MPU 4120a in order for the mismatch counter INCC to coincide with the mismatch threshold INCTH. In the determination, it is determined that there is no detection signal from the counting switch 751, causing a failure of the counting switch 751, disconnection of various harnesses extending to the payout control board 4110 from the counting switch 751, contact failure of various connectors, etc. It is a segment display mounted on the payout control board 4110 to notify that it is a "retry error" in the process of step S782 in the retry operation monitoring process shown in FIG. A retry error that displays the number “5” on the error LED display 860b Set the information so that the set (stored) in the status information storage area of the payout control chip RAM.

  Therefore, when the payout control MPU 4120a determines that the mismatch counter reset determination time has elapsed in the determination in step S790 in this mismatch counter reset determination processing, that is, it repeatedly performs the mismatch counter reset every 7000s (about 2 hours). In the process of step S 794 in the determination process, the value 0 is forcibly set to the mismatch counter INCC, that is, the reset is performed forcibly, thereby incrementing the mismatch counter INCC generated with the probability of a few millions of parts described above. It is invalidated. As a result, although there is no malfunction of the counting switch 751, disconnection of various harnesses extending to the dispensing control board 4110 from the counting switch 751, contact failure of various connectors, etc., an error occurs in the retry operation. Can be prevented from being set (stored) in the state information storage area of the payout control built-in RAM.

  Note that, by intentionally putting the counting switch 751 into the inoperative state, the above-described detection of the gaming balls paid out by being received by the recess of the payout rotating body to which the rotation of the rotation shaft of the payout motor 744 is transmitted Even in the case where the retry operation is forcibly generated and the fraudulent act of illegally acquiring the gaming ball paid out by this retry operation is performed, the above-described is the case where the counting switch 751 is intentionally made to be inactive for a short time. Thus, when the value of the mismatch counter INCC becomes equal to or greater than the mismatch threshold INCTH, a plurality of LEDs of various decoration substrates provided on the door frame 5 emit light, so a store clerk or the like in the hall confirms the state of the pachinko machine 1 It will rush in order to In this case, the player who performs the injustice is forced to interrupt so as not to find the action, and can not continuously acquire the illegal gaming ball due to the injustice. On the other hand, in the case where the counting switch 751 is intentionally and repeatedly inactivated for a long time so that the value of the mismatch counter INCC does not exceed the mismatch threshold INCTH, the mismatch counter INCC is generated every 7000s (about 2 hours). During this period, the number of game balls that can be acquired by a player who has made a fraudulent activity is, as described above, up to the inconsistency threshold INCTH, and the counting switch 751 is intentionally set. Even if the game player is repeatedly inactivated for a long time, it is possible to extremely reduce the number of game balls that can be acquired by a player who performs fraudulent acts.

[13-11. Error release operation judgment processing]
Next, the error release operation determination process will be described. In this error release operation determination process, it is determined whether or not the operation switch 860a shown in FIG. 13 is operated.

  When the error release operation determination process is started, the payout control program in the payout control unit 4120 of the payout control board 4110 causes the operation switch 860a to release an error as shown in FIG. 51 under the control of the payout control MPU 4120a. It is determined whether or not it is operated (step S800). This determination is performed based on the operation signal from the operation switch 860a in the port input process of step S550 in the payout control unit power-on process (payout control unit main process) shown in FIG. Specifically, the operation signal is stored as input information in the input information storage area of the above-described payout control built-in RAM. In step S800, the payout control program reads input information from the input information storage area, and when the logical value of the operation signal from the operation switch 860a is HI, determines that it does not instruct to perform error release. Control switch 860a is not operated, while when the logical value of the operation signal from operation switch 860a is LOW, it is determined that it is instructed to perform the error release, and operation switch 860a is operated. It is determined that

  When the operation switch 860a is not operated in step S800, the payout control program ends this routine as it is, while when the operation switch 860a is operated in step S800, the payout control program performs an error flag state confirmation process. Perform (step S802). In this error flag state determination process, the state of the error flag corresponding to various types of error information regarding the winning ball device 740 is confirmed. For example, the state of a retry error flag RTERR-FLG indicating whether the retry operation is operating abnormally is confirmed. As described above, the retry error flag RTERR-FLG has a value 1 when the retry operation is abnormal, and a value 0 when the retry operation is not abnormal (the retry operation is normal). Because it is set, the payout control program checks whether the value of the retry error flag RTERR-FLG is the value 0 or the value 1 under the control of the payout control MPU 4120a.

  Following step S802, the payout control program performs state information setting processing (step S804). In this state information setting process, if the state of the error flag indicates that an error has occurred based on the error flag confirmed in step S802, the state information corresponding to the error flag is The payout control built-in RAM is set (stored) in the state information storage area. Thus, in the command transmission process of step S566 in the payout control unit power-on process (payout control unit main process) shown in FIG. 38, various information (status information) is read from the status information storage area, and this read status Based on the information, a state command is created and transmitted to the main control board 4100. For example, when the retry error flag RTERR-FLG indicating whether or not the above-mentioned retry operation is abnormal operation is the value 1, that is, when the retry operation is abnormal operation, it is indicated that an error occurs in the retry operation. If retry error information to be conveyed is set (stored) in the state information storage area of the payout control internal RAM, the command transmission process of step S566 in the payout control unit power-on process (payout control section main process) shown in FIG. A retry error status command is created and transmitted to the main control board 4100.

  When the main control board 4100 receives retry error information, the main control program transmits it to the peripheral control board 4140 in the peripheral control board command transmission process of step S92 in the main control timer interrupt process shown in FIG. In the control board 4140, the sub control program performs retry operation error notification processing to notify that an error has occurred in the retry operation. In this retry operation error notification process, the error notification announcement of the retry operation “Please check the winning ball unit.” And “Please check the harness of the payout control board.” Repeatedly sent to the store clerk or the like in the hall by flowing from the speaker housed in the speaker box 820 provided in the main body frame 3 shown in FIG. 5 repeatedly and the speaker 130 provided in the door frame 5 shown in FIG. It is supposed to The store clerk or the like in the hall who heard the error notification announcement of the retry operation breaks the count switch 751 shown in FIG. 13, breaks the various harnesses extending to the payout control board 4110 from the count switch 751, makes contact failure of various connectors, etc. As compared with the case where the error notification announcement of the retry operation does not flow from the speaker housed in the speaker box 820 provided in the main body frame 3 and the speaker 130 provided in the door frame 5, it can be confirmed extremely quickly. Further, in the retry operation error notification process, the plurality of LEDs of various decoration substrates provided in the door frame 5 are made to emit light in a predetermined color (red in this embodiment).

  Following step S804, the payout control program performs release setting processing (step S806). In this cancellation setting process, when the status of the error flag indicates that an error has occurred based on the error flags corresponding to the various error information confirmed in step S802, the error flag is handled. The CR unit 6 indicates that the error is forced to stop the content displayed by the error LED indicator 860b, which is a segment indicator already mounted on the payout control board 4110, or that the ball can be rented. In order to communicate to the above, the logic of the PRDY signal described above is held HI, that is, held up, from the output terminal of the predetermined output port of the payout control MPU 4120a of the payout control unit 4120 Output to the CR unit 6 via For example, when the retry error flag RTERR-FLG indicating whether or not the retry operation described above is operating abnormally is the value 1, that is, when the retry operation is operating abnormally, the error LED display 860b is already displayed. The retry error information stored in the state information storage area of the payout control built-in RAM described above is “normal” in order to forcibly stop the numeral “5” notifying that it is “retry error” It forcibly overwrites the information on which the graphic "-" for notifying the effect is displayed. Also, in order to tell the CR unit 6 that it is ready to lend a ball, the logic of the PRDY signal is held HI, that is, it keeps up and the gaming ball is output from the output terminal of the predetermined output port of payout control MPU 4120a And the like to the CR unit 6 through the lending device connection terminal plate 869.

  Following step S806, the payout control program performs error flag initialization processing (step S808), and the routine ends. In this error flag initialization process, if the state of the error flag indicates that an error has occurred based on the error flags corresponding to the various error information confirmed in step S802, the error flag is set. initialize. For example, when the retry error flag RTERR-FLG indicating whether or not the above-described retry operation is operating abnormally is the value 1, that is, when the retry operation is operating abnormally, the retry error flag RTERR-FLG has the value 0. Set and initialize. At this time, the logic of the PRDY signal described above is maintained at HI, that is, the rising state, and the logic state of the PRDY signal is set in the PRDY signal output setting information and stored in the CR communication information storage area. Thereby, in the CR communication process of step S554 in the payout control unit main process of the payout control unit power-on process of FIG. 38, the PRDY signal output setting information is read out from the CR communication information storage area stored in the payout control built-in RAM. The read out PRDY signal output setting information, that is, the PRDY signal whose logic is LOW, is output from the output terminal of the predetermined output port of the payout control MPU 4120a to the CR unit 6 via the game ball connection device connection plate 869. .

  Thus, the retry error flag RTERR-FLG is an internal factor when the value of the inconsistency counter INCC is equal to or greater than the inconsistency threshold INCTH in the determination of step S780 in the retry operation monitoring process shown in FIG. In the process of step S786 in the same process, the retry error flag RTERR-FLG is set to the value 1 while the operation switch 860a is operated, which causes this external factor to be triggered. The value 0 is set to the retry error flag RTERR-FLG in response to the occurrence, and the initialization is performed. The retry error flag RTERR-FLG is operated when the operation switch 860a is operated to clear the RAM when the power is turned on, that is, the operation switch 860a is operated to clear the RAM to cancel the error. As in the case where the switch 860a is operated, it is initialized upon occurrence of this external factor.

  As described above, in the pachinko machine 1, the main control side main process is executed from the time the power is turned on, with respect to the operation switch 860a (operation switch), which was originally used to cancel the error that occurred in the dispensing operation. An operation unit for exerting a RAM clear function for starting initialization of the main control built-in RAM (game storage unit) and the payout control built-in RAM (payout storage unit) for a predetermined time until It functions as In addition, the pachinko machine 1 causes the operation switch 860a to function as an operation unit for canceling an error that has occurred in relation to the payout operation of the game ball after the predetermined time has elapsed. Here, even if the store clerk is not accustomed to the operation of the pachinko machine, even if the position of the operation switch 860a on the back of the gaming machine is remembered, according to the timing when the operation switch 860a is operated, If the predetermined time has passed since the power was turned on, the function to release the error generated for the payout operation of the gaming ball is exhibited, while the predetermined time is given from the power turned on according to the timing when the operation switch 860a is operated. If it is within the time, the function of initializing the storage unit can be exhibited. Therefore, even if an error occurs in such a gaming machine, the hall clerk can improve the efficiency of the switch operation at the time of handling the error and can cope appropriately without losing the switch operation, so the game is interrupted. It is possible to resume the game before the player who has lost the game loses the will to play.

[13-12. Exchange of various signals with CR unit]
Next, the CR communication process of step S554 in the payout control unit main process of the payout control unit power-on process of FIG. 38 will be described using a timing chart. In this CR communication process, various signals are exchanged between the payout control board 4110 and the CR unit 6 shown in FIG. First, signal processing at the time of a dispensing operation by ball lending will be described, and subsequently, an input signal confirmation process from the CR unit 6 will be described. Here, the number of gaming balls for 200 yen as the amount of money (in the present embodiment, 50 balls, and the payout operation of 25 balls for 100 yen is performed twice as the amount of money) is the number of lent balls, The case of paying out to the upper plate 301 and the lower plate 302 shown in FIG. 7 will be described. The BRQ signal, the BRDY signal and the CR connection signal from the CR unit 6 read out the input information from the input information storage area of the payout control built-in RAM and are stored in the read input information, and the CR communication processing is performed. , From the input information, confirms the logic state of the BRQ signal, the BRDY signal and the CR connection signal every 2 ms which is an interrupt timer period.

13-12. Signal processing at the time of payout operation by ball rental]
The payout control MPU 4120a of the payout control unit 4120 in the payout control board 4110 reads out the PRDY signal output setting information from the CR communication information storage area of the payout control built-in RAM, and the read PRDY signal output setting information pays out the lent ball. In the case where it is set to the logic state of the PRDY signal that indicates that the payout operation is possible, as shown in FIG. 52 (d), the payout operation for paying out the rental ball is possible. In order to communicate the logic of the PRDY signal as HI, that is, start up and hold and output from the output terminal of a predetermined output port of the payout control MPU 4120a of the payout control unit 4120, and as PRDY, a game ball connection device connection terminal The signal is output to the CR unit 6 via the plate 869 (timing H0). In this state, for example, when the player operates the rental ball button 361 of the rental ball unit 360 shown in FIG. 2 by the player, the ball rental switch 365b is turned on (turned on). An operation signal is input from the frequency display plate 365 to the CR unit 6 via the game ball connection device connection terminal plate 869 as TDS shown in FIG. As shown in FIG. 52A, the CR unit 6 to which this TDS has been input pays out the number of gaming balls worth 200 yen to the upper plate 301 and the lower plate 302 as the number of lent balls, as shown in FIG. 52 (a). The ball request signal BRDY is output from the CR unit 6 to the payout control board 4110 (the payout control MPU 4120a) through the gaming ball rental device connection terminal plate 869, and the signal is raised and held (timing H1) . This BRDY is input as a BRDY signal to an input terminal of a predetermined input port of the payout control MPU 4120a.

  As shown in FIG. 52 (b), the payout control MPU 4120a, to which the BRDY signal is input, receives the loan request monitoring time HA (from 20 milliseconds (ms) to 58 ms in this embodiment) from the timing H1, as shown in FIG. The predetermined number of lent balls (in this embodiment, 25 balls) in one payout operation from the CR unit 6 through the game ball etc. lending device connection terminal plate 869 until the elapsing. ) It is monitored whether or not BRQ, which is a single request for starting dispensing operation to pay out 100 yen as the amount of money, rises.

  Since the CR unit 6 pays out the ball number of the gaming ball for 100 yen to the upper plate 301 and the lower plate 302 as the rental ball number among the ball number of the gaming ball for 200 yen as an amount, as shown in FIG. As shown in), until the lending request monitoring time HA elapses from the timing H1, the BRQ is output from the CR unit 6 to the CR unit 6 via the gaming ball lending device connection terminal plate 869, and the signal thereof Start up and hold (timing H2). The BRQ is input as a BRQ signal to an input terminal of a predetermined input port of the payout control MPU 4120a.

  As shown in FIG. 52 (c), when the BRQ signal rises from the timing H1 until the lending request monitoring time HA elapses, the payout control MPU 4120a starts the BRQ request comprehension ACK monitoring time HB from the timing H2 (in this embodiment, In order to indicate that one dispensing operation has been started until 20 ms ± 1 ms has elapsed, the logic of the EXS signal is set to HI, that is, the activated state is held and the dispensing control MPU 4120a Output from the output terminal of the predetermined output port, and to the CR unit 6 via the game ball lending device connection terminal plate 869 as EXS (timing H3).

  As shown in FIG. 52 (b), the CR unit 6 to which this EXS has been input is from timing H3 until the lending instruction monitoring time HC (which is set to 20 ms to 58 ms in this embodiment) has elapsed. The BRQ that has been raised and held from the timing H2 is output from the CR unit 6 to the payout control board 4110 via the game ball etc. lending device connection terminal plate 869, and the signal is dropped and held (timing H4).

  As shown in FIG. 52 (c), the payout control MPU 4120a performs one payout operation until the payout monitoring time HD (in this embodiment, the ball payout time is set) elapses from timing H4. It goes and pays out to the upper plate 301 or the lower plate 302 as the number of balls for the predetermined number of lent balls, that is, the number of gaming balls for 100 yen. Then, when the payout monitoring time HD has elapsed, the EXS signal which has been raised and held from timing H3 is held at the logic LOW, that is, held in the lowered state and output from the output terminal of the predetermined output port of the payout control MPU 4120a. , EXS are output to the CR unit 6 via the game ball and the like lending device connection terminal plate 869 (timing H5).

  Since CR unit 6 pays out the ball number of the game ball for the remaining 100 yen to the upper plate 301 or the lower plate 302 as the lent ball number among the ball number of the game ball for 200 yen as an amount, as shown in FIG. ) Until the next request confirmation timing HE (in the present embodiment, it is set to 268 ms at maximum) from the timing H5, the BRQ from the CR unit 6 to the lending device connection terminal board from the CR unit 6 The signal is output to the payout control board 4110 (the payout control MPU 4120a) via 869, and the signal is raised and held (timing H6).

  As shown in FIG. 52C, the payout control MPU 4120a similarly pays out the remaining 100 yen worth of gaming balls to the upper plate 301 and the lower plate 302 as the number of lent balls using the above-described method. The EXS signal which has been raised and held is held with its logic as LOW, that is, in the lowered state, and is output from the output terminal of a predetermined output port of the payout control MPU 4120a, and connected as a game ball lending device connection terminal as EXS. The signal is output to the CR unit 6 via the plate 869 (timing H7).

  The CR unit 6 stands from the timing H1, as shown in FIG. 52A, until the CR unit lending completion monitoring time HF (in the present embodiment, the maximum is 268 ms) elapses from the timing H7. The BRDY raised and held is output from the CR unit 6 to the payout control board 4110 (the payout control MPU 4120a) through the game ball etc. lending device connection terminal plate 869, and the signal is dropped and held (timing H8).

  The above-mentioned loan request monitoring time HA, BRQ request acceptance ACK monitoring time HB, lending instruction monitoring time HC, delivery monitoring time HD, next request confirmation timing HE, CR unit lending completion monitoring time HF is the delivery control shown in FIG. It is clocked by the timer update process of step S 552 in the processing at the time of turning on the division power supply (delivery control unit main processing).

  The payout control MPU 4120a is not in communication with the CR unit 6 when there is a ball out, a ball is out, a counting switch error, a retry error, a full tank, etc. (BRDY logic from the CR unit 6) Is low, that is, when it falls and is held), as shown in FIG. 52 (d), the PRDY signal which is raised and held from timing H1 is set to the state where the logic is LOW, that It holds and outputs it from the output terminal of a predetermined output port of the payout control MPU 4120a, and outputs it as the PRDY to the CR unit 6 through the game ball connection device connection terminal plate 869 (timing H9). On the other hand, when communicating with the CR unit 6 (when the logic of BRDY from the CR unit 6 is HI, that is, rising and held), the state of the logic of the EXS signal is maintained and the payout is made, though not shown. It outputs from the output terminal of the predetermined output port of the control MPU 4120a, and outputs it as the EXS to the CR unit 6 through the game ball lending device connection terminal plate 869. “Maintain the logic state of the EXS signal” means that when the logic of the EXS signal is LOW (when the EXS signal falls and is held), the logic LOW is maintained and the logic of the EXS signal is HI ( When the EXS signal is rising and held) is to maintain its logic HI.

  Thus, the CR unit 6 exchanges various signals with the payout control MPU 4120a of the payout control unit 4120 in the payout control board 4110, and the payout control MPU 4120a sets the number of balls of the gaming ball for 200 yen as the amount, 100 as the amount. By performing the payout operation of 25 balls for the yen twice, the game balls with a 50-ball number of the lent balls are paid out to the upper plate 301 and the lower plate 302. When a store clerk or the like in the hall operates a setting unit (not shown) provided on the front side of the CR unit 6, for example, the upper plate 301 or the number of gaming balls for 100 yen as the amount of money When it is set to pay out to the lower tray 302, the payout control MPU 4120a performs one payout operation of 25 balls of 100 yen as the amount of money, and the number of gaming balls of 500 yen as the amount of money as the amount of lent balls as the amount of money. When it is set to pay out to the upper tray 301 and the lower tray 302, the payout control MPU 4120a performs the payout operation of 25 balls for 100 yen as an amount five times, and the ball number of gaming balls for 1,000 yen as an amount When it is set to pay out to the upper tray 301 and the lower tray 302 as the number of balls to be lent, the payout control MPU 4120a performs the payout operation of 25 balls worth 100 yen as an amount ten times.

13-12. Confirmation process of input signal from CR unit]
The payout control MPU 4120a of the payout control unit 4120 in the payout control board 4110 can make the CR unit 6 perform BRQ from the CR unit 6 via the game ball lending device connection terminal plate 869 even if the lending request monitoring time HA described above has elapsed. CR unit 6 connects BRDY from CR unit 6 to a game ball lending device even if the signal is not output to payout control board 4110 and the signal for the above-mentioned lending instruction monitoring time HC has elapsed. The CR unit 6 plays the BRQ from the CR unit 6 even if the signal is not output via the terminal plate 869 and is not output to the payout control board 4110 and the next request confirmation timing HE described above has elapsed. The signal is output to the payout control board 4110 via the ball lending device connection terminal plate 869, and the signal is not activated or Even if the R unit lending completion monitoring time HF has elapsed, the CR unit 6 outputs BRDY from the CR unit 6 to the payout control board 4110 via the game ball lending device connection terminal plate 869 and lowers the signal. If not, the above-mentioned PRDY and EXS are used to confirm whether BRQ and BRDY are normal or not. Specifically, as shown in FIGS. 52 (e) and 52 (f), when the payout control MPU 4120a determines that BRQ and BRDY are not normal (timing J0), a predetermined period JA from this timing J0 (in the present embodiment) , 200 ms ± 1 ms), the logic of the PRDY signal is set to LOW, that is, held down, and output from the output terminal of the predetermined output port of the payout control MPU 4120 a of the payout control unit 4120. Output as a PRDY signal to the CR unit 6 through the game ball lending device connection terminal plate 869, and the logic of the EXS signal is set to LOW, that is, held down and the predetermined output port of the payout control MPU 4120a To the CR unit 6 via the game ball connection device board 869 as an EXS. To force (timing J1).

  Subsequently, the payout control MPU 4120a sets the PRDY signal, which has been dropped from timing J1 and held, to a logic of HI after elapse of a predetermined period JB (set to 200 ms ± 1 ms in this embodiment) from timing J1. That is, it holds in a raised state and outputs it from the output terminal of a predetermined output port of the payout control MPU 4120a, and outputs it to the CR unit 6 as a PRDY through the game ball lending device connection terminal plate 869 (timing J2 ).

  Subsequently, the payout control MPU 4120a sets the PRDY signal, which has been raised from timing J2 and held, to LOW after the elapse of a predetermined period JC (set to 100 ms ± 1 ms in this embodiment) from timing J2. In other words, hold it in the lowered state and output it from the output terminal of the specified output port of the payout control MPU 4120a, and output it to the CR unit 6 as the PRDY through the game ball lending device connection terminal plate 869 (timing J3 ).

  Subsequently, the payout control MPU 4120a sets the PRDY signal, which has been dropped from timing J3 and held, to a logic of HI after elapse of a predetermined period JD (set to 100 ms ± 1 ms in this embodiment) from timing J3. That is, it holds in a raised state and outputs it from the output terminal of a predetermined output port of the payout control MPU 4120a, and outputs it as the PRDY to the CR unit 6 via the game ball lending device connection terminal plate 869 (timing J4 ).

  Subsequently, the payout control MPU 4120a sets the PRDY signal, which has been raised from timing J4 and held, to LOW after the elapse of a predetermined period JE (in this embodiment, 100 ms ± 1 ms) from timing J4. In other words, it holds it in the lowered state and outputs it from the output terminal of the predetermined output port of the payout control MPU 4120a, and outputs it as the PRDY to the CR unit 6 through the game ball lending device connection terminal plate 869 (timing J5 ).

  Subsequently, the payout control MPU 4120a sets the PRDY signal, which has been dropped from timing J5 and held, to a logic of HI after elapse of a predetermined period JF (set to 10000 ms ± 1 ms in the present embodiment) from timing J5. That is, it holds in a raised state and outputs it from the output terminal of a predetermined output port of the payout control MPU 4120a, and outputs it as the PRDY to the CR unit 6 via the game ball lending device connection terminal plate 869 (timing J6 ).

  The predetermined period JA to the predetermined period JF described above are timed by the timer update process of step S552 in the payout control unit power-on process (dispense control unit main process) shown in FIG.

[14. Various control processing of peripheral control board]
Next, various processes of the peripheral control board 4140 for receiving various commands from the main control board 4100 (main control MPU 4100a) shown in FIG. 12 will be described with reference to FIGS. FIG. 53 is a flowchart showing an example of peripheral control unit power-on processing, FIG. 54 is a flowchart showing an example of peripheral control unit V blank interrupt processing, and FIG. 55 is an example of peripheral control unit 1 ms timer interrupt processing FIG. 56 is a flowchart showing an example of peripheral control unit command reception interrupt processing, and FIG. 57 is a flowchart showing an example of peripheral control unit power failure notice signal interruption processing.

  As shown in FIG. 15, the peripheral control board 4140 includes a peripheral control unit 4150 and a liquid crystal and sound control unit 4160. Here, various control processes of the peripheral control unit 4150 will be described. First, peripheral control unit power on processing will be described, and then peripheral control unit V blank interrupt processing, peripheral control unit 1 ms timer interrupt processing, peripheral control unit command reception interrupt processing, peripheral control unit power failure notification signal interrupt processing will be described. . In the present embodiment, the peripheral control unit blackout notification signal interrupt processing is set highest as the priority of the interrupt processing, and then the peripheral control unit 1 ms timer interrupt processing, peripheral control unit command reception interrupt processing, and peripheral control unit It is set in order of V blank interrupt processing.

[14-1. Various control processing of peripheral control unit]
[14-1-1. Peripheral control unit power-on process]
First, peripheral control unit power-on processing will be described with reference to FIG. When the pachinko machine 1 is powered on, the peripheral control MPU 4150a of the peripheral control unit 4150 shown in FIG. 15 performs processing at power-on of the peripheral control unit as shown in FIG. When the peripheral control unit power-on process is started, the effect control program performs an initial setting process under the control of the peripheral control MPU 4150a (step S1000). In this initial setting process, the effect control program performs a process of initializing the peripheral control MPU 4150a itself, a hot start / cold start determination process, a process of setting a wait timer after reset, and the like. The peripheral control MPU 4150a first performs a process of initializing itself. The time taken for the process of initializing the peripheral control MPU 4150a is on the order of microseconds (μs), and initializes the peripheral control MPU 4150a in an extremely short time. be able to. As a result, the peripheral control MPU 4150a enters the state in which the interrupt permission is set, for example, as shown in FIG. 30 and FIG. 31, which are output from the main control board 4100 in peripheral control unit command reception interrupt processing described later. It will be in the state which can receive various commands, such as a command about control of game production production, a command about a state of pachinko machine 1, etc.

  In the hot start / cold start determination process, with regard to the peripheral control RAM 4150c shown in FIG. 16, effect backup information (1 fr) which is the contents backed up in Bank 1 (1 fr) and Bank 2 (1 fr) in the backup first area 4150 cb. ), And the effect backup information (1 ms) which is the contents backed up in Bank 1 (1 ms) and Bank 2 (1 ms), and Bank 3 (1 fr) and Bank 4 (1 fr) in the backup second area 4150 cc. The effect backup information (1fr), which is the content backed up in, is compared, and the effect backup information (the content that is backed up in Bank 3 (1 ms) and Bank 4 (1 ms) ms) are compared, and when the compared contents are in agreement, the contents stored in Bank 1 (1 fr) with respect to Bank 0 (1 fr), which is a normally used storage area of peripheral control RAM 4150 c shown in FIG. Copy back the effect backup information (1fr) that is the effect backup information (1 ms), which is the content stored in Bank 1 (1 ms) for Bank 0 (1 ms), and compare them as hot start, and compare When the contents do not match (that is, when they do not match), the value 0 is forcibly written to Bank 0 (1 fr) and Bank 0 (1 ms), which are normally used storage areas of peripheral control RAM 4150 c. And a cold start.

  In the hot start / cold start determination process, the effect backup information, which is the contents backed up in Bank 1 (SRAM) and Bank 2 (SRAM), in the backup first area 4150 db also for the peripheral control SRAM 4150 d shown in FIG. (SRAM) is compared, and effect backup information (SRAM) which is the content backed up in Bank 3 (SRAM) and Bank 4 (SRAM) in the backup second area 4150 dc is compared. When the compared contents are identical, effect backup information (SRAM) which is the contents stored in Bank 0 (SRAM) with respect to Bank 0 (SRAM) which is a storage area normally used of peripheral control SRAM 4150 d shown in FIG. ) Is copied back to make a hot start, while when the compared contents do not match (that is, when they do not match), a value for Bank 0 (SRAM), which is a normally used storage area of peripheral control SRAM 4150 d Force 0 to write a cold start. Following such a hot start or cold start, the value 0 is forcibly written into the backup unmanaged work area 4150 cf of the peripheral control RAM 4150 c shown in FIG. 16 and cleared to zero. After the peripheral control MPU 4150a performs this initialization setting process, it outputs a clear signal to the peripheral control built-in WDT 4150af shown in FIG. 16 and the peripheral control external WDT 4150e shown in FIG. 15 to reset the peripheral control MPU 4150a. I try to prevent it.

  Following step S1000, the effect control program performs current time information acquisition processing (step S1002). In this current time information acquisition process, calendar information for specifying a date and time information for specifying hour / minute / second are acquired from the RTC built-in RAM 4165 aa of the RTC 41654 a of the RTC control unit 4165 shown in FIG. The RTC information acquisition storage area 4150 cad of the peripheral control RAM 4150 c shown in is set in the calendar information storage unit as current calendar information, and in the time information storage unit as current time information. Further, in the current time information acquisition process, the brightness setting process of the liquid crystal display device is also performed. In this brightness setting process of the liquid crystal display device, the peripheral control MPU 4150a acquires the brightness setting information from the RTC built-in RAM 4165aa of the RTC control unit 4165, and the game board is controlled to have the LED brightness included in the obtained brightness setting information. A process of adjusting the luminance of the backlight of the side liquid crystal display device 1900 and lighting it is performed. As described above, the brightness setting information is the brightness adjustment information for adjusting the range of the brightness of the LED of the game board-side liquid crystal display device 1900 ranging from 100% to 70% in 5% steps, and The brightness of the LED which is the backlight of the game board side liquid crystal display device 1900 which is set is included.

  Specifically, in the brightness setting process of the liquid crystal display device, the brightness of the LED included in the brightness setting information stored in the RTC built-in RAM 4165aa of the RTC control unit 4165 is 75% and the backlight of the game board side liquid crystal display device 1900 When turning on, the brightness of the backlight of the game board side liquid crystal display device 1900 is adjusted based on the brightness adjustment information included in the brightness setting information, and the brightness stored in the RTC built-in RAM 4165aa of the RTC control unit 4165 is lit. When the brightness of the LED included in the setting information is 80% and the backlight of the game board side liquid crystal display device 1900 is turned on, the backlight of the game board side liquid crystal display device 1900 is based on the brightness adjustment information included in the brightness setting information. Adjust the brightness and turn on. In the brightness setting process of the liquid crystal display device, the same correction as the brightness correction program for correcting the brightness of the game board liquid crystal display device 1900 according to the use time of the game board liquid crystal display device 1900 described above is It is supposed not to be done at all. This is because a correction program similar to the brightness correction program is incorporated into the brightness setting process of the liquid crystal display device, so that the brightness of the LED is corrected toward 100% each time the brightness setting process of the liquid crystal display device is executed. It is to prevent being done.

  In the present embodiment, the peripheral control MPU 4150a acquires calendar information and time information from the RTC built-in RAM 4165aa of the RTC 4165a only once at power-on. The peripheral control MPU 4150a outputs a clear signal to the peripheral control built-in WDT 4150af and the peripheral control external WDT 4150e after performing the current time information acquisition processing so that the peripheral control MPU 4150a is not reset.

  Following step S1002, the effect control program sets a value 0 to the V blank signal detection flag VB-FLG (step S1006). The V blank signal detection flag VB-FLG is a flag for determining whether or not peripheral control unit steady processing to be described later is to be performed, and has a value of 1 when peripheral control unit steady processing is executed, and peripheral control unit steady processing The value is set to 0 when not executing. The V blank signal detection flag VB-FLG is executed when the V blank signal indicating that the screen data from the peripheral control MPU 4150 a can be received is input from the sound source built-in VDP 4160 a as a peripheral control described later. The value 1 is set in part V blank signal interrupt processing. In this step S1006, the V blank signal detection flag VB-FLG is initialized once by setting the value 0 to the V blank signal detection flag VB-FLG. Also, after setting the V blank signal detection flag VB-FLG to the value 0, the peripheral control MPU 4150a outputs a clear signal to the peripheral control built-in WDT 4150af and the peripheral control external WDT 4150e so that the peripheral control MPU 4150a is not reset. There is.

  Subsequent to step S1006, the effect control program determines whether the V blank signal detection flag VB-FLG has a value 1 (step S1008). If the V blank signal detection flag VB-FLG is not 1 (is 0), the process returns to step S1008 to repeatedly determine whether the V blank signal detection flag VB-FLG is 1 or not. By repeating such a determination, it will be in the state which waits until peripheral control part steady processing is performed. Also, after determining whether the V blank signal detection flag VB-FLG has a value 1, the peripheral control MPU 4150a outputs a clear signal to the peripheral control built-in WDT 4150af and the peripheral control external WDT 4150e to reset the peripheral control MPU 4150a. I try to prevent it.

  When the V blank signal detection flag VB-FLG has a value 1 in step S1008, that is, when the peripheral control unit steady process is to be performed, the steady process in progress flag SP-FLG is set to a value 1 (step S1009). The steady process in progress flag SP-FLG is set to a value 1 when the peripheral control unit steady process is being executed, and a value 0 when the peripheral control unit steady process is completed.

  Subsequent to step S1009, the effect control program performs a 1 ms interrupt timer activation process (step S1010). In this 1 ms interrupt timer activation process, the 1 ms interrupt timer for executing peripheral control unit 1 ms timer interrupt processing to be described later is activated, and the number of times the 1 ms interrupt timer is activated and peripheral control unit 1 ms timer interrupt processing is executed. The value 1 is set to the 1 ms timer interrupt execution number STN for counting and the initialization of the 1 ms timer interrupt execution number STN is also performed. The 1 ms timer interrupt execution count STN is updated by the peripheral control unit 1 ms timer interrupt process.

  Subsequent to step S1010, the effect control program performs lamp data output processing (step S1012). In this lamp data output process, the effect control program performs DMA serial continuous transmission to the lamp drive board 4170 shown in FIG. Here, serial drive I / O port serial transmission is performed using the peripheral control DMA controller 4150 ac of the peripheral control MPU 4150 a shown in FIG. As shown in FIG. 9, the lamp drive substrate side transmission data storage area 4150 caa of the peripheral control RAM 4150 c externally attached to the peripheral control MPU 4150 a shown in FIG. The game board side light emission data SL-DAT for outputting lighting signals, blinking signals, or gradation lighting signals to a plurality of LEDs of various decoration boards provided on the game board 4 are created by a lamp data creation process described later Is set.

  The peripheral control CPU core 4150aa of the peripheral control MPU 4150a shown in FIG. 16 designates transmission of the lamp drive board serial I / O port as a request factor of the peripheral control DMA controller 4150ac, and the lamp drive board side transmission data storage area 4150caa The first byte of the game board side light emission data SL-DAT stored at the top address is sent to the serial I / O port for a lamp drive board via the external bus 4150h, the peripheral control bus controller 4150ad, and the peripheral bus 4150ai. Transfer and write to the transmit buffer register of Thus, the lamp drive board serial I / O port transfers the data of the written transmission buffer register to the transmission shift register, and one byte of the transmission shift register is synchronized with the game board-side light emission clock signal SL-CLK. Start sending data one bit at a time.

  The peripheral control DMA controller 4150 ac is triggered every time a transmission interrupt request for a lamp drive substrate serial I / O port is generated (in the present embodiment, to the transmission buffer register of the lamp drive substrate serial I / O port). The 1 byte data written is transferred to the transmission shift register, and it is triggered by the fact that 1 byte data is empty in the transmission buffer register and becomes empty.) The peripheral control CPU core 4150aa uses the bus If not, through the external bus 4150 h, the peripheral control bus controller 4150 ad, and the peripheral bus 4150 ai, the remaining game board-side light emission data SL-DAT stored in the lamp drive substrate side transmission data storage area 4150 caa is byte by byte. Transmission of serial I / O port for lamp drive board By transferring to the buffer register for writing, the lamp drive board serial I / O port transfers the data of the written transmission buffer register to the transmission shift register, in synchronization with the game board-side light emission clock signal SL-CLK. Transmission of 1-byte data of the transmission shift register is started bit by bit, and continuous transmission is performed by the lamp drive substrate serial I / O port.

  In the lamp data output process, the effect control program performs the DMA serial continuous transmission process to the frame decoration drive amplifier board 194 shown in FIG. Also here, the frame I / O port serial I / O port continuous transmission is performed using the peripheral control DMA controller 4150 ac of the peripheral control MPU 4150 a. When serial transmission of serial I / O port for frame decoration drive amplifier substrate LED is started, transmission data storage area for frame decoration drive amplifier substrate side LED of peripheral control RAM 4150c externally attached to peripheral control MPU 4150a shown in FIG. In 4150 cab, door side light emission data STL-DAT for outputting lighting signals, blinking signals or gradation lighting signals to a plurality of LEDs of various decoration substrates provided in the door frame 5 is created by lamp data creation processing described later Is set.

  The peripheral control CPU core 4150aa of the peripheral control MPU 4150a designates transmission of the serial I / O port for frame decoration drive amplifier board LED as a request factor of the peripheral control DMA controller 4150ac, and transmits data storage area for frame decoration drive amplifier board side LED The first byte of the door-side light emission data STL-DAT stored at the top address of 4150 cab is serialized to the frame decoration drive amplifier board LED via the external bus 4150 h, peripheral control bus controller 4150 ad, and peripheral bus 4150 ai Transfer and write to the transmit buffer register of the I / O port. Thus, the frame I / O port for the frame decoration drive amplifier substrate LED transfers the data of the written transmission buffer register to the transmission shift register, and synchronizes with the door side light emission clock signal STL-CLK. Transmission of 1-byte data is started bit by bit.

  The peripheral control DMA controller 4150 ac is triggered by generation of a transmission interrupt request of the serial I / O port for the frame decoration drive amplifier substrate LED (in the present embodiment, the serial I / O for the frame decoration drive amplifier substrate LED) One byte of data written to the port's transmit buffer register is transferred to the transmit shift register, and it is triggered by the fact that there is no data in the transmit buffer register and becomes empty.) Peripheral control CPU core 4150aa When the bus is not used, the remaining door-side light emission data STL-DAT stored in the frame decoration drive amplifier substrate side LED transmission data storage area 4150cab is byte by byte, the external bus 4150h, and the peripheral control bus controller 4150ad. , And frame decoration through the peripheral bus 4150ai By transferring and writing to the transmission buffer register of the serial I / O port for the dynamic amplifier board LED, the frame I / O port for the frame decoration drive amplifier board LED uses the data of the written transmission buffer register as the transmission shift register. Transfer and start transmitting data of 1 byte of the transmission shift register in synchronization with the door side light emission clock signal STL-CLK, bit by bit, and perform continuous transmission by the frame decoration drive amplifier board LED serial I / O port There is.

  Subsequent to step S1012, the effect control program performs an operation unit monitoring process (step S1014). In this operation unit monitoring process, in the operation unit information acquisition process in peripheral control unit 1 ms timer interrupt process described later, dial operation unit 401 based on detection signals from various detection switches provided in operation unit 400 shown in FIG. 7. Information (for example, rotation of the dial operation unit 401 created based on detection signals from various detection switches provided in the operation unit 400) (for example, rotation of the dial operation unit 401 (rotation direction)) And the operation history information of the pressing operation unit 405 etc. are set, based on the operation unit information acquisition storage area 4150 cai of the peripheral control RAM 4150 c shown in FIG. The presence or absence of the operation of the unit 405 is monitored, and the rotation direction of the dial operation unit 401 or Appropriately determined whether to reflect the state of operation of the pressure operation unit 405 to the game effects.

  Subsequent to step S1014, the effect control program performs display data output processing (step S1016). In this display data output process, drawing data for one screen (one frame) generated on the built-in VRAM of the built-in VDP 4160a in the display data creation process to be described later from channels CH1, 2 shown in FIG. The game board side liquid crystal display device 1900 and the upper tray side liquid crystal display device 470 are outputted. As a result, various screens are drawn on the game board side liquid crystal display device 1900 and the upper dish side liquid crystal display device 470. In the display data output process, when drawing is performed exceeding the drawing capability of the VDP 4160a with built-in sound source, the generated drawing data of one screen (one frame) is used for the game board liquid crystal display device 1900 and the upper dish liquid crystal The output to the display device 470 is canceled. Although this can prevent the processing time from being delayed, so-called dropping of frames may occur, but various decoration boards provided on the game board 4 shown in FIG. 9 by the lamp data output process of step S1012. Loudspeaker housed in the speaker box 820 provided in the main body frame 3 shown in FIG. 5 by effects of the plurality of LEDs and various decorative substrates provided in the door frame 5 by the plurality of LEDs and sound data output processing described later It becomes a mechanism which can give priority to synchronization of effects by music or sound effects according to various effects from the speaker 130 provided in the door frame 5 shown in FIG.

  Subsequent to step S1016, the effect control program performs sound data output processing (step S1018). In this sound data output process, the effect control program outputs to the audio data transmission IC 4160c audio data obtained by serializing sound data such as music and sound effects set in the sound source built-in VDP 4160a in the sound data creation process described later. In addition to music and sound effects, the audio data transmission IC 4160 c outputs the audio data of the notification sound and the notification sound as serialized audio data. The audio data transmission IC 4160 c receives the serialized audio data from the sound source built-in VDP 4160 a, and directs the right side audio data to the frame decoration drive amplifier board 194 as serial data of the difference system which makes it a plus signal and a minus signal. While transmitting, the left audio data is transmitted toward the frame decoration drive amplifier board 194 as serial data of a difference system in which a plus signal and a minus signal are used. As a result, in addition to the stereo reproduction of music and sound effects according to various effects from the speakers contained in the speaker box 820 provided in the main body frame 3 and the speakers 130 provided in the door frame 5, the notification sound and the notification sound It is also played in stereo.

  Following step S1018, the effect control program performs scheduler update processing (step S1020). In this scheduler update processing, the effect control program updates various schedule data set in the schedule data storage area 4150 cae of the peripheral control RAM 4150 c shown in FIG. For example, in the scheduler update process, the screen data of the first screen data from the screen data at the top among the screen data arranged in time series constituting the schedule data for screen generation set in the schedule data storage area 4150cae Update the pointer to indicate what to output.

  Also, in the scheduler update process, among the light emission data arranged in time series that make up the light emission mode generation schedule data set in the schedule data storage area 4150 cae, what number light emission data from the top light emission data of the various light emission data The pointer is updated to indicate whether it is an aspect.

  Further, in the scheduler update process, sound data such as music and sound effects, and sound data of notification sound and notification sound, arranged in time series constituting the sound generation schedule data set in schedule data storage area 4150 cae Among the sound command data, the pointer is updated in order to instruct which sound command data from the sound command data at the top is to be output to the VDP 4160a with built-in sound source.

  Also, in the scheduler update processing, from the drive data at the top of the drive data of the electric drive source such as the motor and the solenoid arranged in time series that configure the electric drive source schedule data set in the schedule data storage area 4150 cae The pointer is updated to indicate which drive data is to be output. Drive data of electric drive sources such as motors and solenoids arranged in time series constituting the electric drive source schedule data is peripheral control unit 1 ms timer interrupt which is repeatedly executed each time 1 ms timer interrupt described later is generated. Updated with motor and solenoid drive processing in processing. In the motor and solenoid drive processing that is repeatedly executed each time the 1 ms timer interrupt occurs, the electric drive source such as the motor and solenoid is driven according to the drive data indicated by the pointer, and the next drive defined in time series is performed. It updates pointers to data, and updates pointers every time it executes its own processing. That is, since the drive data instructed by the pointer updated in the motor and solenoid drive processing is forcibly updated in the scheduler update process, the pointer is originally instructed for some reason in the motor and solenoid drive processing. Even when other driving data is designated from the driving data to be designated, the scheduler updating process is forcibly updated so as to instruct the driving data to be essentially designated.

  Subsequent to step S1020, the effect control program performs a received command analysis process (step S1022). In this reception command analysis process, the effect control program analyzes various commands received from the main control board 4100 in the peripheral control unit command reception interrupt process (command reception means) described later (command analysis means). That is, in the effect control program, the command received in the peripheral control unit command interrupt process is, for example, a start opening winning command for instructing the start of start opening winning effect, the number of reserved normal symbols (0 to 4) Normal symbol memory command for identifying, symbol tuning effect start command for instructing the start of symbol tuning effect, symbol memory command to be output when the number of start hold changes, degree of gaming ball accepted in big winning opening 2103 The special winning opening 1 count display command (big winning opening counting command) output to the or frame status 1 command (second error occurrence command, full error occurrence command) indicating the content of full shown in FIG. It is analyzed whether there is any (command analysis means), and it is recognized which gaming state is currently. Also, in this effect control program, after a predetermined time has elapsed since the power was turned on, the command received by the peripheral control unit command reception interrupt processing is the main body frame open command, the main body frame close command, the door open command or the door frame closed Analyze whether it is a command or not. Various commands from the main control board 4100 are received by peripheral control unit command reception interrupt processing and stored in the reception command storage area 4150 cac of the peripheral control RAM 4150 c shown in FIG. The effect control program analyzes various commands stored in the reception command storage area 4150 cac. The various commands shown in FIG. 30 are various commands classified as special figure 1 tuning effect related, various commands classified as special figure 2 synchronous effect related, various commands classified as big hit related, power ON Various commands to be displayed, various commands to be classified to general drawing tuning effect related, various commands to be classified to regular electric terminal production related, various commands to be classified into notification display shown in FIG. 31, door frame opening command described above , For displaying status such as door frame closing command, body frame opening command and body frame closing command, error cancellation navigation command (corresponding to second error cancellation command) and frame state 1 command (corresponding to second error occurrence command) There are various commands which are classified, various commands which are classified as test related, and various commands which are classified as others.

  Here, in the effect control program, the command analyzed in the received command analysis process (step S1022) is a frame state 1 command (second error generation command) or the above-mentioned special winning opening 1 count display command (big winning opening count command) As a suggestion display for prompting the user to touch the display button (operation unit) as shown in FIG. 58 using the upper dish liquid crystal display device 470 (second display device). Based on the above-mentioned suggestion display thing image data, display control of button 740A of a display mode with which a word with a store clerk call button was superimposed, for example is performed (operation call-up means). Subsequently, the effect control program starts displaying the button 740A as a call control function, and then with the operation on the operation surface of the touch panel 480 corresponding to the position of the button 740A, the effect operation most immediately to the outside Different call operations are controlled (call control means) to make it easy for a hall clerk to draw attention.

  In this way, the player who is trying to call a hall clerk does not have to extend his arm or body in order to reach a data counter that is often arranged above the pachinko machine 1 Since it is only necessary to touch the display button visible through the operation surface of the touch panel 480 which is closer to the player, it is possible to experience physical inconvenience or physical burden in calling a hall clerk. Even if it is played for a long time with the pachinko machine 1, it becomes difficult to receive unnecessary stress. Therefore, such a configuration can contribute to the improvement of the operation rate.

  By the way, the work by the hole store clerk who appeared at the player in response to the above-mentioned call should be completed as soon as possible, considering the player's mental state of wanting to resume the game as soon as possible. Should have the idea of wanting to cooperate with the store clerk as much as possible. On the other hand, in this pachinko machine 1, the effect control program analyzes the error content based on the frame state 1 command (second error occurrence command) received from the main control board 4100 (error content analysis means). Furthermore, the effect control program is based on an error content management table (not shown) that manages whether or not the player should take a seat according to each error content, and a complicated handling operation (for example, a hall clerk) according to the error content. If it is determined that opening / closing of the main frame 3 or the door frame 5 is necessary, the display mode is such that only the standard message of “call shop button” is superimposed on the display of the button 740A as described above In addition to the above standard message, if you decide that complex response work by the hall clerk is not necessary according to the content, a display mode where the additional message “Please leave your seat and wait” is superimposed on the display of the above button I assume. In this way, the player who encounters such an error acts as it is immediately without wondering whether he should take his seat or wait for the hall clerk due to the presence of the additional message mentioned above. It can be determined whether it should be, and if necessary, the hall clerk can be given enough work space to complete the subsequent work.

  Further, when the effect control program detects an operation signal output in response to the touch of a part of the operation surface of touch panel 480 corresponding to the position of the button display in the display area of upper dish liquid crystal display device 470, the button Is displayed, and when the button is displayed, the operation surface of the touch panel 480 corresponding to the position of the button is operated in response to the appearance of the button display. It is regarded as a thing. On the other hand, when the effect control program detects the operation signal, if the button is not displayed, the operation signal is not the appearance of the button display but another factor (the operation on the effect is prompted And the display button is considered to be operated in response to

  Here, if it is determined that the effect control program has shifted from the normal gaming state to the big hit gaming state (special gaming state) based on the command received from the main control board 4100, then the indication read out from the liquid crystal and sound control ROM 4160b Based on the display image data, the upper tray liquid crystal display 470 (second display device) displays, for example, the words "Please push the pressing operation unit and call a clerk when it is likely to overflow from the dollar box" It is good also as a display mode piled up. In this way, if the player is about to be flooded from the containing box (corresponding to the above-mentioned dollar box) after the game balls are discharged in the jackpot gaming state and the game balls discharged through the lower tray 302 are about to overflow Since it is not necessary to extend arms and body in order to manually operate the so-called call button of the data counter, it is possible to concentrate more on the game and to suppress the decrease in the operation rate.

  By the way, assuming that the player is made to operate the display button according to the display mode of the upper tray liquid crystal display device 470 in order to call the hall clerk in search of a new storage box in the big hit game state as described above, At first glance, it seems that it is difficult to distinguish the operation signal from the case of actually prompting the player to operate the display button in the effect in the jackpot gaming state itself. That is, in the effect control program, when the operation signal is detected, the player operates the display button in response to the effect in the big hit gaming state, or the player operates the display button in search of a new storage box. It seems that I can not distinguish what I did.

  However, the effect control program uses the concept of time sharing to urge the player to actually operate the display button in effect in the effect in the big hit gaming state (special game state) and restricts the execution of the call operation by the call control function. Is made to distinguish between a staff member's callable time zone in which the store clerk can be called by the operation of the display button and the call control function is permitted to execute the calling operation (time Sharing control means). Specifically, the effect control program determines that the command analyzed in the received command analysis process (step S1022) is a frame state 1 command (second error occurrence command) indicating that the tank is full. In the case, it is considered as the above-mentioned store clerk callable time zone, while the other time zones are considered as the participation operation possible time zone. This effect control program is shown in FIG. 62 using the upper tray liquid crystal display device 470 (second display device) indicating that the jackpot is in progress when it is considered to be the store clerk callable time zone. Thus, the display control of the words "Please pull the ball" is performed at the top of the screen, and the display control of the button of the display mode in which the words "store clerk call button" are superimposed is performed. In this way, when the effect control program detects an operation signal in the big hit gaming state, when the detection timing is within the participation operable time zone, the button display is performed in response to the effect of the big hit gaming state If it is determined that the operation has been performed, but the detection timing is within the above-mentioned store clerk callable time zone, it is determined that the display button has been operated to call the hall clerk, and the distinction is made. By the way, the effect control program indicates that the command analyzed in the received command analysis process (step S1022) is the large winning opening 1 count display command (large winning opening count command) and is full. If it is determined that the frame status 1 command (second error occurrence command), it is almost impossible to fit the gaming ball in the containing box at the time of the big hit, and it is mentioned above as a trigger for the player to call the hall clerk. The screen shown in FIG. 62 is displayed.

  By the way, when the effect control program determines that the command analyzed in the received command analysis process (step S1022) is the door open command or the main body frame open command (that is, the door frame 5 is for the main body frame 3). When it is opened or when the main body frame 3 is opened with respect to the outer frame 2), the upper dish liquid crystal display device 470 (second display device) is caused to perform display in the following display mode. That is, the presentation control program instructs the upper tray liquid crystal display device 470 to display a service mode screen (see FIG. 63) for the work by the hall clerk, and then the player operates the touch panel 480 on the operation surface. When it is detected that “meal break setting” is selected by the operation of the display button (operation unit), the in-rest flag that was “0” is set to “1”, and the above-mentioned RTC built-in RAM 4165 aa (clock storage unit (4) to write in the RTC information storage area 4150 cad) and to display a break timer setting screen (see FIG. 64) corresponding to the operation setting screen for setting the operation stop time which does not permit the operation described above (operation Setting screen display control means). In this manner, it is difficult to display such a break timer setting screen in the operation by the player, triggered by the door open command or the main body frame open command which can be generated only by the operation of the hall clerk. Can.

  Further, the effect control program causes the time information (for example, 60 minutes) input on the break timer setting screen (operation setting screen) to be set as the operation stop time according to the operation of the hall clerk using the display button (operation stop time setting) means). Furthermore, the effect control program is triggered by the fact that the operation stop time is set on the break timer setting screen (operation setting screen), and the operation stop time set in the upper tray liquid crystal display device 470 (second display device) Is displayed as shown in FIG. 65 (remaining time display control means). At the same time, the effect control program may set at least a part of the effect operation of the effect operation by the peripheral control board 4140 to be in the stop state or the suppression state (remaining time display control means). Note that this effect control program at least suppresses the display operation of the game board side liquid crystal display device 1900 (first display device) by the peripheral control board 4140 over the set operation stop time, for example, a display mode of blackout You may make it (1st display control suppression means). By doing this, it is possible to suppress the power consumption of the gaming board side liquid crystal display device 1900 for the operation stop time during which the player does not play the game.

  In addition, the effect control program, when the remaining time of this operation stop time becomes a prescribed state, for example, count becomes zero (that is, the time becomes 21:11), or the above-mentioned received command analysis process (step S1022) If it is determined that the command analyzed in step is the door closing command or the main frame closing command, display control of the remaining time of the operation stop time shown in FIG. Is released (stop state release means). In this way, it is difficult for the player to make such a cancellation in the operation by the player by using the door closing command or the body frame closing command that can be generated only by the operation of the hall clerk as described above. Can.

  Also, on the other hand, the effect control program, as described above, provides information on the remaining time (first remaining time) of the operation stop time at the first time point when the power failure notice signal output by the power failure monitoring circuit 4100e is received. It is written in the RTC information storage area 4150 cad of the RTC built-in RAM 4165 aa (clock storage unit) (elapsed time information saving means). That is, as shown in FIG. 66, for example, as shown in FIG. 66, immediately before the power is shut off with the remaining time being 23 minutes, the information regarding the remaining time of the operation stop time at that time (first time) is nonvolatile. , And continues to hold the remaining time of the operation stop time at the first point of time throughout the power failure.

  By the way, this effect control program further adds, to the RTC information storage area 4150 cad, information (hereinafter referred to as effect pattern information under execution) related to the effect pattern which has been executed at the first time when such a power failure notice signal is received. Write (specific effect pattern evacuation means). As information on such an effect pattern, various information set in the schedule data storage unit 4150 cae (see FIG. 16) of the backup management target work area 4150 ca corresponding to the command received from the main control board 4100 (main control MPU 4100 a) A pointer of schedule data (hereinafter, referred to as “effect pattern pointer”) can be illustrated. With reference to this effect pattern pointer, the effect control program can grasp which schedule data is being used to execute the effect pattern being executed.

  This effect control program is triggered by the reception of the above-described power on command, that is, triggered by the fact that the power is turned on again, the type of effect pattern being executed when the power failure notice signal is received. Can be grasped based on the effect pattern pointer already set in the RTC information storage area 4150 cad of the RTC built-in RAM 4165 aa, and the above effect pattern is re-executed from the head based on the schedule data specified by the grasped effect pattern pointer Do (representation pattern restoration means).

  On the other hand, this effect control program is taking a break in the RTC information storage area 4150 cad of the RTC built-in RAM 4165 aa (clock storage unit) in response to the reception of the power on command, that is, the power on again. It is checked whether the flag is "1", and if the break flag is "1", the power-on command is received from the first time when the above-mentioned power failure notification signal is received. The elapsed time (for example, 8 minutes) measured by the RTC control unit 4165 (time measuring unit) is assumed to be the remaining time of the operation stop time already written in the RTC information storage area 4150cad of the RTC built-in RAM 4165aa The remaining time (second remaining time) of the operation stop time as a result of adding to the remaining time of 1), for example, Is displayed again on dish liquid crystal display device 470 as the remaining time of 15 minutes "(remaining time restoring means).

  In this way, even if 60 minutes are set as the specified rest time and the remaining time of the rest time starts to be measured, the RTC will be interrupted even during the blackout from the first time point to the second time point. Since the control unit 4165 receives power supply by the battery 4165 b (second power supply), the information related to the remaining time of the operation stop time held in the RTC information storage area 4150 cad of the built-in RAM 4165 aa is prevented from being volatilized and erased be able to. If it is subsequently restarted, the effect control program is executed from the beginning instead of being continued from the first point in time of the power failure state for the effect pattern, and is executed again from the portion that the player has remembered. As described above, based on the information regarding the remaining time of the operation stop time kept in the RTC information storage area 4150 cad even during the power failure period, the remaining of the operation stop time correctly including the elapsed time for the power failure period before and after the power failure. The time can be measured, and even if it is restarted as such, the remaining rest time can be accurately represented.

  As described above, the RTC control unit 4165 is supplied with power by the battery 4165b even in the power failure state, and the RTC built-in RAM 4165aa (timekeeping storage unit) triggered by the remaining time of the operation stop time becoming 0 minutes. In the RTC information storage area 4150 cad.), The in-rest flag, which is “1”, is written to be set to “0”. Thereafter, the effect control program is taking a break in the RTC information storage area 4150 cad of the RTC built-in RAM 4165 aa (clock storage unit) in response to the reception of the power on command, that is, the power on again. Check if the flag is "1", and if the break flag is not "1" (that is, "0"), the operation stop time kept in the RTC information storage area 4150 cad Reset the information on the remaining time of to 0 minutes.

  As described above, when the power failure state is turned on again after the remaining time of the operation stop time has elapsed, the effect control program controls the liquid crystal and sound control unit 4160 to display the “rest” on the upper plate liquid crystal display device 470. The display indicating that the power has been interrupted while the time has been set is then displayed over a preset period. In this way, if the original player who can not return within the break time can return within the predetermined time period, then the other player plays a game on the pachinko machine 1 temporarily. This is because the pachinko machine 1 is opened to another player by the end of the break time set by the desire of the original player, and the other player is malicious Since it can be recognized that the player is not playing a game, it is possible not only to prevent unnecessary troubles, but also to suppress the loss of the game intention after that.

  On the other hand, in the effect control program, the remaining time of this operation stop time becomes count zero (a prescribed state) (that is, the time becomes 21:11), and is analyzed in the reception command analysis process (step S1022) If the command issued is not the door closing command or the main frame closing command, for example, the game board side liquid crystal display device 1900 is controlled in a specific mode different from the latest rendering operation described above, for example, as shown in FIG. A notification operation is performed to the effect that the remaining time of 0 minutes is 0 minutes and the rest time has ended (notification operation start means). In this way, it is possible to immediately and easily know not only the hall clerk but also the player who is waiting for the pachinko machine 1 to be opened to a third party that the rest period has ended. it can. Furthermore, after the start of such notification operation, the effect control program determines that the command analyzed in the reception command analysis process (step S1022) described above is the door closing command or the main body frame closing command (ie, the door When the frame 5 is closed with respect to the main body frame 3 or when the main body frame 3 is closed with respect to the outer frame 2), the above-described notification operation is stopped (informing operation stop means). In this way, the time during which the pachinko machine 1 can not operate based on the player's intention such as a break can be shortened as much as possible.

  In this case, the main frame 3 or the door frame 5 needs to be opened or closed to suspend or resume the operation of the pachinko machine 1, so only the hall clerk who holds the key necessary for the opening and closing of such pachinko machine The operation suspension and resumption of the machine 1 can be performed. Moreover, after a certain hall clerk suspends the operation of the pachinko machine 1 for a while as taking a break, he / she pays attention to each pachinko machine 1 and each player by receiving calls from many players, etc. Even when it is not possible, immediately after the operation stop time has elapsed in the pachinko machine 1 which has suspended the operation, it is possible for the third party to readily recognize that the operation low time has elapsed. . For this reason, even if the player does not easily return from the break, the hall clerk can put the pachinko machine 1 into a state in which other players can play the pachinko machine 1 at an early stage. While the operation rate regarding the machine 1 can be raised even a little, each operation rate of each pachinko machine 1 installed in each island installation can be raised as a whole.

  By the way, based on the calendar information and time information stored in the RTC built-in RAM 4165aa of the RTC control unit 4165 mounted on the peripheral control board 4140, the effect control program is performed according to the time zone in which the player takes a break When setting the operation stop time, change the unit time that can be changed per operation (hereinafter referred to as "variable unit time") from 5 minutes to the desired unit time (for example, 15 minutes) as shown in FIG. It is good. If such a change is possible, the operation stop time can be flexibly set according to the time of day or on the day of the week, so a weekday night time zone (or weekend) where a high operation rate is desired to be secured. ) Keep the operating rate high even at a little by shortening the variable unit time, and improve the proof for hall service as a longer variable unit time in the time zone (weekday daytime) where originally high operating rate is hard to be desired Thus, it is possible to prevent the player's willingness to play again in the hall again next time.

  On the other hand, in the effect control program, when the command analyzed in the received command analysis process (step S1022) as described above is an error release navigation command (second error generation command), the error release navigation command The error occurrence position information included in is extracted and acquired (error occurrence place specifying means).

  Subsequent to step S1022, the effect control program performs warning processing (step S1024). In this warning process, when the effect control program further includes various commands divided into the notification display shown in FIG. 31 in the commands analyzed in the received command analysis process of step S1022 as described above, various kinds of commands are performed. The schedule data for screen generation, the schedule data for light emission mode generation, the schedule data for sound generation, the electrical drive source schedule data, etc., which are set to the abnormality display mode for executing the abnormality notification, of the peripheral control unit 4150 It extracts from various control data copy area 4150ce of peripheral control ROM 4150b or peripheral control RAM 4150c, and sets 4150 cae in the schedule data storage area of peripheral control RAM 4150c. In the warning process, when a plurality of abnormalities occur simultaneously, the abnormality notification is performed from the highest priority registered in advance to the abnormality notification, and the abnormality is automatically resolved to another abnormality notification that has been resolved. It is supposed to By this, it is possible to simultaneously monitor a plurality of abnormalities without losing information that one abnormality has occurred after another abnormality has occurred and before the other is resolved. Can.

  Furthermore, in this warning process, after a predetermined time has elapsed since the power was turned on, the command analyzed in the received command analysis process (step S1022) described above by the effect control program is divided into the state display shown in FIG. Various commands, for example, an error release navi command (second error release command), the liquid crystal and sound control unit 4160 is controlled in a mode different from the normal production mode accompanying the rendering operation, for example, liquid crystal display Device 1900 (rendering device), upper dish liquid crystal display device 470 (rendering device), lamp (rendering device) to visually warn the outside or a pair of side speakers 130 (rendering device) aurally Warn the outside (error notification means). By doing so, when a malicious player attempts to input an error cancellation navigation command to the main control board 4100 by operating the operation switch 860a of the payout control board 4110 despite the gaming state. Since the pachinko machine 1 is configured to give a warning to the outside, it is possible to prevent an illegal act on the main control board 4100 that may affect the progress of the game.

  As described above, when notified to the outside, the effect control program uses this as a trigger to read out the main frame back image data from the liquid crystal and sound control ROM 4160 b (data storage unit), and the read main frame back image Based on the data, as shown in FIG. 59, based on the error occurrence position information included in the frame status 1 command (second error occurrence command) on the upper dish liquid crystal display device 470 (second display device) A maintenance screen is displayed in which the specified dot area 740Z on the main body frame rear surface image 740C has a prescribed display mode (error occurrence position suggesting means).

  On the maintenance screen shown in FIG. 59, a fault content display area 740D elongated in the horizontal direction and including an error number and error content described later is displayed at the top, and the above-mentioned button 740A is slightly left on the center side. Other than the display, for example, details of the error contents of "insufficient delivery" are displayed. Furthermore, in the maintenance screen, a main body frame back image 740C is displayed in the right area. The main frame back image 740C is a schematic view of the pachinko machine 1 as viewed from the back, that is, the arrangement of each portion on the back side of the main frame 3 on which the game board 4 is mounted. The effect control program described above is based on the error occurrence position information included in the frame state 1 command (second error occurrence command) received from the main control board 4100, on the specific dot area (area 740Z And the specific dot area 740Z on the main body frame rear surface image 740C in a blinking manner (defined display manner).

  In this way, the hall clerk who arrives at the origin of the player in response to the player's call opens the main body frame 3 with respect to the outer frame 2 and mounts the game in the conventional manner. The upper dish liquid crystal display device 470 (second display device) provided on a part of the door frame 5 without confirming the error content of the error LED indicator 860c provided on the payout control substrate 4110 of the board 4 By checking the area 740Z on the main body frame rear surface image 740C in the maintenance screen, it is possible to immediately grasp which part of the pachinko machine 1 has an error by visually recognizing the blinking mode of the area 740Z. For this reason, according to the configuration of the present embodiment, even in a situation where the pachinko machine 1 is complicated as in recent years, it is possible to suppress an increase in the time taken to cope with errors, and the pachinko machine 1 with a complicated configuration. In this case as well, the store clerk can complete the error handling as soon as possible, and it is possible to make it difficult for the player to get embarrassed or dissatisfied during the error handling.

  Here, in addition to eliminating the error occurrence position suggesting image from the upper-dish liquid crystal display device 470 in response to the reception of the error cancellation navi command (second error cancellation command), the effect control program deletes the error instead. When the main frame closing command is received prior to the error release navi command, the main frame closing command is regarded as an error release navi command, and the upper tray liquid crystal display device 470 (see FIG. The main body frame maintenance image is erased from the second display device (screen return means). In this way, even if the store clerk who has completed the error handling forgets to operate the operation switch 860a, the main frame closing command is regarded as a substitute for the error cancellation navigation command, and the upper plate liquid crystal The display of the maintenance screen of the display device 470 can be turned off. In this way, even if the store clerk forgets to turn off the maintenance screen of the upper-dish liquid crystal display device 470 after dealing with an error, it is automatically turned off by closing the main body frame 3 with respect to the outer frame 2, The game can be continued without feeling.

  Next, following the above-described step S1024, the effect control program performs an RCT acquisition information update process (step S1026). In this RTC acquisition information update process, the effect control program stores the calendar information storage unit acquired in the current time information acquisition process of step S 1002 and set in the RTC information acquisition storage area 4150 cad of the peripheral control RAM 4150 c shown in FIG. The updated calendar information and the time information stored in the time information storage unit are updated. By this RCT acquisition information update process, the hour, minute, second, which is time information stored in the time information storage unit, is updated, and the year, month, and day which are calendar information stored in the calendar information storage unit based on the updated time information. The day is updated.

  Following step S1026, the effect control program performs lamp data creation processing (step S1028). In this lamp data creation process, the pointer of the effect control program is indicated among the light emission data arranged in time series, the pointer being updated in the scheduler update process of step S1020, and constituting the light emission mode generation schedule data On the basis of the light emission data, the game board side light emission data SL for outputting lighting signals, blinking signals, or gradation lighting signals to a plurality of LEDs of various decoration boards provided on the game board 4 shown in FIG. DAT is created by extracting it from various control data copy areas 4150ce of peripheral control ROM 4150b of peripheral control unit 4150 or peripheral control RAM 4150c, and is set in lamp drive substrate side transmission data storage area 4150caa of peripheral control RAM 4150c shown in FIG. And various decorations provided on the door frame 5 The door side light emission data STL-DAT for outputting lighting signals, blinking signals or gradation lighting signals to a plurality of LEDs of the board, various control data copy areas 4150ce of the peripheral control ROM 4150b of the peripheral control unit 4150 or the peripheral control RAM 4150c From the peripheral control RAM 4150c shown in FIG. 16 and set in the transmission data storage area 4150cab for the LED on the frame decoration drive amplifier substrate side of the peripheral control RAM 4150c.

  Subsequent to step S1028, the effect control program performs display data creation processing (step S1030). In this display data creation process, the pointer is updated in the scheduler update process of step S1020 in the effect control program, and the screen data indicated by the pointer among the screen data arranged in time series constituting the screen generation schedule data Are extracted from the various control data copy area 4150ce of the peripheral control ROM 4150b of the peripheral control unit 4150 or the peripheral control RAM 4150c and output to the sound source built-in VDP 4160a. When the screen data is input from the peripheral control MPU 4150a, the sound source built-in VDP 4160a extracts character data from the liquid crystal and sound control ROM 4160b based on the input screen data to create sprite data, and the game board side liquid crystal display device 1900 and drawing data of one screen (one frame) to be displayed on the upper plate side liquid crystal display device 470 are generated on the built-in VRAM.

  Subsequent to step S1030, the effect control program performs touch panel processing (step S1031). In this touch panel process, the effect control program detects the contact state on the operation surface of the touch panel 480 based on the detection signal received from the touch panel 480 (contact state detection means). That is, the effect control program has a function as a touch panel driver (contact state detection unit) that detects a contact state on the operation surface of the touch panel 480. The effect control program acquires the coordinate value of the operation surface of the touch panel 480 indicating the center of the contact portion based on the contact state, and specifies the position represented by the coordinate value as a detection point (detection point acquisition means) Operation information including this initial position is acquired. The effect control program may not only acquire such coordinate values but also acquire the range of the operation surface (hereinafter referred to as the contact range). On the other hand, the effect control program controls the motor 482 (drive unit) to attach the film 488, triggered by the touch panel driver detecting the contact state on the operation surface of the touch panel 480 and then detecting the contact state no longer The movement is made relative to the kimono detection sensors 483R and 483L (adherence detection unit) (film movement control means). The effect control program described above collects pattern information of the attached matter in accordance with the state of the attached matter detected by the attached matter detection sensors 483R and 483L (adhesion detecting unit) (pattern acquisition means). The contents of the touch panel process will be described later.

  Subsequent to step S1031, the effect control program performs sound data creation processing (step S1032). In this sound data creation process, the pointer is updated in the scheduler update process of step S1020 in the effect control program, and the pointer points out of the sound command data arranged in time series constituting the sound generation schedule data. Sound command data is extracted from the various control data copy area 4150ce of the peripheral control ROM 4150b of the peripheral control unit 4150 or the peripheral control RAM 4150c and output to the sound source built-in VDP 4160a. The sound source built-in VDP 4160a receives sound command data from the peripheral control MPU 4150a, extracts sound data such as music and sound effects stored in the liquid crystal and sound control ROM 4160b, and controls the built-in sound source While incorporating sound data such as music and sound effects according to the track numbers specified in the data, the output channel to be used is set according to the output channel number.

  In the sound data creation process, the peripheral control A / D converter 4150ak shown in FIG. 16 is activated each time the sound data creation process is performed (that is, each time the peripheral control unit steady process is performed), and the volume adjustment volume The voltage divided by the resistance value at the rotational position of the knob portion 4140a is converted into 1024 steps of values from 0 to 1023. In the present embodiment, values of 1024 steps are divided into seven and managed as substrate volumes 0 to 6, muffled at substrate volume 0, and set to maximum volume at substrate volume 6, and substrate volume 0 to substrate The volume is set to increase toward the volume 6 respectively. The sound source built-in VDP 4160a of the liquid crystal and sound control unit 4160 is controlled to obtain the volume set to the substrate volume 0 to 6, and audio data is obtained as audio data obtained by serializing sound data in the sound data output process of step S1018 described above. By outputting to the transmission IC 4160 c, music and sound effects flow from the speaker housed in the speaker box 820 provided in the main body frame 3 and the speaker 130 provided in the door frame 5.

  Further, the notification sound and the notification sound flow without depending on the volume adjustment based on the turning operation of the knob at all, and the sound source from the mute to the maximum volume is programmed by the liquid crystal and sound control unit 4160 by the program. The built-in VDP 4160a can be controlled and adjusted. The volume adjusted by this program can be changed smoothly from the muffling to the maximum volume, unlike the substrate volume divided into the seven steps described above. For example, even when the store clerk or the like in the hall turns the knob portion of the volume adjustment volume 4140a to set the volume small, the speaker and door frame 5 housed in the speaker box 820 provided on the main body frame 3 Although the effect sound such as music and sound effects flowing from the provided speaker 130 is reduced, the loudness (in the present embodiment, the maximum) in the case where a problem occurs in the pachinko machine 1 or when the player is making cheating The notification sound set to (volume) can be flowed. Therefore, even if the volume of the effect sound is reduced, it is possible to prevent the clerk or the like in the hall from becoming aware of the occurrence of a malfunction or the player's fraudulent act by the notification sound. Also, based on the current substrate volume set by the volume adjustment based on the turning operation of the knob portion, the volume of the advertisement sound is reduced to prevent interference with music and sound effects. To increase the volume of the sound and to add to music and sound effects to create a more powerful screen developed by the game board side liquid crystal display device 1900 and the upper dish side liquid crystal display device 470, which is advantageous for the player It can also be notified that there is a high possibility of transition to the gaming state.

  Subsequent to step S1032, the effect control program performs backup processing (step S1034). In this backup process, the contents of the effect control program stored in the peripheral control RAM 4150c externally attached to the peripheral control MPU 4150a shown in FIG. 16 are stored in the backup first area 4150cb and the backup second area 4150cc. The contents are respectively copied and backed up, and the contents stored in the peripheral control MPU 4150a and the peripheral control SRAM 4150d externally attached are copied and backed up respectively to the backup first area 4150db and the backup second area 4150dc.

  More specifically, in the backup process, the peripheral control RAM 4150c is backed up for each frame (1 frame) in the backup target work area 4150ca shown in FIG. 16, that is, every time peripheral control unit steady processing is executed. The lamp drive board side transmission data storage area 4150 caa, the frame decoration drive amplifier board side LED transmission data storage area 4150 cab, the reception command storage area 4150 cac, the RTC information acquisition storage area 4150 cad, and included in Bank 0 (1 fr) As the effect backup information (1fr), the effect information (1fr) stored in the schedule data storage area 4150cae is Bank1 (1fr) and Bank2 (1f) of the backup first area 4150cb. Peripheral control DMA controller 4150ac in) is copied at high speed, and backup Bank3 second area 4150cc (1fr) and peripheral control DMA controller 4150ac to Bank4 (1FR) is copied at high speed.

  The high speed copy of the contents stored in Bank 0 (1fr) by this peripheral control DMA controller 4150 ac will be briefly described. The peripheral control MPU core 4150 aa of peripheral control MPU 4150 a shown in FIG. 16 is a request factor of peripheral control DMA controller 4150 ac. Specify the contents stored in Bank0 (1fr), copy the backup first area 4150cb to Bank1 (1fr), and from the contents stored at the start address of Bank0 (1fr), specify the end address of Bank0 (1fr) All of the stored contents are copied sequentially from the top address of Bank 1 (1fr) of backup first area 4150cb successively by predetermined bytes (for example, 1 byte), and peripheral control MPU core 4150aa performs peripheral control D. The contents stored in Bank0 (1fr) are specified as request factors for A controller 4150ac, and copying to Bank 2 (1fr) of backup first area 4150cb is specified, and Bank0 (1fr) from the contents stored at the start address of Bank0 The contents stored in the end address of (1fr) are all copied sequentially from the top address of Bank 2 (1fr) of the backup first area 4150cb successively by predetermined bytes (for example, 1 byte).

  Subsequently, the peripheral control MPU core 4150 aa specifies the contents stored in Bank 0 (1 fr) as a request factor of peripheral control DMA controller 4 150 ac, and designates copying of backup second area 4150 cc to Bank 3 (1 fr), Bank 0 (1 fr) From the contents stored at the start address of) to the contents stored at the end address of Bank0 (1fr), the start address of Bank3 (1fr) of backup second area 4150cc in succession by a predetermined byte (for example, 1 byte) All copies are sequentially copied in order from the above, and the peripheral control MPU core 4150aa specifies the contents stored in Bank0 (1fr) as the request factor of peripheral control DMA controller 4150ac, and the copy of backup second area 4150cc to Bank 4 (1fr) The Bank4 (1fr) of the backup second area 4150cc for each predetermined byte (for example, 1 byte) continuously from the content stored at the start address of Bank0 (1fr) to the content stored at the end address of Bank0 (1fr) Copy all in order from the start address of.

  In the backup processing, the peripheral control SRAM 4150 d is a backup target for each frame (1 frame) in the backup target work area 4150 da shown in FIG. 16, that is, whenever the peripheral control unit steady processing is executed. The peripheral control DMA controller 4150ac performs high-speed operation on Bank1 (SRAM) and Bank2 (SRAM) in the first backup area 4150db as effect backup information (SRAM), which is contents (SRAM) stored in Bank0 (SRAM) And the peripheral control DMA controller 4150 ac copies at high speed to Bank 3 (SRAM) and Bank 4 (SRAM) of the backup second area 4150 dc.

  The high speed copy of the contents stored in Bank 0 (SRAM) by peripheral control DMA controller 4150 ac will be briefly described. The peripheral control MPU core 4150 aa of peripheral control MPU 4150 a shown in FIG. 16 is a request factor of peripheral control DMA controller 4150 ac. Specify the contents stored in Bank0 (SRAM), copy the backup first area 4150db to Bank1 (SRAM), and from the contents stored at the start address of Bank0 (SRAM) to the end address of Bank0 (SRAM) All of the stored contents are successively copied sequentially from the top address of Bank 1 (SRAM) in the backup first area 4150 db sequentially by predetermined bytes (for example, 1 byte), and the peripheral control MPU core 4150 aa The content stored in Bank0 (SRAM) is specified as the request factor of peripheral control DMA controller 4150ac, and the copy to Bank 2 (SRAM) of backup first area 4150db is specified, and the content stored in the start address of Bank0 (SRAM) To the contents stored in the end address of Bank 0 (SRAM) are sequentially copied in order from the start address of Bank 2 (SRAM) of backup first area 4150 db successively by predetermined bytes (for example, 1 byte).

  Subsequently, the peripheral control MPU core 4150 aa designates the contents stored in Bank 0 (SRAM) as a request factor of peripheral control DMA controller 4 150 ac, and designates copying of backup second area 4150 dc to Bank 3 (SRAM), Bank 0 (SRAM From the contents stored at the start address of) to the contents stored at the end address of Bank 0 (SRAM), the start address of Bank 3 (SRAM) in the backup second area 4150 dc continuously for each predetermined byte (for example, 1 byte) Copy all in order from the above, and the peripheral control MPU core 4150 aa stores the contents stored in Bank 0 (SRAM) as the request factor of peripheral control DMA controller 4 150 ac, to Bank 4 (SRAM) in backup second area 4150 dc. To the contents stored at the start address of Bank 0 (SRAM) and the contents stored at the end address of Bank 0 (SRAM), each second predetermined byte (for example, 1 byte) is continuously backed up in the second area 4150 dc. Copy all from the start address of Bank 4 (SRAM) in order.

  Following step S1034, WDT clear processing is performed (step S1036). In this WDT clear processing, a clear signal is output to the peripheral control built-in WDT 4150 af and the peripheral control external WDT 4 150 e so that the peripheral control MPU 4 150 a is not reset.

  Following step S1036, the effect control program sets the steady process in progress flag SP-FLG to 0 as the completion of execution of the peripheral control unit steady process (step S1038), and returns to step S1006 again to return the V blank signal detection flag VB. The value of 0 is set in FLG and initialized, and the determination in step S1008 is repeated until the value of 1 is set in the V blank signal detection flag VB-FLG in peripheral control unit V blank signal interrupt processing described later. That is, in step S1008, the process waits until the value 1 is set to the V blank signal detection flag VB-FLG, and when it is determined in step S1008 that the V blank signal detection flag VB-FLG is the value 1, steps S1009 to The process of S1038 is performed, and the process returns to step S1006 again. As described above, when it is determined in step S1008 that the V blank signal detection flag VB-FLG is the value 1, the processing of steps S1009 to S1038 is performed. The process of step S1009 to step S1038 is referred to as "peripheral control unit steady process".

  The peripheral control unit steady processing is started by setting the value 1 to the steady processing in progress flag SP-FLG, assuming that the peripheral control unit steady processing is being executed at first in step S1009, and the effect control program sets 1 ms in step S1010. Interrupt timer activation processing is performed, and each processing of step S1012, step S1014, ..., and step S1036 is performed, and finally, in step S1038, the execution of the peripheral control portion steady processing is completed and the value in the steady processing flag SP-FLG is 0 Setting will complete. The peripheral control unit steady processing is executed when the V blank signal detection flag VB-FLG has a value 1 in step S1008. As described above, this V blank signal detection flag VB-FLG is triggered by the fact that a V blank signal indicating that the screen data from the peripheral control MPU 4150 a can be received is input from the VDP 4160 a with built-in sound source. In the peripheral control unit V blank signal interrupt processing to be described later, the value 1 is set. In the present embodiment, as described above, the frame frequency (number of screen updates per second) of the game board side liquid crystal display device 1900 and the upper dish side liquid crystal display device 470 is set to approximately 30 fps per second. The interval at which the blank signal is input is approximately 33.3 ms (= 1000 ms ÷ 30 fps). That is, the peripheral control unit steady processing is repeatedly performed about every 33.3 ms.

[14-1-2. Peripheral control unit V blank signal interrupt processing]
Next, a V blank signal indicating that the screen data from peripheral control MPU 4150 a of peripheral control unit 4150 can be received shown in FIG. 15 is input from liquid crystal built-in VDP 4160 a of liquid crystal and sound control unit 4160. The peripheral control unit V blank signal interrupt processing to be executed triggered by the event will be described. When the peripheral control unit V blank signal interrupt processing is started, the peripheral control MPU 4150a of the peripheral control unit 4150 determines whether the steady processing in progress flag SP-FLG has a value 0 as shown in FIG. S1045). As described above, the steady process in progress flag SP-FLG has a value 1 when the peripheral control unit steady process in step S1009 to step S1038 in the peripheral control unit power-on process of FIG. 53 is being executed. When execution of the process is completed, they are set to 0 respectively.

  If it is determined in step S1045 that the steady process processing flag SP-FLG is not 0 (is the value 1), that is, if the peripheral control unit steady process is being executed, this routine is ended as it is. On the other hand, when the steady processing in progress flag SP-FLG is 0 in step S1045, that is, when the peripheral control unit steady processing is completed, the V blank signal detection flag VB-FLG is set to 1 (step S1050), End this routine. As described above, the V blank signal detection flag VB-FLG is a flag for determining whether or not peripheral control unit steady processing is to be performed, and the value 1 when peripheral control unit steady processing is executed, peripheral control When the partial steady process is not performed, the value is set to 0, respectively.

  In this embodiment, it is determined in step S1045 whether or not the steady process in progress flag SP-FLG has a value of 0, that is, whether the peripheral control unit steady process has been completed, and the peripheral control unit steady process is completed. Sometimes, the value 1 is set to the V blank signal detection flag VB-FLG in step S1050, but this is because the V blank signal is input when the peripheral control unit steady processing is being executed. When the value 1 is set to the signal detection flag VB-FLG, the peripheral control unit steady processing currently being executed is assumed as the peripheral control unit steady processing is executed by the determination of step S1008 in the peripheral control unit power-on processing of FIG. In order to prevent this by forcibly canceling on the way and starting execution of peripheral control unit steady processing from the beginning, the peripheral control unit in FIG. 53 is powered on. The peripheral control unit V blank signal which is this routine indicates that peripheral control unit steady processing is being executed by setting the value SP to 1 in the steady processing in-progress flag SP-FLG in step S1009 in logic (peripheral control unit steady processing) In addition to notifying interrupt processing, peripheral control unit steady processing is completed by setting the value in the steady processing in progress flag SP-FLG to 0 in step S1038 in peripheral control unit power-on processing (peripheral control unit steady processing) in FIG. In the peripheral control unit V blank signal interrupt processing which is the main routine, the stationary processing in-progress flag SP-FLG is 0 at the determination of step S1045 in the peripheral control unit V blank signal interrupt processing which is the main routine. It is determined whether there is any, that is, whether the peripheral control unit steady processing has been completed. In other words, the peripheral control unit steady processing can not be completed by the time the V blank signal is input and the next V blank signal is input.

  Thereby, in the current peripheral control unit steady processing, if the processing is not completed in about 33.3 ms and the processing is dropped, the determination in step S1008 in the peripheral control power on processing of FIG. 53 determines the next time. It stands by until the V blank signal of is input. That is, the time for executing the current peripheral control unit steady processing which has been dropped is about 66.6 ms. Normally, peripheral control unit 1 ms timer interrupt processing described later, which is repeatedly executed each time 1 ms interrupt timer is generated by activation of 1 ms interrupt timer in step S1010 in peripheral control unit power-on processing (peripheral control unit steady processing) of FIG. Is executed only 32 times for one peripheral control unit steady process, but if there is a current peripheral control unit steady process that has been dropped, the peripheral control unit 1 ms timer interrupt process is 64 times It is supposed to be executed only 32 times. That is, even when the peripheral control unit steady processing is processed, the consistency between the advancing state of the effect by the peripheral control steady processing and the advancing state by the peripheral control unit 1 ms timer interrupt processing which is timer interrupt control is It does not collapse. Therefore, even when the peripheral control unit steady processing is dropped, the progressing state of the effect can be reliably aligned.

[14-1-3. Peripheral control unit 1 ms timer interrupt processing]
Next, peripheral control unit 1 ms timer interrupt processing which is repeatedly executed each time 1 ms interrupt timer is generated by activation of 1 ms interrupt timer in step S1010 in peripheral control unit steady processing of peripheral control unit power-on processing of FIG. 53 will be described. . When this peripheral control unit 1 ms timer interrupt processing is started, as shown in FIG. 55, peripheral control MPU 4150 a of peripheral control unit 4150 shown in FIG. 15 determines whether 1 ms timer interrupt execution count STN is smaller than 33 times or not. Is determined (step S1100). As described above, this 1 ms timer interrupt execution count STN starts the 1 ms interrupt timer in the 1 ms interrupt timer start process in step S1010 in the peripheral control unit steady process of the peripheral control unit power-on process in FIG. It is a counter that counts the number of times a certain peripheral control unit 1 ms timer interrupt process has been executed. In the present embodiment, as described above, the frame frequency (number of screen updates per second) of the game board side liquid crystal display device 1900 and the upper dish side liquid crystal display device 470 is set to approximately 30 fps per second. The interval at which the blank signal is input is approximately 33.3 ms (= 1000 ms ÷ 30 fps). That is, since the peripheral control unit steady processing is repeatedly executed about every 33.3 ms, after the 1 ms interrupt timer is started in step S1010 in the peripheral control unit steady processing, the next peripheral control unit steady processing is performed. The peripheral control unit 1 ms timer interrupt process is executed only 32 times before the execution of. Specifically, when the 1 ms interrupt timer is activated in step S1010 in peripheral control unit steady processing, the first 1 ms timer interrupt is generated first, the second,..., And the 32nd 1 ms timer interrupt sequentially It will occur.

  If it is determined in step S1100 that the 1 ms timer interrupt execution number STN is not smaller than 33, that is, if the 33rd 1 ms timer interrupt has occurred and this peripheral control unit 1 ms timer interrupt processing is started, this routine is ended as it is. If the occurrence of the 33rd 1 ms timer interrupt happens to precede the next occurrence of the V blank signal, the peripheral control unit 1 ms timer interrupt processing is the peripheral control unit V as the priority of the interrupt processing in this embodiment. Although set higher than the blank interrupt processing, the start of the peripheral control unit 1 ms timer interrupt processing due to the thirty-third 1 ms timer interrupt is forcibly canceled. In other words, in the present embodiment, since the V blank signal is a signal that controls the entire system of the peripheral control board 4140, the occurrence of the 33rd 1 ms timer interrupt happens to precede the next occurrence of the V blank signal. In order to execute the peripheral control unit V blank interrupt processing, the start of the peripheral control unit 1 ms timer interrupt processing due to the 33rd 1 ms timer interrupt is forcibly canceled. Then, after the 1 ms interrupt timer is activated again in step S1010 in the peripheral control unit steady processing due to the generation of the V blank signal, peripheral control unit 1 ms timer interrupt processing is newly started by the generation of the first 1 ms timer interrupt. ing.

  On the other hand, when the 1 ms timer interrupt execution number STN is smaller than 33 in step S1100, the value 1 is added to the 1 ms timer interrupt execution number STN (increment, step S1102). By adding the value 1 to the 1 ms timer interrupt execution count STN, the 1 ms interrupt timer is started in the 1 ms interrupt timer start process of step S1010 in the peripheral control unit steady process of the peripheral control unit power-on process of FIG. The number of times the peripheral control unit 1 ms timer interrupt processing, which is this routine, is executed increases by one.

  Following step S1102, motor and solenoid driving processing is performed (step S1104). In this motor and solenoid drive processing, the electric drive source schedule data set in the schedule data storage area 4150 cae of the peripheral control MPU 4150 a and the peripheral control RAM 4150 c externally attached shown in FIG. Electric drive sources such as motors and solenoids of the frame decoration drive amplifier board 194 and the motor drive board 4180 shown in FIG. While updating the pointer to the next drive data defined in time series, and updating the pointer each time this motor and solenoid drive processing is executed.

  Specifically, in the motor and solenoid drive processing, DMA serial continuous transmission processing to the frame decoration drive amplifier substrate 194 is performed. Here, serial I / O port serial transmission of frame decoration drive amplifier substrate motor is performed using the peripheral control DMA controller 4150 ac of the peripheral control MPU 4150 a shown in FIG. When serial I / O port serial transmission of the frame decoration drive amplifier substrate motor is started, first, the electric drive source schedule data set in the schedule data storage area 4150cae of the peripheral control RAM 4150c externally attached with the peripheral control MPU 4150a Among drive data of electric drive sources such as motors and solenoids arranged in time series, drive signals to the dial drive motor 414 of the operation unit 400 shown in FIG. 7 based on the drive data indicated by the pointer. The door-side motor drive data STM-DAT for outputting the data is created by extracting it from the peripheral control ROM 4150b of the peripheral control unit 4150 or the various control data copy areas 4150ce of the peripheral control RAM 4150c, and the peripheral control RAM 4150c shown in FIG. Frame decoration of It is set to send a dynamic amplifier board-side motor data storage area 4150Caf. The peripheral control CPU core 4150aa of the peripheral control MPU 4150a designates transmission of the frame decoration drive amplifier board motor serial I / O port as a request factor of the peripheral control DMA controller 4150ac, and stores transmission data of the frame decoration drive amplifier board side motor The first 1 byte of the door-side motor drive data STM-DAT stored at the top address of the area 4150 caf is sent via the external bus 4150 h, peripheral control bus controller 4150 ad, and peripheral bus 4150 ai to the frame decoration drive amplifier substrate motor Transfer to the transmit buffer register of the serial I / O port for writing. Thus, the frame I / O port for the frame decoration drive amplifier substrate motor transfers the data of the written transmission buffer register to the transmission shift register, and the transmission shift register is synchronized with the door side motor drive clock signal STM-CLK. The transmission of one byte of data is started bit by bit.

  The peripheral control DMA controller 4150 ac is triggered by generation of a transmission interrupt request for the frame I / O port for the frame decoration drive amplifier substrate motor (in the present embodiment, the frame I drive for the frame decoration drive amplifier substrate motor serial I / O One byte of data written to the port's transmit buffer register is transferred to the transmit shift register, and it is triggered by the fact that there is no data in the transmit buffer register and becomes empty.) Peripheral control CPU core 4150aa When the bus is not used, the remaining door-side motor drive data STM-DAT stored in the frame decoration drive amplifier substrate-side motor transmission data storage area 4150 caf for 1 byte, external bus 4150 h, peripheral control bus controller Via 4150ad, and the peripheral bus 4150ai By transmitting and writing to the transmission buffer register of the serial drive I / O port for the decoration drive amplifier board motor, the serial I / O port for the frame decoration drive amplifier board motor transmits the data of the written transmission buffer register Transfer to 1-byte data of the transmission shift register in synchronization with the door-side motor drive clock signal STM-CLK, and start transmission one bit at a time, and continuous transmission by the serial I / O port for frame decoration drive amplifier board motor Is going.

  Further, in the motor and solenoid drive processing, DMA serial continuous transmission processing to the motor drive substrate 4180 is performed. Also here, serial drive I / O port serial transmission for motor drive boards is performed using the peripheral control DMA controller 4150 ac of the peripheral control MPU 4150 a shown in FIG. When serial I / O port serial transmission for a motor drive substrate is started, first, electrical drive source schedule data set in schedule data storage area 4150 cae of peripheral control RAM 4150 c externally attached to peripheral control MPU 4150 a is configured. Motors for moving various movable bodies provided on the game board 4 shown in FIG. 9 based on drive data indicated by a pointer among drive data of electric drive sources such as motors and solenoids arranged in series. The game board side motor drive data SM-DAT for outputting a drive signal to the motor or solenoid is created by extracting it from the peripheral control ROM 4150b of the peripheral control unit 4150 or the various control data copy areas 4150ce of the peripheral control RAM 4150c. Peripheral control RAM 415 shown at 16 Set to the motor drive board side transmission data storage area 4150cag of c. The peripheral control CPU core 4150aa of the peripheral control MPU 4150a designates transmission of the motor drive board serial I / O port as a request factor of the peripheral control DMA controller 4150ac, and stores it at the top address of the motor drive board side transmission data storage area 4150cag. The first 1 byte of the game board motor drive data SM-DAT that has been sent via the external bus 4150h, the peripheral control bus controller 4150ad, and the peripheral bus 4150ai, the transmission buffer of the serial I / O port for motor drive board Transfer to register and write. Thereby, the serial I / O port for motor drive board transfers the data of the written transmission buffer register to the transmission shift register, and one of the transmission shift register is synchronized with the game board motor drive clock signal SM-CLK. Transmission of byte data is started bit by bit.

  The peripheral control DMA controller 4150 ac is triggered every time a transmission interrupt request for the motor drive board serial I / O port is generated (in this embodiment, to the transmission buffer register of the motor drive board serial I / O port). The 1 byte data written is transferred to the transmission shift register, and it is triggered by the fact that 1 byte data is empty in the transmission buffer register and becomes empty.) The peripheral control CPU core 4150aa uses the bus If not, the remaining game board side motor drive data SM-DAT stored in the motor drive board side transmission data storage area 4150 cag is byte by byte via the external bus 4150 h, the peripheral control bus controller 4150 ad, and the peripheral bus 4150 ai. , Serial I / O port for motor drive board By transferring and writing to the transmission buffer register, the motor drive board serial I / O port transfers the data of the written transmission buffer register to the transmission shift register, and the game board motor drive clock signal SM-CLK and In synchronization, transmission of 1-byte data of the transmission shift register is started bit by bit, and continuous transmission is performed by the motor drive board serial I / O port.

  Following step S1104, movable body information acquisition processing is performed (step S1106). In this movable body information acquisition process, it is determined whether or not detection signals from various detection switches provided on the game board 4 are input, and history information of detection signals from various detection switches (for example, original position history information , And movable position history information etc.) are set in the movable body information acquisition storage area 4150cah of the peripheral control RAM 4150c externally attached with the peripheral control MPU 4150a shown in FIG. From the history information of detection signals from various detection switches set in the movable body information acquisition storage area 4150 cah, original positions and movable positions of various movable bodies provided in the game board 4 can be acquired.

  Subsequent to step S1106, operation unit information acquisition processing is performed (step S1108). In this operation unit information acquisition process, history information of detection signals from various detection switches is determined by determining whether or not detection signals from various detection switches provided in the operation unit 400 are input (for example, dial operation unit The rotation (rotational direction) history information of the 401, the operation history information of the pressing operation unit 405, etc. are created, and the operation unit information acquisition storage area of the peripheral control RAM 4150c externally connected with the peripheral control MPU 4150a shown in FIG. Set to 4150 cai. The rotation direction of the dial operation unit 401 and the presence / absence of operation of the pressing operation unit 405 can be acquired from history information of detection signals from various detection switches set in the operation unit information acquisition storage area 4150 cai.

  Following step S1108, backup processing is performed (step S1110), and this routine ends. In this backup processing, the contents stored in the peripheral control MPU 4150a and the externally attached peripheral control RAM 4150c shown in FIG. 16 are copied to the backup first area 4150 cb and the backup second area 4150 cc to back up At the same time, the contents stored in the peripheral control SRAM 4150 d externally attached with the peripheral control MPU 4150 a are copied and backed up to the backup first area 4150 db and the backup second area 4150 dc, respectively.

  Specifically, in the backup processing, peripheral control unit 1 ms timer interrupt processing which is this routine is executed every time a 1 ms interrupt timer is generated in backup target work area 4150 ca shown in FIG. 16 for peripheral control RAM 4150 c. The frame decoration drive amplifier substrate side motor transmission data storage area 4150 caf, the motor drive substrate side transmission data storage area 4150 cag, and the movable body information acquisition storage area 4150 cah which are included in Bank 0 (1 ms) to be backed up each time , And effect information (1 ms), which is the content stored in the operation unit information acquisition storage area 4150 cai, as Bank 1 (1 ms) and Bank 2 (1) of the backup first area 4150 cb as effect backup information (1 ms). Peripheral control DMA controller 4150ac in s) is copied at high speed, and backup Bank3 second area 4150cc (1ms) and peripheral control DMA controller 4150ac to Bank4 (1 ms) is copied at high speed.

  The high speed copy of the contents stored in Bank 0 (1 ms) by this peripheral control DMA controller 4150 ac will be briefly described. The peripheral control MPU core 4150 aa of peripheral control MPU 4150 a shown in FIG. 16 is a request factor of peripheral control DMA controller 4150 ac. Specify the contents stored in Bank 0 (1 ms), copy the backup first area 4150 cb to Bank 1 (1 ms), and from the contents stored at the start address of Bank 0 (1 ms) to the end address of Bank 0 (1 ms) All of the stored contents are copied sequentially from the start address of Bank 1 (1 ms) of backup first area 4150 cb successively by predetermined bytes (for example, 1 byte), and peripheral control MPU core 4150 aa performs peripheral control D The contents stored in Bank 0 (1 ms) are specified as request factors for A controller 4150 ac, and copying to Bank 2 (1 ms) of backup first area 4150 cb is specified, and Bank 0 (1 ms) from the contents stored at the top address of Bank 0 The contents stored in the end address of (1 ms) are all copied sequentially from the start address of Bank 2 (1 ms) of the backup first area 4150 cb successively by predetermined bytes (for example, 1 byte).

  Subsequently, the peripheral control MPU core 4150 aa designates the contents stored in Bank 0 (1 ms) as the request factor of peripheral control DMA controller 4150 ac, and designates copying of backup second area 4150 cc to Bank 3 (1 ms), and Bank 0 (1 ms) From the contents stored in the start address of) to the contents stored in the end address of Bank 0 (1 ms), the start address of Bank 3 (1 ms) of backup second area 4150 cc in succession by predetermined bytes (for example, 1 byte) All copies are sequentially copied in order from the above, and the peripheral control MPU core 4150aa specifies the contents stored in Bank0 (1 ms) as the request factor of peripheral control DMA controller 4150 ac and copy of backup second area 4150 cc to Bank 4 (1 ms) The Bank 4 (1 ms) of the backup second area 4150 cc for each predetermined byte (for example, 1 byte) continuously from the content stored in the start address of Bank 0 (1 ms) to the content stored in the end address of Bank 0 (1 ms) Copy all in order from the start address of.

  As described above, in the peripheral control unit 1 ms timer interrupt process, various processes relating to the effects of step S1104 to step S1108 described above as the progress of the effect are executed within a period of 1 ms. On the other hand, in the peripheral control unit steady process in the peripheral control unit power-on process of FIG. 53, various processes relating to the effects of step S1012 to step S1032 described above as progress of effect are executed doing. In peripheral control unit 1 ms timer interrupt processing, when 1 ms timer interrupt execution number STN is not smaller than value 33 in step S1100, that is, the 33rd 1 ms timer interrupt occurs and peripheral control unit 1 ms timer interrupt processing is started Since this routine is ended as it is, even if the occurrence of the 33rd 1ms timer interrupt happens to precede the next occurrence of the V blank signal, the peripheral control unit by the 33rd 1ms timer interrupt The start of the 1 ms timer interrupt processing is forcibly canceled, and after the 1 ms interrupt timer is started again in step S1010 in peripheral control unit steady processing due to the generation of the V blank signal, peripheral control by the generation of the first 1 ms timer interrupt Division 1 ms timer It is adapted to start the actual processing. That is, the consistency between the progress state of the effect by the peripheral control unit steady process and the progress state of the effect by the peripheral control unit 1 ms timer interrupt process which is timer interrupt control does not break. Therefore, the progressing state of the effect can be reliably aligned.

  Further, as described above, the interval at which the V blank signal is output changes somewhat depending on the liquid crystal size of the game board side liquid crystal display device 1900 and the upper dish side liquid crystal display device 470, and the peripheral control MPU 4150a and the VDP 4160a with built-in sound source Even in the manufacturing lot of the mounted peripheral control board 4140, the interval at which the V blank signal is output may change slightly. In the present embodiment, since the V blank signal is a signal that controls the entire system of the peripheral control board 4140, if the occurrence of the 33rd 1 ms timer interrupt happens to precede the next occurrence of the V blank signal, the peripheral control is performed. In order to execute the section V blank interrupt processing, the start of the peripheral control section 1 ms timer interrupt processing by the 33rd 1 ms timer interrupt is forcibly canceled. That is, in the present embodiment, even if the interval at which the V blank signal is output changes a little, the start of the peripheral control unit 1 ms timer interrupt processing by the 33rd 1 ms timer interrupt is forcibly canceled. It is possible to absorb a time lag due to a slight change in the interval at which the V blank signal is output.

[14-1-4. Peripheral control command reception interrupt processing]
Next, peripheral control unit command reception interrupt processing for receiving various commands from the main control board 4100 will be described. The peripheral control MPU 4150a of the peripheral control unit 4150 shown in FIG. 15 is triggered to transmit various commands from the main control board 4100 as serial data, and is triggered thereby to incorporate the main peripheral serial data in the peripheral control MPU 4150a. One byte (8 bits) of information is taken into the reception buffer at the board serial I / O port, and when this taking is completed, an interrupt is generated triggered by this taking, and peripheral control unit command reception interrupt processing is performed. In the main cycle serial data, one packet is composed of 3 bytes, the status is assigned as the first byte, the mode is assigned as the second byte, and the status and mode are regarded as numerical values as the third byte and the total The calculated sum value is assigned.

  When the peripheral control unit command reception interrupt processing is started, the peripheral control MPU 4150a of the peripheral control unit 4150 determines whether the 1-byte reception period timer has timed out, as shown in FIG. 56 (step S1200). The one-byte reception period timer is for setting a period in which one byte (8 bits) of information can be received among the main cycle serial data transmitted from the main control board 4100.

  When the 1-byte reception period timer has not timed out in step S1200, that is, within a period in which 1-byte (8-bit) information can be received among the main cycle serial data transmitted from main control board 4100, The 1-byte information received from the reception buffer of the main control board serial I / O port built in the control MPU 4150a is taken (step S1202), and the value 1 is added to the reception counter SRXC (increment, step S1204). The reception counter SRXC is a counter that indicates the number of times of extraction from the reception buffer, and has a value of 1 when the status of the first byte of the main cycle serial data is extracted from the reception buffer and a mode of the second byte of the main cycle serial data. When the data is taken out from the reception buffer, the value 2 is obtained, and when the sum value which is the third byte of the main cycle serial data is taken out from the reception buffer, the value becomes 3. The reception counter SRXC is set to an initial value 0 at power on or the like.

  Following step S1204, it is determined whether the reception counter SRXC has a value of 3, that is, whether the sum value which is the third byte of the main cycle serial data has been extracted from the reception buffer (step S1206). In this determination, following the status, which is the first byte of the main cycle serial data, the mode, which is the second byte of the main cycle serial data, and the sum value, which is the third byte of the main cycle serial data, from the reception buffer It is determined whether or not it has been taken out.

  When the reception counter SRXC is not the value 3 in step S1206, that is, the status which is the first byte of the main cycle serial data, the mode which is still the second byte of the main cycle serial data, and the third byte of the main cycle serial data If the sum value is not taken out from the reception buffer in order, the 1-byte reception period timer is set (step S1208), and this routine is ended. By setting the 1-byte reception period timer in step S1208, a period in which the mode which is the second byte of the main cycle serial data or the sum value which is the third byte of the main cycle serial data can be received is set.

  On the other hand, when the reception counter SRXC has the value 3 in step S1206, that is, following the status of the first byte of the main cycle serial data, the mode of the second byte of the main cycle serial data and 3 of the main cycle serial data. When the sum value which is the byte number is taken out from the reception buffer in order, the initial value 0 is set to the reception counter SRXC (step S1210), and the sum value is calculated (step S1212). In this calculation, the status which is the first byte of the main cycle serial data and the mode which is the second byte of the main cycle serial data, which have already been extracted from the reception buffer in step S1202, are regarded as numerical values and their sum (sum value Calculate).

  Following step S1212, it is determined whether the sum value which is the third byte of the main cycle serial data already extracted from the reception buffer in step S1202 matches the sum value calculated in step S1212 (step S1214). The sum value which is the third byte of the main cycle serial data already taken out from the reception buffer in step S1202 is the sum value allocated as the third byte of the main cycle serial data of the main cycle serial data from the main control board 4100 Therefore, it should be consistent with the sum value calculated in step S1212. However, pachinko machine 1 is supplied with gaming balls from a pachinko facility, and when the gaming balls rub against each other to be charged, they are electrostatically discharged and generate noise, so pachinko machine 1 is affected by noise. It is under the file environment. Therefore, in the present embodiment, the peripheral control unit 4150 considers the status allocated as the first byte of the received main cycle serial data and the mode allocated as the second byte of the main cycle serial data as numerical values. Whether the calculated sum value matches the sum value allocated as the third byte of the main cycle serial data in the main cycle serial data from the main control board 4100? It is judged whether or not. Accordingly, peripheral control MPU 4150a determines whether or not the main cycle serial data has been changed to main cycle serial data different from normal due to the influence of noise between the main control board 4100 and the peripheral control board 4140. be able to.

  If the sum value, which is the third byte of the main cycle serial data extracted from the reception buffer in step S1202, matches the sum value calculated in step S1212 in step S1214, the received main cycle serial data The status allocated as the 1st byte and the mode allocated as the 2nd byte of the main cycle serial data are shown in FIG. (Step S1216), and this routine ends. This receive command storage area 4150 cac is used as a ring buffer, and the status allocated as the first byte of the main cycle serial data and the mode allocated as the second byte of the main cycle serial data are the receive command storage area. It is stored in the peripheral control unit reception ring buffer of 4150 cac. This "peripheral control unit reception ring buffer" is a buffer that is used so that the end of the buffer and the beginning are connected, and data is stored sequentially from the beginning of the buffer, and when the end of the buffer is reached, it is returned to the beginning Remember. Note that the peripheral control MPU 4150a allocates the status allocated as the first byte of the main cycle serial data and the second byte of the main cycle serial data, which are stored in the peripheral control unit reception ring buffer in step S1216. The stored mode is associated with the stored mode, and the sum value allocated as the third byte is discarded.

  On the other hand, when the 1-byte reception period timer has not timed out in step S1200, that is, the period in which 1-byte (8 bits) information can be received in the main cycle serial data transmitted from main control board 4100 is exceeded. Sometimes, or when it is determined in step S1214 that the sum value, which is the third byte of the main cycle serial data extracted from the reception buffer in step S1202, does not match the sum value calculated in step S1212, this routine is directly performed. finish.

[14-1-5. Peripheral control unit blackout notice signal interrupt processing]
Next, a peripheral control unit blackout notification signal that is executed when the blackout notification signal (peripheral blackout notification signal) from the blackout monitoring circuit 4100e of the main control board 4100 shown in FIG. 18 is input from the main control board 4100 The interrupt processing will be described. When the peripheral control unit blackout notification signal interrupt process is started, the peripheral control MPU 4150a of the peripheral control unit 4150 shown in FIG. 15 first starts a 2 microsecond timer (step S1300), and the blackout notification signal It is determined whether a signal is input (step S1302). If the power failure notification signal (peripheral power failure notification signal) is not input in this determination, this routine is ended as it is.

  On the other hand, when the power failure notice signal is input in step S1302, it is determined whether 2 microseconds have elapsed (step S1304). In this determination, it is determined whether or not the timer activated in step S1300 has passed 2 microseconds. If 2 macro seconds have not elapsed in step S1304, the process returns to step S1302, and it is determined whether or not the power failure notification signal is input. If the power failure notification signal is not input, this routine is ended as it is. If a signal is input, it is determined again in step S1304 whether 2 microseconds have elapsed. That is, in the determination of step S1304, it is determined whether or not the power failure notification signal continues to be input for 2 microseconds after the peripheral control unit power failure notification signal interrupt processing which is the present routine is started.

  When the peripheral control unit blackout notification signal interrupt processing which is the main routine is started in step S1304, and the blackout notification signal is continuously input for 2 microseconds, power saving processing is performed (step S1306). In this power saving process, the backlights of the game board side liquid crystal display device 1900 and the upper tray side liquid crystal display device 470 are turned off, the excitation of motors and solenoids provided on the game board 4 is turned off, and the various LEDs are turned off. Thus, by suppressing the power consumption of the entire system of the pachinko machine 1, stable operation is ensured only for a period of 20 milliseconds which is a time during which the peripheral control MPU 4150 a can operate even if the power of the pachinko machine 1 is shut off.

  Following step S1306, command reception standby processing is performed (step S1308). In this command reception standby process, assuming that there are various commands being transmitted by the main control board 4100, the peripheral control MPU 4150a can receive the command being transmitted at least for a period of at least 17 milliseconds. It is supposed to wait. When a command is received, the peripheral control unit command reception interrupt processing described above is started, and reception command storage area 4150cac of peripheral control RAM 4150c externally connected with peripheral control MPU 4150a shown in FIG. 16 (peripheral control unit reception ring buffer The received command is stored in.

  Following step S1308, command backup processing is performed (step S1310). In the backup processing of this command, the contents stored in the reception command storage area 4150 cac included in Bank 0 (1 fr) in the backup target work area 4150 ca shown in FIG. 16 are stored in Bank 1 (1 fr) of the backup first area 4150 cb and The peripheral control DMA controller 4150 ac copies to the Bank 2 (1 fr) at high speed, and the peripheral control DMA controller 4 150 ac copies to the Bank 2 (1 fr) and Bank 4 (1 fr) of the backup second area 4150 cc at high speed.

  The high speed copy of the contents stored in received command storage area 4150 cac included in Bank 0 (1 fr) by peripheral control DMA controller 4150 ac will be briefly described. Peripheral control MPU core 4150 aa of peripheral control MPU 4150 a shown in FIG. Specify the contents stored in the receive command storage area 4150cac included in Bank0 (1fr) as the request factor of the control DMA controller 4150ac, and copy the backup first area 4150cb to the receive command storage area included in Bank1 (1fr) Content stored in the start address of reception command storage area 4150 cac included in Bank 0 (1 fr), and the end address of reception command storage area 4150 cac included in Bank 0 (1 fr). All the contents up to the specified contents are copied sequentially from the start address of the receive command storage area included in Bank 1 (1fr) of backup first area 4150cb successively by predetermined bytes (for example, 1 byte), and peripheral control MPU core 4150aa is the request factor of the peripheral control DMA controller 4150ac. The content stored in the reception command storage area 4150cac included in Bank0 (1fr) is stored in the reception command storage area included in Bank2 (1fr) of the backup first area 4150cb. From the content stored in the start address of receive command storage area 4150cac included in Bank0 (1fr) to the content stored in the end address of receive command storage area 4150cac included in Bank0 (1fr) by designating copy , A predetermined number of bytes (e.g., 1 byte) all copies sequentially from the start address of the received command storage area included in the Bank2 (1FR) of the backup successively by the first area 4150Cb.

  Subsequently, the peripheral control MPU core 4150 aa includes the contents stored in the reception command storage area 4150 cac included in Bank 0 (1 fr) as a request factor of the peripheral control DMA controller 4 150 ac in Bank 3 (1 fr) of the backup second area 4150 cc. The copy to the received command storage area is specified, and the content stored in the start address of the received command storage area 4150cac included in Bank0 (1fr) is stored in the end address of the received command storage area 4150cac included in Bank0 (1fr) The specified contents (for example, 1 byte) are successively copied sequentially from the start address of the reception command storage area included in Bank 3 (1fr) of backup second area 4150 cc in succession by predetermined bytes (for example, 1 byte), and peripheral control The content stored in the receive command storage area 4150cac included in Bank0 (1fr) as the request factor of the peripheral control DMA controller 4150ac by the PU core 4150aa is included in the receive command storage area included in Bank4 (1fr) of the backup second area 4150cc. Designating copying to the contents from the content stored in the start address of received command storage area 4150cac included in Bank0 (1fr) to the content stored in the end address of received command storage area 4150cac included in Bank0 (1fr) All data are sequentially copied sequentially from the start address of the reception command storage area included in Bank 4 (1 fr) of the backup second area 4150 cc in succession by a predetermined byte (for example, 1 byte).

  Subsequently to step S1310, it is determined whether or not a power failure notification signal (peripheral power failure notification signal) is input (step S1312). If it is determined in this determination that a power failure advance signal is input, WDT clear processing is performed (step S1314). In this WDT clear processing, peripheral control MPU 4150a outputs a clear signal to peripheral control built-in WDT 4150af shown in FIG. 16 and peripheral control external WDT 4150e shown in FIG. 15 so that peripheral control MPU 4150a is not reset. .

  On the other hand, when the power failure notification signal is not input in step S1312, or after step S1314, the process returns to step S1312 again to determine whether the power failure notification signal is input. In other words, it continues to determine infinitely whether or not the power failure notification signal (peripheral power failure notification signal) is input. By continuing determination indefinitely in this manner, when no power failure notification signal (peripheral power failure notification signal) is input in step S1312, the peripheral control MPU 4150a clears the peripheral control built-in WDT 4150af and the peripheral control external WDT 4150e. Can not be output and the peripheral control MPU 4150a is reset, while when the power failure notice signal is input in step S1312, the WDT clear processing is performed in step S1314, and the peripheral control MPU 4150a is not reset. When the peripheral control MPU 4150a is reset, the processing at power-on of the peripheral control unit shown in FIG. 53 is started again.

  As described above, when the input of the power failure notification signal (peripheral power failure notification signal) continues in the infinite loop in the determination of step S1312, the peripheral control is performed immediately before the power failure state occurs by executing the WDT clear processing in step S1314. The MPU 4150a is not reset. On the other hand, if it is determined in step S1312 that the input of the power failure advance notice signal is not continued and released in the infinite loop, the WDT clear process is not executed, and therefore the peripheral control built-in WDT 4150af and the peripheral control external WDT 4150e Output of the clear signal is interrupted. As a result, the peripheral control unit blackout notification signal interrupt processing, which is the main routine, is erroneously started due to noise and the noise is generated beyond the period of 2 microseconds and the determination in step S1302 is passed even if the step is passed. If the input of the power failure notice signal (peripheral power failure notice signal) is not continued and released in the infinite loop in the determination by S1312, the WDT clear processing in step S1314 is not executed, so that the peripheral control MPU 4150a is reset. Therefore, it is possible to cope with such noise by resetting automatically.

  According to the embodiment as described above, the pachinko machine 1 is provided with the main control board 4100 of FIG. 12 and the payout control board 4110 of FIG. The main control board 4100 is a start area shown in FIG. 9 in which the game ball fired by the ball striking device 650 of FIG. 5 is provided in the game area 1100 toward the game area 1100 defined in the game board 4 of FIG. A main control MPU 4100a shown in FIG. 12, which is a game control microprocessor for controlling the progress of the game based on the intrusion into the upper start opening 2101 and the lower start opening 2102, is implemented. The payout control board 4110 is a payout control micro that controls the payout of gaming balls by the prize ball device 740 of FIG. 5 based on the prize ball commands of FIGS. 29 (a) and 29 (b) which are payout instructions from the main control board 4100. The payout control MPU 4120a of FIG. 13 which is a processor is mounted.

  The main control MPU 4100a, which is a game control microprocessor, includes at least a RAM (main control built-in RAM) built in the main control MPU 4100a. The main control built-in RAM can store information on the game even after the power is shut off.

  The payout control MPU 4120a, which is a payout control microprocessor, includes at least a RAM (payout control built-in RAM) built in the payout control MPU 4120a. The payout control built-in RAM can store information on the payout even after the power is shut off.

  The pachinko machine 1 of the present embodiment further includes the operation switch 860a of FIG. Operation switch 860a erases the information on the game stored in the main control built-in RAM when it is operated within the period when the determination process of step S16 in the main control side power on process of FIG. 33 is performed from the time of power on. The RAM clear signal of FIG. 20 for outputting is outputted from the main control MPU 4100a which is a game control microprocessor, and the operation during the determination processing of step S512 in the processing at power on of the payout control unit of FIG. When it is done, the RAM clear function of outputting the RWMCLR signal of FIG. 25 to the payout control MPU 4120a which is the payout control microprocessor as the RAM clear signal for erasing the information on the payout stored in the payout control built-in RAM The steps in the processing at power-on of the main control side of FIG. If it is operated after the period in which the determination process of the program S16 is performed (or the period in which the determination process of step S512 in the process of power on of the payout control unit of FIG. An error release function of outputting the RWMCLR signal of FIG. 25 to the main control MPU 4100a which is a gaming control microprocessor as an error cancellation signal for canceling an error which has occurred with respect to a payout control microprocessor 4120a which is a payout control microprocessor; Together.

  As described above, when the operation switch 860a is operated within a period in which the determination process of step S16 in the main control side power on process of FIG. 33 is performed from the time of power on, the game stored in the main control internal RAM While outputting the RAM clear signal of FIG. 20 for erasing information related to the main control MPU 4100a which is a game control microprocessor, the determination process of step S512 in the payout control portion power on process of FIG. When it is operated within the specified period, the RAM clear which outputs the RWMCLR signal of FIG. 25 to the payout control MPU 4120a which is the payout control microprocessor as the RAM clear signal for erasing the information on the payout stored in the payout control built-in RAM. Function and when the main control side power on in Figure 33 from power on If it is operated after the period in which the determination process of step S16 in (1) (or the period in which the determination process of step S512 in the process of power on of the payout control unit of FIG. The error release function of outputting the RWMCLR signal of FIG. 25 to the main control MPU 4100a, which is a game control microprocessor, as an error release signal for canceling an error that has occurred with 740, and outputting it to the payout control MPU 4120a, which is a payout control microprocessor Therefore, the pachinko machine 1 can be provided with two different functions of the RAM clear function and the error release function by the operation of one operation switch 860a. Therefore, the RAM clear function and the error release function can be provided while contributing to cost reduction.

[15. Processing Associated with Touch Panel Operation]
[15-1. Various operation screen]
As described above, in the pachinko machine 1, the touch panel 480 is provided such that the operation surface overlaps the display area of the upper-dish liquid crystal display device 470 on the door frame 5 that can be opened and closed with respect to the main body frame 3. The effect control program is each selected display object image data or operation menu background image data used to display the read selected display object stored in advance in the liquid crystal and sound control ROM 4160 b by the sound source built-in VDP 4160 a under the control of the peripheral control MPU 4140 a. Based on the above, the operation menu screen is displayed in a display mode in which at least one selection display object is superimposed on the operation menu background image as shown in FIG. Display item display control means). Specifically, on this operation menu screen, mainly, for example, a volume / light amount selection display object for volume / light amount reset, an addition selection display object imitating a violent person who is known as “bomb king” wearing sunglasses, and , Along with the phrase "first pachinko" to draw the sight of unskilled pachinko beginners, the beginner's selection display objects imitating a game ball are arranged at almost equal intervals along the horizontal direction, and arranged in the center The selected display item is displayed slightly larger than the other selected display items.

  As shown in FIG. 69, the operator uses the finger F to touch the operation surface of the touch panel 480 at the position of the selection display object for beginners displayed slightly to the right of the display area of the upper plate liquid crystal display device 470 When the slide is directed, the effect control program reduces and displays the bonus selection display object based on the contact state of the operation surface of the touch panel 480 and enlarges the beginner selection display object as, for example, a candidate to be selected next. As shown in FIG. 70, the display is made to move each selection indicator toward the left as shown in FIG.

  Subsequently, when the operator taps the first pachinko selection display object KHB with the finger F as shown in FIG. 71, the effect control program detects the detection point based on the contact portion corresponding to the contact state of the operation surface of the touch panel 480. (Detection point acquisition means). Furthermore, the effect control program causes the first detection of the pachinko based on the annular image data read from the liquid crystal and sound control ROM 4160 b (effect control storage unit) at the corresponding detection point in the display area of the upper dish liquid crystal display device 470. A small initial annular display KHB is displayed at the position of the selection display (initial display control means).

  Next, as shown in FIG. 73, the effect control program causes the word “first pachinko” to be enlarged and causes the player to visually recognize that the first pachinko selection display item has been selected. This effect control program, as shown in FIG. 74, reduces the density while leaving an afterimage of the annular display in the middle of the display mode in which the initial annular display is continuously enlarged as time passes at the detection point. While continuously expanding the image to display the final annular display and causing the first pachinko selection display corresponding to the detection point to disappear while the next transition destination screen associated with the first pachinko selection display is displayed Display (Afterimage display control means).

  In this way, the operator of touch panel 480 can visually recognize the annular display thing KHB displayed in the display area of upper dish liquid crystal display device 470 through the operation surface according to his / her operation. Here, now that precise effect display has become possible, generally speaking, it seems that the player has not made a response to his operation at first glance if the response of the touch panel is still very slight. It is likely that the psychology of trying to actively participate in the player participation type effect is difficult to work. However, according to the present embodiment, even if precise effect display becomes possible, the residual image of the annular display object KHB remains in accordance with the operation of the operator, so the operator operates the operation even if the response to the operation is slightly delayed. It can be visually recognized that the response to the

  By the way, instead of the afterimage display as described above being made constantly in the upper dish liquid crystal display device 470, the effect control program causes an error cancellation navigation command (second error cancellation) accompanying the operation of the payout control board 4110 operation switch 860a. After receiving the command) from the main control board 4100, it may be temporarily switched to a test mode for checking the operation of the upper-dish liquid crystal display device 470 and executed. That is, although the effect control program normally does not execute the afterimage display using the upper-plate liquid crystal display device 470, it switches to the test mode and executes the afterimage display when the operation switch 860a is operated. You may In this case, the effect control program is controlled to switch from the test mode to the normal mode when the operation switch 860a is operated again. Thus, depending on the operator's convenience, the display operation of upper dish liquid crystal display device 470 may be temporarily tested (eg, at the time of pachinko machine 1 shipment) in the test mode, or upper dish liquid crystal display device 470 may be used. Afterimage display can be performed constantly as part of the effect.

  On the other hand, on the operation menu screen as shown in FIG. 75, the operator uses the operation surface of touch panel 480 corresponding to the volume adjustment selection display item displayed in the display area of upper dish liquid crystal display device 470 as shown in FIG. When selecting to tap, the effect control program displays a small initial annular display object KHB as shown in FIG. 77 based on the contact portion based on the contact state. This effect control program causes the final annular display object KHB to be displayed as shown in FIG. 78 via the annular display object KHB in the middle of the display mode in which the initial annular display object KHB is continuously enlarged (final display Control means). That is, the effect control program is, for example, expanding the annular indicator KHB steplessly from the initial annular indicator KHB to the final annular indicator KHB, or, for example, dividing the annular indicator KHB into 10 stages and displaying the annular indicators in stages The object KHB may be enlarged.

  In this way, as described above, the operator of touch panel 480 sees the annular display object displayed on the display area of upper dish liquid crystal display device 470 through the operation surface according to his / her operation. Can. Here, when the sluggishness of the reaction remains in today where precise effect display has become possible, when such precise effect display can be realized in the future, such precise effect display In terms of comparison, it may be considered that the player may feel relatively uncomfortable at first glance. However, according to the present embodiment, the appearance (display) of the annular display object displayed on the display area of the upper-dish liquid crystal display device 470 triggered by the touch on the operation surface of the touch panel 480 causes an accurate vision. Since the response inspection becomes possible, even if it is possible to realize a more precise effect display in the future, it is possible to make the operator less likely to feel discomfort by the direct response to the operation.

  Similarly, in the operation menu screen as shown in FIG. 75, the touch panel 480 corresponding to the volume adjustment selection display object displayed in the display area of the upper-dish liquid crystal display device 470 as shown in FIG. If the operation control screen is selected by tapping, the effect control program displays FIG. 77 in the case where the contact area of the contact portion based on the contact state is larger than the predetermined contact area (ie, when the pressing force is strong). As shown in FIG. 78, at least a part of the ring indicator KHB on the way is omitted and the final ring indicator KHB is displayed as shown in FIG. You may make it As described above, when the pressing force is strong, the initial annular display KHB of the display area visually recognized through the operation surface of the touch panel 480 with the finger of the operator or the partial annular display in the middle of the above-mentioned part Although the KHB is also hidden, the effect control program reduces unnecessary display which the player can not visually recognize or reduces the processing load by omitting the display control of some annular display objects KHB in this manner. can do.

  As described above, after the final ring-shaped display KHB is displayed, the effect control program displays the volumes 1 to 6 as shown in FIG. On the volume control background image including the scale VSCL, a display in which the volume control icon OCI marked with a note mark is slidably superimposed along the volume scale VSCL based on the volume setting icon image data also read from the liquid crystal Display the volume adjustment screen of the mode.

  When the operator taps the volume adjustment icon OCI on the volume adjustment screen with the finger F and slides it toward the left as shown in FIG. (Detection point acquisition means) based on the ring image data read out from the liquid crystal and First, a small initial annular display KHB is displayed (initial display control means).

  When the operator further slides the volume adjustment icon OCI with the finger F along the volume scale VSC as shown in FIG. 80, the effect control program displays the contact portion based on the contact state as shown in FIG. The movement locus of a certain position (hereinafter referred to as the initial position) is detected for each movement detection point (movement locus acquisition means). Next, as shown in FIG. 80, the effect control program continuously and independently enlarged the initial annular display objects KHB with the passage of time at each movement detection point along the detected movement locus. The final ring-shaped display KHB is displayed via the ring-shaped display KHB in the middle of the display mode (movement locus display control means). At this time, as shown in FIG. 81, the effect control program moves and displays the volume adjustment icon OCI along the volume scale in accordance with the slide of the finger F tapping the volume adjustment icon OCI, and finally Similarly, as shown in FIG. 77, the volume adjustment icon OCI is moved to the position of the finger F which completes the slide via the display of the ring-shaped display partway in the middle. When the operator releases the finger F from the operation surface of the touch panel 480, the effect control program detects the contact state on the operation surface, and since any contact object disappears, the final contact as shown in FIG. In the vicinity of the surface, the final annular display magnified is displayed.

  Then, as described above, the operator of touch panel 480 sees annular display object KHB displayed in the display area of upper dish liquid crystal display device 470 through the operation surface in accordance with his / her operation. be able to. Therefore, at each movement detection point along the movement locus of the contact portion on the operation surface by the operation of the operator, the final state is obtained via the annular display material KHB in the middle, which is represented as an afterimage of the initial annular Since the annular display object KHB is displayed, it is not necessary for the operator to memorize the latest operation history along the movement locus one by one, and it becomes difficult for the operator to feel stress during operation.

  By the way, even if the effect control program described above is controlled to enlarge the size of the final annular display object KHB, for example, in proportion to the maximum width of the contour area of the contact portion based on the contact state of the touch panel 480 described above. Good (final display control means, afterimage display control means, movement trajectory display means). Specifically, the effect control program relatively increases the size of the final annular display object KHB when the contour area is relatively large, while the effect control program performs the final processing when the contour area is relatively small. The size of the annular indicator KHB is relatively reduced. In this case, the size of the final annular display KHB is proportional to the pressing force on the operation surface by the operator, so that the degree of this pressing force may be ex post facto for the sense of the operator. It can be recognized.

  Alternatively or in combination, this effect control program controls, for example, the enlargement aspect of the final annular display KHB in proportion to the change per unit time of the contour area in the contact portion based on the touch state of the touch panel 480 described above You may make it do (a final display control means, an afterimage display control means, a movement locus display means). Specifically, in the case where the change of the contour area per unit time is large, the size of the ring indicator KHB on the way is changed in a relatively short time, while the contour area per unit time is changed. If the change is small, the size of the intermediate ring-shaped object KHB is changed in a relatively long time. In this way, when the operator touches the operation surface in a relatively short time, the annular display object KHB expands relatively fast, while when the operator touches the operation surface in a relatively long time, the annular display Not only can the object KHB expand relatively slowly, and the reaction of the touch panel 480 according to the operation mode of the operator can be inspected more accurately, but the player operates an object in the real world It will be possible to get a sense of operation closer to the feeling of operation.

[15-2. Contamination detection and wiping off of touch panel operation face]
Furthermore, in the touch panel processing described above, the effect control program moves the film 488 supported by the rollers 485, 486 along the front and back surfaces of the tempered glass 491 to make the film 488 on the back surface. When being moved along, it is moved along the operation surface of the touch panel 480 (contact type input device) facing the back surface. Alternatively, the effect control program may move the attached matter detection sensors 483R and 483L (adhered matter detection unit) with respect to the film 488. Next, in the effect control program, the state of the deposit detected on the film 488 by any of the above-described deposit detection sensors 483R and 483L (attachment detection unit) is determined in advance based on the reflectance of the irradiation light. It is determined whether the reflectance is equal to or more than the specified reflectance (more than the specified condition) (dirt determination unit). Hereinafter, this process is referred to as "soil determination process". Next, the effect control program can be distinguished from the effect operation that the effect control program normally executes according to the progress of the game when the state of the attached matter is equal to or more than the above-described state as a result of the determination in the dirt determination process. And a notification operation that can be recognized from the outside is performed (notification control means). Such notification operation can include, for example, display or voice output of a message "Please clean the touch panel" or "Hall clerk should clean the touch panel".

  In this case, for example, the pachinko machine 1 is newly installed in a hole and has a high operation rate, and many players tend to repeatedly attach dirt to the film 488 on the touch panel 480. Although there is a hall clerk visiting the passage, it becomes easy to measure the timing for cleaning the touch panel 480, and the clean pachinko machine 1 can be maintained without disturbing the player who is replaced one after another.

  On the other hand, this effect control program is a state of the deposit detected by any of the deposit detection sensors 483R and 483L (the deposit detection unit) instead of or after (or before) the above notification operation In response, the film 488 is pressed against the surface of the transferred film 488 to remove deposits from the film 488. Such a wiping operation may be executed, for example, when the power is turned on, or may be executed when the effect control program has not received the starting opening winning command from the main control board 4100 for a predetermined period. In this way, the wiping operation can be performed in a time slot where there is a high possibility that the player is not playing. Conversely, such a wiping operation may be performed when the effect control program receives the start opening winning command from the main control board 4100 within a prescribed time. In this way, it is possible for a player who is passionate about playing a game not to notice that the wiping operation has been performed. Here, as the notification operation described above, for example, immediately after actually starting wiping, a message of “I will wipe the touch panel now” is displayed or voice output is performed, and the trigger is that wiping is actually completed. And the display or voice output of the message “Wipe off touch panel completed”.

  Normally, in a pachinko machine with a high operation rate, the timing of regular cleaning by a hall clerk is generally difficult to measure, but according to the present embodiment, the screen always displayed in the display area of the upper tray liquid crystal display device 470 Not only the visual recognition (see, for example, FIGS. 58 to 83) becomes clear, but also the player tries to touch an operation object such as a button displayed on the screen. Also in the case of touching the player, the player can be made to touch the film 488 with few deposits such as dirt. Therefore, it is possible to keep the operation surface of the touch panel 480 (operation unit) clean at all times so as not to make the player feel uncomfortable. Moreover, as described above, if there is a caution to wipe from now on just before wiping, for example, even when putting on a touch panel 480, the figurine with a margin before the wiping is started. Can be removed.

  By the way, when this effect control program determines that the touch panel 480 is in contact with an object of the same shape for a certain period of time (for example, 10 seconds or more), the motor 482 via the motor drive board 4180. The above-described wiping operation may not be temporarily performed. In this way, it is possible to temporarily see off the movement of the film 488 when the player has placed a can or the like of the drink on the operation surface of the touch panel 480, thereby preventing the overflow of the drink by mistake. be able to.

  In addition, before the wiping operation as described above is completed, the effect control program responds to the state of the deposit on the surface of the film 488 detected by any of the deposit detection sensors 483R and 483L (the deposit detection unit). The pattern information (for example, fingerprint information) of the attached matter is collected from the upstream or downstream video signal from the solid-state information recognition sensor 487R, 487L (adhesion detection unit) activated based on the detection result (pattern acquisition means) . Hereinafter, such processing for collecting pattern information is referred to as “pattern information acquisition processing”. Subsequently, the effect control program (notification control unit) causes the pattern information of the attached matter collected by the pattern information acquisition process to be specified individual information (for example, specified fingerprint information) stored in advance in the peripheral control ROM 4150b. If the two match, the rendering operation that is normally executed according to the progress of the game is a distinguishable operation, and the notification operation to the outside is executed.

  Usually, players with problems generally perform various kinds of problematic behaviors and measures are likely to be delayed, and it is difficult for a hole clerk to visually identify persons with such problems, According to the embodiment, the effect control program is based on the pattern information corresponding to the fingerprint information of the finger touching the operation surface of the touch panel 480, the player of this finger is a specific person corresponding to the prescribed individual information It is possible to identify whether or not there is a person other than the specific human being. Therefore, since this pachinko machine 1 is provided with a security device, the security of the hole can be enhanced. Moreover, if individual operator information of a specific operator is registered in the peripheral control ROM 4150b as prescribed individual information in advance, operation of the screen displayed in the display area of the upper-dish liquid crystal display device 470 using the touch panel 480 is permitted It is possible to clearly distinguish and manage the operators who are to be controlled and the operators whose operation is to be restricted. This allows the player to touch the screen with his / her finger (for example, the screens in FIGS. 62 and 68 to 83), and the screen with the finger that the player does with the finger (for example, FIG. 63 and FIG. Security can be managed in distinction from the screen of FIG.

  Further, in the present embodiment, when the effect control program controls the sound source built-in VDP 4160 a to display the selection display object in the display area of the upper-dish liquid crystal display device 470 (second display device), the display of the selection display object Based on the past display history regarding the position, a specific display position where the display frequency of the selected display object is lower than a prescribed threshold frequency is selected to display the selected display object.

  That is, the effect control program displays a maintenance screen including a store clerk call button 740A as a selection display object for calling a hall store clerk as shown in FIG. 59, for example, based on the selection display object image data described above. Display history information including a sprite number for identifying each selected display object and display coordinate values in the display area, for example, a history information storage area 4150 caj which is a backup management target work area 4150 ca in the peripheral control RAM 4150 c. The display history information storage area (not shown) of (see FIG. 16) is written (display history writing means). In the display history information storage area, display history information regarding a past display history regarding display coordinate values indicating the display position of the selected display object is stored. When a presentation control program having such a writing function controls the sound source built-in VDP 4160a to display a selection display object in the display area of the upper-dish liquid crystal display device 470, the display information storage area 4150ca of the peripheral control RAM 4150c. The display history information accumulated in the display history information storage area is referred to (display history reference means). Furthermore, the effect control program compares the display frequency of the selected display object with the prescribed threshold frequency based on the referenced past display history (display frequency comparison means). That is, the effect control program displays the selected display object corresponding to the sprite number at the display position of the display area represented by the display coordinate value (or the coordinate value within a predetermined range centered on the coordinate value). The display coordinate value (or the display area excluding the coordinate value within the above-mentioned fixed range) of the specific display position where the most recent frequency is lower than the specified threshold frequency (for example, the total of the number of displays after power-on is 20 times) Control to display this selected display object by designating the coordinate value of (the initial display control means).

  By doing this, the display position of the selection display object in the display area of the upper dish liquid crystal display device 470 is not biased to a specific position, so this selection display on the operation surface of the touch panel 480 covering this display area. The contact position of the operation surface operated according to the display of the object is not biased. For this reason, it is suppressed that the fine flaw accompanying the operation enters only in the vicinity of the specific position on the operation face of the touch panel 480 into this operation face, and the player is slightly discolored impression caused by such fine flaw in appearance Can be difficult to give.

  In the above state, the effect control program controls the sound source built-in VDP 4160a to detect the movement mode of the contact portion on the operation surface of the touch panel 480 even when the operation menu screen shown in FIG. 68 is displayed, for example. (Moving mode detecting means). For example, as shown in FIG. 69, when the contact portion of the finger F is detected in the form of moving from right to left, the effect control program controls the sound source built-in VDP 4160a to contact the contact portion of the finger F on the operation surface of the touch panel 480. The display positions of the bonus selection display object and the beginners selection display object in the display area of the upper-dish liquid crystal display device 470 are moved in conjunction with the movement mode of (the selection display object control means). At this time, the effect control program controls the sound source built-in VDP 4160 a so that the display position of the selection display object for beginners or the like in the display area of the upper dish liquid crystal display device 470 is left according to the movement mode of the contact portion of the finger F A motor 482 (see FIG. 8) is controlled via a motor drive substrate 4180 so as to move the film 488 along the moving direction of the beginner selection display etc. (film movement control means).

  On the other hand, for example, as shown in FIG. 80 to FIG. 82, when the touch portion of the touch panel 480 detects the contact portion of the finger F moving from left to right with respect to the volume scale VSCL, the effect control program The volume adjustment icon OCI (selection display object) in the display area of the upper-dish liquid crystal display device 470 is interlocked with the movement mode of the contact portion of the finger F on the operation surface of the touch panel 480 Move from left to right (selection indicator control means). At this time, the effect control program controls the sound source built-in VDP 4160 a to display the display position of the volume adjustment icon OCI in the display area of the upper-dish liquid crystal display device 470 as shown in FIGS. The film 488 is moved along the moving direction of the volume adjustment icon OCI by controlling the motor 482 (see FIG. 8) via the motor drive board 4180 while moving the film 488 rightward according to the movement mode (film movement control means).

  In this case, when touching the operation surface of touch panel 480 to move the selection display object displayed in the display area of upper dish liquid crystal display device 470 (so-called flick operation), this display Since the film 488 moves along the moving direction of the selection display for beginners or the volume adjustment icon OCI (selection display) in the area, even if the film 488 is scratched or adhered, The movement of the film 488 having such a scratch or the like can be camouflaged in the movement mode of the selection display object so that it is difficult to visually recognize, so that the film 488 covering the operation surface of the touch panel 480 looks conspicuous It becomes difficult.

  Moreover, the effect control program activates the cleaning roller 484R (first wiping unit) according to the state of the attached matter of the film 488 detected by the above-mentioned attached matter detection sensor 483R (first attached matter detection unit). The cleaning roller 484L (second wiping unit) is operated according to the state of the deposit on the film 488 detected by the (wiping unit control means) or the deposit detection sensor 483L (second deposit detection unit). (Wipe control unit).

  According to such a configuration, the film 488 moves in any moving direction along the moving direction of the selection display object such as the selection display object for beginners of the display mode in which the word “first pachinko” shown in FIG. 69 is superimposed. Not only the scratches on the film 488 covering the operation surface of the touch panel 480 and the like become inconspicuous even when transported, as described above, and the player who is trying to operate the operation display object displayed in the display area Even if there is a deposit on such a wound, the deposit can be removed and the clean film 488 can be touched.

[15-3. Maintenance (at the time of failure response)]
The above-described effect control program controls the liquid crystal and sound control unit 4160 when the command analyzed in the received command analysis process in step S1022 described above is a retry error command (second error generation command) corresponding to a plurality of faults. Then, before displaying a plurality of fault contents corresponding to a plurality of faults on the upper dish liquid crystal display device 470 (second display device), first, it extends horizontally in the upper part of the maintenance screen as shown in FIG. A certain failure has occurred by displaying a rectangular failure content display area 740D and simply displaying a message of “failure occurrence” without displaying detailed failure contents in the failure content display area 740D. Visually notify the outside.

  That is, when the effect control program receives a retry error command (second error generation command) corresponding to a failure from the main control board 4100 under the control of the peripheral control board 4140, the upper dish liquid crystal display device 470 (second That the failure occurred as described above with the detailed failure content being in the concealed state, as described above, while the detailed failure content to be displayed on the display device of Is displayed (failure occurrence notification means). Although details will be described later in the peripheral control RAM 4150 c as shown in FIG. 16, a defined contact on the operation surface of the touch panel 480 is made in an operation history storage area described later in the history information storage area 4150 caj in Bank 0 of the backup management target work area 4150 ca. Information on "prescribed handwriting" is stored in advance as an example of the state (effect control storage means). The information related to the prescribed handwriting includes, for example, information on at least one of a change in thickness and a change in drawing speed, which is a straight line or a curve and is accompanied by an increase or decrease in writing pressure during drawing.

  After the display that a failure has occurred as described above is displayed, the effect control program detects handwriting (hereinafter referred to as “stroke by a hall clerk”) as an example of a continuous contact state on the operation surface of touch panel 480 In response to the event, the handwriting is compared with the prescribed handwriting (contact state authentication means). As a result of this comparison, when it is determined that the handwriting by the hall clerk and the handwriting by the rule are not within the same range, the effect control program continues the concealment state and restricts the display of the detailed content of the obstacle Do. On the other hand, when it is determined that the handwriting by the hall clerk and the aforementioned prescribed handwriting are within the same range, the effect control program cancels the concealment state and causes the detailed contents of the fault to be displayed as described below. (De-disclosing means).

  In this way, when a certain failure occurs, the fact that the failure has occurred is indicated at a position where the player can visually recognize, but after the player calls the hall clerk, the hall clerk arrives at the player's base In the meantime, the details of the obstacle are concealed from the player. Therefore, since the player can not grasp the detailed contents of the obstacle from the occurrence of the obstacle until the arrival of the store clerk, the fraudulent act which abuses the detailed contents of the obstacle is It can be difficult to give a chance to try. On the other hand, since the upper tray liquid crystal display device 470 is disposed at a position where the player can visually recognize, it is easy for the hall clerk to visually recognize the detailed content of the obstacle displayed in the display area of the upper tray liquid crystal display device 470. It will be easier to deal with problems.

  In addition to the failure content list described later as the detailed content of the failure as described above, the effect control program does not overlap the main frame back image 740C displayed in the right region of the maintenance screen shown in FIG. A plurality of fault contents corresponding to a plurality of faults are displayed in a display mode of a priority (prescribed priority) registered in advance in a fault notification priority management table (not shown) in a display area) Control means). As the display mode mentioned here, for example, lighting, blinking or extinguishing, or a predetermined color independent of them can be mentioned, or a combination of the color and the mode of lighting can be mentioned. Specifically, this effect control program is based on the error occurrence position information received from the main control board 4100 and included in the retry error command (second error occurrence command) representing the “retry error”. The specific dot area (corresponding to the area 740Z) on the back image 740C is specified, and the specific dot area 740Z is superimposed and blinked on the main frame back image 740C (first display mode). In such a maintenance screen, it is difficult to show the display mode in which the dot area such as the specific dot area 740Z is blinking, so in the example shown in the drawing, the display mode of the blinking is indicated by hatched circles inside. ing.

  Furthermore, the effect control program is based on the error occurrence position information included in the stock command (second error occurrence command) representing “with prize ball stock (unpaid)” received from the main control board 4100. The other dot area 74Y (other area) on the rear image 740C is specified, and the other dot area 740Y of the lighting mode (second display mode) is superimposed on the main frame rear image 740C. In addition, in such a maintenance screen, since it is difficult to show the display mode in which the dot area such as the specific dot area 740Y is lit, the display mode of the lighting is indicated by a circle with paint inside. ing.

  As mentioned above, the hall clerk in contact with the specific dot area 740Z blinks, and the portion arranged by the specific dot area 740Z whose display mode is dynamically changing is prioritized as a fault to be dealt with. Based on the prediction, for example, after powering off the pachinko machine 1, a countermeasure operation is performed to remove a fault or the like occurring at the site.

  After the handling operation is performed as described above, when the power is turned on again in the pachinko machine 1, the effect control program is that the command received from the main control board 4100 is the power on command, and the main control board When the retry error command (second error generation command) corresponding to a part of the plurality of failures is not received from the 4100, the liquid crystal and sound control unit 4160 is controlled to make the upper dish liquid crystal display device 470 Display mode in which the content related to the part of the failures is turned off as a mode in which it is difficult to visually recognize the content related to the other failure among the plurality of failures according to the defined priority registered in the failure notification priority management table Mode) to display (fault elimination site display control means). In the maintenance screen, since it is difficult to show the display mode in which the dot area such as the specific dot area 740Z is extinguished, it is indicated by a hollow circle instead.

  On the other hand, in this effect control program, the command received from the main control board 4100 is a power on command, and the stock control command corresponding to another fault among the plurality of faults from the main control board 4100 (second error When the generation command is received, the upper tray liquid crystal display device 470 (second display device), as shown in FIG. It is displayed in a display mode (second display mode) blinked as an aspect which is easier to view than the contents relating to the part of the faults according to the order (fault unresolved part display control means). In addition, in such a maintenance screen, since it is not possible to display a blinked display mode, in the example shown in the drawing, hatching is applied to a hollow portion of a circle.

  Here, as described above, the payout control program outputs a drive signal from the output terminal (not shown) of the output port (not shown) to the error LED indicator 860b through the payout control output circuit 4120ca with reset function under the control of the payout control MPU 4120a. Thus, the state of the pachinko machine 1 is displayed in seven segments (so-called seven-segment display) on the error LED display 860b. When multiple failures occur, the error LED indicator 860b on the back of the game board is displayed first with the number of the failure with the highest priority represented by the 7-segment display in priority. There is. The hall clerk opens the main body frame 3 to the outer frame 2 and refers to the 7-segment display of the error LED indicator 860b, but when multiple failures occur, a general error LED display It is difficult for the device 860b to get an overview as to what degree of failure is occurring as a whole.

  Therefore, in the present embodiment, when a plurality of failures occur as described above, the effect control program displays a maintenance screen as shown in FIG. 59 in accordance with the defined priority order registered in the failure notification priority management table. The failure with the highest priority in the body frame rear surface image 740C is the display mode (first display mode) of flickering, and the failure with the low priority is the display mode of lighting.

  In this way, if a plurality of failures occur, the hall clerk may not open the body frame 3 to the outer frame 2 in order to refer to the error LED indicator 860b. Because the display mode of the lighting, blinking and extinguishing displayed on the main body frame rear surface image 740C displayed in the display area of the device 470 can be used to grasp what number of failures occur in which position, so a hall clerk Will be able to carry out work to cope with each failure without delay. Moreover, since it becomes easy to estimate the time required for the task of dealing with these obstacles, the hall clerk can easily judge how long the player should be asked to leave the seat, which is an indication. It also makes it possible to prevent the player from interrupting the game for a long time. As a result, it is possible to make it difficult to damage the mind of the player who has played until the occurrence of the failure.

  On the other hand, when the specific dot area 740Z in the blinking display mode is tapped, the effect control program reports the contents related to a plurality of faults in the left area of the maintenance screen as shown in FIGS. The priority management table is displayed in the form of a list in the specified priority registered in advance. Hereinafter, the contents relating to a plurality of failures represented in the form of a list will be also referred to as a “failure content list”. The fault content list 740B indicates the respective fault contents (for example, the error number and the error contents (the fault contents in the drawing)) in descending order of priority from top to bottom. In the failure content list 740B, the failure content related to the failure with the highest priority at the top (for example, the fifth “retry error” as described above according to the specified priority registered in advance in the failure notification priority management table. Is displayed, and the second highest line shows the second highest priority, and the second highest line shows the failure contents (No. 9 “Rise ball stock (unpaid) present)”, and the third highest line is the first The fault content (for example, blank) relating to the next highest fault is displayed, and the fault content (for example, blank) for the next highest priority is represented in the fourth line from the top (bottom).

  Here, the fault content having the highest priority in the fault content list 740B is displayed in the same manner as the above-described specific dot area 740Z having the highest priority (for example, a blinking display mode) so as to stand out. In this way, it is possible to easily recognize that the items having the same display mode in the maintenance screen, that is, the fault contents and the dot areas 740Y and 740X are associated with one another, without reading the characters. Hall clerks can carry out fault response accurately and quickly, even in environments where the auditory burden is heavy and it is difficult to concentrate on fault response.

  In addition to the correspondence between the specific dot area 740Z having the highest priority and the fault content corresponding thereto as described above, the effect control program is, for example, the dot area 740Y having a lower priority and the fault content corresponding thereto. In order to clarify the correspondence between the two, the display modes of the both are displayed in line with lighting or extinguishing. In this way, even if the store clerk does not remember exactly the correspondence between the fault content and the occurrence site, it is difficult for the store clerk to wonder which site to pay attention to when trying to cope with a certain fault. Can. When the hall clerk further touches the blinking fault content in the fault content list 740B shown in FIG. 60, the effect control program displays, for example, the selected fault content (for example, retry error) based on the contact state at that position. As the corresponding detailed explanation, the message “insufficient delivery” is displayed while the touch condition continues to be detected, and it is detected that the continuation of the touch condition is stopped. And stop displaying the message. In this way, since the time during which the player who has played the game until the occurrence of the fault contacts the message can be made extremely short within the range where the store clerk can visually recognize, the display function of the fault content is abused. It is possible not to give more opportunity to think about cheating. The effect control program causes the fault content list 740B to display the fault content and the like as described above, triggered by the detection of the touch state on the operation surface of the touch panel 480 corresponding to the position of the specific dot area 740Z. At the same time, the message as the detailed description as described above may be displayed.

  On the other hand, if the hall clerk, for example, recognizes that the retry error has been eliminated as the intended failure after the above-mentioned handling work, “retry error as the intended failure to be eliminated shown in FIG. Touch the display. When the effect control program detects a touch state on a part of the operation surface of the touch panel 480 corresponding to the display position of the failure content (retry error) of the blinking display mode in the failure content list 740 B, the main control board 4100 If a retry error command is still received from the device, the failure content list 740B having the same contents as shown above is displayed as shown in FIG. 60, while if a retry error command is not received, a failure as shown in FIG. It is assumed that the failure content related to "retry error" is deleted from the content list 740B and that "prize ball stock (unpaid) present" is lit as failure content with the next highest priority. At the same time, the effect control program causes the dot area 740Y in the main body frame rear surface image 740C in the right area of the maintenance screen shown in FIG. 61 to be a display mode of flickering, and a specific dot area 740Z corresponding to the retry error for which the handling is completed. As a display mode of light off. In addition, in FIG. 61, since it is difficult to show the display mode of the light-off, it is represented by using white circles. In this way, when a plurality of failures occur, the hall clerk can proceed with the handling operation while confirming that each failure has been eliminated according to the above-described priority.

[15-4. Game history]
By the way, in this embodiment, in the peripheral control RAM 4150c (effect control storage means) described above, as shown in FIG. 16, the display history storage area described above is stored in the history information storage area 4150caj in Bank 0 of the backup management target work area 4150ca. In addition to the above, an operation history storage area capable of storing operation history information representing an operation history corresponding to the touch state detected by the touch panel 480 is provided. The above-described effect control program determines pattern information (for example, fingerprint information) that is determined based on the touch state on the operation surface of the touch panel 480, in the operation history storage area 4150caj of the backup management target work area 4150ca in the bank 0 Remember. Alternatively, the effect control program relates to an operation history based on the touch state on the operation surface of the touch panel 480 instead of the pattern information based on the touch state as described above as such pattern information. It is also possible to adopt information (for example, a handwriting history made within a predetermined time) based on the operation history continuously made within a predetermined time.

  That is, the effect control program associates the pattern information determined based on the touch state on the operation surface of the touch panel 480 (contact input device), and the operation history according to the touch state on the operation surface of the touch panel 480 (contact type input device) Record operation history information representing. That is, the effect control program can manage whether or not the player has played in the past anonymously without specifying personal information such as the player's name.

  Specifically, as shown in FIG. 15, the peripheral control board 4140 includes an RTC 4165 a in the RTC control unit 4165. The RTC 4165a outputs time information indicating the current time (time information acquisition means). This effect control program is newly associated with the new pattern information collected as described above, and indicates an operation history corresponding to the touch state detected by the touch panel driver described above for each time information output by the RTC 4165a. Operation history information is written in the operation history storage area of the history information storage area 4150 ca j (operation history writing means). On the other hand, when this new pattern information matches the past pattern information stored in the operation history storage area of the history information storage area 4150caj, the effect control program causes the past operation history corresponding to the past pattern information. The new operation history information is stored in the operation history storage area of the history information storage area 4150 caj in association with the information (operation history writing means).

  In this case, the player who has started the game collects the pattern information that can distinguish himself and the other player from being taken by having touched the operation surface of the touch panel 480 even once, this collecting operation However, since it is automatically performed as part of the normal operation of touching the operation surface of the touch panel 480, it is possible to make it difficult for the player to feel emotionally and emotionally. Moreover, even if the pattern information is temporarily referred to, it does not mean that the name of the individual player is known, but is merely used as an identifier for identifying each player from others.

  In this way, the effect control program causes the pattern information extracted as described above to be matched with the past pattern information when it matches the past pattern information stored in the operation history storage area of the history information storage area 4150 caj. The past operation history information stored in association is acquired. The past operation history information includes the operation history when the same player has played in the past, and the operation history includes the past setting history when setting regarding the effect. Then, the effect control program performs the current effect setting among the plurality of effect settings that can select at least one based on the latest setting history of the past setting history, that is, the last setting history of the previous time At the same time, the present effect setting is stored in the operation history storage area of the history information storage area 4150 ca j in association with the pattern information. In this way, it is possible to automatically restore the desired setting in the case of the previous game without making the player inconvenient on the occasion of the next game (effect automatic setting means). Therefore, even if the player has changed the effect setting by the other player after playing the same pachinko machine 1 last time, the normal touch panel operation of touching the operation surface of the touch panel 480 when playing the game again Under the same effect setting as the previous time, for example, it is possible to enjoy, for example, a favorite character in the same manner as the previous time, and a story or a scene similar to the previous time. Here, although the pachinko machine 1 is played by a large number of players and effects are set, if the pachinko machine 1 has such a function, the pachinko machine 1 has played at least once. If there is a player who has played a game for the next time, the effect setting at the time of the previous game is automatically made each time, and the above-mentioned many players unintentionally make their own under the effect setting, for example, It becomes possible to enjoy the game in a desired effect mode by the favorite character.

  After that, the effect control program is, for example, the past setting stored in the operation history storage area in association with the new pattern information, triggered by the automatic setting of the present effect as described above. The remaining setting history excluding the latest setting history may be deleted from the history (operation history deleting means). In this way, in the operation history storage area, it is sufficient to secure a storage area for the latest setting history of the minimum amount of information necessary for performing the effect setting of this time. As the data size increases without limit, other information stored in a storage area (such as a motor drive substrate side transmission data storage area 4150 cag) in Bank 0 of the backup management target work area 4150 c shown in FIG. It is possible not to affect other controls.

  On the other hand, when the effect control program matches the pattern information determined based on the touch state on the operation surface of the touch panel 480 with the past pattern information stored in the operation history storage area of the history information storage area 4150 caj, The liquid crystal and sound control unit 4160 is controlled to notify that the subject who derived the contact state has played in the past, and the game board side liquid crystal display device 1900, the upper tray liquid crystal display device 470, and the audio data transmission IC 4160c. Are controlled to output at least one of video and sound.

  In this way, since the player usually uses the pachinko machine 1 as a machine partner, the pachinko machine has never played in the past despite the belief that the pachinko machine 1 has no reason to know itself. When the player plays the game again in 1, the player receives an surprise from receiving an indication that the game is played again this time, and receives an impression over the surprise, and an intimate feeling comes to boil in the pachinko machine 1. In this way, the player is given a treatment that can not be enjoyed by the surrounding players, and the player has a positive mental state of remembering himself, and the motivation to play the game next time is enhanced. The machine 1 comes to have an increased operation rate.

  This effect control program manages at least one normal effect pattern table that is relatively easy to be selected in an effect lottery to be described later, which is executed with the establishment of the start condition as a trigger, and also selects relatively more It manages a rare effect pattern table that is difficult to be played (effect pattern table management means). The effect control program executes an effect lottery triggered by receipt of a variation pattern command output from the main control board 4100 triggered by establishment of the start condition after starting winning, and the normal effect is executed according to the result of the effect lottery The pattern table or the rare effect pattern table is selected, and the effect operation is controlled based on the selected effect table (effect lottery means). In this effect control program, when the new pattern information matches the past pattern information stored in the operation history storage area in the history information storage area 4150 caj, the first probability that the rare effect pattern table is selected is used. The relative probability is set relatively higher than the second probability that the normal effect pattern table is selected (selection probability control means).

  In this way, when the player plays the game again, not only does it become a good proof that he / she remembers himself, but in fact, other players playing the same model pachinko machine in the surroundings There are many opportunities to touch the effects that the player can not enjoy. Then, this player can not only be surprised or impressed by having unexpectedly remembered his own, but can also touch rare renditions with which other players have little chance of touching, The player can continue playing the game while enjoying the sense of superiority to the player and the expectation that he may be able to touch even more rare effects in the future.

  Furthermore, when the new pattern information matches the past pattern information stored in the operation history storage area in the history information storage area 4150 caj, the effect control program further causes the past operation history corresponding to the past pattern information. Based on the information, the first probability that the rare effect pattern table is selected according to how frequently or how many times the player has played in the past is the normal effect pattern. Control may be performed so as to be relatively higher than the second probability that the table is selected (selection probability control means). In this way, the more a player has played in the past, the more rare the player will be able to encounter. It can be one.

[16. Another example]
The present invention is not limited to the embodiment described above, and it goes without saying that the present invention can be practiced in various forms within the technical scope of the present invention. For example, in the embodiment described above, the pachinko machine 1 has been described as an example, but the gaming machine to which the present invention can be applied is not limited to pachinko machines, and gaming machines other than pachinko machines such as slot machines or pachinko machines The present invention can also be applied to a fusion gaming machine in which a slot machine is fused (for playing a slot game using a game ball) or the like.

  DESCRIPTION OF SYMBOLS 1 ... Pachinko machine (game machine), 2 ... outer frame, 3 ... main body frame, 4 ... game board, 5 ... door frame, 192 ... handle relay terminal board, 470 ... upper plate side liquid crystal display device, 650 ... hitting ball launch device , 740: award ball device, 784: external terminal board, 851: power supply substrate, 860a: operation switch (error canceler), 860b: error LED indicator, 1100: gaming area, 1900: gaming board side liquid crystal display device, 4100 ... main control board (game control board, game control unit), 4100a ... main control MPU, 4110 ... payout control board (payout control unit), 4120 ... payout control unit, 4120a ... payout control MPU, 4140 ... peripheral control board (effect Control unit) 4150 Peripheral control unit 4160 Liquid crystal and sound control unit 4165 RTC control unit 4170 Lamp driving board 4180 Motor driving board

Claims (1)

When the start condition is satisfied, then the jackpot lottery is executed, and the game control unit shifts from the normal gaming state to a more advantageous special gaming state if the jackpot lottery is won,
A payout control unit that controls a payout operation of gaming media by control of the game control unit;
An effect control unit that controls an effect operation according to the result of the big hit lottery according to the control of the game control unit;
A first display device that executes a display operation as part of the rendering operation under the control of the rendering control unit;
A second display device that executes a display operation under the control of the effect control unit;
A touch-type input device having a transparent operation surface covering a display area of the second display device and detecting a touch state of the operation surface;
A first power supply for supplying a first power and for stopping a first power being supplied;
A power failure notification unit that outputs a power failure notification signal when the supply of the first power by the power supply is stopped;
The second power is supplied in response to the reception of the power failure notification signal, and the second power supply is stopped in response to the start of the supply of the first power by the first power supply. Power supply,
Equipped with
The game control unit
The apparatus further comprises power on command output means for outputting a power on command when supply of the first power is started by the first power supply,
The effect control unit
A time measuring means for measuring an elapsed time while being provided with a time-counting storage unit that holds stored contents constantly while receiving power supply from the first power supply or the second power supply from the first power supply;
Operation setting screen display control means for causing the second display device to display an operation setting screen for setting an operation stop time in which operation is not permitted;
Operation stop time setting means for setting the operation stop time inputted on the operation setting screen according to the contact state of the operation surface of the contact type input device;
The measurement of the elapsed time by the time measuring means is triggered by the fact that the operation stop time is set, and the remaining time display control is made to display the remaining time of the set operation stop time on the second display device. Means,
Stop state release means for ending display control of the remaining time of the set operation stop time when the remaining time of the operation stop time becomes zero ;
Elapsed time information saving means for writing information on the first remaining time of the operation stop time at the first point of time when the power failure advance notice signal is received, in the clock storage unit;
The elapsed time measured by the time measuring means from the first time point when the power failure notification signal is received to the second time point when the power activation command is received when the power activation command is received. Remaining time restoring means for causing the second display device to display again the second remaining time of the operation stop time as a result of being added to the first remaining time of the operation stop time already written in the timekeeping storage unit When,
A game machine characterized by comprising:

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