JP6494716B2 - Circuit board and manufacturing method thereof - Google Patents

Description

  The present invention relates to a circuit board and a manufacturing method thereof, and more particularly to a circuit board having a conductive layer having a uniform thickness and a manufacturing method thereof.

  A printed circuit board (PCB) is printed on the insulator by a mechanical, chemical processing, or surface treatment method after drawing a wiring pattern of conductive wiring to connect circuit components according to the circuit design. Circuit board on which a simple conductor is formed. The circuit pattern described above becomes a precision wiring by techniques such as printing, lithography, etching and electroplating, and becomes an assembly platform that supports the interconnection of electronic components and circuits between components.

  Currently, most of the conductive layer of the substrate is still formed by electroplating, but due to the design elements of the product functionality, the design of the number of via holes is becoming more and more concentrated in the chip mounting area. The distribution of the number of via holes is uneven. Due to the non-uniform distribution, current is dispersed in the high-density region of the number of holes during the electroplating process, and the current is concentrated in the low-density region of the number of holes. A phenomenon that the thickness of the conductive layer becomes uneven in a few low density (depopulated) region occurs. This affects the resistance and impedance of the product, and also affects the stability of subsequent processes such as solder ball mounting / solder paste printing during packaging.

  FIG. 1A shows a top view of a circuit board according to the prior art including a chip mounting area A and a non-chip mounting area B. FIG. FIG. 1B shows a cross-sectional view of a circuit board according to the prior art. The circuit board includes a substrate 100, a plurality of first conductive blocks 200, a first insulating layer 210, a first conductive layer 250, a plurality of second conductive blocks 300, a second insulating layer 310, and a second insulating layer. A conductive layer 350 is included. From FIG. 1B, the thicknesses of the first conductive layer 250 and the second conductive layer 350 located above the aperture dense regions 202 and 302 in the chip mounting region A are relatively thin, and the aperture sparseness in the non-chip mounting region B It can be seen that the first conductive layer 250 and the second conductive layer 350 located above the regions 204 and 304 are relatively thick. As described above, such a phenomenon of non-uniform thickness of the conductive layer affects the resistance and impedance of the product, and also affects the stability of subsequent processes.

  Therefore, there is an urgent need to develop a circuit board having a conductive layer with a uniform thickness and a method for manufacturing the circuit board.

  According to one embodiment, the present invention provides a substrate having opposing first and second surfaces, and a first conductive in an aperture dense region that is spaced apart on the first surface of the substrate. A plurality of first conductive blocks including a block and a first conductive block of an opening-depopulated region, and a plurality of first openings and opening-depopulated regions that are disposed on the first surface of the substrate and constitute an opening dense region A first insulating layer that includes a plurality of second openings that form a plurality of openings, and that exposes the first conductive block in the densely populated region and the first conductive block in the depopulated region, and the first insulating layer on the first insulating layer A circuit board including a plurality of conductive members arranged at intervals, wherein the conductive members are filled corresponding to the first openings and are electrically connected to the first conductive blocks in the dense area of the openings. Paired with a plurality of first conductive members and a second opening Is filled with, and a plurality of second conductive members connecting the first conductive block and electrically opening depopulated region, the conductive member has a uniform thickness, to provide a circuit board.

  According to another embodiment, the present invention includes a plurality of first conductive blocks in an aperture dense region and first conductive blocks in an aperture sparse region that are spaced apart on a first surface of a substrate. Forming a first conductive block, forming a first insulating layer on the first surface of the substrate, and a plurality of first openings constituting an opening dense region in the first insulating layer And forming a plurality of second openings constituting the aperture depopulated region, exposing the first conductive block in the aperture dense region and the first conductive block in the aperture depopulated region, respectively, on the first insulating layer Forming a patterned first dry film and exposing the first opening and the second opening; performing an electroplating process to form the first conductive layer; and at least concentrating the openings. Located above the region and the first Place the first jig on the patterned dry film so as not to adhere to the conductive layer and perform an etching process to remove a part of the first conductive layer and make it uniform to the first conductive layer A plurality of conductive members arranged to be spaced apart on the first insulating layer by removing the first dry film patterned and removing the first jig. Forming a circuit board, and a method of manufacturing a circuit board.

  According to another embodiment, the present invention comprises a plurality of first conductive blocks in an aperture dense region and first conductive blocks in an aperture sparse region that are spaced apart on a first surface of a substrate. A step of forming a first conductive block; a step of forming a first insulating layer on a first surface of the substrate; and a plurality of first openings constituting an aperture dense region in the first insulating layer; And forming a plurality of second openings constituting the aperture sparse region, exposing the first conductive block of the aperture dense region and the first conductive block of the aperture sparse region, respectively, on the first insulating layer Forming a patterned first dry film and exposing the first opening and the second opening; performing an electroplating process to form the first conductive layer; and at least an aperture dense region Located above and the first conductive Forming a first dry film layer on the first conductive layer and the patterned first dry film and an etching process so that a part of the first conductive layer is attached Removing the first conductive layer to have a uniform thickness, removing the first dry film layer and the patterned first dry film, on the first insulating layer, Forming a plurality of conductive members arranged at intervals, and a method of manufacturing a circuit board.

  In order to make the aforementioned and other objects, features, and advantages of the present invention clearer and easier to understand, preferred embodiments will be described below in detail with reference to the accompanying drawings.

  A circuit board having a conductive layer having a uniform thickness and a method for manufacturing the circuit board are proposed.

FIG. 1A is a top view of a circuit board. FIG. 1B shows a cross-sectional explanatory view of a circuit board manufactured by the prior art. It is a section explanatory view of an intermediate stage of a manufacturing method of a circuit board by some embodiments of the present invention. It is a section explanatory view of an intermediate stage of a manufacturing method of a circuit board by some embodiments of the present invention. It is a section explanatory view of an intermediate stage of a manufacturing method of a circuit board by some embodiments of the present invention. It is a section explanatory view of an intermediate stage of a manufacturing method of a circuit board by some embodiments of the present invention. It is a section explanatory view of an intermediate stage of a manufacturing method of a circuit board by some embodiments of the present invention. It is a section explanatory view of an intermediate stage of a manufacturing method of a circuit board by some embodiments of the present invention. 8A is an enlarged view of the circled area of FIG. 4 according to one embodiment of the present invention. 8B-8D are enlarged views after etching of the circled area of FIG. 4 according to some embodiments of the present invention. 9A is an enlarged view of the circled portion of FIG. 6 according to one embodiment of the present invention. 9B-9D are enlarged views after etching of the circled area of FIG. 6 according to some embodiments of the present invention.

  Hereinafter, a circuit board and a manufacturing method thereof according to an embodiment of the present invention will be described. However, the embodiments presented herein are merely illustrative of making and using the invention in a particular way and are not intended to limit the scope of the invention. In the drawings and descriptions of the embodiments of the present invention, the same reference numerals are used to indicate the same or similar members.

  Please refer to FIG. This figure shows a sectional view of a circuit board according to an embodiment of the present invention. In the present embodiment, the circuit board includes the substrate 100, the plurality of first conductive blocks 200, the first insulating layer 210, the plurality of conductive members 280 on one surface side, the plurality of second conductive blocks 300, the second And a plurality of conductive members 380 on the other surface side. The substrate 100 has a first surface 102 and a second surface 104 that face each other. In the present embodiment, the substrate 100 may be made of a resin material. In the present embodiment, the first insulating layer 210 and the second insulating layer 310 may be made of an ABF (Ajinomoto Build-up Film) or PP (prepreg) material.

  The first conductive blocks 200 are arranged on the first surface 102 of the substrate 100 at intervals. The first conductive block 200 includes a first conductive block 200 in the aperture dense region 202 and a first conductive block 200 in the aperture sparse region 204. The first insulating layer 210 is provided on the first conductive block 200 and the first surface 102 of the substrate 100, and has a plurality of first openings 220 and an opening dense region composed of the first openings 220. 202 and a plurality of second openings 222 and an opening depopulated region 204 composed of the second openings 222 (shown in FIG. 2). The plurality of first openings 220 exposes the first conductive block 200 in the densely packed area 202, and the plurality of second openings 222 exposes the first conductive block 200 in the open sparse area 204. The conductive members 280 on the first surface 102 side are arranged on the first insulating layer 210 at intervals. The conductive member 280 is filled corresponding to the first opening 220, and a plurality of first conductive members 281 that are electrically connected to the first conductive block 200 in the densely packed region 202, and the second opening 222. And a plurality of second conductive members 282 that are electrically connected to the first conductive block 200 of the opening sparsely populated region 204. The conductive member 280 has a uniform thickness. Since the conductive member 280 has a uniform thickness, the height positions of the surfaces of the conductive members 280 in the aperture dense region 202 and the aperture depopulated region 204 are substantially uniform. In the present embodiment, the upper surface of the portion of the second conductive member 282 adjacent to the first conductive member 281 is a smooth joint surface.

  In this embodiment, the value of the difference between the thickness of the second conductive member 282 and the thickness of the first conductive member 281 in the conductive member 280 is −50 to 100% of the thickness of the first conductive member 281. It's okay. When obtaining the “difference value”, the height from the bottom to the surface of the first conductive member 281 in the first opening 220 in the dense aperture region 202 is referred to as “thickness of the first conductive member 281”. To do. Further, when obtaining the “difference value”, the height from the bottom of the second conductive member 282 to the surface in the second opening 222 in the opening sparse region 204 is expressed as “the thickness of the second conductive member 282”. " For example, in one embodiment, the thickness of the second conductive member 282 may be greater than the thickness of the first conductive member 281, in which case the thickness of the second conductive member 282 and the thickness of the first conductive member 281 are the same. The value of the difference from the thickness may be between 0% and 100% of the thickness of the first conductive member 281 and may be, for example, 1% to 99% or 10% to 50%. Alternatively, in another embodiment, the thickness of the second conductive member 282 is approximately equal to the thickness of the first conductive member 281, in this case, the thickness of the second conductive member 282 and the thickness of the first conductive member 281. The value of the difference from the thickness is approximately equal to 0% of the thickness of the first conductive member 281 and is, for example, -5% to 5% or -1% to 1%. Alternatively, in another embodiment, the thickness of the second conductive member 282 may be smaller than the thickness of the first conductive member 281. In this case, the thickness of the second conductive member 282 and the first conductive member 281 are the same. The difference between the thickness of the first conductive member 281 and the thickness of the first conductive member 281 may be between 0% and -50%, for example, -1% to -49% or -10% to -25%. Can do.

  Similarly, a plurality of second conductive blocks 300 are arranged on the second surface 104 of the substrate 100 at intervals. The second conductive block 300 includes a second conductive block 300 in the opening dense region 302 and a second conductive block 300 in the opening sparse region 304. The second insulating layer 310 is provided on the second conductive block 300 and the second surface 104 of the substrate 100, and has a plurality of third openings 320 and an opening dense region including the third openings 320. 302, and a plurality of fourth openings 322 and an opening depopulated region 304 composed of the fourth openings 322 (shown in FIG. 2). The plurality of third openings 320 expose the second conductive block 300 in the densely packed area 302, and the plurality of fourth openings 322 expose the second conductive block 300 in the open sparse area 304. Another conductive member 380 on the second surface 104 side is arranged on the second insulating layer 310 at an interval. The conductive member 380 is filled corresponding to the third opening 320, and a plurality of third conductive members 381 that are electrically connected to the second conductive block 300 of the densely packed region 302, and a fourth opening 322. And a plurality of fourth conductive members 382 electrically connected to the second conductive block 300 of the open sparse region 304. The conductive member 380 has a uniform thickness. Since the conductive member 380 has a uniform thickness, the height positions of the surfaces of the respective conductive members 380 in the aperture dense region 302 and the aperture depopulated region 304 are substantially uniform. In the present embodiment, the upper surface of the portion of the fourth conductive member 382 adjacent to the third conductive member 381 is a smooth joint surface.

  In this embodiment, the value of the difference between the thickness of the fourth conductive member 382 and the thickness of the third conductive member 381 in the conductive member 380 is −50 to 100% of the thickness of the third conductive member 381. be able to. When obtaining the “difference value”, the height from the bottom to the surface of the third conductive member 381 in the third opening 320 in the dense aperture region 302 is referred to as “thickness of the third conductive member 381”. To do. When the “difference value” is obtained, the height from the bottom to the surface of the fourth conductive member 382 in the fourth opening 322 in the opening sparse region 304 is expressed as “the thickness of the fourth conductive member 382”. " The relationship between the difference between the thickness of the fourth conductive member 382 and the thickness of the third conductive member 381 is the difference between the thickness of the second conductive member 282 and the thickness of the first conductive member 281 described above. Since the description of the relationship can be referred to, it will not be repeated here.

  Please refer to FIG. This figure shows a sectional view of a circuit board according to another embodiment of the present invention. The same components as those in FIG. 5 are denoted by the same reference numerals. The structure of the circuit board of this embodiment is similar to that of the embodiment of FIG. 5, but the upper surface of the second conductive member 292 adjacent to the first conductive member 291 has a vertical step (L-shaped). The upper surface of the portion adjacent to the third conductive member 391 of the fourth conductive member 392 is a bonded surface having a vertical step (L-shaped step). The point is different.

  In this specification, when describing the thickness of the first conductive member, it refers to the thickness at the lowest portion (location) of the first conductive member, and similarly, the thickness of the second conductive member. When describing, it refers to the thickness at the lowest portion (location) of the second conductive member. In the embodiment of the present invention, the thickness of the second conductive member and the thickness of the first conductive member may have different values. However, since the entire conductive member still has a uniform thickness, Compared with the related art, in the circuit board formed by the present invention, the value of the difference between the thickness of the second conductive member and the thickness of the first conductive member is greatly reduced, It should be noted that the purpose of increasing uniformity is achieved. In some embodiments of the present invention, when the thickness of the second conductive member is larger than the thickness of the first conductive member, the object of increasing the uniformity of the entire conductive member can be achieved, Miniaturization can also be realized and the requirement of resistance or impedance control can be satisfied.

  2 to 5 are cross-sectional explanatory views showing intermediate stages of the circuit board manufacturing method according to the embodiment of the present invention.

  Please refer to FIG. A substrate 100 having a first surface 102 and a second surface 104 facing each other is provided. In the present embodiment, the substrate 100 may be made of a resin material. A conductive layer (not shown) is formed on the first surface 102 and the second surface 104 of the substrate 100, respectively, and the conductive layer is patterned by a lithographic and etching process to form the first surface 102 and the second surface A plurality of first conductive blocks 200 and a plurality of second conductive blocks 300 arranged at intervals are formed on the surface 104. In the present embodiment, the first conductive block 200 includes the first conductive block 200 in the opening dense region 202 and the first conductive block 200 in the opening sparse region 204, and the second conductive block 300 includes the opening dense region. 302 includes the second conductive block 300 and the second conductive block 300 in the opening sparse region 304. Next, a laminating process is performed to form a first insulating layer 210 and a second insulating layer 310 on the first surface 102 and the second surface 104 of the substrate 100, respectively. The conductive blocks 300 are respectively covered. In the present embodiment, the first insulating layer 210 or the second insulating layer 310 can be made of ABF or PP material. Next, a plurality of first openings 220 and a plurality of second openings 222 are formed in the first insulating layer 210 by a laser drilling process to form the opening dense region 202 and the first conductive of the opening dense region 202. The block 200 is exposed to form the opening sparse region 204 and the first conductive block 200 in the opening sparse region 204 is exposed. Further, a plurality of third openings 320 and a plurality of fourth openings 322 are formed in the second insulating layer 310 by a laser drilling process to form the opening dense region 302 and the second conductive of the opening dense region 302. The block 300 can be exposed to form the open sparse region 304 and the second conductive block 300 in the open sparse region 304 can be exposed. After performing the laser drilling process, a desmear step is performed, and residues in the first opening 220, the second opening 222, the third opening 320, and the fourth opening 322 after the laser drilling (see FIG. (Not shown) can be removed.

  Please refer to FIG. A first seed layer 230 and a second seed layer 330 are formed on the first insulating layer 210 and the second insulating layer 310 by a deposition process (eg, a chemical copper deposition process), respectively. The first opening 220, the second opening 222 (shown in FIG. 2), the third opening 320, and the fourth opening 322 (shown in FIG. 2) are extended. Next, a first dry film and a second dry film are formed on the first seed layer 230 and the second seed layer 330. Next, a patterned first dry film 240 and a patterned second dry film 340 are formed by an exposure and development process, and a part of the first seed layer 230 and the second seed layer 330 are formed. Expose each one. Next, an electroplating process is performed on the exposed first seed layer 230 and the second seed layer 330, and the first seed layer 230 or the second seed layer 230 is formed on the first insulating layer 210 and the second insulating layer 310. The first conductive layer 250 and the second conductive layer 350 are formed with the two seed layers 330 interposed therebetween.

  Next, please refer to FIG. A first jig 260 and a second jig 360 are placed on the patterned first dry film 240 and the patterned second dry film 340, respectively. In the present embodiment, the first jig 260 is located at least above the dense opening area 202 and does not adhere to the first conductive layer 250. The second jig 360 is located at least above the dense opening region 302 and does not adhere to the second conductive layer 350. In one embodiment, the first jig 260 may be greater than or equal to the range of the open dense region 202, and the second jig 360 may be greater than or equal to the range of the open dense region 302. It's okay. Next, an etching process is performed to remove the portion of the first conductive layer 250 not covered by the first jig 260 and the portion of the second conductive layer 350 not covered by the second jig 360. The conductive layer 250 and the second conductive layer 350 have a uniform thickness.

  In the present embodiment, by adjusting the amount of the etching solution used, the portions of the first conductive layer 250 and the second conductive layer 350 that are not covered by the first jig 260 and the second jig 360 are used. The etching amount can be controlled. In the present embodiment, the first conductive layer 250 and the second conductive layer 350 are not removed from the first jig 260 and the second jig 360, and the first jig 260 is removed. Also, a small amount of the portion covered with the second jig 360 is also removed, so that the cover region of the first conductive layer 250 and the second conductive layer 350 (corresponding substantially to the opening dense regions 202 and 302) and the uncovered region ( It should be noted that a smooth joint surface is formed between the open-sparsely populated regions 204 and 304). This is because the first jig 260 and the second jig 360 are only placed on the patterned first dry film 240 and the patterned second dry film 340 respectively, and the first conductive layer 250. And the second conductive layer 350 does not adhere, so that a small amount of the etching solution is formed between the gap between the first jig 260 and the first conductive layer 250 and between the second jig 360 and the second conductive layer 350. A small amount of the portion covered by the first jig 260 and the second jig 360 of the first conductive layer 250 and the second conductive layer 350 can be removed. Because it becomes.

See, for example, FIGS. These figures show enlarged views of a portion encircled in FIG. 4 before and after etching according to some embodiments of the present invention before and after the portion covered by the first jig 260 of the first conductive layer 250. a, a portion not covered by the first jig 260 is indicated as b. Before execution of the etching process, as shown in FIG. 8A, the thickness of the uncovered region b is larger than the thickness of the covered region a, and the difference between the two is H. After performing the etching process, as shown in FIGS. 8B to 8D, the thickness of the uncovered area b is significantly reduced, and the difference between the thickness of the uncovered area b and the thickness of the covered area a can be different. . In one embodiment, as shown in FIG. 8B, the thickness of the uncovered area b is still greater than the thickness of the covered area a, and the difference between the two is H ₁ . In another embodiment, as shown in FIG. 8C, the thickness of the uncovered area b is close to the thickness of the covered area a, and the difference between the _two is H ₂ . In another embodiment, as shown in FIG. 8D, the thickness of the uncovered area b is smaller than the thickness of the covered area a, and the difference between the two is H ₃ . As the amount of the etching solution used increases, the value of the difference between the thickness of the uncovered area b and the thickness of the covered area a decreases to H> H ₁ > H ₂ (where H> 0 , H ₁ > 0, H ₂ ≧ 0). The amount of the etching solution used can be increased until the thickness of the uncovered area b becomes smaller than the thickness of the cover area a. As described above, after the etching process is performed, the cover region a (substantially corresponding to the aperture dense region 202) and the uncovered region b (substantially corresponding to the aperture sparse region 204) of the first conductive layer 250 are formed. Note that a smooth joint surface is provided between the two. However, it will be understood that the specific structure shown in FIGS. 8B-8D is for illustration only and is not intended to limit the invention.

  After performing the etching process, the first jig 260 and the second jig 360 are subsequently removed, and the patterned first dry film 240 and the patterned second dry film 340 are removed, The portions of the first seed layer 230 and the second seed layer 330 below are exposed. Next, the exposed first seed layer 230 and second seed layer 330 are removed by an etching process, and a plurality of conductive layers arranged on the first insulating layer 210 and the second insulating layer 310 are spaced apart from each other. A member 280 and a plurality of conductive members 380 are formed. As shown in FIG. 5, the plurality of conductive members 280 include a plurality of first conductive members 281 and a plurality of second conductive members 282, corresponding to the first opening 220 and the second opening 222, respectively. And electrically connected to the first conductive block 200 in the densely populated region 202 and the first conductive block 200 in the depopulated region 204, respectively. The plurality of conductive members 380 include a plurality of third conductive members 381 and a plurality of fourth conductive members 382, and the third openings 320 and the fourth openings 322 are filled correspondingly, respectively. Are electrically connected to the second conductive block 300 and the second conductive block 300 in the open sparse region 304, respectively.

  In this way, a circuit board according to an embodiment of the present invention can be manufactured. As can be seen from FIG. 5, the conductive member 280 and the entire conductive member 380 have uniform thicknesses, respectively, and the circuit board according to the present embodiment has the second thickness compared to the prior art described above (shown in FIG. 1B). The value of the difference between the thickness of the first conductive member 281 and the thickness of the first conductive member 281 and the value of the difference between the thickness of the fourth conductive member 382 and the thickness of the third conductive member 381 are both greatly reduced. Therefore, the object of increasing the uniformity of the entire conductive member is achieved.

  2 to 3 and 6 to 7 show cross-sectional explanatory views in an intermediate stage of a circuit board manufacturing method according to another embodiment of the present invention.

  Please refer to FIG. A substrate 100 having a first surface 102 and a second surface 104 facing each other is provided. In the present embodiment, the substrate 100 may be made of a resin material. Conductive layers (not shown) are respectively formed on the first surface 102 and the second surface 104 of the substrate 100. Then, the conductive layer is patterned by a lithographic etching process, and a plurality of first conductive blocks 200 and a plurality of second conductive blocks 300 arranged at intervals on the first surface 102 and the second surface 104 are formed. Form each one. In the present embodiment, the first conductive block 200 includes the first conductive block 200 in the aperture dense region 202 and the first conductive block 200 in the aperture sparse region 204, and the second conductive block 300 includes the aperture dense region 302. It includes the second conductive block 300 and the second conductive block 300 in the opening sparse region 304. Next, a laminating process is performed to form a first insulating layer 210 and a second insulating layer 310 on the first surface 102 and the second surface 104 of the substrate 100, respectively. Each of the two conductive blocks 300 is covered. In the present embodiment, the first insulating layer 210 or the second insulating layer 310 can be made of ABF or PP material. Next, a plurality of first openings 220 and a plurality of second openings 222 are formed in the first insulating layer 210 by a laser drilling process to form the opening dense region 202 and the opening dense region first. The conductive block 200 is exposed to form the open sparse region 204 and the first conductive block 200 in the open sparse region 204 is exposed. Further, a plurality of third openings 320 and a plurality of fourth openings 322 are formed in the second insulating layer 310 by a laser drilling process to constitute the opening dense region 302 and the second of the opening dense region 302. The conductive block 300 is exposed to form the open sparse region 304 and the second conductive block 300 in the open sparse region 304 is exposed. After the laser drilling process is performed, a desmear step is performed so that residues in the first opening 220, the second opening 222, the third opening 320, and the fourth opening 322 after the laser drilling process ( (Not shown) can be removed.

  Please refer to FIG. A first seed layer 230 and a second seed layer 330 are formed on the first insulating layer 210 and the second insulating layer 310, respectively, by a deposition process (eg, a chemical copper deposition process); The first opening 220, the second opening 222 (shown in FIG. 2), and the third opening 320 and the fourth opening 322 (shown in FIG. 2) are extended. Next, a first dry film and a second dry film are formed on the first seed layer 230 and the second seed layer 330. Next, a patterned first dry film 240 and a patterned second dry film 340 are formed by an exposure and development process, and a part of the first seed layer 230 and the second seed layer 330 are formed. Expose each one. Next, an electroplating process is performed on the exposed first seed layer 230 and the second seed layer 330, and the first seed layer 230 or the second seed layer 230 is formed on the first insulating layer 210 and the second insulating layer 310. The first conductive layer 250 and the second conductive layer 350 are formed with the two seed layers 330 interposed therebetween.

  Next, please refer to FIG. A first dry film layer 270 is formed on the first conductive layer 250 and the patterned first dry film 240, and on the second conductive layer 350 and the patterned second dry film 340. A second dry film layer 370 is formed. In the present embodiment, the first dry film layer 270 is located at least above the dense aperture region 202 and adheres to the first conductive layer 250, and the second dry film layer 370 is at least above the dense aperture region 302. And is attached to the second conductive layer 350. Next, an etching process removes a portion of the first conductive layer 250 not covered with the first dry film layer 270 and a portion of the second conductive layer 350 not covered with the second dry film layer 370. Thus, the first conductive layer 250 and the second conductive layer 350 have a uniform thickness.

  In the present embodiment, the first dry film layer 270 and the second dry film layer 370 out of the first conductive layer 250 and the second conductive layer 350 are covered by adjusting the amount of the etchant used. It is possible to control the etching amount in the unexposed portion. In the present embodiment, only the portions of the first conductive layer 250 and the second conductive layer 350 that are not covered by the first dry film layer 270 and the second dry film layer 370 are removed. There is a vertical step between the covered region of the first conductive layer 250 and the second conductive layer 350 (substantially equivalent to the dense aperture regions 202 and 302) and the uncovered region (substantially equivalent to the aperture sparse regions 204 and 304). It should be noted that a joining surface having a shape is formed. This is because the first dry film layer 270 and the second dry film layer 370 are closely attached to the first conductive layer 250 and the second conductive layer 350, so that the etching solution is used in the first conductive layer 250. This is because the second conductive layer 350 does not penetrate into the portion covered with the first dry film layer 270 and the second dry film layer 370. In this embodiment, the first conductive layer 250 and the second conductive layer 350 cover regions (corresponding to the aperture dense regions 202 and 302) and uncovered regions (corresponding to the aperture sparse regions 204 and 304). ) Can be controlled and estimated with higher accuracy.

See, for example, Figures 9A-9D. These figures show enlarged views before and after etching of the circled portion in FIG. 6 according to some embodiments of the present invention, covered by the first dry film layer 270 of the first conductive layer 250. The portion is indicated as a, and the portion not covered by the first dry film layer 270 is indicated as b. Before performing the etching process, as shown in FIG. 9A, the thickness of the uncovered area b is larger than the thickness of the covered area a, and the difference between the two is H ′. After performing the etching process, as shown in FIGS. 9B to 9D, the thickness of the uncovered area b is significantly reduced, and the value of the difference between the thickness of the uncovered area b and the thickness of the covered area a is different. Can be. In one embodiment, as shown in Figure 9B, the thickness of the uncovered region b is still greater than the thickness of the cover region a, the value of the difference between them is H _'1. In another embodiment, as shown in FIG. 9C, the thickness of the uncovered area b is close to the thickness of the covered area a, and the difference between the _two is H′2. In another embodiment, as shown in FIG. 9D, the thickness of the uncovered region b is smaller than the thickness of the cover region a, the value of the difference between them is H _'3. As the amount of the etching solution used increases, the value of the difference between the thickness of the uncovered region b and the thickness of the covered region a decreases to satisfy H ′> H ′ ₁ > H ′ ₂ (however, H ′> 0, H ′ ₁ > 0, H ′ ₂ ≧ 0). The amount of the etching solution used can be increased until the thickness of the uncovered area b becomes smaller than the thickness of the cover area a. As described above, after the etching process is performed, the cover region a (substantially corresponding to the opening dense region 202) and the uncovered region b (substantially corresponding to the opening sparse region 204) of the first conductive layer 250 are formed. It should be noted that a joint surface having a vertical step is provided between the two. However, it is understood that the specific structure shown in FIGS. 9B-9D is for illustration only and is not intended to limit the invention.

  After performing the etching process, the first dry film layer 270 and the second dry film layer 370 are subsequently removed, and the patterned first dry film 240 and the patterned second dry film 340 are removed. A part of the lower first seed layer 230 and second seed layer 330 is exposed by removing. Next, the exposed first seed layer 230 and second seed layer 330 are removed by an etching process, and a plurality of conductive layers arranged on the first insulating layer 210 and the second insulating layer 310 are spaced apart from each other. A member 290 and a plurality of conductive members 390 are formed. As shown in FIG. 7, the plurality of conductive members 290 include a plurality of first conductive members 291 and a plurality of second conductive members 292, corresponding to the first opening 220 and the second opening 222, respectively. And electrically connected to the first conductive block 200 in the densely populated region 202 and the first conductive block 200 in the depopulated region 204, respectively. The plurality of conductive members 390 include a plurality of third conductive members 391 and a plurality of fourth conductive members 392, and the third openings 320 and the fourth openings 322 are filled correspondingly, respectively. Are electrically connected to the second conductive block 300 and the second conductive block 300 in the open sparse region 304, respectively.

  In this manner, a circuit board according to another embodiment of the present invention can be manufactured. As can be seen from FIG. 7, the entire conductive member 290 and the conductive member 390 have uniform thicknesses, and the circuit board according to the present embodiment has the second thickness compared to the prior art described above (shown in FIG. 1B). The values of the difference between the thickness of the conductive member 292 and the thickness of the first conductive member 291 and the value of the difference between the thickness of the fourth conductive member 392 and the thickness of the third conductive member 391 are significantly reduced. The purpose of improving the uniformity of the entire conductive member is achieved.

  Due to the design elements of product functionality, the design of the number of via holes is becoming more and more concentrated in the chip mounting area, which results in a non-uniform distribution of the number of via holes and thus the number of holes after electroplating. There is a phenomenon in which the thickness of the conductive layer is nonuniform in the dense region (open dense region) and the hole depopulated region (open depopulated region). The method for manufacturing a circuit board provided by the present invention covers or covers a relatively thin region (here, an open dense region) of a conductive layer by using a jig and a dry film layer and combining image transfer. Since the local etching is performed, the difference in the thickness of the conductive layer between the hole number dense region and the hole number sparse region can be greatly reduced, and the thickness uniformity of the entire conductive layer can be improved. In a situation where the thickness of the conductive layer is uniform, a stable line width is maintained when performing an etching process for forming a subsequent circuit, and a situation in which the wiring width becomes unstable or a residue remains. This situation is avoided. As the thickness uniformity of the conductive layer increases, the stability of subsequent processes, such as the packaging process, may be further improved. In addition, according to the method for manufacturing a circuit board provided by the present invention, it is possible to effectively control the difference in the thickness of the conductive layer, and thus to achieve a demand for controlling the resistance or impedance by realizing fine lines and miniaturization. Can be satisfied.

  Examples will be presented below to explain the difference between the circuit board of the prior art and the circuit board provided by the present invention.

  Table 1 shows the difference in the thickness of the conductive layer (copper) between the circuit board manufactured by the prior art shown in FIG. 1B and the circuit board manufactured by the method shown in FIGS. . As can be seen from the results in Table 1, the method shown in FIGS. 2 to 7 of the present invention compared to the circuit board manufactured by the prior art shown in FIG. 1B regardless of whether it is the CO side or the SO side. In the manufactured circuit board, the value of the thickness difference of the entire conductive layer (copper) is reduced, and the uniformity of the thickness of the conductive layer (copper) is greatly improved.

  As mentioned above, although this invention was disclosed by some preferable embodiment, they do not limit this invention, Those skilled in the art are arbitrary, without deviating from the mind and range of this invention. Changes and modifications can be made. Therefore, the protection scope of the present invention must be based on what is defined in the following claims.

DESCRIPTION OF SYMBOLS 100 ... Substrate 102 ... 1st surface 104 ... 2nd surface 200 ... 1st conductive block 202, 302 ... Opening dense area 204, 304 ... Opening sparse region 210 ... 1st insulating layer 220 ... 1st opening 222 ... second opening 230 ... first seed layer 240 ... patterned first dry film 250 ... first conductive layer 260 ... first jig 270 ... first dry film layer 280, 380 ... conductive member 281, 291 ... 1st conductive member 282, 292 ... 2nd conductive member 300 ... 2nd conductive block 310 ... 2nd insulating layer 320 ... 3rd opening 322 ... 4th opening 330 ... 2nd seed Layer 340 ... Patterned second dry film 350 ... Second conductive layer 360 ... Second jig 370 ... Second dry film layers 381, 391 ... Third conductive members 382, 392 Fourth conductive member A ... chip mounting region B ... non-chip mounting regions _{H, H 1, H 2,} H 3, H ', H' 1, H '2, H' 3 ... difference between the values

Claims (17)

A substrate having opposing first and second surfaces;
A plurality of first conductive blocks, including a first conductive block in an aperture dense region and a first conductive block in an aperture sparse region, spaced apart on the first surface of the substrate;
The opening dense region provided on the first surface of the substrate and composed of a plurality of first openings and the first openings, and a plurality of second openings and the second openings. The first insulating layer having the opening sparse region, wherein the plurality of first openings expose the plurality of first conductive blocks in the opening dense region, and the plurality of second openings are A first insulating layer that exposes the plurality of first conductive blocks in the open-sparse region;
The first insulating layers are arranged at intervals, are filled in correspondence with the plurality of first openings, and are electrically connected to the plurality of first conductive blocks in the dense opening region. A plurality of first conductive members, and a plurality of second conductive members filled corresponding to the plurality of second openings and electrically connected to the plurality of first conductive blocks in the opening-sparse region. seen including, upper surface of a portion adjacent to the plurality of first conductive members of said plurality of second conductive member has a vertical junction surface, and a plurality of conductive members,
Comprising
A circuit board in which the plurality of conductive members have a uniform thickness.   The value of the difference between the thickness of the plurality of second conductive members and the thickness of the plurality of first conductive members is -50 to 100% of the thickness of the plurality of first conductive members. Circuit board as described in. A plurality of second conductive blocks including a second conductive block in an aperture dense region and a second conductive block in an aperture sparse region, spaced apart on the second surface of the substrate;
The opening dense region is provided on the second surface of the substrate and includes a plurality of third openings and the third openings, and includes a plurality of fourth openings and the fourth openings. The second insulating layer having the opening sparse region, wherein the plurality of third openings expose the plurality of second conductive blocks in the opening dense region, and the plurality of fourth openings are the second insulating layer. A second insulating layer exposing the plurality of second conductive blocks in the open-sparse region;
It is arranged on the second insulating layer at intervals, and is filled in correspondence with the plurality of third openings and is electrically connected to the plurality of second conductive blocks in the dense opening region. A plurality of third conductive members, and a plurality of fourth conductive members filled corresponding to the plurality of fourth openings and electrically connected to the plurality of second conductive blocks in the opening-sparse region. A plurality of other conductive members including,
Further including
The circuit board according to claim 1, wherein the another plurality of conductive members have a uniform thickness. Is -50 to 100% of the thickness of the plurality of fourth conductive member having a thickness and the plurality of third third value of the difference between the thickness of the conductive member of the plurality of conductive members, claim 3 Circuit board as described in. Said plurality of fourth conductive member, the surface on the part adjacent to the plurality of third conductive members, smooth joint surface, or a bonding surface having a vertical step, according to claim 3 Circuit board. Forming a plurality of first conductive blocks arranged at intervals on a first surface of a substrate, wherein the plurality of first conductive blocks includes a first conductive block in an aperture dense region and Including a first conductive block in an open-sparse region;
Forming a first insulating layer on the first surface of the substrate;
Forming a plurality of first openings forming the opening dense region and a plurality of second openings forming the opening depopulated region in the first insulating layer, wherein the plurality of first openings An opening exposes the plurality of first conductive blocks in the dense aperture region, and a plurality of the second openings expose the plurality of first conductive blocks in the depopulated region; and
Forming a patterned first dry film on the first insulating layer, exposing the plurality of first openings and the plurality of second openings;
Performing an electroplating process to form a first conductive layer;
The patterned first layer is located at least above the dense area of the opening, does not adhere to the first conductive layer, and directly contacts the patterned first dry film . Placing the first jig on the dry film;
Performing an etching process to remove a portion of the first conductive layer and providing the first conductive layer with a uniform thickness;
Removing the first jig;
Removing the patterned first dry film and forming a plurality of conductive members arranged at intervals on the first insulating layer; and
A method for manufacturing a circuit board, comprising: The plurality of conductive members are
A plurality of first conductive members filled corresponding to the plurality of first openings and electrically connected to the plurality of first conductive blocks in the dense aperture region;
A plurality of second conductive members filled corresponding to the plurality of second openings and electrically connected to the plurality of first conductive blocks in the aperture sparse region;
The manufacturing method of the circuit board of Claim 6 containing this. Is -50 to 100% of the thickness of said plurality of second conductive members in the thickness and the plurality of first conductive first value of the difference between the thickness of the member of the plurality of conductive members, claim 7 A method for manufacturing a circuit board according to claim 1. Forming a plurality of second conductive blocks arranged at intervals on a second surface opposite to the first surface of the substrate, wherein the plurality of second conductive blocks are openings; Including a second conductive block in a dense region and a second conductive block in an open-sparse region;
Forming a second insulating layer on the second surface of the substrate;
Forming a plurality of third openings constituting the opening dense region and a plurality of fourth openings constituting the opening sparse region in the second insulating layer, wherein the plurality of third openings An opening exposes the plurality of second conductive blocks in the aperture dense region, and a plurality of the fourth openings exposes the plurality of second conductive blocks in the aperture sparse region; and
Forming a patterned second dry film on the second insulating layer to expose the plurality of third openings and the plurality of fourth openings;
Performing an electroplating process to form a second conductive layer;
Placing a second jig on the patterned second dry film so as to be positioned at least above the dense area of the opening and not attached to the second conductive layer;
Performing an etching process to remove a portion of the second conductive layer and providing the second conductive layer with a uniform thickness;
Removing the second jig;
Removing the patterned second dry film and forming another plurality of conductive members arranged at intervals on the second insulating layer; and
The circuit board manufacturing method according to claim 6 , further comprising: The other plurality of conductive members are
A plurality of third conductive members filled corresponding to the plurality of third openings and electrically connected to the plurality of second conductive blocks in the dense area of the openings;
A plurality of fourth conductive members filled corresponding to the plurality of fourth openings and electrically connected to the plurality of second conductive blocks in the aperture sparse region;
The manufacturing method of the circuit board of Claim 9 containing this. Is -50 to 100% of the thickness of the plurality of fourth conductive member having a thickness and the plurality of third third value of the difference between the thickness of the conductive member of the plurality of conductive members, claim 10 A method for manufacturing a circuit board according to claim 1. Forming a plurality of first conductive blocks arranged at intervals on a first surface of a substrate, wherein the plurality of first conductive blocks includes a first conductive block in an aperture dense region and Including a first conductive block in an open-sparse region;
Forming a first insulating layer on the first surface of the substrate;
Forming a plurality of first openings forming the opening dense region and a plurality of second openings forming the opening depopulated region in the first insulating layer, wherein the plurality of first openings An opening exposes the plurality of first conductive blocks in the dense aperture region, and a plurality of the second openings expose the plurality of first conductive blocks in the depopulated region; and
Forming a patterned first dry film on the first insulating layer, exposing the plurality of first openings and the plurality of second openings;
Performing an electroplating process to form a first conductive layer , wherein the upper surface of the first conductive layer is lower than the upper surface of the patterned first dry film; and
A first dry film layer is formed on the first conductive layer and the patterned first dry film so as to be at least above the dense area of the opening and to adhere to the first conductive layer A portion of the patterned first dry film is in the first dry film layer; and
Performing an etching process to remove a portion of the first conductive layer and providing the first conductive layer with a uniform thickness;
Removing the first dry film layer and the patterned first dry film, and forming a plurality of conductive members arranged at intervals on the first insulating layer;
A method for manufacturing a circuit board, comprising: The plurality of conductive members are
A plurality of first conductive members filled corresponding to the plurality of first openings and electrically connected to the plurality of first conductive blocks in the dense aperture region;
A plurality of second conductive members filled corresponding to the plurality of second openings and electrically connected to the plurality of first conductive blocks in the aperture sparse region;
The manufacturing method of the circuit board of Claim 12 containing this. Is -50 to 100% of the thickness of said plurality of second conductive members in the thickness and the plurality of first conductive first value of the difference between the thickness of the member of the plurality of conductive members, claim 13 A method for manufacturing a circuit board according to claim 1. Forming a plurality of second conductive blocks arranged at intervals on a second surface opposite to the first surface of the substrate, wherein the plurality of second conductive blocks are openings; Including a second conductive block in a dense region and a second conductive block in an open-sparse region;
Forming a second insulating layer on the second surface of the substrate;
Forming a plurality of third openings constituting the opening dense region and a plurality of fourth openings constituting the opening sparse region in the second insulating layer, wherein the plurality of third openings An opening exposes the plurality of second conductive blocks in the aperture dense region, and a plurality of the fourth openings exposes the plurality of second conductive blocks in the aperture sparse region; and
Forming a patterned second dry film on the second insulating layer to expose the plurality of third openings and the plurality of fourth openings;
Performing an electroplating process to form a second conductive layer;
A second dry film layer is formed on the second conductive layer and the patterned second dry film so as to be at least above the dense area of the opening and to adhere to the second conductive layer And a process of
Performing an etching process to remove a portion of the second conductive layer and providing the second conductive layer with a uniform thickness;
Removing the second dry film layer and the patterned second dry film to form another plurality of conductive members arranged at intervals on the second insulating layer;
The method for manufacturing a circuit board according to claim 12 , further comprising: The other plurality of conductive members are
A plurality of third conductive members filled corresponding to the plurality of third openings and electrically connected to the plurality of second conductive blocks in the dense opening region;
A plurality of fourth conductive members filled corresponding to the plurality of fourth openings and electrically connected to the plurality of second conductive blocks in the aperture sparse region;
The manufacturing method of the circuit board of Claim 15 containing this. Is -50 to 100% of the thickness of the plurality of fourth conductive member having a thickness and the plurality of third third value of the difference between the thickness of the conductive member of the plurality of conductive members, claim 16 A method for manufacturing a circuit board according to claim 1.

Images