JP6481499B2 - Lead frame or substrate for optical semiconductor device, and optical semiconductor device using the same - Google Patents

Description

  The present invention relates to an optical semiconductor device lead frame or substrate, and an optical semiconductor device using the same.

  Conventionally, for example, a semiconductor light emitting device (hereinafter simply referred to as a “light emitting device”) is die-bonded to a lead frame or a substrate, wire-bonded, and finally sealed with a translucent resin. It is manufactured by doing.

  Such lead frames or substrates for optical semiconductor devices are generally subjected to silver plating from the viewpoints of light reflectivity, bonding stability, and the like. However, since silver plating is easily discolored by sulfuration, excellent initial reflectance cannot be maintained over a long period of time.

  Thus, for example, Patent Documents 1, 2, and 3 propose that in a lead frame for an optical semiconductor device, a rhodium film is formed as a light reflecting layer instead of a silver film.

JP 2005-129970 A JP 2007-324451 A JP 2008-053564 A JP 2011-129658 A JP 2012-009572 A

  However, since the rhodium film is hard, a wire such as a gold wire cannot be stably bonded.

  Accordingly, an embodiment of the present invention has been made in view of such circumstances, and a lead frame or substrate for optical semiconductor devices that easily maintains light emission efficiency at a high level and has excellent wire bonding properties, or uses the same. An object of the present invention is to provide an optical semiconductor device.

  In view of such a problem, for example, Patent Documents 4 and 5 propose that a gold outermost layer having a specific thickness is formed on a rhodium reflective layer. In order to obtain excellent wire bonding properties industrially and stably, the thickness of the outermost gold layer must be controlled with very high accuracy.

An optical semiconductor device lead frame or substrate according to an embodiment of the present invention has a nickel or nickel alloy plating layer having a thickness of 0.5 μm to 7 μm and a thickness of 0.01 μm to 0.1 μm on a base. Rhodium or rhodium alloy plating layer, and L ^* a ^* b ^* color system display, b ^* is −4.0 to 10.0, or chromaticity xy display x is 0.297 to 0.327 And a gold plating layer having y of 0.305 or more and 0.360 or less in this order.

In addition, an optical semiconductor device lead frame or substrate according to another embodiment of the present invention has a nickel or nickel alloy plating layer having a thickness of 0.5 μm or more and 7 μm or less on a base, and a thickness of 0.05 μm or more. A layer of gold plating or gold alloy plating of 0.5 μm or less, a layer of rhodium or rhodium alloy plating of 0.01 μm or more and 0.1 μm or less, and L ^* a ^* b ^* color system display b ^* is − 4.0 or 10.0 or less, or a gold plating layer in which chromaticity xy display x is 0.297 or more and 0.327 or less and y is 0.305 or more and 0.360 or less in this order And

  According to the lead frame or substrate of one embodiment of the present invention, an optical semiconductor device that can easily maintain the luminous efficiency at a high level and has excellent wire bonding properties can be obtained.

1 is a schematic cross-sectional view of an optical semiconductor device according to an embodiment of the present invention. It is a schematic sectional drawing of the optical semiconductor device which concerns on another one Embodiment of this invention.

  Hereinafter, embodiments of the invention will be described with reference to the drawings as appropriate. However, the lead frame and substrate for an optical semiconductor device described below and the optical semiconductor device are for embodying the technical idea of the present invention, and unless otherwise specified, the present invention is described below. Not limited to those. In addition, the composition of the plating solution and the plating operation conditions described in the embodiment are merely examples. In addition, the contents described in one embodiment can be applied to other embodiments. Furthermore, the size, positional relationship, and the like of the members illustrated in the drawings may be exaggerated for clarity of explanation.

<Embodiment 1>
FIG. 1 is a schematic cross-sectional view of an optical semiconductor device 200 according to the first embodiment. As shown in FIG. 1, the optical semiconductor device 200 according to the first embodiment includes an optical semiconductor device lead frame 100 (hereinafter, also simply referred to as “lead frame 100”) and a package including a resin molding, and a light emitting element 50. And a wire 60 and a sealing member 70. The lead frame 100 includes a base body 10 and a coating 101 provided on the base body 10. The light emitting element 50 is bonded to the lead frame 100 constituting the bottom surface of the recess of the package via an adhesive. The light emitting element 50 is connected to the coating 101 of the lead frame 100 with a wire 60. The sealing member 70 is filled in the recess of the package and seals the light emitting element 50.

  The lead frame 100 of the first embodiment has a coating 101 including a nickel or nickel alloy plating layer 11, a rhodium or rhodium alloy plating layer 12, and a gold plating layer 13 in this order on a substrate 10. doing. Also in the coating 101 of the first embodiment, a layer (21) of copper plating or copper alloy plating described later may be included between the base 10 and the layer 11.

  The coating 101 may be on substantially the entire area of the substrate 10 or on a part of the substrate 10 (for example, a region constituting the bottom surface of the package recess). Further, in the upper and lower two layers in contact with each other in the coating 101, the upper layer may be in substantially the entire region on the lower layer or may be in a part on the lower layer. For example, the gold plating layer 13 may be at least in the wire bonding region of the light emitting element 50 on the rhodium or rhodium alloy plating layer 12, and more preferably in the solder bonding region.

  The substrate 10 can be made of copper, iron, aluminum, or an alloy thereof.

  The nickel or nickel alloy plating layer 11 can suppress thermal diffusion of impurities from the substrate 10, thereby easily maintaining the performance of the upper layer and improving the reliability of the optical semiconductor device. The thickness of the nickel or nickel alloy plating layer 11 is preferably 0.5 μm or more and 7 μm or less. If the thickness of the nickel or nickel alloy plating layer 11 is less than 0.5 μm, the function of suppressing the thermal diffusion of impurities from the substrate 10 becomes insufficient. On the other hand, if the thickness of the nickel or nickel alloy plating layer 11 exceeds 7 μm, the material cost increases. The nickel alloy plating is preferably any one of a nickel cobalt alloy, a nickel tin alloy, a nickel phosphorus alloy, a nickel boron alloy, and a nickel chromium alloy. With these nickel alloy platings, it is easy to obtain an excellent impurity diffusion suppression function and / or heat resistance.

Nickel plating can be performed using the following nickel plating solution. The composition of the nickel plating solution is nickel sulfamate 450 g / L, nickel chloride 5 g / L, boric acid 30 g / L, pH 4.0 to 4.4. Nickel plating operation conditions are a liquid temperature of 55 ° C., strong stirring, a cathode current density of 5 A / dm ² , and a plating time of 2 minutes. In the case of nickel alloy plating, a nickel tin alloy plating solution obtained by adding a soluble tin salt to a nickel plating solution or a nickel cobalt alloy plating solution obtained by adding soluble cobalt to a nickel plating solution may be used.

  The rhodium or rhodium alloy plating layer 12 has high reflectance in the visible wavelength region (for example, a wavelength of 400 to 500 nm), and can increase the light emission efficiency of the optical semiconductor device. The thickness of the rhodium or rhodium alloy plating layer 12 is preferably 0.01 μm or more and 0.1 μm or less. When the thickness of the rhodium or rhodium alloy plating layer 12 is less than 0.01 μm, it is difficult to obtain a high reflectance, and the light emission efficiency of the optical semiconductor device tends to be low. On the other hand, when the thickness of the rhodium or rhodium alloy plating layer 12 exceeds 0.1 μm, the material cost becomes high, and the coating 101 becomes hard and the wire bonding property is lowered. The rhodium alloy plating is preferably any one of a rhodium nickel alloy, a rhodium platinum alloy, a rhodium ruthenium alloy, a rhodium iridium alloy, a rhodium palladium alloy, and a rhodium cobalt alloy. With these rhodium alloy platings, the material cost can be suppressed while maintaining the effect of the layer 12 at a high level.

Rhodium plating can be performed using the following rhodium plating solution. The composition of the rhodium plating solution is Super White (Nippon Electroplating Engineers Co., Ltd .; rhodium concentration 1.5 g / L) and sulfuric acid 20 ml / L. The rhodium plating operation conditions are a liquid temperature of 55 ° C., strong stirring, a cathode current density of 2 A / dm ² , and a plating time of 15 seconds. In the case of rhodium alloy plating, a rhodium ruthenium alloy plating solution obtained by adding a soluble ruthenium salt to a rhodium plating solution or a rhodium platinum alloy plating solution obtained by adding a soluble platinum salt to a rhodium plating solution may be used.

The gold plating layer 13 can obtain excellent wire bonding properties while utilizing the high reflectance of the rhodium or rhodium alloy plating layer 12. The gold plating layer 13 has an L ^* a ^* b ^* color system display, b ^* is −4.0 to 10.0, or a chromaticity xy display x is 0.297 to 0.327 and y Is preferably 0.305 or more and 0.360 or less. When the b ^* is less than −4.0, the wire bonding property is deteriorated. On the other hand, if b ^* exceeds 10.0, the light emission efficiency of the optical semiconductor device decreases. Further, when x is less than 0.297 or more than 0.327, and y is less than 0.305 or more than 0.360, the wire bonding property or the light emission efficiency of the optical semiconductor device is lowered. The thickness of the gold plating layer 13 does not need to be controlled, and the composition of the plating solution and the plating operation conditions may be adjusted so as to maintain the chromaticity in such a range. The chromaticity can be measured, for example, with a small surface spectral color difference meter VSS400 manufactured by Nippon Denshoku Industries Co., Ltd. With this apparatus, it is possible to measure the color difference of a minute part of 1 mm or less such as a lead frame, which is effective as process management.

Gold plating can be performed using the following gold plating solution. The composition of the gold plating solution is 2 g / L of potassium gold cyanide, 100 g / L of potassium citrate, and 20 g / L of citric acid. The plating operation conditions are a liquid temperature of 45 ° C., weak stirring, a cathode current density of 2 A / dm ² , and a plating time of 30 seconds.

  The optical semiconductor device lead frame 100 having the above-described configuration provides an optical semiconductor device that easily maintains the light emission efficiency at a high level and has excellent wire bonding properties. In addition, an optical semiconductor device excellent in die bonding property, solder wettability, adhesion to a sealing member, and the like can be obtained. Such an optical semiconductor device has a very high reliability and is particularly suitable for in-vehicle and industrial lighting that is expected to be used in harsh environments. In addition, the optical semiconductor device lead frame 100 having the above configuration is relatively easy to manage the manufacturing process, and is excellent in mass productivity.

<Embodiment 2>
FIG. 2 is a schematic cross-sectional view of the optical semiconductor device 220 according to the second embodiment. As shown in FIG. 2, an optical semiconductor device 220 according to the second embodiment includes an optical semiconductor device substrate 120 (hereinafter, also simply referred to as “substrate 120”), a light emitting element 50, a sealing member 70, a conductive material. Adhesive 80. The substrate 120 includes a base body 20 and a coating 201 provided on the base body 20. The coating 201 is formed in a pattern and can function as a wiring. The light emitting element 50 is flip-chip mounted on the coating 201 of the substrate 120 via a conductive adhesive 80. The sealing member 70 is provided on the substrate 120 and seals the light emitting element 50.

  The substrate 120 of the second embodiment includes a copper or copper alloy plating layer 21, a nickel or nickel alloy plating layer 22, a gold or gold alloy plating layer 23, and a rhodium or rhodium alloy plating layer on the substrate 20. The film 201 includes the layer 24 and the gold plating layer 25 in this order.

  The substrate 20 can be made of resin (including fiber reinforced resin), ceramics, or the like. Examples of ceramics include aluminum oxide and aluminum nitride. Examples of the resin include glass epoxy, BT resin, polyimide, and the like.

  Hereinafter, preferred forms of the copper or copper alloy plating layer 21 and the gold or gold alloy plating layer 23 will be described. The preferred forms of the nickel or nickel alloy plating layer 22, the rhodium or rhodium alloy plating layer 24, and the gold plating layer 25 are substantially the same as those of the first embodiment, and thus the description thereof is omitted.

  The copper or copper alloy plating layer 21 has good adhesion to the nickel or nickel alloy layer 22 and can suppress the peeling of the coating 201. The thickness of the copper or copper alloy plating layer 21 is preferably 0.1 μm or more and 10 μm or less. Adhesiveness with the layer 22 of nickel or nickel alloy plating falls that the thickness of the layer 21 of copper or copper alloy plating is less than 0.1 micrometer. On the other hand, when the thickness of the copper or copper alloy plating layer 21 exceeds 10 μm, the material cost increases. The copper or copper alloy plating layer 21 may be omitted.

Copper plating can be performed using the following copper plating solution. The composition of the copper plating solution is 210 g / L of potassium copper cyanide, 25 g / L of potassium cyanide, and 30 g / L of potassium carbonate. The copper plating operation conditions are a liquid temperature of 55 ° C., strong stirring, a cathode current density of 3 A / dm ² , and a plating time of 2 minutes. In the case of copper alloy plating, a copper tin alloy plating solution obtained by adding a soluble tin salt to a copper plating solution may be used.

  The gold or gold alloy plating layer 23 is relatively soft and has a micro Vickers hardness Hv of about 60 to 140, and serves as a cushion for the hard rhodium or rhodium alloy plating layer 24 to further enhance the wire bonding property. be able to. The thickness of the gold or gold alloy plating layer 23 is preferably 0.05 μm or more and 0.5 μm or less. When the thickness of the gold or gold alloy plating layer 23 is less than 0.05 μm, the cushioning property is insufficient and it is difficult to improve the wire bonding property. On the other hand, when the thickness of the gold or gold alloy plating layer 23 exceeds 0.5 μm, the material cost increases. The gold alloy plating is preferably any one of a gold nickel alloy, a gold silver alloy, a gold copper alloy, a gold indium alloy, a gold palladium alloy, and a gold tin alloy. With these gold alloy platings, the material cost can be suppressed while maintaining the effect of the layer 23 at a high level.

Gold plating can be performed using the following gold plating solution. The composition of the gold plating solution is 12 g / L potassium gold cyanide, 150 g / L potassium citrate, 30 g / L potassium phosphate, 20 mg / L thallium sulfate, and pH 6.0. The plating operation conditions are a liquid temperature of 70 ° C., strong stirring, a cathode current density of 1 A / dm ² , and a plating time of 1 minute. In the case of gold alloy plating, a gold-copper alloy plating solution obtained by adding a soluble copper salt to a gold plating solution or a gold-silver alloy plating solution obtained by adding a soluble silver salt to a gold plating solution may be used.

  The optical semiconductor device substrate 120 having the above-described configuration also provides an optical semiconductor device that easily maintains the light emission efficiency at a high level and has excellent wire bonding properties. In addition, an optical semiconductor device excellent in die bonding property, solder wettability, adhesion to a sealing member, and the like can be obtained. Such an optical semiconductor device has a very high reliability and is particularly suitable for in-vehicle and industrial lighting that is expected to be used in harsh environments. Further, the optical semiconductor device substrate 120 having the above-described configuration is also relatively easy to manage the manufacturing process and is excellent in mass productivity.

  In addition, the thickness of the plating according to the embodiment of the present invention can be measured by a micro fluorescent X-ray film thickness meter widely used in the plating industry.

  In addition, various types of plating according to an embodiment of the present invention include, for example, an object to be plated (lead frame or substrate) as an anode, the same soluble metal as the main component of the plating solution, stainless steel, platinum group metal, or platinum group metal. There is a method of performing electroplating by immersing titanium coated with a cathode in various plating solutions. Further, the plating method in one embodiment of the present invention is a so-called rack type plating method of a manual or automatic elevator system, a reel-to-reel type and an electroplating tank having an overflow type plating method, or partial plating of a semiconductor lead frame Any of the jet-type plating methods employed in the present invention can be used.

  In addition, the lead frame according to one embodiment of the present invention may be one that has been subjected to plastic deformation by rolling or the like after the plating process, or one that has been molded by a punching press or the like after the plating process.

  In the lead frame or the substrate according to the embodiment of the present invention, a protective film may be provided on the uppermost layer (gold plating layer). The protective film can be made of silicon oxide or aluminum oxide. The protective film can be provided before, during or after the assembly of the optical semiconductor device. Examples of the method for forming the protective film include sputtering and vapor deposition.

(Light emitting element 50)
The optical semiconductor device according to the embodiment of the present invention includes a light emitting element (semiconductor light emitting element) mounted on the lead frame or the substrate according to the embodiment of the present invention. The optical semiconductor device is mainly a light emitting device such as a light emitting diode (LED), but may be a device further equipped with a light receiving element (semiconductor light receiving element) such as an optical sensor. For example, an LED chip can be used as the light emitting element. As a semiconductor material of the light-emitting element, it is preferable to use a nitride semiconductor (mainly represented by a general formula In _x Al _y Ga _1-xy N (0 ≦ x, 0 ≦ y, x + y ≦ 1)). The light emission peak wavelength of the light emitting element is preferably 420 nm or more and 490 nm or less, and more preferably 450 nm or more and 475 nm or less, from the viewpoint of light emission efficiency and / or color mixture with the light emission of the phosphor.

(Wire 60)
As the wire, a metal wire of gold, copper, silver, platinum, aluminum, palladium, or an alloy thereof can be used. In particular, a gold wire that is unlikely to break due to stress from the sealing member and is excellent in thermal resistance or the like is preferable. In order to improve light reflectivity, at least the surface may be made of silver. Although the wire diameter of a wire is not specifically limited, It is preferable that they are 10 micrometers or more and 40 micrometers or less, and it is more preferable that they are 15 micrometers or more and 30 micrometers or less.

(Sealing member 70)
As the sealing member, a silicone resin, an epoxy resin, or a modified resin or a hybrid resin thereof can be used as a base material. The sealing member may contain a phosphor. The phosphor is a YAG phosphor (for example, Y ₃ (Al, Ga) ₅ O ₁₂ : Ce), a silicate phosphor (for example, (Ba, Sr) ₂ SiO ₄ : Eu), a β sialon phosphor (for example, Si). _6-z Al _z O _z N _8-z : Eu (0 <Z <4.2)), CASN or SCASN phosphor (for example, (Sr, Ca) AlSiN ₃ : Eu), potassium fluorosilicate phosphor (For example, K ₂ SiF ₆ : Mn).

(Conductive adhesive 80)
As the conductive adhesive, a conductive paste such as silver, gold, or palladium, or a tin-bismuth-based, tin-copper-based, tin-silver-based, gold-tin-based solder, or a gold bump can be used.

  Examples according to the present invention will be described in detail below. Needless to say, the present invention is not limited to the following examples.

  As the base of the lead frame, a KLF194 (CDA No. C19400, iron content rate 2.3%) flat plate made by Kobe Steel Co., Ltd. with a thickness of 0.11 mm was used, and Enomoto's LED open frame FLASH LED 6PIN. Use a die-cut type OP1 (outer dimension 5050). The substrate is degreased with an alkaline degreasing agent, acid neutralized with dilute sulfuric acid, and then subjected to copper plating of 0.5 μm in a cyan bath. Then, each layer is sequentially plated thereon, washed with clean pure water, and dried to produce a lead frame for an optical semiconductor device. In addition, plating shall be whole surface plating.

  The produced lead frame for an optical semiconductor device is placed in a mold, polyphthalamide resin is injected as a molding material and solidified to form a package, and then removed from the mold. Then, the light emitting element is placed via a resin adhesive on the lead frame constituting the bottom surface of the recess of the obtained package, and the resin adhesive is cured by heating at 150 ° C. for 1 hour. This light-emitting element is an LED chip including an InGaN-based light-emitting layer that emits blue light (emission peak wavelength: 455 nm). Next, the electrode of the light emitting element and the lead frame are connected by a gold wire having a wire diameter of 25 μm. Next, a modified silicone resin containing 20 wt% of YAG phosphor is filled in the recesses of the package and cured by heating at 150 ° C. for 4 hours. Finally, it is singulated as an optical semiconductor device which is one LED. In the case of an optical semiconductor device substrate, a sample can be similarly produced.

As described above, a lead frame for an optical semiconductor device is manufactured, an optical semiconductor device (LED) is assembled, and an initial total luminous flux Φ _v [lm] is measured with an integrating total luminous flux measurement device. And it evaluates compared with the conventional gold plating lead frame (comparative example 1).

  Further, wire bonding is performed on a lead frame for an optical semiconductor device with a gold wire having a wire diameter of 23 μm using a wire bonding apparatus FB-137C manufactured by Kaijo Corporation. In order to evaluate the ease of bonding of the wires, the ultrasonic power when forming the bonding portion (second bonding portion) with the lead frame is gradually reduced from 100 (maximum value), and the wire is bonded. The ultrasonic power is measured as a wire bonding (WB) limit value, which begins to disappear (more specifically, bonding is performed in which wire bonding is performed 16 times and the wire is not bonded). It can be determined that the smaller the W.B. The W.B. limit value that can be practically used industrially is 80 or less, and the W.B. limit value that enables stable mass production is 65 or less.

  For Comparative Examples 1 to 5 and Examples 1 to 22, the structure of the plating film and the evaluation results are shown in Table 1 below.

  As shown in Table 1, it can be seen that the lead frames of Examples 1 to 22 can provide an optical semiconductor device having both a high initial total luminous flux value and excellent wire bonding properties.

  An optical semiconductor device using a lead frame or substrate for an optical semiconductor device according to an embodiment of the present invention includes a backlight device for a liquid crystal display, various lighting fixtures, a large display, various display devices such as advertisements and destination guides, and a projector. The present invention can be used for an image reading apparatus in a digital video camera, a facsimile machine, a copier, a scanner, or the like.

DESCRIPTION OF SYMBOLS 100 ... Lead frame for optical semiconductor devices 10 ... Base | substrate 101 ... Film 11 ... Nickel or nickel alloy plating layer 12 ... Rhodium or rhodium alloy plating layer 13 ... Gold plating layer 120 ... Optical semiconductor device substrate 20 ... Base | substrate 201 ... Coating 21 ... Copper plating or copper alloy plating layer 22 ... Nickel or nickel alloy plating layer 23 ... Gold plating or gold alloy plating layer 24 ... Rhodium or rhodium alloy plating layer 25 ... Gold plating layer 50 ... Light emitting element 60 ... Wire 70 ... Sealing member 80 ... Conductive adhesive 200,220 ... Optical semiconductor device

Claims (18)

On the substrate,
A nickel or nickel alloy plating layer having a thickness of 0.5 μm to 7 μm;
A rhodium or rhodium alloy plating layer having a thickness of 0.01 μm or more and 0.1 μm or less;
L ^* a ^* b ^{* In the} color system display, b ^* is −4.0 to 10.0, or in chromaticity xy display, x is 0.297 to 0.327 and y is 0.305 to 0.360. A lead frame or substrate for an optical semiconductor device comprising the following gold plating layers in this order. On the substrate,
A nickel or nickel alloy plating layer having a thickness of 0.5 μm to 7 μm;
A gold plating or gold alloy plating layer having a thickness of 0.05 μm or more and 0.5 μm or less;
A rhodium or rhodium alloy plating layer having a thickness of 0.01 μm or more and 0.1 μm or less;
L ^* a ^* b ^{* In the} color system display, b ^* is −4.0 to 10.0, or in chromaticity xy display, x is 0.297 to 0.327 and y is 0.305 to 0.360. A lead frame or substrate for an optical semiconductor device comprising the following gold plating layers in this order. Between the substrate and the nickel or nickel alloy plating layer,
The lead frame or substrate for optical semiconductor devices according to claim 1, comprising a copper plating layer or a copper alloy plating layer having a thickness of 0.1 μm or more and 10 μm or less.   4. The rhodium alloy plating according to claim 1, wherein the rhodium alloy plating is any one of a rhodium nickel alloy, a rhodium platinum alloy, a rhodium ruthenium alloy, a rhodium iridium alloy, a rhodium palladium alloy, and a rhodium cobalt alloy. Lead frame or substrate for optical semiconductor devices.   3. The claim 3, wherein the gold alloy plating is any one of a gold nickel alloy, a gold silver alloy, a gold copper alloy, a gold indium alloy, a gold palladium alloy, and a gold tin alloy. 5. The lead frame or substrate for an optical semiconductor device according to claim 4.   6. The optical semiconductor device according to claim 1, wherein the nickel alloy plating is any one of a nickel cobalt alloy, a nickel tin alloy, a nickel phosphorus alloy, a nickel boron alloy, and a nickel chromium alloy. Lead frame or substrate.   The lead frame or substrate for an optical semiconductor device according to any one of claims 1 to 6, wherein the lead frame or substrate for an optical semiconductor device has a wire bonding limit value (WB limit value) of 80 or less. . An optical semiconductor device in which a light emitting element is mounted on the lead frame or substrate for an optical semiconductor device according to any one of claims 1 to 7 .   Forming a nickel or nickel alloy plating layer having a thickness of 0.5 μm or more and 7 μm or less on a substrate;
  Forming a rhodium or rhodium alloy plating layer having a thickness of 0.01 μm or more and 0.1 μm or less on the nickel or nickel alloy plating layer;
  On the rhodium or rhodium alloy plating layer, L ^* a ^* b ^* In the color system display b ^* A step of forming a gold plating layer in which x is in the range of −4.0 to 10.0 or x is 0.297 to 0.327 and y is 0.305 to 0.360 in chromaticity xy display. A method for manufacturing a lead frame or substrate for an optical semiconductor device.   Forming a nickel or nickel alloy plating layer having a thickness of 0.5 μm or more and 7 μm or less on a substrate;
  Forming a gold plating or gold alloy plating layer having a thickness of 0.05 μm or more and 0.5 μm or less on the nickel or nickel alloy plating layer;
  Forming a rhodium or rhodium alloy plating layer having a thickness of 0.01 μm or more and 0.1 μm or less on the gold plating or gold alloy plating layer;
  On the rhodium or rhodium alloy plating layer, L ^* a ^* b ^* In the color system display b ^* Forming a gold plating layer in which x is in the range of −4.0 to 10.0, or in the chromaticity xy display, x is in the range of 0.297 to 0.327 and y is in the range of 0.305 to 0.360. A method for manufacturing a lead frame or substrate for an optical semiconductor device.   The step of forming the gold plating layer on the rhodium or rhodium alloy plating layer uses a gold plating solution containing potassium gold cyanide, citric acid, and citrate. Of manufacturing a lead frame or substrate for an optical semiconductor device.   In the step of forming the nickel or nickel alloy plating layer on the substrate,
  Between the substrate and the nickel or nickel alloy plating layer,
  The method for producing a lead frame or substrate for an optical semiconductor device according to any one of claims 9 to 11, further comprising a step of forming a copper plating or copper alloy plating layer having a thickness of 0.1 µm to 10 µm.   In the step of forming the rhodium alloy plating layer, the rhodium alloy plating is any one of a rhodium nickel alloy, a rhodium platinum alloy, a rhodium ruthenium alloy, a rhodium iridium alloy, a rhodium palladium alloy, and a rhodium cobalt alloy. Item 13. A method for manufacturing an optical semiconductor device lead frame or substrate according to any one of Items 9 to 12.   The step of forming the gold alloy plating layer, wherein the gold alloy plating is any one of a gold nickel alloy, a gold silver alloy, a gold copper alloy, a gold indium alloy, a gold palladium alloy, and a gold tin alloy. A method for manufacturing a lead frame or substrate for an optical semiconductor device according to any one of claims 11 to 13, wherein the method further comprises:   In the step of forming the nickel alloy plating layer, the nickel alloy plating is any one of a nickel cobalt alloy, a nickel tin alloy, a nickel phosphorus alloy, a nickel boron alloy, and a nickel chromium alloy. The manufacturing method of the lead frame for optical semiconductor devices or a board | substrate as described in any one of these.   The lead frame or substrate for an optical semiconductor device after the step of forming the gold plating layer on the rhodium or rhodium alloy plating layer has a wire bonding limit value (WB limit value) of 80 or less. A method for manufacturing a lead frame or substrate for an optical semiconductor device according to any one of claims 9 to 15.   12. The step of forming the gold plating layer on the rhodium or rhodium alloy plating layer, wherein the potassium gold cyanide used in the gold plating solution is about 2 g / L. The method for manufacturing a lead frame or substrate for an optical semiconductor device according to claim 12, wherein: An optical semiconductor device comprising a step of mounting a light emitting element on a lead frame or substrate for an optical semiconductor device manufactured by the method for manufacturing a lead frame or substrate for an optical semiconductor device according to any one of claims 9 to 17. Manufacturing method .

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