JP6438699B2 - Game machine - Google Patents

Description

  The present invention relates to a gaming machine such as a pachislot machine.

  2. Description of the Related Art Conventionally, a gaming machine called a pachislot machine that includes a plurality of reels, a start switch, a stop switch, a stepping motor, and a reel control unit is known. The plurality of reels are configured by arranging a plurality of symbols on each surface. The start switch detects that a game medal, a coin or the like (hereinafter referred to as “medal or the like”) is inserted, and that the start lever is operated by the player, and requests the start of rotation of a plurality of reels.

  The stop switch detects that a player has pressed a stop button provided corresponding to each of the plurality of reels, and outputs a signal requesting the rotation of the corresponding reel to stop. The stepping motor is provided corresponding to each of the plurality of reels, and transmits each driving force to each reel. The reel control unit controls the operation of the stepping motor based on signals output from the start switch and the stop switch, and rotates and stops each reel.

  Recently, in such a gaming machine, a BB (Big Bonus) general game that draws a plurality of regular bonuses (RB) is provided, and depending on the type of RB operated when the BB termination condition is satisfied, There is known a gaming machine in which a replay time (RT) given to a person is made different (see, for example, Patent Document 1).

  According to the above gaming machine, since RT is given according to the RB that was operating at the end time of the BB, it is possible to improve the fun when the BB is operating. Moreover, if the symbol combination of RB which operates during BB is confirmed, the advantageous degree of RT can be known, so that interest can be further enhanced.

JP 2007-301001 A

  However, the above-described conventional gaming machine has a problem that the interest for the game after the end of the BB game is reduced. That is, in the above-described conventional gaming machine, RT is not given if RB is not operated when BB is finished, so that the game after BB is finished when RT is not given is significantly less interesting. Further, since the symbol combination of RBs operating during BB can be confirmed, the symbol combination of RBs corresponding to RT having a low degree of advantage immediately before the end of BB is also a cause of lowering interest.

  Accordingly, the present invention has been made to solve the above-described problems of the prior art, and makes it difficult to understand the RT transition during BB game, so that a gaming machine that still has interest even after the BB game ends. The purpose is to provide.

  The present invention has been made to solve such a problem. A plurality of reels (for example, reels 3L, 3C, and 3R described later) provided with a plurality of symbols on the outer peripheral surface, and the plurality of reels are provided. A symbol display means (for example, display windows 21L, 21C, and 21R described later) having a symbol display area disposed on the front surface for displaying a part of the plurality of symbols so as to be visible, and a predetermined start condition are satisfied. Based on the above, symbol changing means (for example, each reel motor 49L, 49C, 49R described later) for changing each symbol displayed in the symbol display area by rotating the plurality of reels, and a plurality of symbols are displayed. Refers to the internal lottery table provided for each gaming state and the internal lottery table corresponding to the current gaming state, and determines an internal winning combination determining unit from among a plurality of combinations. (For example, a main control circuit 71 to be described later) and a plurality of stop operation means (for example, stop buttons 7L, 7C, and 7R to be described later) provided corresponding to each of the plurality of reels and receiving a player's stop operation. And a stop command means for outputting a stop command signal for commanding the stop of the reel corresponding to the operated stop operation means in response to the player operating the stop operation means (for example, a stop switch described later) 7S), a stop table provided corresponding to each of a plurality of winning combinations, and a stop table corresponding to the internal winning combination determined by the internal winning combination determining means when the stop command signal is output All reels are stopped by a reel stop control means (for example, a main control circuit 71 described later) for stopping the rotation of the reels and the reel stop control means. A winning determination means (for example, a main control circuit 71 described later) for determining whether or not a combination of symbols related to the internal winning combination determined by the internal winning combination determining means is displayed on the winning line, Profit granting means (for example, a main control circuit 71 to be described later) that grants a profit according to the combination of symbols related to the internal winning combination determined by the winning determination means, and a normal gaming state (for example, A general gaming state described later), a special gaming state (for example, BB described later) that is relatively advantageous to the player as compared to the normal gaming state, and a gaming state that can be shifted from the special gaming state. The first special game state (for example, RB1, RB2 to be described later), the second special game state (for example, RB3 to be described later), and the third special game state (for example, to be described later) RB4) and at least the first normal game state (for example, RT0, RT1 described later) and the winning probability of the re-gamer related to the re-game operation is the first normal game state. At least a second normal gaming state (for example, RT2 to be described later) that is a gaming state higher than the gaming state, and in the special gaming state, the first special game state becomes a trigger for transition to the first special gaming state A specific winning combination may be determined as an internal winning combination, and in the first special gaming state, the second specific winning combination that triggers the transition to the second special gaming state is determined as an internal winning combination. In the second special gaming state, there is a possibility that a third specific combination that triggers the transition to the third special gaming state may be determined as an internal winning combination, and the special gaming state Upper limit of the game media that is the condition for ending The number of payouts (for example, 359) is less than the number of game media paid out when the special gaming state is repeated N times, and is paid out when the special gaming state is repeated N-1 times. More than the number of game media are defined, and in the special game state, when a first specific symbol combination corresponding to the first specific combination is displayed, the state shifts to the first special game state. Special game state transition means for controlling to shift to the second special game state when a combination of the second specific symbols corresponding to the second specific combination is displayed. (For example, the main control circuit 71 described later) and the second special game state, when the third specific combination is determined as an internal winning combination, the state shifts to the second normal game state. Control the special Normal game state transition means (for example, a main control circuit 71 described later) that controls to take over the second normal game state even after the completion of the game state, and the first special game state can be played The first number (for example, 3) is set as the number of inserted game media, and the second special gaming state is set to the second number (for example, 2) as the number of game media that can be played. A gaming machine characterized by being set.

  According to the present invention, during the second special game state (RB3) game in the special game state (BB), the role corresponding to the third special game state (RB4) can be lottery, and RB3 ends. If the BB satisfies the end condition before the BB game, the player can be prevented from knowing whether the RB4 is winning during the RB3 game in the BB. It is possible to play games with the expectation that Furthermore, in the second special gaming state (RB1, 2), the probability of internal winning in the internal winning combination (F_RB intermediate combination 1 + RB4 and F_RB intermediate combination 1 + RB4) that triggers the transition to RB4 is set lower than RB3. At the same time, the first number (three) is set as the number of game media that can be played. Also, in RB3, the probability of internal winning in the internal winning combination (F_RB intermediate combination 1 + RB4 and F_RB intermediate combination 1 + RB4) that triggers the transition to RB4 is set higher than in RB1, 2, and the introduction of game media that can be played A second number (two) is set as the number of sheets. For this reason, when the inserted number in RB is the second number, it is possible to make the player recognize that the game is in RB3 with a high degree of expectation, and the player is expected to play a game in RB3. It is possible to perform with a feeling.

  According to the present invention, a gaming machine that makes it difficult to understand RT transition during a BB game, makes the player entertain even after the BB game is finished, and allows the player to perform an RB game with a sense of expectation. Can be provided.

FIG. 1 is a diagram showing a functional flow. FIG. 2 is a diagram showing an external structure of the pachislot machine. FIG. 3 is a block diagram showing the configuration of the main control circuit. FIG. 4 is a block diagram showing a configuration of the sub control circuit. FIG. 5 is a diagram showing a symbol arrangement table. FIG. 6A is a diagram illustrating a symbol combination table. FIG. 6-2 is a diagram illustrating a symbol combination table. FIG. 7A is a diagram illustrating an internal lottery table for general (RT0) gaming state. FIG. 7-2 is a diagram illustrating an internal lottery table for general (RT1) gaming state. FIG. 7-3 is a diagram illustrating an internal lottery table for general (RT2) gaming state. FIG. 7-4 is a diagram illustrating an internal lottery table for general (RT3) gaming state. FIG. 7-5 is a diagram illustrating an internal lottery table for the BB flag (RT1). FIG. 7-6 is a diagram illustrating an internal lottery table for the BB general gaming state (RT1). FIG. 7-7 is a diagram illustrating an internal lottery table for the BB general gaming state (RT2). FIG. 7-8 is a diagram illustrating an internal lottery table for RB1. FIG. 7-9 is a diagram illustrating the RB2 medium internal lottery table. FIG. 7-10 is a diagram illustrating an internal lottery table for RB3. FIG. 7-11 is a diagram of the RB4 medium internal lottery table. FIG. 8 is a diagram showing an internal winning combination determination table for a small combination / replay. FIG. 9 is a diagram showing an internal winning combination storing area of the RAM. FIG. 10 is a diagram showing a design code storage area of the RAM. FIG. 11 is a diagram showing a gaming state flag storage area in the RAM. FIG. 12 is a diagram showing the carryover combination storage area of the RAM. FIG. 13 is a diagram illustrating a RAM pressing order storage area. FIG. 14 is a diagram showing a RAM operation stop button storage area. FIG. 15 is a diagram for explaining the RB lottery in the RB. FIG. 16 is a diagram for explaining the BB termination condition. FIG. 17 is a diagram illustrating a state transition of RT. FIG. 18 is a main flowchart showing main processes performed by the main CPU. FIG. 19 is a main flowchart showing power-on processing under the control of the main CPU. FIG. 20 is a main flowchart showing medal acceptance / start check processing under the control of the main CPU. FIG. 21 is a flowchart showing an internal lottery process under the control of the main CPU. FIG. 22 is a flowchart showing RT transition processing during internal lottery processing under the control of the main CPU. FIG. 23 is a flowchart showing a reel stop initial setting process under the control of the main CPU. FIG. 24 is a main flowchart showing the pull-in priority storage process under the control of the main CPU. FIG. 25 is a flowchart showing a pull-in priority table selection process under the control of the main CPU. FIG. 26 is a main flowchart showing a symbol code storing process under the control of the main CPU. FIG. 27 is a flowchart showing a reel stop control process under the control of the main CPU. FIG. 28 is a flowchart showing a priority pull-in control process by the control of the main CPU. FIG. 29 is a flowchart showing a bonus end check process under the control of the main CPU. FIG. 30 is a flowchart showing a bonus operation check process under the control of the main CPU. FIG. 31 is a flowchart showing interrupt processing under the control of the main CPU. FIG. 32 is a flowchart showing input port check processing under the control of the main CPU. FIG. 33 is a flowchart showing power-on processing under the control of the sub CPU. FIG. 34 is a flowchart showing a lamp control task under the control of the sub CPU. FIG. 35 is a flowchart showing a sound control task controlled by the sub CPU. FIG. 36 is a flowchart showing a mother task controlled by the sub CPU. FIG. 37 is a flowchart showing a main board communication task under the control of the sub CPU. FIG. 38 is a flowchart showing command analysis processing under the control of the sub CPU. FIG. 39 is a flowchart showing an effect content determination process under the control of the sub CPU. FIG. 40 is a diagram for explaining a case where the inserted number changes according to the RB gaming state. FIG. 41A is a diagram illustrating an internal lottery table for the BB general gaming state (RT1). FIG. 41-2 is a diagram showing an internal lottery table for the BB general gaming state (RT2). FIG. 41C is a diagram of the RB1 medium internal lottery table. FIG. 41-4 is a diagram illustrating an RB2 medium internal lottery table. FIG. 41-5 is a diagram illustrating the RB3 medium internal lottery table. FIG. 41-6 is a diagram illustrating the RB4 medium internal lottery table. FIG. 42-1 is a diagram illustrating an internal lottery table for the BB general gaming state (RT1). FIG. 42-2 is a diagram showing an internal lottery table for the BB general gaming state (RT2).

  Embodiments of a gaming machine according to the present invention will be described below in detail with reference to the accompanying drawings.

[Functional flow of pachislot]
Embodiment 1 according to the gaming machine of the present invention will be described below with reference to the drawings. First, with reference to FIG. 1, the functional flow of the gaming machine (hereinafter referred to as “pachislot” as appropriate) 1 in the first embodiment will be described.

  When a medal is inserted by the player and the start lever 6 is operated, one value (hereinafter referred to as a random value) is extracted from random numbers in a predetermined numerical range (for example, 0 to 65535).

  The internal lottery means (main CPU 31 described later) performs lottery based on the extracted random number value and determines an internal winning combination. By determining the internal winning combination, a combination of symbols that permits display along a winning determination line described later is determined. There are two types of symbol combinations, one related to “winning” that gives the player benefits such as paying out medals, re-playing, etc., and the other related to “losing”. Yes.

  Subsequently, after the plurality of reels 3L, 3C, 3R are rotated, when the player presses the stop buttons 7L, 7C, 7R, the reel stop control means (for example, a main control circuit 71 described later) Based on the internal winning combination and the timing when the stop buttons 7L, 7C, 7R are pressed, control is performed to stop the rotation of the corresponding reel.

  Here, in the pachi-slot 1, basically, control is performed to stop the rotation of the corresponding reels 3L, 3C, 3R within a specified time (190 msec) from when the stop buttons 7L, 7C, 7R are pressed. In the present embodiment, the number of symbols that move with the rotation of the reels 3L, 3C, and 3R within the specified time is referred to as “the number of sliding symbols”, and the maximum number is defined as four symbols.

  The reel stop control means displays the symbol combination as much as possible along the winning determination line using the specified time when the internal winning combination allowing the display of the symbol combination related to winning is determined. Then, the rotation of the reels 3L, 3C, 3R is stopped. On the other hand, for combinations of symbols that are not permitted to be displayed by the internal winning combination, the reels 3L, 3C, and 3R are used so as not to be displayed along the winning determination line using the specified time. Stop rotation.

  Thus, when the rotation of the plurality of reels 3L, 3C, 3R is all stopped, the winning determination means (for example, a main CPU 31 described later) indicates that the combination of symbols displayed along the winning determination line is related to winning. It is determined whether or not. When it is determined that the prize is related to a prize, a bonus such as a medal payout is given to the player. A series of flows as described above is performed as one game in the pachislot 1.

  Further, in the pachislot 1, in the above-described series of flows, video display performed by the liquid crystal display device 5, light output performed by various lamps, sound output performed by the speakers 9L and 9R, or a combination thereof is used. Various productions are performed.

  When the start lever 6 is operated by the player, an effect random number value (hereinafter referred to as effect random number value) is extracted separately from the random number value used for determining the internal winning combination. When the effect random number is extracted, the effect content determination means (sub control circuit 72 described later) determines by lottery what is to be executed this time from among a plurality of types of effect contents associated with the internal winning combination.

  When the production contents are determined, the speakers 9L and 9R and the liquid crystal display device 5 as the production execution means stop the rotation of the reels 3L, 3C, and 3R when the rotation of the reels 3L, 3C, and 3R is started. When it is performed, the execution of the effect is advanced in conjunction with each opportunity such as when the determination of the presence or absence of a prize is made. In this way, in the pachislot 1, the player has an opportunity to know or predict the determined internal winning combination (in other words, the combination of symbols to be aimed at) by executing the production contents associated with the internal winning combination. It is provided and the player's interest is improved.

[Pachislot structure]
Next, the structure of the pachislo 1 in the present embodiment will be described with reference to FIG. FIG. 2 shows an external structure of the pachi-slot 1 in the present embodiment.

  The pachislot machine 1 is a so-called “pachislot machine”. The pachi-slot 1 is a gaming machine that uses a game medium such as a coin or a medal, a game ball, a token, etc., or a game medium such as a card that stores information on a game value assigned to or given to a player. In the following description, medals are used.

  The pachi-slot 1 includes a cabinet 1a serving as a housing for housing the reels 3L, 3C, 3R, a circuit board, and the like, a front door 2 attached to the front side of the cabinet 1a so as to be openable and closable, and a front side of the front door 2 And a front panel 4 serving as a panel portion. Inside the cabinet 1a, three reels 3L, 3C, 3R are provided side by side. Each of the reels 3L, 3C, and 3R is configured by attaching a belt-like sheet in which a plurality of symbols are continuously arranged along the rotation direction to the peripheral surface of a cylindrical frame. In addition, a vertically long rectangular symbol display area 21 </ b> L, 21 </ b> C, 21 </ b> R is provided in the approximate center of the front surface of the front door 2.

  The front door 2 is a part of the door body, and a liquid crystal display device 5 is provided at the center of the front door 2. The liquid crystal display device 5 is provided on the front side of the front door 2 and between the front door 2 and the front panel 4. The liquid crystal display device 5 is fixed to the upper part of the front door 2 by a mounting frame.

  In addition, the liquid crystal display device 5 includes a display screen 5a including symbol display areas 21L, 21C, and 21R, and is provided so as to be positioned on the near side overlapping with the three reels 3L, 3C, and 3R when viewed from the front. The symbol display areas 21L, 21C, and 21R are provided corresponding to the three reels 3L, 3C, and 3R, respectively, and can transmit the reels 3L, 3C, and 3R provided on the back side thereof. Is provided. In the symbol display areas 21L, 21C, and 21R, effective lines are provided as winning determination lines. The effective lines are a center line 8a arranged at the center in the horizontal direction, a cross-up line 8b arranged obliquely to the upper right, a bottom line 8c arranged at the lower part in the horizontal direction, and a cross-down arranged at the oblique lower right. The line 8d is composed of a top line 8e arranged at the upper part in the horizontal direction.

  That is, the symbol display areas 21L, 21C, and 21R function as display windows, and the player can visually recognize the rotation and stop operation of the reels 3L, 3C, and 3R provided behind them. Become. In the present embodiment, the entire display screen including the symbol display areas 21L, 21C, and 21R is used to display an image and execute an effect.

  When the rotation of the reels 3L, 3C, 3R provided behind the symbol display areas 21L, 21C, 21R is stopped, among the plural types of symbols arranged on the surface of the reels 3L, 3C, 3R, One symbol (three in total) is displayed in each of the upper, middle and lower areas in the frame. Further, it is determined whether or not a prize is awarded for a pseudo line that is a combination of any one of the three areas including the upper, middle, and lower stages of each of the symbol display areas 21L, 21C, and 21R. It is defined as the target line (winning line). In the present embodiment, there are five winning lines: a center line 8a, a cross-up line 8b, a bottom line 8c, a cross-down line 8d, and a top line 8e.

  The front door 2 is provided with various devices to be operated by the player. The medal slot 10 is provided for receiving a medal dropped from the outside by the player. The medals accepted by the medal slot 10 are inserted into one game up to a predetermined number (for example, three), and the amount exceeding the predetermined number can be deposited inside the pachislot machine 1 (so-called credit function). ).

  The MAX bet button 11 is provided for determining the insertion of the maximum number of medals from the medals deposited inside the pachislot, and the 1 bet button 12 is selected from the medals deposited inside the pachislot. It is provided to determine the insertion of medals. The C / P button 13 is provided to pull out medals deposited inside the pachislot.

  The start lever 6 is provided to start rotation of all the reels 3L, 3C, 3R. The stop buttons 7L, 7C, 7R are associated with the three reels 3L, 3C, 3R, respectively, and are provided to stop the rotation of the corresponding reels 3L, 3C, 3R.

  The 7-segment display 53 includes a 7-segment LED, and the number of medals inserted in the current game (hereinafter referred to as the number of inserted coins), the number of medals paid out to the player as a privilege (hereinafter referred to as the number of payouts), pachislot Information such as the number of medals deposited inside (hereinafter referred to as the number of credits) is digitally displayed to the player.

  The lamp 14 and the LEDs 57 output light in a lighting / light-off pattern according to the contents of the effect. The speakers 9L and 9R output sound such as sound effects and music according to the contents of the production. The medal payout port 15 guides the discharged medals to the outside. The medals discharged from the medal payout opening 15 are stored in the medal tray 16.

[Circuit configuration of pachislot]
This completes the description of the structure of the pachislot 1. Next, with reference to FIG. 3 and FIG. 4, a configuration of a circuit included in the pachislo 1 according to the present embodiment will be described. The pachi-slot 1 in the present embodiment includes a main board (main control circuit) 71, a sub control board (sub control circuit) 72, and peripheral devices (actuators) that are electrically connected thereto.

  FIG. 3 is a diagram showing a configuration of a main control circuit of the pachislot. The main control circuit 71 includes a microcomputer 30 disposed on a circuit board as a main component. The microcomputer 30 includes a main CPU 31, a main ROM 32, a main RAM 33, and the like.

  The main ROM 32 stores a control program executed by the main CPU 31, various data tables, data of various control commands (commands) transmitted to the sub control circuit 72, and the like. The main RAM 33 is provided with a storage area for storing various data such as an internal winning combination determined by execution of the control program.

  The main CPU 31 is connected to a clock pulse generation circuit 34, a frequency divider 35, a random number generator 36, and a sampling circuit 37. The clock pulse generation circuit 34 and the frequency divider 35 generate clock pulses. The main CPU 31 executes a control program based on the generated clock pulse. The random number generator 36 generates one random number from a predetermined range (for example, 0 to 65535).

  A switch or the like is connected to the input port of the microcomputer 30. The main CPU 31 receives inputs from various switches and controls operations of peripheral devices such as stepping motors 49L, 49C, 49R.

  The reel stop signal circuit 7S detects that the three stop buttons 7L, 7C, 7R are pressed by the player to stop the rotation of the reels 3L, 3C, 3R. The start switch 14S detects that the start lever 6 has been operated by the player to start the rotation of the reels 3L, 3C, and 3R.

  The medal sensor 42S detects a medal received in the medal insertion slot 10. The 1-bet switch 11S detects that the 1-bet button 12 has been pressed by the player. The maximum bet switch 12S detects that the MAX bet button 11 has been pressed by the player. The C / P switch 13S detects that the C / P button 13 has been pressed by the player.

  Peripheral devices whose operations are controlled by the microcomputer 30 include stepping motors 49L, 49C, 49R, a 7-segment display 53, and a hopper 40. A circuit for controlling the operation of each peripheral device is connected to the output port of the microcomputer 30.

  The motor drive circuit 39 controls driving of stepping motors 49L, 49C, 49R provided corresponding to the reels 3L, 3C, 3R. The reel position detection circuit 50 detects a reel index indicating that the reels 3L, 3C, and 3R have made one rotation with an optical sensor having a light emitting unit and a light receiving unit in accordance with the reels 3L, 3C, and 3R.

  The stepping motors 49L, 49C, and 49R include a configuration in which the rotation speed is proportional to the number of output pulses and the rotation shaft can be stopped at a specified angle. The driving force of the stepping motors 49L, 49C, 49R is transmitted to the reels 3L, 3C, 3R via gears having a predetermined reduction ratio. Each time one pulse is output to the stepping motors 49L, 49C, 49R, the reels 3L, 3C, 3R rotate at a constant angle.

  The main CPU 31 manages the rotation angles of the reels 3L, 3C, and 3R by counting the number of times pulses are output to the stepping motors 49L, 49C, and 49R after detecting the reel index. The main CPU 31 manages the positions of a plurality of symbols arranged on the surfaces of the reels 3L, 3C, and 3R by managing the rotation angles of the reels 3L, 3C, and 3R.

  The hopper drive circuit 41 controls the operation of the hopper 40. The payout completion signal circuit 51 manages the detection of medals performed by the medal detection unit 40S provided in the hopper 40, and checks whether or not the medals discharged from the hopper 40 have reached the payout number.

  The sub control circuit 72 is electrically connected to the main control circuit 71 and performs processing such as determination and execution of effect contents based on a command transmitted from the main control circuit 71. The sub control circuit 72 is connected to the liquid crystal display device 5, the speakers 9 </ b> L and 9 </ b> R, and the lamp 14, and controls them according to a command transmitted from the main control circuit 71. The sub control circuit 72 is a sub CPU that controls the output of video, sound, and light in accordance with a control program stored in a sub ROM (not shown) in accordance with a command transmitted from the main control circuit 71. (Not shown).

  FIG. 4 is a block diagram showing a configuration of the sub control circuit 72. The sub-control circuit 72 includes an image control circuit 72a and a sound / lamp control circuit 72b. The image control circuit 72a and the sound / lamp control circuit 72b are configured on different circuit boards from the circuit board constituting the main control circuit 71, but by integrating these functions, the main control circuit 71 may be integrated.

  In the embodiment shown in FIG. 4, communication between the main control circuit 71 and the image control circuit 72a is performed in one direction from the main control circuit 71 to the image control circuit 72a, and from the image control circuit 72a to the main control circuit 71. In contrast, no command or other information is transmitted. The communication between the image control circuit 72a and the sound / lamp control circuit 72b is performed in one direction from the image control circuit 72a to the sound / lamp control circuit 72b, and from the sound / lamp control circuit 72b to the image control circuit 72a. No commands, information, etc. are sent to

  The image control circuit 72a includes an image control microcomputer 81, a serial port 82, a program ROM 83, a work RAM 84, a calendar IC 85, an image control IC 86, a control RAM 87, an image ROM 88 (character ROM), and a video RAM 89.

  The image control microcomputer 81 includes a CPU, an interrupt controller, an input / output port, and a serial port 82. The CPU provided in the image control microcomputer 81 performs various processes according to the program stored in the program ROM 83 based on the command transmitted from the main control circuit 71. Although the image control circuit 72a does not include a random number generator and a sampling circuit, the image control microcomputer 81 executes a program stored in the program ROM 83, thereby extracting a random number value and performing a lottery process of effect data. Configured to do.

  Further, the image control microcomputer 81 responds to the internal winning combination based on the received “start command”, the stop operation of each reel 3L, 3C, 3R based on the “reel stop command”, the “display combination command”, and the like. Thus, processing for displaying various images on the liquid crystal display device 5 is performed.

  The serial port 82 receives a command transmitted from the main control circuit 71. The program ROM 83 stores a program executed by the image control microcomputer 81.

  The work RAM 84 is provided as a means for temporarily storing information when the image control microcomputer 81 executes a program. The work RAM 84 stores various information such as image data and effect data.

  The calendar IC 85 counts date data and timer time. An operation unit 60 is connected to the image control microcomputer 81. In the embodiment, it is possible to set a date or the like by operating this operation unit 60 by an employee of a game hall or the like. The image control microcomputer 81 transfers the date information set based on the input signal transmitted from the operation unit 60 to the calendar IC 85. The date information transferred to the calendar IC 85 is backed up even after the main power supply is cut off.

  The aforementioned work RAM 84 and calendar IC 85 are to be backed up when the power is shut off. That is, even when the power supplied to the image control microcomputer 81 is interrupted, the power is continuously supplied, and the stored information and the like are prevented from being lost.

  The image control IC 86 generates an image corresponding to the effect content (for example, effect data described later) determined by the image control microcomputer 81 and outputs the image to the liquid crystal display device 5.

  The control RAM 87 is formed in the image control IC 86. The image control microcomputer 81 writes and reads information and the like with respect to the control RAM 87. The control RAM 87 is expanded with registers of the image control IC 86 and the like. The image control microcomputer 81 updates the register of the image control IC 86 at every predetermined timing.

  The image control IC 86 is connected to the liquid crystal display device 5, the image ROM 88, and the video RAM 89. The image ROM 88 may be configured to be connected to the image control microcomputer 81. In this case, the configuration may be effective when processing a large amount of image data such as three-dimensional image data. The image ROM 88 stores image data and the like for generating an image. The video RAM 89 is a means for temporarily storing information when an image is generated by the image control IC 86. The image control IC 86 transmits a signal to the image control microcomputer 81 every time data in the video RAM 89 is transferred to the liquid crystal display device 5.

  In the image control circuit 72a, the image control microcomputer 81 can control the production of sound and lamp. The image control microcomputer 81 determines information related to the type of sound / lamp and output timing based on the determined content of the effect (for example, effect data described later and special effect data for determining the special effect). The image control microcomputer 81 transmits a command to the sound / lamp control circuit 72b via the serial port 82 at every predetermined timing. The sound / lamp control circuit 72b mainly performs sound / lamp output control according to the command transmitted from the image control circuit 72a.

  The sound / lamp control circuit 72b includes a sound / lamp control microcomputer 111, a serial port 112, a program ROM 113, a work RAM 114, a sound source IC 115, a power amplifier 116, and a sound source ROM 117.

  The sound / lamp control microcomputer 111 includes a CPU, an interrupt controller, and an input / output port. The CPU provided in the sound / lamp control microcomputer 111 performs a process for controlling the output of the sound / lamp according to the program stored in the program ROM 113 based on the command transmitted from the image control circuit 72a.

  The serial port 112 receives a command or the like transmitted from the image control circuit 72a. The program ROM 113 stores a program executed by the sound / lamp control microcomputer 111 and the like. The work RAM 114 is a means for temporarily storing information when the sound / lamp control microcomputer 111 executes the above-described program.

  The sound source IC 115 generates a sound source with reference to the command transmitted from the image control circuit 72 a and the sound source ROM 117, and outputs the sound source to the power amplifier 116. The power amplifier 116 is an amplifier, and speakers 9L and 9R are connected to the power amplifier 116. The power amplifier 116 amplifies the sound source output from the sound source IC 115 and outputs the amplified sound from the speakers 9L and 9R. The sound source ROM 117 stores sound source data and the like for generating a sound source.

  In addition, a volume control unit 59 is connected to the sound / lamp control microcomputer 111. The volume control unit 59 can be operated by employees of the game hall and the like, and is a means for adjusting the volume output from the speakers 9L and 9R. The sound / lamp control microcomputer 111 performs control to adjust the volume of the sound output from the speakers 9L and 9R based on the information obtained from the volume adjustment unit 59.

[Design arrangement table]
The symbol arrangement table will be described with reference to FIG. The symbol arrangement table defines the position of each symbol in the rotation direction of each of the reels 3L, 3C, and 3R and data (hereinafter, symbol code) specifying the type of symbol arranged at each position.

  In the symbol arrangement table, when the reel index is detected, the symbol position in the middle of the symbol display areas 21L, 21C, and 21R is set to “0”, and the symbols are arranged in the order of advance in the rotation direction of the reels 3L, 3C, and 3R. “0” to “20” are assigned to the positions of symbols, respectively. Therefore, by managing the number of symbols that have been rotated since the reel index was detected, by referring to the symbol arrangement table, the positions of symbols that exist mainly in the middle of the symbol display areas 21L, 21C, and 21R. And it is possible to always manage the kind of design.

  On the outer peripheral surfaces of the left reel 3L, the middle reel 3C, and the right reel 3R, there are "white 7", "blue 7", "upper blue", "lower lower", "bush 1", "cactus 1", A symbol row in which symbols of “Replay”, “Boushi 2”, “Cactus 2” and “Upper Chile Red” are arranged in a predetermined order is drawn. The left reel 3L, the middle reel 3C, and the right reel 3R are rotationally driven in the symbol display areas 21L, 21C, and 21R in a direction in which the symbol row sequentially moves upward in the drawing. In addition, this invention is not limited to the symbol row | line | column shown in FIG.

[Design combination table]
The symbol combination table will be described with reference to FIGS. 6-1 and 6-2. In the present embodiment, when the symbol combination displayed by the reels 3L, 3C, and 3R along the winning line matches the symbol combination specified by the symbol combination table, it is determined that the winning combination is given. Benefits such as paying out a game, re-game operation, and bonus game operation are given to the player. FIGS. 6A and 6B are diagrams illustrating the symbol combination table.

  The symbol combination table is data indicating the data (storage region type) stored in the symbol code storage area, which will be described later, a combination (symbol combination) predetermined according to the type of privilege, a combination name, and the number of payouts. And stipulate. The display combination is data for identifying a combination of symbols displayed along the winning line. The storage area type is data provided for the main CPU 31 to identify a display combination storage area (to be described later) in which a winning action flag is stored. The winning operation flag is represented as 1-byte data in which a unique symbol combination is assigned to each bit.

  Further, when a numerical value of 1 or more is determined as the payout number, medals are paid out. The number of payouts is defined in association with 2 or 3 sheets, and a predetermined number of sheets are paid out. In addition, when the replay (RT0 transition lip_1 to 4, RT3 transition lip, 1 or 2 no-transition lip_1 to 15 and RT transition lip _1, 2) is determined as the display combination, the re-game is activated. Is called.

  In addition, when one of white 7 corresponding to BB, or RB1_1 to RB4 and RB2 to 4 corresponding to RB is determined as the display combination, the bonus game is activated. Here, it is assumed that the RB can be lottery only during the BB general game or during the RB. Specifically, the RBs 1_1 to RB4 can be lottery only during the BB general game. RB2 can be lottery only during RB1 and RB4. RB3 can be lottery only during RB2 and RB3. RB4 can be lottery only during RB3.

  In addition, for example, when RT0 transition lip_1 to 4 that are RT transition symbols are displayed along the winning line, the gaming state transitions to RT0, and when the RT3 transition lip is displayed, the gaming state changes to the RT3 gaming state. Transition. Further, when the symbol combination displayed along the winning line does not match any of the symbol combinations defined by the symbol combination table, it is a so-called “losing”.

[Internal lottery table]
The internal lottery table will be described with reference to FIGS. 7-1 to 7-11. FIG. 7A is a diagram illustrating an internal lottery table for general (RT0) gaming state. FIG. 7-2 is a diagram illustrating an internal lottery table for general (RT1) gaming state. FIG. 7-3 is a diagram illustrating an internal lottery table for general (RT2) gaming state. FIG. 7-4 is a diagram illustrating an internal lottery table for general (RT3) gaming state. FIG. 7-5 is a diagram illustrating an internal lottery table for the BB flag (RT1). FIG. 7-6 is a diagram illustrating an internal lottery table for the BB general gaming state (RT1). FIG. 7-7 is a diagram illustrating an internal lottery table for the BB general gaming state (RT2). FIG. 7-8 is a diagram illustrating an internal lottery table for RB1. FIG. 7-9 is a diagram illustrating the RB2 medium internal lottery table. FIG. 7-10 is a diagram illustrating an internal lottery table for RB3. FIG. 7-11 is a diagram of the RB4 medium internal lottery table.

  The general (RT0) gaming state internal lottery table is a table that is referred to when the gaming state is the general gaming state and the RT0 gaming state, and the general (RT1) gaming state internal lottery table is It is a table that is referred to when the gaming state is the general gaming state and the RT1 gaming state, and the general (RT2) gaming state internal lottery table is such that the gaming state is the general gaming state, and It is a table that is referred to when it is in the RT2 gaming state, and the general (RT3) gaming state internal lottery table is a table that is referenced when the gaming state is the general gaming state and the RT3 gaming state. is there.

  The internal lottery table for the BB flag (RT1) is a table that is referred to when the gaming state is the general gaming state and the data corresponding to BB is stored in the carryover combination storage area. The internal lottery table for gaming state (RT1) is a table that is referred to when the gaming state is the BB general gaming state and the RT1 gaming state, and the internal lottery table for the BB general gaming state (RT2) is This table is referred to when the gaming state is the BB general gaming state and the RT2 gaming state.

  The RB1 medium internal lottery table is a table that is referenced when RB1 wins in the BB general gaming state, and the RB2 medium internal lottery table is a table referenced when RB2 wins in the BB general gaming state. Yes, the RB3 medium internal lottery table is a table that is referenced when RB3 wins in the BB general gaming state, and the RB4 medium internal lottery table is referenced when RB4 wins in the BB general gaming state. It is a table.

  The internal lottery table defines a set value (lottery value) and a data pointer according to the winning number. The data pointer is data acquired as a result of lottery performed with reference to the internal lottery table, and is data for designating an internal winning combination defined by an internal winning combination determination table described later. The data pointer is provided with a small role / replay data pointer and a bonus pointer.

  In this embodiment, the random number value for lottery extracted from the predetermined numerical range “0 to 65535” is sequentially subtracted by the lottery value corresponding to each winning number, and whether or not the result of the subtraction becomes negative An internal lottery is performed by determining whether or not a so-called “digit” has occurred.

  Therefore, the larger the numerical value defined as the lottery value, the higher the probability that the data (that is, the data pointer) to which it is assigned will be determined. The winning probability of each winning number can be represented by “the lottery value corresponding to each winning number / the number of all random numbers that may be extracted (65536)”. Unless otherwise indicated in the figure, the lottery range is “0 to 65535”, that is, the probability denominator is “65536”.

  As shown in FIGS. 7-1 to 7-11, each of the internal lottery tables includes F_BB, F_RB1 to 4, F_RT no transition lip, F_RT0 transition replay, F_RT3 transition replay, F_Cherry, F_Bell, F_Watermelon, F_RB Middle role 1, F_RB Middle role 1 + RB2, F_RB Middle role 1 + RB3, F_RB Middle role 1 + RB4, F_RB middle role 2, F_RB middle role 2 + RB2, F_RB middle role 2 + RB3, and F_RB middle role 2 + R ing. Among these, when winning F_BB, the gaming state shifts to the BB gaming state. Also, F_RT0 transition replay, F_RT3 transition replay, F_RB middle role 1 + RB2, F_RB middle role 1 + RB3, F_RB middle role 1 + RB4, F_RB middle role 2, F_RB middle role 2 + RB2, F_RB middle role 2 + RB3, or F_RB middle role 2 + R The gaming state shifts to the RB gaming state.

  In addition, as shown in FIGS. 7-6 and 7-7, in the internal lottery table for the BB general gaming state (RT1, 2), a lottery value of “35000” is defined in F_RB1, and during the BB general game, F_RB1 can be won. In other words, during the BB general game, it is possible to shift to RB1 by winning F_RB1.

  Further, as shown in FIG. 7-8, in the RB1 medium internal lottery table, a lottery value of “52436” is defined for the F_RB medium combination 1 + RB2, and a lottery value of “1000” is defined for the F_RB medium combination 2 + RB2. , RB1, F_RB middle role 1 + RB2 and F_RB middle role 2 + RB2 can be won. In other words, in RB1, win F_RB middle role 1 + RB2 or F_RB middle role 2 + RB2, and move to RB2 by winning F_RB middle role 1 + RB2 or F_RB middle role 2 + RB2 after BB general end after RB1 ends. It is possible.

  Further, as shown in FIG. 7-9, in the RB2 medium internal lottery table, a lottery value of “52436” is defined for the F_RB middle combination 1 + RB3, and a lottery value of “1000” is defined for the F_RB middle combination 2 + RB3. , RB2, F_RB middle role 1 + RB3 and F_RB middle role 2 + RB3 can be won. In other words, in RB2, by winning F_RB middle role 1 + RB3 or F_RB middle role 2 + RB3 during RB2, and winning F_RB middle role 1 + RB3 or F_RB middle role 2 + RB3 after BB general end after RB2, RB3 It is possible to move to.

  In addition, as shown in FIG. 7-10, in the internal lottery table for RB3, one or more lottery values are defined for F_RB middle role 1 + RB3, F_RB middle role 1 + RB4, F_RB middle role 2 + RB3, and F_RB middle role 2 + RB4. Thus, during RB3, F_RB middle role 1 + RB3, F_RB middle role 1 + RB4, F_RB middle role 2 + RB3, and F_RB middle role 2 + RB4 can be won.

  Further, as shown in FIG. 7-11, in the RB4 medium internal lottery table, one or more lottery values are defined for the F_RB medium combination 1 + RB2 and the F_RB medium combination 2 + RB2, and the F_RB medium combination 1 + RB2, And F_RB medium winning combination 2 + RB2 can be won. That is, during RB4, it can win a transitional role to move to RB2.

[Internal winning combination determination table]
Next, an internal winning combination determination table for determining a hit request flag based on the data pointer will be described with reference to FIG. FIG. 8 is a diagram showing an internal winning combination determination table for a small combination / replay. The small winning combination / replay internal winning combination determining table shown in FIG. 8 includes hit request flag data corresponding to each data pointer.

  For example, as shown in FIG. 8, when the data pointer for the small role / replay is “0”, “losing” that is not internally won by any internal winning combination is determined as the data of the winning request flag. Is done. When the small combination / replay data pointer is “1”, “white 7” is determined as the internal winning combination data. When the data pointer for the small role / replay is “2”, “RB1_1”, “RB1_2”, “RB1_3”, and “RB1_4” are determined as hit request flag data.

[Internal winning combination storage area]
FIG. 9 shows internal winning combination storage areas 0 to 2 in which data indicating the internal winning combination (display combination) is stored. The internal winning combination determined in the internal lottery process is stored in the corresponding area. Since the display combination storage area for storing the display combination flag as data has the same structure as the internal winning combination storage area shown in FIG. 9, the display combination storage area is substituted in FIG. Description is omitted.

  For example, in the internal winning combination storing area 0 consisting of 1 byte (8 bits), bit 0 is set in the storing area corresponding to “losing”. Bit 1 is a storage area corresponding to “F_BB”. Bit 2 is a storage area corresponding to “F_RB1”. Bit 3 is a storage area corresponding to “F_RB2”. Bit 4 is a storage area corresponding to “F_RB3”. Bit 5 is a storage area corresponding to “F_RB4”. Bit 6 is a storage area corresponding to “F_RT no transfer lip”. Bit 7 is a storage area corresponding to “F_RT0 transition replay”.

  Here, in the internal winning combination storing area 0, the bit corresponding to the determined internal winning combination data is set to “1”. For example, when “00000010” is stored in the internal winning combination storing area (that is, when the data of bit 1 is “1”), the internal winning combination is “F_BB”.

[Design code storage area]
Next, the configuration of the symbol code storage area will be described with reference to FIG. In the symbol code storage area, displayable combinations (symbol code storage regions 0 to 14) are stored. After all the reels are stopped, the symbol codes corresponding to the display combination are stored in the symbol code storage areas 0 to 14. For this reason, the symbol code storage area is updated each time the reels 3L, 3C, 3R are stopped. The value of the symbol code storage area is used by the main CPU 31 to identify the display combination when all of the reels 3L, 3C, 3R are stopped.

[Game state flag storage area]
FIG. 11 is a diagram illustrating a game state flag storage area in which data indicating a game state flag is stored. The value of the gaming state flag is used by the main CPU 31 to identify the current gaming state. For example, in the BB gaming state, “1” is stored in bit 0. Here, the internal lottery table shown in FIGS. 7-1 to 7-11 is set by the main CPU 31 in accordance with the data indicating the game state flag stored in the game state flag storage area. For example, when “1” is stored in bit 0 and “1” is stored in bit 3, an internal lottery table for the BB general gaming state (RT1) is set by the main CPU 31. Is done.

[Coverage storage area]
FIG. 12 shows a carryover combination storage area in which data relating to a carryover combination is stored. For example, when F_BB is determined as an internal winning combination in the internal lottery process, “1” is stored in bit 0 of the carryover combination storing area. For example, when F_RB1 is determined as the internal winning combination in the internal lottery process, “1” is stored in bit 1 of the carryover combination storing area. Here, when the carryover combination is permitted over one or a plurality of games that a combination of symbols corresponding to the data pointer determined in the internal lottery process described later is allowed to be displayed along the winning line, the data pointer Is provided for the main CPU 31 to identify.

[Push order storage area]
FIG. 13 shows a pressing order storage area in which data indicating the order of stop operations is stored. For example, when the left stop button 7L is operated in the first stop operation, “1” is stored in bits 0 and 1. After that, when the middle stop button 7C is operated as the second stop operation, among the bits 0 and 1 storing “1”, bit 1 is updated to “0”, and bit 0 is set to “1”. Keep it.

[Operation stop button storage area]
FIG. 14 shows an operation stop button storage area in which data indicating stop buttons 7L, 7C, and 7R that have been pressed this time, so-called operation stop buttons, are stored. In the operation stop button storage area, data indicating stop buttons 7L, 7C, and 7R that are effective to be pressed, that is, so-called effective stop buttons are also stored. In the present embodiment, the main CPU 31 identifies the stop buttons 7L, 7C, and 7R that have been pressed this time based on the data stored in bits 0 to 2 of the operation stop button storage area. Further, the main CPU 31 identifies stop buttons 7L, 7C, and 7R that have not been pressed, based on data stored in bits 4 to 6 of the operation stop button storage area.

[RB lottery in RB]
FIG. 15 is a diagram for explaining the RB lottery in the RB. In this embodiment, when winning F_BB (BB), the BB game state flag is turned on, a BB operation process for setting 359 to the bonus end number counter is performed, and the state shifts to the BB general game state.

  Here, as shown in FIG. 16, BB is a first type BB (a combination of consecutive action devices) that wins by displaying white 7, white 7, and white 7 on the active line. Also, the payout number is set to “359”, and in the BB general gaming state, when the payout number exceeds 359, the BB ends. In other words, the upper limit of the number of medals to be paid out, which is a condition for completing the BB, is smaller than the number of medals to be paid out when the RB is repeated three times, and the medals to be paid out when the RB is repeated twice. It is defined more than the number of sheets. Then, during the BB general game, when winning “F_RB1” which is a role that makes the transition to RB1 (see FIGS. 7-6 and 7-7), the transition to “RB1” is made as the first RB.

  And as shown in FIG. 15, lottery of RB2 is performed in RB1. Specifically, in RB1, there is a possibility that “F_RB middle role 1 + RB2” and “F_RB middle role 2 + RB2”, which are the triggers for the transition to RB2, are lottery (see FIG. 7-8). When winning “F_RB middle combination 1 + RB2” and “F_RB middle combination 2 + RB2”, RB2 is stored in the carryover combination storage area as a carryover combination.

  Thereafter, in the game in RB1, RB1 ends when the RB end condition of 12 games or 8 wins is satisfied. During the RB, the payout is mainly awarded to 15 winning combinations (F_RB intermediate winning 1 and the like), so that a single RB wins 8 small winning combinations and 120 payouts are performed.

  Then, when RB2 is stored in the carryover combination storage area as a carryover combination, and "RB2" is won in the game after the end of RB1, the game proceeds to "RB2" as the second RB. And in RB2, lottery of RB3 is performed. Specifically, in RB2, there is a possibility that “F_RB middle combination 1 + RB3” and “F_RB middle combination 2 + RB3”, which will become a trigger for the transition to RB3, are lottery (see FIG. 7-9). When winning “F_RB middle combination 1 + RB3” and “F_RB middle combination 2 + RB3”, RB3 is stored as a carryover combination in the carryover combination storage area. Thereafter, in the game in RB2, RB2 ends when the RB end condition of 12 games or 8 wins is satisfied.

  Then, when RB3 is stored in the carryover combination storage area as a carryover combination, and "RB3" is won in the game after the end of RB2, the game proceeds to "RB3" as the third RB. And in RB3, lottery of RB3 or RB4 is performed. Specifically, in RB3, “F_RB middle role 1 + RB3”, “F_RB middle role 2 + RB3”, “F_RB middle role 1 + RB4”, and “F_RB middle role 2 + RB4”, which are time points for the transition to RB4. May be lottery (see FIGS. 7-10).

  Here, when “F_RB middle role 1 + RB4” and “F_RB middle role 2 + RB4”, which are the triggers for the transition to RB4, are won, a transition is made to RT2, which is a gaming state more advantageous to the player than RT1. Specifically, when “F_RB medium combination 1 + RB4” and “F_RB medium combination 2 + RB4” are won, the value of bit 4 corresponding to the RT2 game state in the game state flag storage area is updated to “1”. Here, in the present embodiment, it is assumed that the number of payouts exceeds 359 during RB3, the BB is terminated, and the state shifts to the general gaming state (RT2). That is, before satisfying 12 games or RB end condition, or 8 winnings, the BB end condition exceeds 359 payouts, so BB ends without moving to RB4. . And when it transfers to RT2, it is maintained also in the general game state after the end of BB. Even if RB1 to RB3 are established, there is no change in RT.

  In this way, RB4 can be lottery during RB3 game in BB, and if RB4 is won, the process proceeds to RT2, but BB satisfies the end condition before RB3 ends and BB Since the process ends, the symbols corresponding to “F_RB medium combination 1 + RB4” and “F_RB medium combination 2 + RB4”, which are triggers for the transition to RB4, are not displayed. For this reason, since it is possible to make it impossible to know whether RB4 is winning in RB3 in BB, it is possible to play a game with the expectation that it is controlled by RT2 even after the end of the BB game. .

  That is, in this embodiment, the upper limit number “359” of medals to be paid out in the BB is defined as the BB end condition so that the BB ends before the RB3 end condition is satisfied. And, in the general gaming state, when the symbol combination “white 7-white 7-white 7”, which becomes the BB transition opportunity, is displayed, control is performed to shift to BB, and during the BB general gaming, When a combination of symbols serving as a trigger for transition to RB3 is displayed, control is performed so as to transition to RB3. Then, for example, in RB3, when the winning combination relating to RB4 (F_RB intermediate combination 1 + RB4, F_RB intermediate combination 2 + RB4) is not internally won, control is performed so as to shift to RT1 after RB3 ends, and RB3 In the middle, when the winning combination relating to RB4 is internally won, control is performed so as to shift to RT2 after RB3 ends.

  In addition, as illustrated in FIG. 15, the first RB is “RB1”, the second RB is “RB2”, and the third RB is “RB3”, so that RB1 → RB2 → RB3. RB is moved to. In other words, during RB1, “F_RB middle role 1 + RB2” and “F_RB middle role 2 + RB2”, which are the triggers for the transition to RB2, can be lottered. During RB2, “F_RB middle role 1 + RB3”, which is the trigger for the transition to RB3, and “F_RB medium role 2 + RB3” can be lottery. In RB3, “F_RB middle combination 1 + RB4” and “F_RB middle combination 2 + RB4”, which are the triggers for the transition to RB4, can be lottery. As a result, the RB transitioning from RB1 to RB2 to RB3 is changed in stages, and in RB3, when “F_RB middle role 1 + RB4” or “F_RB middle role 2 + RB4” is internally won, the process proceeds to RT2 after RB3 ends. Transition.

[RT state transition]
FIG. 17 is a diagram illustrating a state transition of RT. RT1 is a relatively advantageous gaming state compared to RT0. Specifically, the probability that the internal lottery table for the general gaming state (RT1) shown in FIG. 7-2 wins the replay is slightly more than the internal lottery table for the general gaming state (RT0) shown in FIG. Is expensive. In the internal lottery table for the general gaming state (RT1), F_RT3 transition lip that transitions to RT3 when winning is defined to be winable.

  RT2 is an advantageous gaming state compared to RT1. Specifically, the internal lottery table for the general gaming state (RT2) shown in FIG. 7-3 has a higher probability of winning the replay than the internal lottery table for the general gaming state (RT1) shown in FIG. 7-2. high. In the internal lottery table for the general gaming state (RT2), the probability that the F_RT3 transition lip is won is defined to be high.

  RT3 is an advantageous gaming state compared to RT2. Specifically, the internal lottery table for the general gaming state (RT3) shown in FIG. 7-4 has a higher probability of winning the replay than the internal lottery table for the general gaming state (RT2) shown in FIG. 7-3. high. In addition, during RT3, when a small combination wins internally, information for winning the small combination may be notified. For example, as information for winning a small role, the pressing order of the stop buttons 7L, 7C, 7R may be notified, or the timing of pressing the stop buttons 7L, 7C, 7R may be notified.

  RT0 is a gaming state to be transferred when the setting is changed or when the RT0 transfer replay wins. Also, at RT0, when BB (F_BB) wins internally (described as “BB established” in FIG. 17), the process proceeds to RT1.

  RT1 transitions after BB (F_BB) after internal winning in RT0 and between BB flags before BB wins, or after BB ended without RB4 winning in RB3 in BB It is a gaming state to play. In RT1, when RB4 is internally won, the process proceeds to RT2, and when the RT3 transition replay is won, the process proceeds to RT3.

  RT2 is a gaming state to which a transition is made when RB4 wins an internal game in RB3 in BB. In RT1, when RB4 is internally won, the process proceeds to RT2, and when the RT3 transition replay (F_RT3 transition replay) is won, the process proceeds to RT3. In RT2, when BB wins internally, the process proceeds to RT1, and when the RT3 transition replay is won, the process proceeds to RT3.

  RT3 is a gaming state to be transferred when winning the RT3 transfer replay. Further, in RT3, when BB wins internally, the process proceeds to RT1. In addition, when “200” games, which is the specified number of times, are performed in the state of RT3, the process proceeds to RT0. Note that the method for managing the duration of RT3 is not limited to the number of games. For example, the number of navigations (for example, 100 times), which is the number of times for notifying information for winning a small role, continues RT3. The period may be managed, or the duration of RT3 may be managed by a difference number (for example, 200) which is a difference between the total number of inserted medals and the total number of paid out medals.

  As described above, in this embodiment, the general gaming state further includes RT3 in which the winning probability of the re-gamer is higher than RT2, and the predetermined number of games “200” is defined. ing. When a combination of symbols that triggers the transition of RT3 is displayed in RT2, control is performed so as to transition to RT3, and “200” games that are a predetermined number of games are executed in RT3. If so, control is made to shift to RT1.

  In this way, after BB is finished, the game number shifts from RT2 to RT3, which has a finite number of high RTs. Therefore, all the high RT game numbers can be executed until the specified number of games is consumed. It is possible to provide an advantageous game. In other words, if the BB shifts to a high RT during the BB without waiting for the BB to end, the high RT digested during the BB may be wasted. By controlling to shift to high RT, it is possible to provide a game advantageous to the player.

[Program flow executed in pachislot]
Next, the contents of a program executed by the main CPU 31 of the main control circuit 71 will be described with reference to FIGS.

[Main flowchart by control of main CPU of main control circuit]
With reference to FIG. 18, the main flowchart which showed the main processes which the main CPU31 performs is demonstrated.

  First, when the power is turned on, the main CPU 31 performs a power-on process which will be described in detail later with reference to FIG. 19 (step S1). In this process, the main CPU 31 determines whether or not the backup is normal and whether or not the setting has been appropriately changed, and performs an initialization process according to the determination result.

  Subsequently, the main CPU 31 erases the initialization process at the end of one game, that is, the information in a predetermined storage area of the main RAM 33 at the end of the unit game (step S2). For example, the main CPU 31 clears data stored in an internal winning combination storage area, a display combination storage area, or the like.

  Then, the main CPU 31 performs a medal acceptance / start check process which will be described later with reference to FIG. 20 (step S3).

  Next, the main CPU 31 extracts random number values 1 to 3 for lottery and stores them in the random value storage area (step S4). The random number for lottery extracted in the process of step S4 is used in the internal lottery process (FIG. 21 described later). Here, the random value 1 is a value from 0 to 65535 used for the internal lottery process, and the random number values 2 and 3 are values used for other lottery processes. The random value 2 and the random value 3 may be separately extracted only when it is necessary to be used for lottery.

  Subsequently, the main CPU 31 performs an internal lottery process which will be described later with reference to FIG. 21 (step S5). In this process, the main CPU 31 determines an internal winning combination. Next, based on the result of the internal lottery process, the main CPU 31 performs a reel stop initial setting process (detailed later with reference to FIG. 23) for storing each piece of information related to the reel stop control (step S6). In this process, the main CPU 31 sets various data used for stopping the reels 3L, 3C, 3R.

  Next, the main CPU 31 generates start command data and stores it in the communication data storage area of the main RAM 33 (step S7). The start command includes information such as a gaming state and an internal winning combination, and is transmitted to the sub-control circuit 72 in the interrupt process. Thereby, the sub-control circuit 72 can produce an effect according to the start operation.

  Subsequently, the main CPU 31 performs a wait process (step S8). In this process, the main CPU 31 stands by until a predetermined time (for example, 4.1 seconds) elapses from the start of the previous game. Subsequently, the main CPU 31 performs a reel rotation start process for requesting the rotation start of all reels (step S9). In this process, the main CPU 31 requests the start of rotation of the reels 3L, 3C, 3R and stores a reel rotation start command in the communication data storage area of the main RAM 33.

  Then, the main CPU 31 generates reel rotation start command data and stores it in the communication data storage area (step S10). In this process, the drawing priority order is stored for each symbol on the rotating reel based on the internal winning combination.

  Then, the main CPU 31 performs a pull-in priority storage process that will be described in detail later with reference to FIG. 25 (step S11). In this process, on the basis of the result of the internal lottery process, for each symbol position of the rotating reel, when the stop is permitted, the drawing priority data is stored, and when the stop is not permitted (that is, In the case where a winning combination is won, the suspension prohibition is stored.

  Next, the main CPU 31 performs a reel stop control process which will be described in detail later with reference to FIG. 27 (step S12). In this process, the rotation of the corresponding reel is stopped based on the timing when the left stop button 7L, the middle stop button 7C, and the right stop button 7R are respectively pressed and the internal winning combination.

  Subsequently, the main CPU 31 performs a winning search process (step S13). In this process, the main CPU 31 compares the symbol combination displayed along the effective line with the symbol combination table after the reels 3L, 3C, 3R are stopped, determines the symbol combination displayed on the effective line, and displays the display combination. Is determined and stored in the display combination storing area, and the number of medals to be paid out is determined. If the main CPU 31 determines that the replay combination has won, it makes an automatic insertion request for copying the value of the insertion number counter to the automatic insertion number counter. For example, when the main CPU 31 determines that the RT3 transition replay has been won, it makes an automatic insertion request and updates the value of bit 5 corresponding to the RT3 gaming state in the gaming state flag storage area to “1”. To do. The automatic insertion number counter is a counter provided for the main CPU 31 to count the number of medals to be automatically inserted, and the insertion number counter is for the main CPU 31 to count the number of medals inserted. This is a counter provided. The automatic insertion number counter and the insertion number counter are stored in predetermined areas of the main RAM 33.

  Next, the main CPU 31 pays out medals based on the payout number of medals determined in step S13 (step S14). Thereafter, the main CPU 31 generates winning action command data and stores it in the communication data storage area (step S15).

  Subsequently, the main CPU 31 performs a bonus end check process which will be described later with reference to FIG. 29 (step S16). In this process, the main CPU 31 ends the operation of the bonus game when a condition for ending the bonus game is satisfied. Subsequently, the main CPU 31 performs a bonus operation check process which will be described later with reference to FIG. 30 (step S17), and then performs a process of step S2. In this process, the main CPU 31 starts operation of the bonus game when the conditions for starting the bonus game are satisfied, and operates the regame when the conditions for replay are satisfied.

[Power-on processing]
With reference to FIG. 19, a power-on process showing a processing procedure of the main CPU 31 at the time of power-on will be described.

  First, the main CPU 31 determines whether or not backup is normal (step S21). As a result, when the backup is normal, the main CPU 31 sets the backed-up setting value (step S22), and proceeds to step S23. If the backup is not normal, the main CPU 31 proceeds directly to step S23.

  Then, the main CPU 31 determines whether or not the setting change switch is on (step S23). As a result, when the setting change switch is on, the main CPU 31 performs initialization processing at the time of setting change (step S24). Then, the main CPU 31 generates an initialization command and stores it in the communication data storage area (step S25).

  Then, the main CPU 31 performs a setting value changing process (step S26). Specifically, the main CPU 31 selects a set value from 1 to 6 by operating the reset switch, and confirms the set value by operating the start switch 14S.

  Subsequently, the main CPU 31 determines whether or not the setting change switch is on (step S27). As a result, when the setting change switch is turned off, the main CPU 31 extracts the random value 3 and stores it in the random value storage area (step S28). Thereafter, the main CPU 31 generates initialization command data, stores it in the communication data storage area (step S29), and ends the power-on process.

  Returning to the description of step S23, if the setting change switch is not on, the main CPU 31 determines whether or not the backup is normal (step S30). As a result, when the backup is normal, the main CPU 31 returns to the state before the power interruption based on the backup data (step S31), and ends the power-on process. If the backup is not normal, the main CPU 31 performs power-on error processing (step S32), and ends the power-on processing. In the case of a backup error, the error is released only when a setting change is newly made without the error being released by operating the stop release switch or the reset switch.

[Medal reception / start check processing]
With reference to FIG. 20, the medal acceptance / start check process will be described which shows the procedure of the process in which the main CPU 31 determines whether or not the start operation is possible based on the number of inserted sheets.

  First, the main CPU 31 determines whether or not there is an automatic insertion request, that is, whether or not a replay is won in the previous game (step S41). At this time, if there is an automatic loading request, the main CPU 31 performs an automatic loading process for copying the value of the automatic loading counter to the loading number counter and clearing the automatic loading counter (step S42). Then, the main CPU 31 performs medal insertion command transmission processing (step S43), and proceeds to step S45.

  If there is no automatic insertion request in step S41, the main CPU 31 permits the reception of medals (step S44), and then performs the process of step S45. In step S45, the main CPU 31 sets the maximum number of inserted sheets according to the gaming state. In this embodiment, the main CPU 31 sets the maximum number of inserted sheets as “3”.

  Subsequently, the main CPU 31 determines whether or not medal acceptance is permitted (step S46). As a result, when the medal acceptance is permitted, the main CPU 31 subsequently performs the process of step S47, and when the medal acceptance is not permitted, the main CPU 31 subsequently performs the process of step S51. .

  In step S47, the main CPU 31 performs medal insertion check processing. In this process, the main CPU 31 checks the input from the medal sensor 42S. Subsequently, the main CPU 31 performs medal insertion command transmission processing (step S48). In this process, the main CPU 31 stores a medal insertion command in the communication data storage area of the main RAM 33. The stored medal insertion command is transmitted to the sub control circuit 72 in a command data transmission process of an interrupt process described later.

  Subsequently, the main CPU 31 determines whether or not medals can be inserted or credited (step S49). As a result, if the medal can be inserted or credited, the main CPU 31 proceeds to step S51. In addition, when the medal insertion or credit is not possible, the main CPU 31 prohibits the reception of medals (step S50).

  Subsequently, the main CPU 31 determines whether or not the inserted number is a game start possible number (step S51). For example, the main CPU 31 determines whether or not the value of the inserted number counter is the maximum value of the inserted number. At this time, if the value of the inserted number counter is the maximum value of the inserted number, the main CPU 31 subsequently performs the process of step S52. If not, the main CPU 31 continues to step S46. Perform the process.

  In step S52, the main CPU 31 determines whether or not the start switch 14S is on. Specifically, the main CPU 31 determines whether there is an input from the start switch 14 </ b> S based on the operation of the start lever 6. At this time, if there is an input from the start switch 14S, the main CPU 31 prohibits medal acceptance (step S53) and ends the medal acceptance / start check processing. On the other hand, when there is no input from the start switch 14S, the main CPU 31 subsequently performs the process of step S46.

[Internal lottery processing]
With reference to FIG. 21, an internal lottery process showing a procedure of a process in which the main CPU 31 determines an internal winning combination based on a random number value, a gaming state and the like will be described.

  First, the main CPU 31 sets an internal lottery table corresponding to the gaming state (step S61). Subsequently, the main CPU 31 obtains a random number value stored in the random value storage area (step S62).

  Next, the main CPU 31 refers to the internal lottery table, acquires a lottery value corresponding to the winning number, and subtracts the lottery value from the random number value (step S63). Subsequently, the main CPU 31 determines whether or not the subtraction result is less than “0” (negative) (step S64). At this time, if the subtraction result is negative, the main CPU 31 obtains the small role / replay data pointer and the bonus data pointer corresponding to the winning number (step S68), and then performs the processing of step 69. Do. On the other hand, if the subtraction result is not negative, the main CPU 31 subsequently performs the process of step S65.

  In step S65, the main CPU 31 updates the random number and updates the winning number. Specifically, the main CPU 31 updates the random number value to the value after subtraction in step S63 and updates it to the winning number that has not been checked yet. Subsequently, the main CPU 31 determines whether or not all winning numbers have been checked (step S66). At this time, if all winning numbers are checked, the main CPU 31 sets “0” in the data pointer (step S67), and proceeds to step S69. On the other hand, if all the winning numbers are not checked, the main CPU 31 proceeds to step S63.

  In step S69, the main CPU 31 refers to the small winning combination / replay internal winning combination determination table and acquires the internal winning combination based on the small winning combination / replay data pointer. Subsequently, the main CPU 31 stores it in the internal winning combination storing area corresponding to the acquired internal winning combination (step S70).

  Subsequently, the main CPU 31 determines whether the carryover combination storage area is “0” (step S71). As a result, when the carryover combination storing area is “0”, the internal winning combination determination table for bonus is referred to, and the internal winning combination is acquired based on the bonus data pointer (step S72).

  Subsequently, the main CPU 31 stores it in the carryover combination storage area corresponding to the acquired internal winning combination (step S73), and proceeds to step S74. On the other hand, if the carryover combination storage area is not “0”, the main CPU 31 proceeds to step S74. In step S74, the internal winning combination storing area is updated based on the internal winning combination stored in the carryover combination storing area (step S74), and the RT lottery process at the time of internal lottery processing described later with reference to FIG. 22 is performed. (Step S75), and the internal lottery process ends.

[RT transfer process during internal lottery process]
Next, with reference to FIG. 22, when the carryover combination is RB4 or BB, the RT lottery process during the internal lottery process for shifting to RT2 or RT1 will be described.

  First, the main CPU 31 determines whether or not the carryover combination is RB4 (step S81). As a result, when the carryover combination is RB4, the main CPU 31 updates the gaming state to RT2 (step S82) and ends the RT lottery process during the internal lottery process.

  When the carryover combination is not RB4, the main CPU 31 determines whether or not the carryover combination is BB (step S83). As a result, when the carryover combination is BB, the main CPU 31 updates the gaming state to RT1 (step S84) and ends the RT lottery process during the internal lottery process. If the carryover combination is not BB, the RT lottery process during the internal lottery process is terminated.

[Reel stop initial setting process]
With reference to FIG. 23, a description will be given of the reel stop initial setting process in which the main CPU 31 shows the procedure of the process of storing each piece of information related to the reel stop control based on the result of the internal lottery process.

  First, the main CPU 31 sets the same value as the small role / replay data pointer as the rotation stop number (step S91). In this process, the rotation stop number selection table is referred to, and the rotation stop number is selected according to the winning number (the winning combination of the small role / replay) and the gaming state. The spinning cylinder stop number selection table is a table in which various information used for stop control is defined in association with the spinning cylinder stop number corresponding to the data pointer.

  Subsequently, the main CPU 31 refers to the reel stop initial setting table, and acquires each piece of information based on the rotation stop number (step S92). For example, the main CPU 31 acquires the pull-in priority table number and the like. For example, the number of the stop table used at the time of the first to third stops and information necessary for performing the control change in the control change process (that is, when the reels are stopped in a specific order (stop at a specific position ( Or the information used for reselecting the stop table when it is pressed).

  Note that the stop table stores information on the number of sliding pieces with respect to the pressed position directly or indirectly. Using this information, there is no disadvantage to the player and an erroneous winning is generated. It is configured to stop at the stop position intended by the developer as long as it is not allowed.

  Then, the main CPU 31 stores the rotating identifier in the symbol code storage area (step S93). That is, the main CPU 31 turns on the bits of all symbol code storage areas (excluding unused areas). Thereafter, the main CPU 31 stores 3 in the stop button non-operation counter (step S94), and ends the reel stop initial setting process. The stop button non-operating counter is used to determine the number of stop buttons 7L, 7C, 7R that are not stopped by the player, and is stored in a predetermined area of the main RAM 33.

[Retrieve priority storage processing]
Referring to FIG. 24, in accordance with the result of the internal lottery process, when the stop is permitted for each symbol position of each rotating reel, the drawing priority data is stored, and when the stop is not permitted. (In other words, in the case where a winning combination is won, etc.), a drawing priority order storing process showing a procedure for storing stop prohibition will be described.

  First, the main CPU 31 stores the value of the stop button non-operating counter as the number of searches (step S101). Subsequently, the main CPU 31 performs a search target reel determination process (step S102). In this process, the reels to be searched are determined in order from the reel on the left side of the rotating reels 3L, 3C, and 3R.

  Next, the main CPU 31 performs a pull-in priority table selection process (see FIG. 25) (step S103). Subsequently, the main CPU 31 sets “21” as the number of symbol checks and “0” as the search symbol position (step S104). Next, the main CPU 31 performs a symbol code storing process which will be described later with reference to FIG. 26 (step S105).

  Next, the main CPU 31 updates the display combination storing area based on the symbol code acquired in step S105 and the symbol code storing area (step S106). Subsequently, the main CPU 31 performs a pull-in priority data acquisition process (step S107). In this process, the main CPU 31 plays the role corresponding to the bit storing “1” in the display combination storing area, and corresponding to the bit storing “1” in the internal winning combination storing area. Referring to the pull-in priority table selected in step S113, pull-in priority data is acquired.

  Next, the main CPU 31 stores the acquired drawing priority data in the drawing priority data storage area corresponding to the search target reel (step S108). Subsequently, the main CPU 31 subtracts “1” from the number of symbol checks and adds “1” to the search symbol position (step S109).

  Next, the main CPU 31 determines whether or not the number of symbol checks is “0” (step S110). When the determination is YES, the main CPU 31 performs the process of step S111, and when the determination is NO, the main CPU 31 performs the process of step S105. In this process, it is determined whether all searches for symbol positions “0” to “20” have been performed. In step S111, the main CPU 31 determines whether or not retrieval has been performed for the number of retrieval times. When this determination is YES, the main CPU 31 ends the pull-in priority order storage process, and when NO, performs the process of step 102. In this process, it is determined whether or not a search has been performed for all reels.

[Pull-in priority table selection processing]
With reference to FIG. 25, a description will be given of a pull-in priority table selection process for selecting a pull-in priority table for selecting a pull-in priority.

  First, the main CPU 31 determines whether or not a pull-in priority table selection table number is set (step S121). As a result of this determination, when the pull-in priority table selection table number is set, the main CPU 31 performs the process of step 122. When the pull-in priority table selection table number is not set, the main CPU 31 Step 123 is processed.

  In step S122, the main CPU 31 refers to the pressing order storage area and the operation stop button storage area, sets the corresponding drawing priority table number from the drawing priority table selection table, and ends the drawing priority table selection process.

  In step S123, the main CPU 31 sets a drawing priority table corresponding to the drawing priority table number, and ends the drawing priority table selection process.

[Design code storage processing]
With reference to FIG. 26, the symbol code storing process for acquiring the symbol code based on the set retrieved symbol position will be described.

  First, the main CPU 31 sets valid line data (step S131). Then, the main CPU 31 sets the symbol position data for checking the search target reel based on the search symbol position and the effective line data (step S132). For example, in the case of the left reel, the upper and lower symbol positions are set as check symbol position data. Subsequently, the main CPU 31 acquires the symbol code of the symbol position data for checking (step S133), and ends the symbol code storage process.

[Reel stop control process]
With reference to FIG. 27, the reel stop control process in which the main CPU 31 stops the rotation of the reels 3L, 3C, 3R based on the internal winning combination or the timing of the stop operation by the player will be described.

  First, the main CPU 31 determines whether or not the valid stop buttons 7L, 7C, and 7R have been pressed (step S141). At this time, if valid stop buttons 7L, 7C, and 7R are pressed, the main CPU 31 subsequently performs the process of step S142. On the other hand, when the effective stop buttons 7L, 7C, and 7R are not pressed, the main CPU 31 performs the process of step S141 again.

  In step S142, the main CPU 31 updates the pressing order storage area and the operation stop button storage area. Subsequently, the main CPU 31 subtracts “1” from the value of the stop button non-operating counter (step S143). Subsequently, the main CPU 31 determines a search target reel from the operation stop button (step S144).

  Subsequently, the main CPU 31 stores the stop start position based on the symbol counter (step S145). Then, the main CPU 31 performs a sliding piece number determination process (step S146). In this process, the main CPU 31 refers to the stop table to determine the number of sliding piece determination data determined for the stop start position. Subsequently, the main CPU 31 performs a priority pull-in control process which will be described in detail later with reference to FIG. 28 (step S147). In this process, the main CPU 31 performs a process of setting the number of sliding pieces according to the reel pressing position and the like.

  Next, the main CPU 31 generates reel stop command data and stores it in the communication data storage area (step S148). The reel stop command data includes information on the operation stop button and the like, and is transmitted to the sub control circuit 72 in a command data transmission process of an interrupt process described later. Thereby, the sub control circuit 72 can produce an effect according to the stop operation.

  Subsequently, the main CPU 31 determines and stores a scheduled stop position of the search target reel based on the stop start position and the number of sliding pieces (step S149). Subsequently, the main CPU 31 sets the planned stop position as the search symbol position (step S150), and performs the symbol code storage process described in FIG. 26 (step S151). Then, the main CPU 31 updates the symbol code storage area from the symbol code acquired in step S133 (step S152).

  Subsequently, the main CPU 31 performs a control change process for updating the reel stop control information group when the stop position is a specific stop position (step S153). Next, the main CPU 31 determines whether or not the value of the stop button non-operating counter is “0” (step S154). At this time, if the value of the stop button non-operation counter is not “0” (not at the time of the third stop), the main CPU 31 performs the pull-in priority storage process described with reference to FIG. 24 (step S155). Then, the process of step S141 is performed.

  That is, in the pachi-slot 1, before the process of stopping the rotation of the next reel 3L, 3C, 3R is performed, the process of storing the drawing priority data for each symbol position of the reels 3L, 3C, 3R still rotating Is done. On the other hand, when the value of the stop button non-operating counter is “0”, the main CPU 31 determines that the stop control at the time of the third stop has ended, and ends the reel stop control process.

[Priority pull-in control processing]
With reference to FIG. 28, the priority attraction-in control process showing the procedure of the process in which the main CPU 31 determines the number of sliding symbols will be described.

  First, the main CPU 31 sets a pull-in priority data storage area corresponding to the operation stop button (step S161). Subsequently, the main CPU 31 acquires a stop start position (step S162).

  Then, the main CPU 31 sets a priority order table corresponding to the sliding piece number determination data (step S163). For example, if the number of sliding symbols determined by the stop table (stop data table) is 4, a row (address) in which the number of sliding symbols determination data in the priority order table is 4 is set. Then, the main CPU 31 performs processing for setting 5 as the initial value of the priority order and the number of checks (step S164), that is, information for searching for 5 times of 0 to 4 frames.

  Next, the main CPU 31 sets the sliding piece number determination data as the number of sliding pieces (step S165). Subsequently, the main CPU 31 extracts a stop search position based on the stop start position and the priority order (step S166). Next, the main CPU 31 acquires pull-in priority order data of the stop search position (step S167).

  Subsequently, the main CPU 31 determines whether or not it is equal to or higher than the previously acquired pull-in priority data (step S168). At this time, if it is equal to or more than the previously acquired priority pull-in order data, the main CPU 31 updates the number of sliding frames (step S169), and then performs the process of step S170. On the other hand, if it is less than the previously acquired priority pull-in order data, the main CPU 31 subsequently performs the process of step S170.

  In step S170, the main CPU 31 subtracts “1” from the priority order and the number of checks. Subsequently, the main CPU 31 determines whether or not the number of checks is “0” (step S171). At this time, if the number of checks is “0”, the main CPU 31 sets the updated number of sliding frames (step S172) and ends the priority pull-in control process. On the other hand, if the number of checks is not “0”, the main CPU 31 subsequently performs the process of step S166.

[Bonus end check process]
With reference to FIG. 29, a bonus end check process will be described which shows a procedure of a process for ending the operation of the bonus game when the main CPU 31 satisfies a condition for ending the bonus game.

  First, the main CPU 31 determines whether or not the BB general game is in progress or the RB operation is being performed during the BB, that is, whether or not the BB gaming state flag or the RB gaming state flag is on. (Step S180). As a result, when the BB is operating, the main CPU 31 performs the process of step S181. When the BB is not operating, the main CPU 31 ends the bonus end check process.

  In step S181, the main CPU 31 determines whether or not the value of the bonus end number counter is smaller than “0”. As a result, if the value of the bonus end number counter is not smaller than “0”, the main CPU 31 proceeds to step S185. Here, the value of the bonus end number counter is “359”.

  Further, when the value of the bonus end number counter is smaller than “0”, the main CPU 31 performs a BB end process for turning off the BB gaming state flag (step S182). Here, even during the BB general game or RB, if the value of the bonus end number counter is smaller than “0”, the process ends. Even when the BB end process is performed, the RT state is carried over, and in the general gaming state after the end of the BB, the game is played in the carried over RT state.

  Then, the main CPU 31 performs a bonus end command transmission process for transmitting bonus end command data to the sub-control circuit 72 (step S183), performs a bonus end initialization process (step S184), and performs a bonus end check. The process ends.

  In step S185, the main CPU 31 determines whether or not the RB operation is in progress. As a result, when the RB operation is not being performed during BB, the bonus end check process is ended. Further, when the RB operation is being performed during BB, the main CPU 31 determines whether or not the RB termination condition is satisfied (step S186). Here, the RB end condition is 12 games or 8 wins.

  As a result, when the RB termination condition is satisfied, the main CPU 31 performs an RB termination process for turning off the RB gaming state flag (step S187), and terminates the bonus termination check process. If the RB termination condition is not satisfied, the bonus termination check process is terminated.

[Bonus activation check process]
Next, the bonus operation check process will be described with reference to the flowchart shown in FIG. First, the main CPU 31 determines whether or not BB is won (step S191). As a result, when the main CPU 31 determines that the BB has been won, the main CPU 31 performs a BB operation process of turning on the BB gaming state flag and setting 359 in the bonus end number counter (step S192).

  Subsequently, the main CPU 31 clears the value of the carryover combination storage area (step S193). Then, the main CPU 31 performs a bonus start command transmission process for transmitting a bonus start command to the sub-control circuit 72 (step S194), and ends the bonus operation check process.

  When determining that the BB has not won, the main CPU 31 determines whether or not any of the RBs 1 to 4 has been won (step S195). As a result, if any of the RBs 1 to 4 is won, the main CPU 31 performs an RB operation process for turning on the RB gaming state flag (step S196), and clears the value of the carryover combination storage area (step S196). S197), the bonus operation check process is terminated.

  On the other hand, if any of the RBs 1 to 4 is not won, the main CPU 31 determines whether or not a replay is won (step S198). If the replay has not been won, the bonus operation check process is terminated. On the other hand, when winning the replay, the main CPU 31 makes an automatic insertion request for copying the value of the insertion number counter to the automatic insertion number counter (step S199), and ends the bonus operation check process.

[Interrupt processing under the control of the main CPU (1.1172 msec)]
With reference to FIG. 31, an interrupt process by the control of the main CPU 31 showing a procedure of an interrupt process executed by the main CPU 31 every predetermined time (for example, 1.1172 ms) will be described.

  First, the main CPU 31 saves the register (step S201). Subsequently, the main CPU 31 performs input port check processing (step S202). In this process, the main CPU 31 confirms the presence / absence of a signal transmitted to the microcomputer 30. For example, the main CPU 31 stores the on-edge and off-edge of the start switch 14S, the stop switch 7S, etc. for each interrupt process. Further, the main CPU 31 stores an input state command including information on the on-edge and off-edge of various switches in the communication data storage area of the main RAM 33. The stored input state command is transmitted to the sub-control circuit 72 in a communication data transmission process of an interrupt process described later. Accordingly, various effects can be executed using the operation means such as the start lever 6 and the stop buttons 7L, 7C, and 7R.

  Subsequently, the main CPU 31 performs a timer update process (step S203). Next, the main CPU 31 performs an effect timer update process (step S204). Subsequently, the main CPU 31 performs a reel control process (step S205). For example, the main CPU 31 controls the rotation of the reels 3L, 3C, 3R. More specifically, the main CPU 31 starts the rotation of the reels 3L, 3C, and 3R in response to a request for starting the rotation of the reels 3L, 3C, and 3R, that is, in response to the start operation. Control is performed so that 3L, 3C, and 3R rotate. Further, in accordance with the stop operation, control is performed so that the rotation of the reels 3L, 3C, 3R corresponding to the stop operation stops.

  Subsequently, the main CPU 31 performs a lamp / 7SEG drive process (step S206). For example, the main CPU 31 displays the number of credited medals, the number of payouts, etc. on various display units. Subsequently, the main CPU 31 restores the register (step S207), and terminates the interrupt processing that occurs periodically.

[Input port check processing]
The input port check process will be described with reference to FIG. As shown in FIG. 32, the main CPU 31 checks the state of each input port (step S211), and stores the state of the input port before one interrupt (step S212). Then, the main CPU 31 stores the current input port state (step S213). In this way, by storing the state of the input port before one interrupt and the current state of the input port so that the state of both input ports can be confirmed, whether the state of the input port has changed (for example, For example, the bet button 11 is pressed).

  Subsequently, the main CPU 31 stores the on-edge state (step S214). Here, the on-edge means a state where the button is kept pressed, and the off-edge means a state where the button is released. Then, the main CPU 31 performs input state command transmission processing (step S215), and ends the input port check processing. In this process, the stored state of the input port and the like are transmitted to the sub control circuit 72. Accordingly, various effects can be executed using the operation means such as the start lever 6 and the stop buttons 7L, 7C, and 7R.

[Program flow executed by sub CPU of sub control board]
Next, the contents of the program executed by the sub CPU of the sub control circuit 72 will be described with reference to FIGS. Here, the CPU of the image control microcomputer 81 and the CPU of the sound / lamp control microcomputer 111 shown in FIG.

  First, the sub CPU performs initialization processing (step S301), and proceeds to step S302. In this process, the sub CPU performs an error check of the work RAM 84 and the like and initializes the task system. The task system includes a lamp control task that is a task group for timer interrupt synchronization, a sound control task, and a mother task that is a task group for VSYNC (Vertical Synchronization) interrupt synchronization.

  In step S302, a lamp control task is activated, and the process proceeds to step S303. The lamp control task will be described later with reference to FIG. 34, but it waits for the sub CPU to receive a timer interrupt event message transmitted every 2 ms to the sub CPU. In response to the reception by the CPU, the sub CPU performs processing for controlling lighting states of various lamps.

  In step S303, the sound control task is activated, and the process proceeds to step S304. The sound control task will be described later with reference to FIG. 35, but the sub CPU performs a process of controlling the sound output state from the speakers 9L and 9R.

  In step S304, the mother task is activated and the process is terminated. The mother task will be described later with reference to FIG. 36, and is a task group for VSYNC (vertical synchronization signal) interrupt synchronization. When the liquid crystal display device 5 displays one frame of video, the liquid crystal display device 5 The vertical sync signal (VSYNC interrupt signal) sent from

[Ramp control task]
The lamp control task will be described with reference to FIG. First, the sub CPU performs timer interrupt initialization processing (step S311), and proceeds to step S312. In step S312, the sub CPU performs lamp related data initialization processing (step S312), and proceeds to step S313. In step S313, a 2 ms event wait is performed, and the process proceeds to step S314. In this process, the sub CPU executes a task group different from the timer interrupt synchronization until the sub CPU receives a timer interrupt event message every 2 ms. As a task group different from timer interrupt synchronization, for example, a main board communication task which is a task group for command reception interrupt synchronization can be cited. Moreover, although illustration is abbreviate | omitted, the task group of power supply interruption synchronization and the task group of door monitoring unit communication synchronization are mentioned.

  In step S314, a sound control task execution process which will be described later with reference to FIG. 35 is performed, and the flow proceeds to step S315. In this process, the task in the next priority of the timer interrupt synchronization task group which is the same group as the lamp control task is executed. Here, the priority order of the task group for timer interrupt synchronization is basically the order of the lamp control task and the sound control task. Therefore, in step S314, the sound control task at the next priority of the lamp control task is executed. In step S314, among the sound control tasks described with reference to FIG. 35 described later, the processes in steps S323 and S324 are performed.

  In step S315, the sub CPU performs lamp data analysis processing, and proceeds to step S316. In step S316, a lamp effect execution process is performed, and the process proceeds to step S313.

Sound control task
The sound control task will be described with reference to FIG. First, the sub CPU initializes sound-related data related to the sound output state from the speakers 9L and 9R (step S321), and proceeds to step S322. In step S322, the task in the next priority of the task group for timer interrupt synchronization that is the same group as the sound control task, that is, the lamp control task is executed, and the process proceeds to step S323. In step S322, the processes of steps S315 and S316 are performed in the sub reel control task.

  In step S323, sound data analysis processing is performed, and the flow proceeds to step S324. In step S324, a sound effect execution process is performed, and the process proceeds to step S322.

[Mother Task]
A mother task will be described with reference to FIG. First, the sub CPU activates the main task (step S331), and proceeds to step S332. In step S332, the main board communication task is activated and the process is terminated.

[Main board communication task]
The main board communication task performed by the sub CPU will be described with reference to FIG. First, the sub CPU initializes the communication messenger queue (step S341), and proceeds to step S342. In step S342, the received command is checked, and the process proceeds to step S343. In step S343, it is determined whether a command different from the previous command is received. When this determination is YES, the process proceeds to step S344, and when this determination is NO, the process proceeds to step S342.

  In step S344, game information such as an internal winning combination, gaming state, setting value, RT game number counter value and the like is created and stored from the parameters of the received command, and the process proceeds to step S345. In step S345, command analysis processing described later with reference to FIG. 38 is performed, and the flow proceeds to step S342.

[Command analysis processing]
A command analysis process performed by the sub CPU will be described with reference to FIG. First, the sub CPU performs an effect content determination process which will be described later with reference to FIG. 39 (step S351), and proceeds to step S352.

  In step S352, lamp data determination processing is performed, and the process proceeds to step S353. In step S353, sound data determination processing is performed, and the process proceeds to step S354. In step S354, each determined data is registered, and the command analysis process is terminated.

[Production content decision processing]
With reference to FIG. 39, the effect content determination process performed by the sub CPU will be described. First, the sub CPU determines whether or not the initialization command is received (step S361). If the initialization command is received, the sub CPU performs the initialization command reception process (step S362) and ends the effect content determination process. In this process, for example, setting value information is acquired. In addition, the type of stage for staying in the initial state is determined.

  On the other hand, if the initialization command is not received, the sub CPU subsequently determines whether or not it is a medal insertion command reception (step S363). When the medal insertion command is received, the sub CPU performs a medal insertion command reception process (step S364) and ends the effect content determination process. In this process, for example, information on the presence / absence of medals and the values of the inserted number counter and the credit counter are acquired.

  On the other hand, if it is not at the time of receiving the medal insertion command, the sub CPU subsequently determines whether or not it is at the time of receiving the start command (step S365). If the start command is received, the sub CPU performs a start command reception process (step S366) and ends the effect content determination process. In this process, for example, the type of game state flag, the value of the bonus end number counter, the type of internal winning combination, the type of flag related to locking, the value of the effect timer, etc. are transmitted.

  On the other hand, if it is not at the time of receiving the start command, the sub CPU subsequently determines whether or not it is at the time of receiving the reel rotation start command (step S367). If it is time to receive a reel rotation start command, the sub CPU performs a reel rotation start command reception process (step S368), and ends the effect content determination process. In this process, for example, an effect accompanying the rotation of the reels 3L, 3C, 3R is performed.

  On the other hand, if it is not at the time of receiving the reel rotation start command, the sub CPU subsequently determines whether or not it is at the time of receiving the reel stop command (step S369). When it is time to receive a reel stop command, the sub CPU performs a reel stop command reception process (step S370), and ends the effect content determination process. In this process, for example, an effect corresponding to the stop operation is performed.

  On the other hand, if it is not at the time of receiving the reel stop command, the sub CPU subsequently determines whether or not it is at the time of receiving a winning action command (step S371). When it is time to receive a winning action command, the sub CPU performs a process when receiving a winning action command (step S372), and ends the effect content determination process. In this process, for example, the type of display combination, a flag relating to lock, etc., and the number of medals to be paid out are transmitted.

  On the other hand, if the display command is not received, the sub CPU subsequently determines whether or not it is a bonus start command reception (step S373). When it is time to receive a bonus start command, the sub CPU performs a bonus start command reception process (step S374) and ends the effect content determination process. In this process, for example, an effect for starting the bonus is performed.

  On the other hand, if it is not at the time of receiving the bonus start command, the sub CPU subsequently determines whether or not it is at the time of receiving the bonus end command (step S375). If it is time to receive a bonus end command, the sub CPU performs a bonus end command reception process (step S376), and ends the effect content determination process. In this process, for example, an effect at the end of the bonus is performed.

  On the other hand, if it is not at the time of receiving the bonus end command, the sub CPU subsequently determines whether or not it is at the time of receiving the input state command (step S377). If the input state command is being received, the sub CPU performs an input state command reception process (step S378), and ends the effect content determination process. In this process, for example, the types of the start lever 6 and stop buttons 7L, 7C, and 7R operated by the player are acquired. On the other hand, if the input state command is not received, the sub CPU ends the effect content determination process.

  As described above, in the gaming machine 1 of the first embodiment, it is possible to lottery RB4 during the RB3 game in the BB, and when RB4 is won, the process proceeds to RT2, but RB3 ends. Since the BB satisfies the termination condition before the BB is terminated, the symbols corresponding to “F_RB middle combination 1 + RB4” and “F_RB middle combination 2 + RB4” which are the triggers for the transition to RB4 are not displayed. For this reason, since it is possible to make it impossible to know whether RB4 is winning in RB3 in BB, it is possible to play a game with the expectation that it is controlled by RT2 even after the end of the BB game. .

  Further, in the gaming machine 1 of the first embodiment, after BB is finished, the game number shifts from RT2 to RT3, which has a finite number of games, so all high RT games are executed until the prescribed number of games is consumed. Therefore, it is possible to provide a game advantageous to the player. In other words, if the BB shifts to a high RT during the BB without waiting for the BB to end, the high RT during the BB is wasted, so the transition to the high RT during the normal gaming state after the BB ends. It is possible to provide a game that is advantageous to the player by controlling to the above.

  In the first embodiment, the case where the number of inserted medals required for one game (multiple number) is 3 has been described in any game. However, the present invention is not limited to this. The number of inserted sheets may be 4 or more, or 2 or less. Therefore, in the second embodiment, a case will be described in which the number of inserted coins is 2 in the RB3 gaming state and the RB4 gaming state, and 3 coins are inserted in the other gaming states. Note that the description of the same configuration and processing as in the first embodiment will be omitted.

  First, an example in which the inserted number changes according to the gaming state will be described with reference to FIG. FIG. 40 is a diagram for explaining a case where the inserted number changes according to the RB gaming state. As illustrated in FIG. 40, for example, in the first RB1, the number of inserted medals required for one game is three. After that, for example, when “RB2” is won, the process proceeds to “RB2” as the second RB. Also in RB2, the number of medals required for one game is three.

  Thereafter, for example, when “RB3” is won, the process proceeds to “RB3” as the third RB. In RB3, the number of medals required for one game is two. Thus, in RB1 and RB2, the number of inserted sheets is defined as 3, whereas in RB3, the number of inserted sheets is defined as 2. In RB3, there is a high possibility that “F_RB middle role 1 + RB4” and “F_RB middle role 2 + RB4”, which will trigger the transition to RB4, are in a gaming state where the player can expect the possibility of winning RB4. is there. Therefore, by setting the number of inserted RB3 to “2”, if the inserted number is “2”, the player can recognize that the game is in RB3 with high expectation. , It is possible to cause the player to play the game in RB3 with expectation.

  Here, with reference to FIGS. 41-1 to 41-6, the internal lottery table according to the gaming machine according to the second embodiment will be described. FIG. 41A is a diagram illustrating an internal lottery table for the BB general gaming state (RT1). FIG. 41-2 is a diagram showing an internal lottery table for the BB general gaming state (RT2). FIG. 41C is a diagram of the RB1 medium internal lottery table. FIG. 41-4 is a diagram illustrating an RB2 medium internal lottery table. FIG. 41-5 is a diagram illustrating the RB3 medium internal lottery table. FIG. 41-6 is a diagram illustrating the RB4 medium internal lottery table.

  In the BB general gaming state (RT1) internal lottery table, the BB general gaming state (RT2) internal lottery table, the RB1 internal lottery table, and the RB2 internal lottery table illustrated in FIGS. The number of medals required for games is defined as three. Also, in the RB3 internal lottery table and the RB4 internal lottery table illustrated in FIGS. 41-5 and 41-6, the number of medals required for one game is defined as two.

  As shown in FIGS. 41-1 and 41-2, in the internal lottery table for the BB general gaming state (RT1, 2), lottery values of “18150” and “18147” are respectively defined in F_RB1. During the BB general game, F_RB1 can be won. Furthermore, in Example 2, in the internal lottery table for the BB general gaming state (RT1, 2), the lottery values of “18150” and “18147” are respectively defined in F_RB2, and F_RB2 can be won during the BB general game. It has become. In other words, during the BB general game, it is possible to shift to RB1 or RB2 by winning F_RB1 or F_RB2.

  In addition, as shown in FIGS. 41-3 and 41-4, in the internal lottery table for RB1 and RB2, one or more lottery values for F_RB intermediate combination 1 + RB3, F_RB intermediate combination 1 + RB4, F_RB intermediate combination 2 + RB3, and F_RB intermediate combination 1 + RB4 Are defined respectively. Specifically, in the internal lottery table in RB1, a lottery value of “18” is defined for the lottery values of “F_RB middle role 1 + RB4” and “F_RB middle role 2 + RB4”. The lottery value of “518” is defined as the lottery value of “F_RB middle combination 1 + RB4” and “F_RB middle combination 2 + RB4”.

  As shown in FIG. 41-5, in the RB3 internal lottery table, the lottery values of “F_RB middle role 1 + RB4” and “F_RB middle role 2 + RB4”, which are the triggers for the transition to RB4, are “20000” and “7018”. The lottery values are respectively defined, and the possibility that “F_RB middle combination 1 + RB4” and “F_RB middle combination 2 + RB4” are lottered is higher than RB1 and RB2. In other words, in the internal lottery table in RB3 in which the gaming state is RB3 and referred to by two cards, the lottery value is high so that “F_RB middle combination 1 + RB4” and “F_RB middle combination 2 + RB4” are easy to win. Is set.

  Also, as shown in FIG. 41-6, in the RB4 internal lottery table, “0” is defined in the lottery values of the F_RB middle combination 1 + RB2 and the F_RB middle combination 2 + RB2, and the transition to RB2 during RB4 Absent. As shown in FIG. 41-6, in the RB4 internal lottery table, the F_RB intermediate combination 1 + RB3, the F_RB intermediate combination 1 + RB4, the F_RB intermediate combination 2 + RB3, and the F_RB intermediate combination 1 + RB4 have lottery values “8036”, “50000”, “ "3000" and "3000" are defined respectively.

  As described above, in the gaming machine of the second embodiment, RB1 and RB2 are set to have a lower probability of internally winning F_RB medium combination 1 + RB4 and F_RB medium combination 1 + RB4 than RB3, and game media that can be played Is set to “2”. In RB3, the probability of internal winning of RB medium combination 1 + RB4 and F_RB medium combination 1 + RB4 is set higher than in RB1 and 2, and “3” is set as the number of game media that can be played. For this reason, when the number of inserted cards in the RB is “2”, the player can recognize that the game is in the RB 3 with high expectation, and the player is expected to play the game in the RB 3. It is possible to perform with a feeling.

  While the first and second embodiments have been described above, the present invention is not limited to this.

  In the above embodiment, the case where F_RB3 and F_RB4 are not internally won in the BB general game has been described. However, the present invention is not limited to this, and the internal winning of F_RB3 and F_RB4 is possible in the BB general game. May be.

  In this case, it is assumed that one or more lottery values are defined in F_RB3 and F_RB4 in the internal lottery table for the BB general gaming state (RT1, 2). For example, as shown in FIG. 42-1 and FIG. 42-2, in the internal lottery table for the BB general gaming state (RT1, 2), a lottery value of “1000” is defined for F_RB3. F_RB3 can be won. In the internal lottery table for the BB general game state (RT1, 2), a lottery value of “300” is defined for F_RB4, and F_RB4 can be won during the BB general game. That is, during the BB general game, it is possible to shift to RB3 or RB4 by winning F_RB3 or F_RB4.

  Further, in the above-described embodiment, the case has been described where, when RB4 is internally won, the process shifts to RT2, and when the RT3 shift replay is won at RT2, the process shifts to RT3 which is a high RT. is not. For example, both RT2 and RT3 need not be provided, RT2 may be omitted, and only RT3 may be provided. And when RB4 is won internally, it may shift to RT3 which is high RT. In the case where only RT3 is provided, for example, the RT3 end condition may be changed to RT3 up to 200 games. In addition, for example, there is no restriction on the number of games played in RT3, a combination of replay symbols to be shifted to RT1 or RT0 is provided, and when the symbol combination is displayed, the game may be shifted to RT1 or RT0. . In addition, for example, RT3 may be continued until winning a BB without limiting the number of games played in RT3.

  In the above embodiment, the case where the upper limit of the number of payouts in BB is “359” has been described, but the present invention is not limited to this. For example, the upper limit of the number of payouts in BB may be “239” or “119”. In other words, in the above embodiment, the RB pays out 15 times (F_RB middle role 1 etc.) 8 times, so the RB wins a small role 8 times in one RB and 120 payouts are performed. Therefore, it ends in the middle of the third RB. On the other hand, for example, by setting the upper limit of the number of payouts in BB to “239”, it is possible to end the process in the middle of the second RB. In this case, the second RB is defined so that RB4 can be internally won, and the BB satisfies the end condition before the second RB ends in the BB, so that the second time in the BB It is possible to prevent the RB4 from winning during the RB. Similarly, for example, by setting the upper limit of the number of payouts in BB to “119”, it is possible to end the process in the middle of the first RB. In this case, the first RB is defined so that RB4 can be internally won, and the BB satisfies the end condition before the first RB ends, so that during the first RB in the BB It is possible to prevent the user from knowing whether RB4 is winning.

  In the above embodiment, the case where four types of RBs are defined has been described. However, the present invention is not limited to this, and it is sufficient that at least two types of RBs are defined. In addition, when the RB is repeated N times, the upper limit payout number of game media that is a condition for the end of the BB is greater than the number of N-1 RB medals paid out, and the N RBs It shall be prescribed less than the number of medals to be paid out. Thus, for example, even if a small role other than RB wins during BB general, BB ends without displaying the RB that triggers the transition to RT2 after the Nth RB ends. To do.

  In the above embodiment, the pachislot machine 1 using three reels 3L, 3C, and 3R has been described as an example. However, the number of reels is not limited to three. For example, two or four or more reels may be used.

  In addition to the pachislot machine 1 as in the embodiment, the present invention can be applied to other gaming machines. Furthermore, the game can be executed by applying the present invention even in a game program in which the operation in the above-described pachislot machine 1 is executed in a pseudo manner for a home game machine. In that case, a CD-ROM, FD (flexible disk), or any other recording medium can be used as a recording medium for recording the game program.

1 Pachislot 3L, 3C, 3R Reel 6 Start lever 7L, 7C, 7R Stop button 71 Main board (main control circuit)
31 Main CPU
33 Main RAM
72 Sub-control board (sub-control circuit)
72a Image control circuit 72b Sound / lamp control circuit

Claims (2)

A plurality of reels provided with a plurality of symbols on the outer peripheral surface;
A symbol display means disposed on a front surface of the plurality of reels and having a symbol display area for displaying a part of the symbols in a visually recognizable manner;
A symbol changing means for changing each symbol displayed in the symbol display area by rotating the plurality of reels based on a predetermined start condition being satisfied;
An internal lottery table provided corresponding to a plurality of gaming states associated with a bonus-related state relating to a bonus and a re-gaming state relating to re-gaming,
With reference to the internal lottery table corresponding to the current gaming state, an internal winning combination determining means for determining an internal winning combination from a plurality of combinations,
A plurality of stop operation means provided corresponding to each of the plurality of reels and receiving a player's stop operation;
A stop command means for outputting a stop command signal for commanding a stop of the reel corresponding to the operated stop operation means in response to the stop operation means being operated by a player;
A stop table provided for each of a plurality of roles,
Reel stop control means for stopping rotation of the reel with reference to a stop table corresponding to the internal winning combination determined by the internal winning combination determining means when the stop command signal is output;
Winning determination means capable of generating a winning based on a combination of symbols displayed on the winning line when all reels are stopped by the reel stop control means;
Profit granting means that can give profits according to the winnings generated,
With
The bonus-related state includes a normal gaming state that is a state other than a bonus state , a special gaming state that can be shifted from the normal gaming state and that is in the first bonus, and a first state that occurs during the first bonus. The special game state in the second bonus is the first special game state, the second special game state, and the third special game state, and the special game state that is in the first bonus but not in the second bonus. Having at least a gaming state in general,
Wherein as the re-gaming state, has a first re-gaming state, a high second re-gaming state than winning probability is the first re-Yu TECHNICAL state of replay role according to the operation of the replay, at least,
In the special gaming state in general, the first specific combination serving as a trigger for transition to the first special gaming state is determined as an internal winning combination with a first probability, and the transition trigger to the second special gaming state Is determined as an internal winning combination with a second probability lower than the first probability, and the third specific combination serving as a trigger for transition to the third special gaming state is the second specific combination May be determined as an internal winning combination with a third probability lower than
In the first special gaming state, the second specific combination may be determined as an internal winning combination,
In the second special game state, the third specific combination may be determined as an internal winning combination,
The special gaming state is terminated when a gaming value exceeding a predetermined number is given after the special gaming state is started, and transitions to the normal gaming state.
The predetermined number is less than the number of game values given when the special gaming state is repeated N (where N is an integer of 2 or more) times, and the special gaming state is repeated N-1 times. More than the number of game values granted in
In the special game state in general, when a first specific symbol combination corresponding to the first specific combination is displayed, control is performed so as to shift to the first special game state. When a combination of the second specific symbols corresponding to the second specific combination is displayed, control is performed so as to shift to the second special game state, and the third specific combination corresponding to the third specific combination is controlled. When a combination of specific symbols is displayed, special game state transition means for controlling to shift to the third special game state;
In the second special gaming state and the special gaming state in general, when the third specific combination is won internally, a re-gaming state setting means for setting the second re-gaming state;
Further comprising
When the second replay state is set during the special game state, the second replay state can be continued even in the normal game state after the end of the special game state,
In the first special gaming state, a first number is set as the number of betable gameable game values,
In the second special game state and the third special game state, a second number is set as a bet number of game values that can be played. When the second replay state is set during the special game state, the second replay state is set based on the fact that the third specific combination is won internally during the special game state in general. The ratio at which the second re-gaming state is set based on the internal winning of the third specific combination during the second special gaming state is higher than the proportion. The gaming machine according to 1.

Images