JP6426057B2 - Crack detection method, crack detection apparatus and substrate processing apparatus - Google Patents

Description

  The present invention relates to a crack detection method and a crack detection device for detecting a crack present in a thin plate-shaped precision electronic substrate (hereinafter simply referred to as "substrate") such as a semiconductor wafer, and a substrate incorporating the crack detection device. It relates to a processing device.

  In the process of manufacturing semiconductor devices, flash lamp annealing (FLA), which heats a semiconductor wafer in a very short time, has been attracting attention. Flash lamp annealing is to expose the surface of a semiconductor wafer to a flash light by using a xenon flash lamp (hereinafter simply referred to as a "flash lamp" to mean a xenon flash lamp), thereby exposing only the surface of the semiconductor wafer. It is a heat treatment technology that raises the temperature in a short time (several milliseconds or less).

  The emission spectral distribution of the xenon flash lamp is in the ultraviolet region to the near infrared region, has a shorter wavelength than that of the conventional halogen lamp, and substantially matches the basic absorption band of a silicon semiconductor wafer. Therefore, when the semiconductor wafer is irradiated with flash light from the xenon flash lamp, it is possible to rapidly increase the temperature of the semiconductor wafer because the amount of transmitted light is small. It has also been found that only the vicinity of the surface of the semiconductor wafer can be selectively heated if the flash light irradiation is performed for an extremely short time of several milliseconds or less.

  Such flash lamp annealing is suitable for processes requiring very short heating, such as activation of impurities implanted in a semiconductor wafer. The surface of the semiconductor wafer can be heated to the activation temperature for a very short time by irradiating a flash light from the flash lamp to the surface of the semiconductor wafer in which the impurity is implanted by the ion implantation method, and the impurity is diffused deeply. Only the impurity activation can be performed without causing the

  However, in flash lamp annealing, only the vicinity of the surface of the semiconductor wafer is rapidly heated, while the temperature of the back surface is hardly raised, so that rapid thermal expansion occurs only in the vicinity of the surface. Then, a warping stress acts on the semiconductor wafer to make the surface convex. At this time, if a crack is present inside the semiconductor wafer, the stress may cause the crack to spread and lead to the wafer crack. In addition, even when there is no crack, a new crack may be generated due to the stress acting on the semiconductor wafer at the time of flash light irradiation.

  Therefore, conventionally, various techniques have been proposed for detecting the presence or absence of a crack in a semiconductor wafer. For example, in Patent Document 1, reflected light when irradiating infrared light toward a silicon wafer is imaged through a polarizing filter, and a predetermined arithmetic processing is performed on the obtained image to generate defects such as cracks. Techniques for detecting the presence or absence are disclosed. Further, Patent Document 2 discloses a technique for applying shock to a silicon wafer to generate vibration and detecting the presence or absence of a crack from the vibration frequency.

JP, 2013-36888, A JP 2004-28859 A

  However, in the crack detection method using an optical or image processing technique as disclosed in Patent Document 1, scratches on the wafer surface due to the cracks are often detected, and the scratches and cracks formed on the wafer surface are formed. There is a problem that false detection tends to occur because it is difficult to distinguish from patterns. In addition, although a method capable of detecting an internal crack by infrared rays even if there is no flaw on the wafer surface has been studied, there were also cases where the cracks were closed by thermal expansion of the wafer due to infrared irradiation.

  On the other hand, in the method of impacting the wafer to generate vibration as disclosed in Patent Document 2, there is a possibility that the impact may damage the pattern formed on the wafer surface or the wafer itself.

  The present invention has been made in view of the above problems, and incorporates a crack detection method and a crack detection device capable of detecting a crack existing in a substrate with a simple structure, and the crack detection device. An object of the present invention is to provide a substrate processing apparatus.

  In order to solve the above-mentioned subject, in the crack detection method which detects the crack which exists in a substrate according to the 1st aspect of the present invention, an acoustic is generated on the substrate by sliding a contact probe along an end of the substrate. A sound generation process for generating the sound, a sound collection process for collecting the generated sound with a microphone, an analysis process for performing frequency analysis on the sound collected in the sound collection process, and a frequency obtained in the analysis process Determining a presence or absence of a crack in the substrate from a spectrum.

  The invention according to claim 2 is the crack detection method according to the invention according to claim 1, wherein in the determination step, a reference frequency spectrum obtained by frequency analysis of a substrate free of the presence of a crack, and a processing target It is characterized in that the presence or absence of a crack of the substrate to be processed is determined from comparison with a target frequency spectrum obtained by frequency analysis of the substrate.

  The invention according to claim 3 is the crack detection method according to the invention according to claim 2, wherein, in the determination step, the determination is made based on a comparison between a reference peak in the reference frequency spectrum and a peak included in the target frequency spectrum. It is characterized in that the presence or absence of a crack of a substrate to be processed is determined.

  The invention according to claim 4 is the crack detection method according to any one of claims 1 to 3, wherein a crack in the substrate is detected before performing a predetermined substrate processing on the substrate, It is characterized in that whether to execute the substrate processing on the substrate is determined based on the determination result in the determination step.

  The invention according to claim 5 is the crack detection method according to the invention according to claim 4, wherein a crack in the substrate after the substrate processing is performed is detected, and the substrate is determined based on the determination result in the determination step. It is determined whether or not to execute the post-process of the substrate processing for the above.

  The invention according to claim 6 is the crack detection method according to any one of claims 1 to 3, wherein after a predetermined substrate processing is performed on a substrate, a crack in the substrate is detected, and the determination is made. It is characterized in that whether or not the post-process of the substrate processing for the substrate is to be performed is determined based on the determination result in the process.

  According to the invention of claim 7, in the crack detection device for detecting a crack present in a substrate, the contact probe contacting the end of the substrate, the contact probe and the substrate being moved relative to each other A drive mechanism for sliding the contact probe along the end, a microphone for collecting an acoustic sound generated on the substrate when the contact probe slides along the end of the substrate, and the microphone It is characterized by comprising: an analysis unit that performs frequency analysis on the sound sound; and a determination unit that determines the presence or absence of a crack in the substrate from the frequency spectrum obtained by the frequency analysis.

  According to an eighth aspect of the present invention, in the crack detection device according to the seventh aspect, the determination unit is a processing target with a reference frequency spectrum obtained by frequency analysis of a substrate having no crack. It is characterized in that the presence or absence of a crack of the substrate to be processed is determined from comparison with a target frequency spectrum obtained by frequency analysis of the substrate.

  Also, in the crack detection device according to the invention of claim 9, according to the invention of claim 9, the determination unit is based on a comparison between a reference peak in the reference frequency spectrum and a peak included in the target frequency spectrum. It is characterized in that the presence or absence of a crack of a substrate to be processed is determined.

  According to the invention of claim 10, in the crack detection device according to any of the inventions of claims 7 to 9, one of a plurality of contact probes of different types is selected and the end of the substrate is selected. The apparatus is characterized by further comprising a selection mechanism to be in contact.

  The invention according to claim 11 relates to the crack detection apparatus according to any one of claims 7 to 10, wherein the drive mechanism supports a central portion of the substrate and rotates the substrate. It is characterized by including.

  The invention of claim 12 is characterized in that, in the crack detection device according to the invention of claim 11, the microphone is provided in the rotation support mechanism.

  According to a thirteenth aspect of the present invention, there is provided a substrate processing apparatus comprising: the crack detection apparatus according to any of the seventh to twelfth aspects; and a substrate processing unit for performing predetermined substrate processing on a substrate, Before performing the substrate processing in the substrate processing unit, a crack in the substrate is detected, and it is determined whether to execute the substrate processing on the substrate based on the determination result of the determination unit. It features.

  The invention of claim 14 is characterized in that, in the substrate processing apparatus according to the invention of claim 13, a crack in the substrate after the substrate processing in the substrate processing unit is performed is detected.

  According to a fifteenth aspect of the present invention, there is provided a substrate processing apparatus comprising: the crack detection apparatus according to any of the seventh to twelfth aspects; and a substrate processing unit for performing predetermined substrate processing on a substrate, It is characterized in that a crack of the substrate after the substrate processing in the substrate processing unit is performed is detected.

  According to the invention of claims 1 to 6, by causing the contact probe to slide along the edge of the substrate, the substrate is made to generate sound, and the generated sound is collected by the microphone and collected. Since the presence or absence of a crack in the substrate is determined from the frequency spectrum obtained by performing frequency analysis on sound, the crack present in the substrate can be detected with a simple structure in which only the contact probe and the microphone are provided.

  According to the invention of claims 7 to 15, the contact probe and the substrate are moved relative to each other, and when the contact probe slides along the end of the substrate, the sound generated on the substrate is collected by the microphone In order to determine the presence or absence of cracks in the substrate from the frequency spectrum obtained by performing frequency analysis on the collected sound, the cracks present in the substrate are detected with a simple structure in which only the contact probe and the microphone are provided. can do.

  In particular, according to the invention of claim 12, since the microphone is provided in the rotation support mechanism, noise can be isolated to improve the SN ratio.

It is a top view showing a substrate processing device concerning the present invention. It is a front view of the substrate processing apparatus of FIG. It is a longitudinal cross-sectional view which shows the structure of a flash heating part. It is a perspective view which shows the whole external appearance of a holding | maintenance part. It is the top view which looked at the susceptor of a holding part from the upper surface. It is the side view which looked at a holding part from the side. It is a top view of a transfer mechanism. It is a side view of a transfer mechanism. It is a top view showing arrangement of a plurality of halogen lamps. It is a longitudinal cross-sectional view which shows the structure of an alignment part. It is a block diagram showing composition of a control part. It is a flowchart which shows the process sequence of a crack detection process. It is a figure which shows an example of the reference frequency spectrum about the reference wafer which crack does not exist. It is a figure which shows an example of the frequency spectrum about the semiconductor wafer used as a process target. It is a figure which shows the structural example which provides a several contact probe. It is a figure which shows the structural example which provides a microphone in the inside of a rotation support mechanism.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

  First, the overall schematic configuration of a substrate processing apparatus 100 according to the present invention will be briefly described. FIG. 1 is a plan view showing a substrate processing apparatus 100 according to the present invention, and FIG. 2 is a front view thereof. The substrate processing apparatus 100 is a flash lamp annealing apparatus that applies a flash light to a disk-shaped semiconductor wafer W as a substrate to heat the semiconductor wafer W. The size of the semiconductor wafer W to be processed is not particularly limited, and is, for example, φ300 mm or φ450 mm. Impurities are implanted into the semiconductor wafer W before being carried into the substrate processing apparatus 100, and activation processing of the impurities implanted by the heat treatment by the substrate processing apparatus 100 is performed. In FIG. 1 and the subsequent drawings, the dimensions and the numbers of the respective parts are exaggerated or simplified as necessary for easy understanding. Moreover, in each of FIGS. 1, 2 and subsequent figures, in order to clarify the directional relationship, the Z-axis direction is a vertical direction, and an XYZ orthogonal coordinate system in which an XY plane is a horizontal plane is added as necessary. .

  As shown in FIGS. 1 and 2, the substrate processing apparatus 100 carries an unprocessed semiconductor wafer W from the outside into the apparatus and carries out the processed semiconductor wafer W out of the apparatus. Alignment unit 130 for positioning the semiconductor wafer W for processing, cooling unit 140 for cooling the semiconductor wafer W after heat treatment, flash heating unit 160 for performing flash heating processing on the semiconductor wafer W, alignment unit 130, cooling unit 140 and A transfer robot 150 for transferring the semiconductor wafer W to the flash heating unit 160 is provided. The substrate processing apparatus 100 also includes the control unit 3 that controls the operation mechanism and the transfer robot 150 provided in each of the above processing units to advance the flash heating process of the semiconductor wafer W.

  The indexer section 101 takes out the unprocessed semiconductor wafer W from each carrier C and load port 110 on which a plurality of carriers C (two in the present embodiment) are placed side by side, and the semiconductor wafer processed to each carrier C. A delivery robot 120 for storing W is provided. Carrier C containing an untreated semiconductor wafer W is transported by an automated guided vehicle (AGV, OHT) or the like and placed on load port 110, and carrier C containing a processed semiconductor wafer W is an unattended carrier Is taken away from the load port 110. Further, in the load port 110, the carrier C is configured to be movable up and down as shown by an arrow CU in FIG. 2 so that the delivery robot 120 can carry out the loading and unloading of any semiconductor wafer W with respect to the carrier C. ing. As the form of the carrier C, in addition to FOUP (front opening unified pod) for storing the semiconductor wafer W in an enclosed space, OC (open for open air) exposes the SMIF (Standard Mechanical Inter Face) pod and the stored semiconductor wafer W It may be cassette).

  Further, the delivery robot 120 is capable of sliding movement as shown by the arrow 120S in FIG. 1 and turning operation and raising and lowering operation as shown by the arrow 120R. As a result, the delivery robot 120 takes in and out the semiconductor wafer W with respect to the two carriers C, and delivers the semiconductor wafer W with the alignment unit 130 and the cooling unit 140. Loading and unloading of the semiconductor wafer W with respect to the carrier C by the delivery robot 120 is performed by sliding movement of the hand 121 and lifting and lowering movement of the carrier C. The semiconductor wafer W is transferred between the delivery robot 120 and the alignment unit 130 or the cooling unit 140 by the slide movement of the hand 121 and the lifting operation of the delivery robot 120.

  The alignment unit 130 is a processing unit that rotates the semiconductor wafer W in the horizontal plane to orient it appropriately for the subsequent flash heating. The alignment unit 130 has a mechanism for supporting and rotating the semiconductor wafer W in a horizontal posture inside the alignment chamber 131 which is a casing made of aluminum alloy, and an optical notch, an orientation flat or the like formed on the peripheral portion of the semiconductor wafer W. And a mechanism for generating a sound on the semiconductor wafer W to collect sound. The semiconductor wafer W is delivered from the delivery robot 120 to the alignment chamber 131 so that the wafer center is positioned at a predetermined position. The alignment unit 130 rotates around the vertical direction axis about the central portion of the semiconductor wafer W received from the indexer unit 101 as a rotation center and optically detects a notch or the like to adjust the direction of the semiconductor wafer W. Further, in the alignment unit 130, while the semiconductor wafer W is rotated, the contact probe is slid on the end portion to generate an acoustic sound in the semiconductor wafer W to detect the presence or absence of a crack. It will be described later.

  The flash heating unit 160, which is a main part of the substrate processing apparatus 100, is a substrate processing unit that applies flash light (flash light) from the xenon flash lamp FL to the preheated semiconductor wafer W to perform flash heating processing.

  The cooling unit 140 is configured by mounting a quartz plate on the upper surface of a metal cooling plate inside a cool chamber 141 which is a housing made of aluminum alloy. Since the temperature of the semiconductor wafer W immediately after the flash heating process is performed in the flash heating unit 160 is high, the semiconductor wafer W is placed on the quartz plate in the cooling unit 140 and cooled.

  The transfer robot 150 is pivotable about an axis along the vertical direction as indicated by an arrow 150R, and has two link mechanisms consisting of a plurality of arm segments, and the tips of these two link mechanisms are provided. The transfer hands 151a and 151b are provided to hold the semiconductor wafer W, respectively. The transfer hands 151a and 151b are vertically disposed at a predetermined pitch, and can be linearly slidably moved in the same horizontal direction independently by a link mechanism. Further, the transfer robot 150 moves up and down the two transfer hands 151a and 151b in a state of being separated by a predetermined pitch by moving up and down the base on which the two link mechanisms are provided.

  Further, a transfer chamber 170 for accommodating the transfer robot 150 is provided as a transfer space of the semiconductor wafer W by the transfer robot 150, and the alignment chamber 131, the cool chamber 141 and the chamber 6 of the flash heating unit 160 are connected to the transfer chamber 170. Are arranged. When the transfer robot 150 performs delivery (insertion and removal) of the semiconductor wafer W using the alignment chamber 131, the cool chamber 141, or the chamber 6 of the flash heating unit 160 as a delivery partner, first, both transport hands 151a and 151b face the delivery counterpart. After that (or while it is turning), it moves up and down, and one of the transfer hands is positioned at the height at which the semiconductor wafer W is transferred to the transfer partner. Then, the transfer hand 151 a (151 b) is linearly moved in the horizontal direction to transfer the semiconductor wafer W to the other party.

  Gate valves 181 and 182 are provided between the alignment chamber 131 of the alignment unit 130 and the cool chamber 141 of the cooling unit 140 and the indexer unit 101, respectively. Further, gate valves 183, 184, and 185 are provided between the transfer chamber 170 and the alignment chamber 131, the cool chamber 141, and the chamber 6 of the flash heating unit 160, respectively. When the semiconductor wafer W is transported in the substrate processing apparatus 100, these gate valves are appropriately opened and closed. In addition, nitrogen gas of high purity is supplied from a nitrogen gas supply unit (not shown) so that the interior of alignment chamber 131, cool chamber 141 and transfer chamber 170 is kept clean, and excess nitrogen gas is appropriately exhausted. Exhausted from the tube.

  Next, the configuration of the flash heating unit 160 will be described. FIG. 3 is a longitudinal sectional view showing the configuration of the flash heating unit 160. As shown in FIG. The flash heating unit 160 includes a chamber 6 accommodating the semiconductor wafer W, a flash lamp house 5 incorporating a plurality of flash lamps FL, and a halogen lamp house 4 incorporating a plurality of halogen lamps HL. A flash lamp house 5 is provided on the upper side of the chamber 6, and a halogen lamp house 4 is provided on the lower side. Further, the flash heating unit 160 holds the semiconductor wafer W in the horizontal posture inside the chamber 6, and the transfer mechanism 10 for delivering the semiconductor wafer W between the holding unit 7 and the transfer robot 150. And.

  The chamber 6 is configured by mounting quartz chamber windows on the upper and lower sides of a cylindrical chamber side 61. The chamber side 61 has a generally cylindrical shape with an open top and bottom, the upper opening is fitted with the upper chamber window 63 and closed, and the lower opening is fitted with the lower chamber window 64 and closed ing. The upper chamber window 63 that constitutes the ceiling of the chamber 6 is a disk-shaped member made of quartz and functions as a quartz window that transmits the flash light emitted from the flash lamp FL into the chamber 6. The lower chamber window 64 constituting the floor of the chamber 6 is also a disk-shaped member made of quartz and functions as a quartz window which transmits light from the halogen lamp HL into the chamber 6.

  In addition, a reflection ring 68 is attached to the upper portion of the inner wall surface of the chamber side portion 61, and a reflection ring 69 is attached to the lower portion. The reflection rings 68 and 69 are both formed in an annular shape. The upper reflective ring 68 is mounted by fitting from the upper side of the chamber side 61. On the other hand, the lower reflection ring 69 is mounted by being fitted from the lower side of the chamber side 61 and fixed with a screw (not shown). That is, the reflection rings 68 and 69 are both detachably mounted on the chamber side 61. An inner space of the chamber 6, that is, a space surrounded by the upper chamber window 63, the lower chamber window 64, the chamber side 61 and the reflection rings 68 and 69 is defined as a heat treatment space 65.

  By mounting the reflection rings 68 and 69 on the chamber side 61, a recess 62 is formed on the inner wall surface of the chamber 6. That is, a recess 62 surrounded by a central portion of the inner wall surface of the chamber side 61 to which the reflective rings 68 and 69 are not attached, the lower end surface of the reflective ring 68 and the upper end surface of the reflective ring 69 is formed. . The recess 62 is formed in an annular shape along the horizontal direction on the inner wall surface of the chamber 6 and surrounds the holding unit 7 that holds the semiconductor wafer W.

  The chamber side 61 and the reflection rings 68 and 69 are formed of a metal material (for example, stainless steel) which is excellent in strength and heat resistance. The inner peripheral surfaces of the reflection rings 68 and 69 are mirror-polished by electrolytic nickel plating.

  In the chamber side portion 61, a transfer opening (furnace port) 66 for carrying in and out the semiconductor wafer W with respect to the chamber 6 is formed. The transfer opening 66 can be opened and closed by a gate valve 185. The transfer opening 66 is connected in communication with the outer peripheral surface of the recess 62. Therefore, when the gate valve 185 opens the transfer opening 66, the semiconductor wafer W is carried into the heat treatment space 65 from the transfer opening 66 through the recess 62 and the semiconductor wafer W is unloaded from the heat treatment space 65. It can be performed. Further, when the gate valve 185 closes the transfer opening 66, the heat treatment space 65 in the chamber 6 is made a closed space.

Further, a gas supply hole 81 for supplying a processing gas (in the present embodiment, nitrogen gas (N ₂ )) to the heat treatment space 65 is formed on the upper inner wall of the chamber 6. The gas supply hole 81 is formed at a position above the recess 62 and may be provided in the reflection ring 68. The gas supply hole 81 is communicatively connected to the gas supply pipe 83 via a buffer space 82 formed annularly in the side wall of the chamber 6. The gas supply pipe 83 is connected to the gas supply source 85. Further, a valve 84 is interposed in the middle of the path of the gas supply pipe 83. When the valve 84 is opened, nitrogen gas is supplied from the gas supply source 85 to the buffer space 82. The nitrogen gas flowing into the buffer space 82 flows so as to expand in the buffer space 82 having a smaller fluid resistance than the gas supply holes 81, and is supplied from the gas supply holes 81 into the heat treatment space 65. The processing gas is not limited to nitrogen gas, and may be an inert gas such as argon (Ar) or helium (He), or oxygen (O ₂ ), hydrogen (H ₂ ), chlorine (Cl ₂ ), It may be a reactive gas such as hydrogen chloride (HCl), ozone (O ₃ ), ammonia (NH ₃ ) or the like.

  On the other hand, a gas exhaust hole 86 for exhausting the gas in the heat treatment space 65 is formed in the lower portion of the inner wall of the chamber 6. The gas exhaust hole 86 is formed at a lower position than the recess 62, and may be provided in the reflection ring 69. The gas exhaust hole 86 is connected in communication with the gas exhaust pipe 88 via a buffer space 87 formed annularly in the side wall of the chamber 6. The gas exhaust pipe 88 is connected to the exhaust unit 190. Further, a valve 89 is interposed in the middle of the path of the gas exhaust pipe 88. When the valve 89 is opened, the gas in the heat treatment space 65 is exhausted from the gas exhaust hole 86 through the buffer space 87 to the gas exhaust pipe 88. A plurality of gas supply holes 81 and gas exhaust holes 86 may be provided along the circumferential direction of the chamber 6, or may be slit-shaped. The gas supply source 85 and the exhaust unit 190 may be a mechanism provided in the substrate processing apparatus 100 or may be a utility of a factory in which the substrate processing apparatus 100 is installed.

  In addition, a gas exhaust pipe 191 for exhausting the gas in the heat treatment space 65 is also connected to the tip of the transfer opening 66. The gas exhaust pipe 191 is connected to the exhaust unit 190 via a valve 192. By opening the valve 192, the gas in the chamber 6 is exhausted through the transfer opening 66.

  FIG. 4 is a perspective view showing the overall appearance of the holder 7. 5 is a plan view of the susceptor 74 of the holder 7 as viewed from the top, and FIG. 6 is a side view of the holder 7 as viewed from the side. The holding unit 7 is configured to include a base ring 71, a connecting unit 72, and a susceptor 74. The base ring 71, the connecting portion 72 and the susceptor 74 are all formed of quartz. That is, the whole of the holding portion 7 is formed of quartz.

  The base ring 71 is an annular quartz member. The base ring 71 is supported by the wall surface of the chamber 6 by being placed on the bottom of the recess 62 (see FIG. 3). On the upper surface of the base ring 71 having an annular shape, a plurality of connecting portions 72 (four in the present embodiment) are erected along the circumferential direction. The connecting portion 72 is also a quartz member and is fixed to the base ring 71 by welding. In addition, the shape of the base ring 71 may be an arc shape in which a part is missing from the annular shape.

  The susceptor 74 is supported by four connecting portions 72 provided on the base ring 71. The susceptor 74 includes a holding plate 75 and a plurality of support pins 77. The holding plate 75 is a circular flat member made of quartz. The diameter of the holding plate 75 is larger than the diameter of the semiconductor wafer W. That is, the holding plate 75 has a larger planar size than the semiconductor wafer W.

  A plurality of support pins 77 are provided upright on the upper surface of the holding plate 75. In the present embodiment, a total of eight support pins 77 are provided at intervals of 45 ° along the circumference of a circular concentric circle with the outer circumference of the circular holding plate 75. The diameter of the circle in which the eight support pins 77 are arranged (the distance between the opposed support pins 77) is smaller than the diameter of the semiconductor wafer W. Each of the plurality of support pins 77 is formed of quartz. The plurality of support pins 77 may be erected by being fitted into recesses formed on the upper surface of the holding plate 75.

  Further, a plurality of (five in the present embodiment) guide pins 76 are also provided upright on the upper surface of the holding plate 75. The five guide pins 76 are provided along the circumference of a circle concentric with the outer circumference of the holding plate 75. The diameter of the circle in which the five guide pins 76 are arranged is slightly larger than the diameter of the semiconductor wafer W. Therefore, the diameter of the circle in which the five guide pins 76 are disposed is larger than the diameter of the circle in which the eight support pins 77 are disposed. Each guide pin 76 is also formed of quartz. The number of guide pins 76 is not limited to five, and may be a number that can prevent the positional deviation of the semiconductor wafer W.

  The four connecting portions 72 erected on the base ring 71 and the peripheral edge of the lower surface of the holding plate 75 of the susceptor 74 are fixed by welding. That is, the susceptor 74 and the base ring 71 are fixedly connected by the connecting portion 72. By supporting the base ring 71 of the holder 7 on the wall surface of the chamber 6, the holder 7 is attached to the chamber 6. In the state where the holder 7 is attached to the chamber 6, the holding plate 75 of the susceptor 74 is in a horizontal posture (a posture in which the normal line coincides with the vertical direction). The semiconductor wafer W carried into the chamber 6 is mounted and held in a horizontal posture on the susceptor 74 of the holding unit 7 mounted in the chamber 6. At this time, the semiconductor wafer W is supported from the lower surface by point contact by eight support pins 77 erected on the holding plate 75 and mounted on the susceptor 74. That is, the semiconductor wafer W is supported by the eight support pins 77 at a predetermined distance from the upper surface of the holding plate 75. Further, the height of the guide pin 76 is larger than the height of the support pin 77. Therefore, the horizontal displacement of the semiconductor wafer W supported by the plurality of support pins 77 is prevented by the guide pins 76.

  Further, as shown in FIGS. 4 and 5, the holding plate 75 of the susceptor 74 is formed with an opening 78 and a cutout 73 penetrating vertically. The opening 78 is provided to receive radiation (infrared light) emitted from the lower surface of the semiconductor wafer W held on the susceptor 74 by the radiation thermometer 220. That is, the radiation thermometer 220 receives light emitted from the lower surface of the semiconductor wafer W held by the susceptor 74 through the opening 78, and the temperature of the semiconductor wafer W is measured by a separate detector. On the other hand, the notch 73 is provided to pass the probe tip of the contact-type thermometer 230 using a thermocouple. The contact-type thermometer 230 passes the notch 73 and brings the probe into contact with the lower surface of the semiconductor wafer W to perform temperature measurement. Further, four through holes 79 are formed in the holding plate 75 of the susceptor 74 so that lift pins 12 of the transfer mechanism 10 described later pass therethrough for delivery of the semiconductor wafer W.

  FIG. 7 is a plan view of the transfer mechanism 10. FIG. 8 is a side view of the transfer mechanism 10. The transfer mechanism 10 includes two transfer arms 11. The transfer arm 11 has an arc shape along the generally annular recess 62. Two lift pins 12 are erected on each transfer arm 11. Each transfer arm 11 is rotatable by a horizontal movement mechanism 13. The horizontal movement mechanism 13 transfers the pair of transfer arms 11 to the holding unit 7 at the transfer operation position (solid line position in FIG. 7) for transferring the semiconductor wafer W and the semiconductor wafer W held by the holding unit 7. Horizontal movement is performed between a retracted position (two-dot chain line position in FIG. 7) which does not overlap in plan view. As the horizontal movement mechanism 13, each transfer arm 11 may be rotated by an individual motor, or a pair of transfer arms 11 may be interlocked by one motor using a link mechanism. It may be moved.

  Further, the pair of transfer arms 11 are moved up and down together with the horizontal movement mechanism 13 by the elevation mechanism 14. When the lifting mechanism 14 raises the pair of transfer arms 11 at the transfer operation position, a total of four lift pins 12 are inserted into the through holes 79 (see FIGS. 4 and 5) of the holding plate 75 of the susceptor 74. After passing, the upper end of the lift pin 12 protrudes from the upper surface of the holding plate 75. On the other hand, when the lifting mechanism 14 lowers the pair of transfer arms 11 at the transfer operation position to extract the lift pins 12 from the through holes 79 and the horizontal movement mechanism 13 moves the pair of transfer arms 11 to open. The transfer arm 11 moves to the retracted position. The retracted position of the pair of transfer arms 11 is immediately above the base ring 71 of the holder 7. Since the base ring 71 is mounted on the bottom surface of the recess 62, the retracted position of the transfer arm 11 is inside the recess 62. An exhaust mechanism (not shown) is provided in the vicinity of the portion where the drive unit (horizontal movement mechanism 13 and lifting mechanism 14) of transfer mechanism 10 is provided, and the atmosphere around the drive unit of transfer mechanism 10 is provided. Are discharged to the outside of the chamber 6.

  Returning to FIG. 3, the flash lamp house 5 provided above the chamber 6 includes a light source consisting of a plurality (30 in the present embodiment) of xenon flash lamps FL inside the housing 51 and the light source above And a reflector 52 provided to cover the In addition, a lamp light emission window 53 is attached to the bottom of the housing 51 of the flash lamp house 5. The lamp light emission window 53 constituting the floor of the flash lamp house 5 is a plate-like quartz window formed of quartz. By installing the flash lamp house 5 above the chamber 6, the lamp light emission window 53 faces the upper chamber window 63. The flash lamp FL irradiates the heat treatment space 65 with flash light from above the chamber 6 through the lamp light emission window 53 and the upper chamber window 63.

  The plurality of flash lamps FL are rod-shaped lamps each having a long cylindrical shape, and the longitudinal direction of each is along the main surface of the semiconductor wafer W held by the holder 7 (that is, along the horizontal direction) They are arranged in a plane so as to be parallel to each other. Therefore, the plane formed by the arrangement of the flash lamps FL is also a horizontal plane.

  The xenon flash lamp FL has a rod-like glass tube (discharge tube) in which xenon gas is enclosed and an anode and a cathode connected to a capacitor are disposed at both ends, and attached on the outer peripheral surface of the glass tube And a trigger electrode. Since xenon gas is an insulator electrically, no electricity flows in the glass tube under normal conditions even if charge is stored in the capacitor. However, when a high voltage is applied to the trigger electrode to break the insulation, the electricity stored in the capacitor instantaneously flows in the glass tube, and light is emitted by excitation of atoms or molecules of xenon at that time. In such a xenon flash lamp FL, the electrostatic energy stored in advance in the capacitor is converted into an extremely short light pulse of 0.1 milliseconds to 100 milliseconds. It is characterized in that it can emit extremely intense light as compared to a light source.

  In addition, the reflector 52 is provided above the plurality of flash lamps FL so as to cover the whole of them. The basic function of the reflector 52 is to reflect flash light emitted from a plurality of flash lamps FL to the side of the heat treatment space 65. The reflector 52 is formed of an aluminum alloy plate, and its surface (surface facing the flash lamp FL) is roughened by blasting.

  A plurality of (40 in the present embodiment) halogen lamps HL are incorporated in the halogen lamp house 4 provided below the chamber 6. The plurality of halogen lamps HL perform light irradiation to the heat treatment space 65 from the lower side of the chamber 6 through the lower chamber window 64. FIG. 9 is a plan view showing the arrangement of a plurality of halogen lamps HL. In the present embodiment, the twenty halogen lamps HL are disposed in upper and lower two stages. Each halogen lamp HL is a rod-shaped lamp having a long cylindrical shape. The upper and lower 20 halogen lamps HL are arranged such that their longitudinal directions are parallel to each other along the main surface of the semiconductor wafer W held by the holder 7 (that is, along the horizontal direction). There is. Therefore, the plane formed by the arrangement of the halogen lamps HL in the upper and lower stages is a horizontal plane.

  Further, as shown in FIG. 9, the disposition density of the halogen lamps HL in the region facing the peripheral portion is higher than the region facing the central portion of the semiconductor wafer W held by the holding portion 7 in both the upper and lower portions. There is. That is, in both the upper and lower portions, the disposition pitch of the halogen lamps HL is shorter in the peripheral portion than in the central portion of the lamp arrangement. For this reason, it is possible to perform irradiation of a large amount of light to the peripheral portion of the semiconductor wafer W in which a temperature drop is likely to occur at the time of heating by light irradiation from the halogen lamp HL.

  Further, a lamp group consisting of the halogen lamp HL in the upper stage and a lamp group consisting of the halogen lamp HL in the lower stage are arranged so as to cross in a lattice shape. That is, a total of 40 halogen lamps HL are disposed such that the longitudinal direction of each halogen lamp HL in the upper stage and the longitudinal direction of each halogen lamp HL in the lower stage are orthogonal to each other.

  The halogen lamp HL is a filament type light source which causes the filament to glow to emit light by energizing the filament disposed inside the glass tube. Inside the glass tube, a gas in which a small amount of a halogen element (iodine, bromine or the like) is introduced into an inert gas such as nitrogen or argon is enclosed. By introducing a halogen element, it is possible to set the temperature of the filament to a high temperature while suppressing the breakage of the filament. Therefore, the halogen lamp HL has a characteristic that it has a long life and can continuously emit strong light as compared with a normal incandescent lamp. Further, since the halogen lamp HL is a rod-like lamp, it has a long life, and by arranging the halogen lamp HL in the horizontal direction, the radiation efficiency to the upper semiconductor wafer W becomes excellent.

  In addition to the above configuration, the flash heating unit 160 prevents excessive temperature rise of the halogen lamp house 4, the flash lamp house 5, and the chamber 6 due to the heat energy generated from the halogen lamp HL and the flash lamp FL during heat treatment of the semiconductor wafer W. To provide various cooling structures. For example, the wall of the chamber 6 is provided with a water cooling pipe (not shown). In addition, the halogen lamp house 4 and the flash lamp house 5 have an air cooling structure in which a gas flow is formed inside and heat is exhausted. Air is also supplied to the gap between the upper chamber window 63 and the lamp light emission window 53 to cool the flash lamp house 5 and the upper chamber window 63.

  Next, the configuration of the alignment unit 130 will be described. FIG. 10 is a longitudinal sectional view showing the configuration of the alignment unit 130. As shown in FIG. The alignment unit 130 is a rotary support mechanism 330 for supporting and rotating the semiconductor wafer W in a horizontal posture inside the alignment chamber 131, and an optical for optically detecting a notch, an orientation flat, etc. formed in the peripheral portion of the semiconductor wafer W. A mechanism 340, a contact probe 350 in contact with the end of the semiconductor wafer W, and a microphone 360 for collecting sound generated on the semiconductor wafer W are provided. A gate valve 181 is provided at an inlet / outlet between the alignment chamber 131 and the indexer unit 101, and a gate valve 183 is provided at an inlet / outlet between the alignment chamber 131 and the transfer chamber 170.

  The rotation support mechanism 330 includes a spin chuck 331 and a spin motor 332. The spin chuck 331 supports the lower surface central portion of the semiconductor wafer W. The spin chuck 331 may be a decompression chuck that adsorbs the semiconductor wafer W by negative pressure, an electrostatic chuck that adsorbs the semiconductor wafer W by coulomb force, a Bernoulli chuck that ejects a gas and sucks the semiconductor wafer W by the Bernoulli principle. It is preferable to use one having an adsorption function. The spin motor 332 rotates the spin chuck 331 about an axis along the vertical direction. The semiconductor wafer W horizontally supported by the spin chuck 331 is also rotated by the spin motor 332 in the horizontal plane. As the spin motor 332, it is preferable to use a pulse motor capable of accurately controlling the rotation angle and the rotation speed.

  The optical mechanism 340 includes a pair of light emitting portions 341 and light receiving portions 342, and detects a notch or the like formed on the peripheral portion of the semiconductor wafer W. In general, a notch, which is a notch indicating the crystal orientation of silicon, is formed in the peripheral portion of a semiconductor wafer W of φ300 mm (oriflate for a semiconductor wafer W of φ200 mm). The semiconductor wafer W is supported in a horizontal posture by the rotation support mechanism 330 and is rotated about an axis in the vertical direction, and laser light is projected from the light emitting unit 341 onto the peripheral portion of the semiconductor wafer W. The laser beam projected from the light emitting unit 341 is shielded by the peripheral portion at the portion excluding the notch of the peripheral portion of the semiconductor wafer W, but when the notch is positioned directly below the light emitting unit 341 The laser beam projected from the laser passes through the notch and is received by the light receiver 342. Therefore, the notch of the semiconductor wafer W can be optically detected by the light emitter 341 and the light receiver 342, and the orientation of the semiconductor wafer W is adjusted in a fixed direction by detecting the notch.

  The contact probe 350 is a cylindrical or spherical member. The contact probe 350 is provided such that its outer surface is in contact with the end of the semiconductor wafer W supported by the rotary support mechanism 330. Preferably, the installation position of the contact probe 350 can be switched between a position in contact with the end of the semiconductor wafer W supported by the rotation support mechanism 330 and a position separated from the end.

  The contact probe 350 is formed of hard rubber. As rubber | gum of the contact probe 350, fluororubber, silicone rubber, methyl silicone rubber, vinyl * methyl silicone rubber, phenyl * methyl silicone rubber can be used, for example. The outer circumferential surface of the contact probe 350 is preferably rough.

  The microphone 360 collects the sound generated from the semiconductor wafer W supported and rotated by the rotation support mechanism 330 and converts it into an electric signal. In the present embodiment, the microphone 360 is disposed in the vicinity of the contact probe 350 at a position facing the lower surface of the semiconductor wafer W supported by the rotary support mechanism 330. As the microphone 360, it is preferable to adopt one having directivity with good sensitivity to the semiconductor wafer W supported by the rotation support mechanism 330. By using the microphone 360 having appropriate directivity, noise collection other than the acoustic noise generated on the semiconductor wafer W can be suppressed, and the SN ratio can be improved.

  Returning to FIG. 1, the control unit 3 controls various operation mechanisms provided in the substrate processing apparatus 100. FIG. 11 is a block diagram showing the configuration of the control unit 3. The hardware configuration of the control unit 3 is the same as that of a general computer. That is, the control unit 3 includes a CPU that is a circuit that performs various arithmetic processing, a ROM that is a read only memory that stores a basic program, a RAM that is a readable and writable memory that stores various information, control software, data, and the like. It has a magnetic disk to be stored. The CPU of the control unit 3 executes a predetermined processing program to advance the processing in the substrate processing apparatus 100.

  As shown in FIG. 11, the control unit 3 includes an acoustic analysis unit 371 and a determination unit 372. The sound analysis unit 371 and the determination unit 372 are function processing units realized by the CPU of the control unit 3 executing a predetermined processing program. The acoustic analysis unit 371 is connected to the microphone 360 installed in the alignment unit 130. The processing contents of the sound analysis unit 371 and the determination unit 372 will be described later.

  Further, a display unit 373 is connected to the control unit 3. The display unit 373 is, for example, a display panel such as a liquid crystal display provided on the outer wall of the substrate processing apparatus 100. A touch panel may be employed as the display unit 373. Although FIG. 1 shows the control unit 3 in the indexer unit 101, the present invention is not limited to this. The control unit 3 can be disposed at an arbitrary position in the substrate processing apparatus 100.

  Next, the processing operation of the semiconductor wafer W by the substrate processing apparatus 100 according to the present invention will be described. Here, first, the processing flow of the semiconductor wafer W in the entire substrate processing apparatus 100 will be briefly described, and then the crack detection processing in the alignment unit 130 and the flash heating processing in the flash heating unit 160 will be described. The semiconductor wafer W to be processed is a semiconductor substrate to which impurities (ions) are added by ion implantation. The activation of the impurities is performed by the flash light irradiation heat treatment (annealing) by the substrate processing apparatus 100. The processing procedure of the substrate processing apparatus 100 described below proceeds with the control unit 3 controlling each operation mechanism of the substrate processing apparatus 100.

  In the substrate processing apparatus 100, first, the semiconductor wafer W after the impurity implantation is placed on the load port 110 of the indexer unit 101 in a state where a plurality of semiconductor wafers W are accommodated in the carrier C. Then, the delivery robot 120 takes out the semiconductor wafers W from the carrier C one by one and carries them into the alignment chamber 131 of the alignment unit 130. When the semiconductor wafer W is carried into the alignment chamber 131, the gate valve 181 closes the space between the alignment chamber 131 and the indexer unit 101.

  In the alignment unit 130, the semiconductor wafer W is rotated about its vertical axis in a horizontal plane centering on the central portion thereof, and the orientation of the semiconductor wafer W is adjusted by optically detecting a notch or the like. In addition, when the semiconductor wafer W is rotated, the contact probe 350 is brought into contact with the end portion to generate sound to detect the presence or absence of a crack.

  Next, the gate valve 183 opens the space between the alignment chamber 131 and the transfer chamber 170, and the transfer robot 150 unloads the semiconductor wafer W whose direction has been adjusted from the alignment chamber 131 by the upper transfer hand 151a. The transfer robot 150 that has taken out the semiconductor wafer W turns to face the flash heating unit 160. Further, after the semiconductor wafer W is unloaded, the gate valve 183 closes the space between the alignment chamber 131 and the transfer chamber 170.

  Subsequently, the gate valve 185 opens the chamber 6 and the transfer chamber 170, and the transfer robot 150 loads the semiconductor wafer W into the chamber 6. At this time, if the preceding heat-treated semiconductor wafer W is present in the chamber 6, the lower-handed transfer hand 151b takes out the heat-treated semiconductor wafer W and then the upper transfer hand 151a. An unprocessed semiconductor wafer W is carried into the chamber 6 to perform wafer replacement.

  The semiconductor wafer W carried into the chamber 6 is preheated by the halogen lamp HL, and then subjected to flash heat treatment by flash light irradiation from the flash lamp FL. The impurity is activated by the flash heat treatment.

  After the flash heating process is completed, the transfer robot 150 unloads the semiconductor wafer W after flash heating from the chamber 6 by the transfer hand 151 b. The transfer robot 150 which has taken out the semiconductor wafer W pivots from the chamber 6 toward the cooling unit 140. Further, the gate valve 185 closes the chamber 6 and the transfer chamber 170, and the gate valve 184 opens the cool chamber 141 and the transfer chamber 170.

  Thereafter, the transfer robot 150 advances the transfer hand 151 b to load the semiconductor wafer W immediately after the flash heating into the cool chamber 141 of the cooling unit 140. After the semiconductor wafer W after flash heating is carried into the cool chamber 141, the gate valve 184 closes the space between the cool chamber 141 and the transfer chamber 170. In the cooling unit 140, a cooling process of the semiconductor wafer W after the flash heating process is performed. Since the temperature of the entire semiconductor wafer W at the time of unloading from the chamber 6 of the flash heating unit 160 is relatively high, it is cooled by the cooling unit 140 to around normal temperature. After the predetermined cooling processing time has elapsed, the gate valve 182 opens the space between the cool chamber 141 and the indexer unit 101, and the delivery robot 120 unloads the semiconductor wafer W after cooling from the cool chamber 141 to the carrier C. return. When a predetermined number of processed semiconductor wafers W are accommodated in the carrier C, the carrier C is unloaded from the load port 110 of the indexer unit 101.

  Next, crack detection processing in the alignment unit 130 will be described. FIG. 12 is a flowchart showing the processing procedure of the crack detection processing. The unprocessed semiconductor wafer W carried into the alignment chamber 131 of the alignment unit 130 by the delivery robot 120 is supported in a horizontal posture by the spin chuck 331 (see FIG. 10) of the rotation support mechanism 330. Then, the outer peripheral surface of the contact probe 350 abuts on the end of the semiconductor wafer W supported by the rotation support mechanism 330 (step S1). Incidentally, after the semiconductor wafer W is carried into the alignment unit 130, the transfer port between the alignment chamber 131 and the indexer unit 101 is closed by the gate valve 181. Further, the transfer port between the alignment chamber 131 and the transfer chamber 170 is also closed by the gate valve 183.

  Subsequently, the semiconductor wafer W is rotated in the horizontal plane by the rotary support mechanism 330 while the contact probe 350 is in contact with the end of the semiconductor wafer W (step S2). The orientation of the semiconductor wafer W is adjusted by detecting a notch or the like formed in the peripheral portion of the semiconductor wafer W by the optical mechanism 340 while rotating the semiconductor wafer W (alignment process). In addition, when the semiconductor wafer W rotates while the contact probe 350 whose outer peripheral surface is a rough surface abuts on the end of the semiconductor wafer W, the contact probe 350 slides along the end of the semiconductor wafer W The minute unevenness on the outer peripheral surface of the contact probe 350 gives a slight vibration to the semiconductor wafer W. As a result, the semiconductor wafer W generates a sound with a resonance frequency corresponding to its natural frequency.

  The microphone 360 collects the sound generated on the rotating semiconductor wafer W (step S3). The microphone 360 converts the collected sound into an electric signal and transmits the electric signal to the sound analysis unit 371 (see FIG. 11) of the control unit 3. The acoustic analysis unit 371 performs frequency analysis on the sound collected by the microphone 360 using fast Fourier transform (FFT) (step S4). The fast Fourier transform is an algorithm that converts a sound signal into frequency components. That is, the sound analysis unit 371 acquires the frequency spectrum of the sound collected by the microphone 360. The obtained frequency spectrum is stored in the storage unit (memory, magnetic disk or the like) of the control unit 3.

  Next, based on the frequency analysis result by the acoustic analysis unit 371, the determination unit 372 determines the presence or absence of a crack in the semiconductor wafer W (step S5). The storage unit of the control unit 3 stores in advance a reference frequency spectrum obtained by performing measurement and frequency analysis in steps S1 to S4 with respect to a reference wafer having no crack. FIG. 13 is a diagram showing an example of a reference frequency spectrum.

  It is preferable that the reference wafer having no crack be subjected to the same processing steps as the processing applied to the semiconductor wafer W before being carried into the substrate processing apparatus 100. In particular, in the case where film formation processing and pattern formation are performed on the semiconductor wafer W before being carried into the substrate processing apparatus 100, it is preferable to perform similar film formation processing and pattern formation on the reference wafer. This is because when the film forming process or pattern formation is performed on the semiconductor wafer W, the natural frequency changes, and the frequency spectrum obtained by the above-described frequency analysis also changes.

  For example, at the time of maintenance of the substrate processing apparatus 100, a reference wafer having no crack is carried into the alignment unit 130, and the same acoustic measurement and frequency analysis as those in steps S1 to S4 are performed to acquire a reference frequency spectrum. And stored in the storage unit of the control unit 3. The reference frequency spectrum is the frequency spectrum for the reference wafer, i.e. the frequency spectrum when no cracks are present on the wafer. The acoustic measurement and frequency analysis in steps S1 to S4 are performed on a plurality of reference wafers to obtain a plurality of frequency spectra, and statistical representative values such as their average value, median value or mode value are obtained. A reference frequency spectrum may be configured as a reference value. In this way, the reliability of the reference frequency spectrum, which serves as a reference for comparison, is improved.

  The determination unit 372 compares the reference frequency spectrum of the reference wafer having no crack with the frequency spectrum of the semiconductor wafer W to be processed obtained as described above by comparing the crack of the semiconductor wafer W. Determine the presence or absence of FIG. 14 is a view showing an example of a frequency spectrum (target frequency spectrum) of a semiconductor wafer W to be processed.

  As apparent from comparison between FIG. 13 and FIG. 14, the reference peak P1, which is the strongest peak in the reference frequency spectrum of FIG. 13, disappears in the frequency spectrum of FIG. Instead, a new peak P2 which did not exist in the reference frequency spectrum appears in the frequency spectrum of the semiconductor wafer W to be processed in FIG. The determination unit 372 compares the reference peak P1 in the reference frequency spectrum with the peak P2 newly appearing in the frequency spectrum of the semiconductor wafer W to be processed, and determines whether or not there is a crack in the semiconductor wafer W to be processed. judge. Specifically, the determination unit 372 determines whether the reference peak P1 has disappeared, whether a new peak P2 has appeared, the frequency shift from the reference peak P1 to the new peak P2, the reference peak P1 and the new peak P2 The presence or absence of a crack in the semiconductor wafer W is determined using one or more determination items of the intensity ratio, the ratio of the half value width of the reference peak P1 to the new peak P2, and the like. For example, when making a determination based on the frequency shift from the reference peak P1 to the new peak P2, the determination unit 372 determines that the frequency shifted from the reference peak P1 to the new peak P2 is higher than a predetermined threshold set in advance. If larger, it is determined that there is a crack, and if smaller than the threshold, it is determined that there is no crack. The determination result of the presence or absence of the crack may be displayed on the display unit 373.

  Next, based on the determination result by the determination unit 372, the control unit 3 determines whether to perform the flash heating process on the semiconductor wafer W (step S6). In the present embodiment, when the determination unit 372 determines that the semiconductor wafer W has a crack, the control unit 3 determines that the flash heating process is not performed on the semiconductor wafer W (step S7). The control unit 3 interrupts the processing on the semiconductor wafer W in the substrate processing apparatus 100 and issues an error notification of crack detection and processing interruption to the display unit 373. If flash heat treatment is performed on a semiconductor wafer W in which a crack is present, the stress may act on the semiconductor wafer W during flash light irradiation to develop the crack and the semiconductor wafer W may be cracked. By interrupting the processing of the semiconductor wafer W, wafer breakage in the flash heating unit 160 can be prevented in advance.

  On the other hand, when the determination unit 372 determines that the semiconductor wafer W is not cracked, the control unit 3 determines to execute the flash heating process on the semiconductor wafer W (step S8). The control unit 3 causes the transfer robot 150 to transfer the semiconductor wafer W to the flash heating unit 160 and causes the flash heating unit 160 to perform the flash heating process on the semiconductor wafer W.

  Description of the flash heating process in the flash heating unit 160 will be continued. Prior to the transfer of the semiconductor wafer W into the chamber 6, the valve 84 for air supply is opened, and the valves 89 and 192 for exhaustion are opened to start the supply and exhaust of the inside of the chamber 6. When the valve 84 is opened, nitrogen gas is supplied from the gas supply hole 81 to the heat treatment space 65. When the valve 89 is opened, the gas in the chamber 6 is exhausted from the gas exhaust hole 86. Thereby, the nitrogen gas supplied from the upper part of the heat treatment space 65 in the chamber 6 flows downward, and is exhausted from the lower part of the heat treatment space 65.

  Further, by opening the valve 192, the gas in the chamber 6 is also exhausted from the transfer opening 66. Furthermore, the atmosphere around the drive unit of the transfer mechanism 10 is also exhausted by an exhaust mechanism (not shown). During the heat treatment of the semiconductor wafer W in the flash heating unit 160, nitrogen gas is continuously supplied to the heat treatment space 65, and the supply amount thereof is appropriately changed according to the treatment process.

  Subsequently, the gate valve 185 is opened, the transfer opening 66 is opened, and the transfer robot 150 loads the semiconductor wafer W to be processed into the heat treatment space 65 in the chamber 6 through the transfer opening 66. The transfer robot 150 advances the transfer hand 151 a holding the semiconductor wafer W to a position immediately above the holding unit 7 and stops it. Then, when the pair of transfer arms 11 of the transfer mechanism 10 horizontally move from the retracted position to the transfer operation position and ascends, the lift pins 12 project from the upper surface of the susceptor 74 through the through holes 79 and the transfer hand 151a. From the semiconductor wafer W. At this time, the lift pin 12 ascends above the upper end of the support pin 77 of the susceptor 74.

  After the semiconductor wafer W is placed on the lift pins 12, the transfer robot 150 causes the transfer hand 151 a to withdraw from the heat treatment space 65, and the transfer opening 66 is closed by the gate valve 185. Then, the pair of transfer arms 11 is lowered, so that the semiconductor wafer W is transferred from the transfer mechanism 10 to the susceptor 74 of the holding unit 7 and held horizontally from below.

  Eight support pins 77 erected on the holding plate 75 support the lower surface of the semiconductor wafer W by point contact. Thereby, the semiconductor wafer W is mounted on the susceptor 74 in a horizontal attitude. The semiconductor wafer W is mounted on the susceptor 74 with the surface on which the pattern formation is performed and the impurity is implanted as the upper surface. A predetermined distance is formed between the lower surface of the semiconductor wafer W supported by the eight support pins 77 and the upper surface of the holding plate 75. The semiconductor wafer W is held on the upper surface of the holding plate 75 of the susceptor 74 inside the five guide pins 76. The pair of transfer arms 11 lowered to the lower side of the susceptor 74 is retracted by the horizontal movement mechanism 13 to the retracted position, that is, to the inside of the recess 62.

  After the semiconductor wafer W is mounted on the susceptor 74 of the holding unit 7 in a horizontal posture, the 40 halogen lamps HL are simultaneously turned on to start preheating (assist heating). The halogen light emitted from the halogen lamp HL is transmitted from the lower surface of the semiconductor wafer W through the lower chamber window 64 and the susceptor 74 formed of quartz. The semiconductor wafer W is preheated by receiving light irradiation from the halogen lamp HL, and the temperature rises. In addition, since the transfer arm 11 of the transfer mechanism 10 is retracted to the inside of the recess 62, it does not hinder the heating by the halogen lamp HL.

  When performing preheating with the halogen lamp HL, the temperature of the semiconductor wafer W is measured by the radiation thermometer 220. That is, the radiation thermometer 220 receives infrared light emitted from the lower surface of the semiconductor wafer W held by the susceptor 74 through the opening 78, and measures the wafer temperature during temperature rise. The measured temperature of the semiconductor wafer W is transmitted to the control unit 3. The control unit 3 monitors whether or not the temperature of the semiconductor wafer W, which is heated by the light irradiation from the halogen lamp HL, has reached a predetermined preheating temperature T1. The preheating temperature T1 is set to about 200 ° C. to 800 ° C., preferably about 350 ° C. to 600 ° C. (in the present embodiment, 600 ° C.) without the risk that the impurities added to the semiconductor wafer W diffuse due to heat. ).

  After the temperature of the semiconductor wafer W reaches the preheating temperature T1, the control unit 3 temporarily maintains the semiconductor wafer W at the preheating temperature T1. Specifically, when the temperature of the semiconductor wafer W measured by the radiation thermometer 220 reaches the preheating temperature T1, the control unit 3 controls the output of the halogen lamp HL to substantially reserve the temperature of the semiconductor wafer W. The heating temperature T1 is maintained.

  By performing such preheating with the halogen lamp HL, the entire semiconductor wafer W is uniformly heated to the preheating temperature T1. At the stage of preheating by the halogen lamp HL, the temperature of the peripheral portion of the semiconductor wafer W which is more likely to cause heat radiation tends to be lower than that at the central portion, but the arrangement density of the halogen lamps HL in the halogen lamp house 4 is The region facing the peripheral portion is higher than the region facing the central portion of the semiconductor wafer W. As a result, the amount of light irradiated to the peripheral portion of the semiconductor wafer W that easily dissipates heat increases, and the in-plane temperature distribution of the semiconductor wafer W in the preliminary heating stage can be made uniform. Furthermore, since the inner peripheral surface of the reflective ring 69 mounted on the chamber side portion 61 is a mirror surface, the inner peripheral surface of the reflective ring 69 increases the amount of light reflected toward the peripheral portion of the semiconductor wafer W, The in-plane temperature distribution of the semiconductor wafer W in the preheating stage can be made more uniform.

  When the temperature of the semiconductor wafer W reaches the preheating temperature T1 and a predetermined time has elapsed, the flash lamp FL irradiates the top surface of the semiconductor wafer W with flash light. At this time, a part of the flash light emitted from the flash lamp FL directly goes into the chamber 6, and the other part is once reflected by the reflector 52 and then goes into the chamber 6, and these flash lights are Flash heating of the semiconductor wafer W is performed by the irradiation.

  Since the flash heating is performed by flash light (flash light) irradiation from the flash lamp FL, the surface temperature of the semiconductor wafer W can be raised in a short time. That is, the flash light emitted from the flash lamp FL has an extremely short irradiation time of 0.1 milliseconds or more and 100 milliseconds or less, in which electrostatic energy previously stored in the capacitor is converted into an extremely short light pulse. It is a strong flashlight. Then, the surface temperature of the semiconductor wafer W flash-heated by the flash light irradiation from the flash lamp FL instantaneously rises to the processing temperature T2 of 1000 ° C. or higher, and the impurity implanted into the semiconductor wafer W is activated. After that, the surface temperature drops rapidly. As described above, since the surface temperature of the semiconductor wafer W can be raised and lowered in an extremely short time, the impurities can be activated while suppressing the diffusion of the impurity implanted into the semiconductor wafer W due to heat. Since the time required for activating the impurity is extremely short compared to the time required for its thermal diffusion, the activation can be performed even for a short time when diffusion of about 0.1 milliseconds to 100 milliseconds does not occur. Complete.

  During flash light irradiation, only the vicinity of the front surface of the semiconductor wafer W is rapidly raised to the processing temperature T2, while the back surface is hardly heated from the preheating temperature T1. For this reason, rapid thermal expansion occurs only in the vicinity of the surface of the semiconductor wafer W, and a warping stress acts on the semiconductor wafer W to make the surface a convex surface. At this time, if a crack is present inside the semiconductor wafer W, the stress may develop due to stress and the semiconductor wafer W may be cracked, but it is determined that the object of flash heat treatment is no crack. The semiconductor wafer W can prevent the wafer from cracking.

  After the flash heating process is completed, the halogen lamp HL is turned off after a predetermined time has elapsed. Thereby, the semiconductor wafer W is rapidly cooled from the preheating temperature T1. The temperature of the semiconductor wafer W being cooled is measured by the contact thermometer 230 or the radiation thermometer 220, and the measurement result is transmitted to the control unit 3. The control unit 3 monitors whether the temperature of the semiconductor wafer W has dropped to a predetermined temperature based on the measurement result. Then, after the temperature of the semiconductor wafer W is lowered to a predetermined temperature or less, the pair of transfer arms 11 of the transfer mechanism 10 horizontally move from the retracted position to the transfer operation position again to rise, whereby the lift pins 12 are susceptors The semiconductor wafer W after heat treatment which protrudes from the upper surface of the substrate 74 is received from the susceptor 74. Subsequently, the transfer opening 66 closed by the gate valve 185 is opened, and the semiconductor wafer W placed on the lift pins 12 is unloaded by the lower transfer hand 151 b of the transfer robot 150. The transfer robot 150 advances and stops the lower transfer hand 151 b to a position directly below the semiconductor wafer W pushed up by the lift pins 12. Then, the pair of transfer arms 11 is lowered, and the semiconductor wafer W after flash heating is transferred to the transfer hand 151 b and placed thereon. Thereafter, the transfer robot 150 withdraws the transfer hand 151 b from the chamber 6 to unload the semiconductor wafer W.

  In the present embodiment, when the semiconductor wafer W is rotated while the contact probe 350 is in contact with the end of the semiconductor wafer W, the contact probe 350 slides along the end of the semiconductor wafer W and the semiconductor wafer A weak vibration is given to W and a sound is generated. Then, the generated sound is collected by the microphone 360 and frequency analysis is performed by the acoustic analysis unit 371 to acquire a frequency spectrum. The determination unit 372 compares the reference frequency spectrum obtained by frequency analysis of the reference wafer having no crack with the frequency spectrum obtained by frequency analysis of the semiconductor wafer W to be processed. Determine the presence or absence of W cracks. That is, the crack existing in the semiconductor wafer W can be detected with a simple structure in which only the contact probe 350 and the microphone 360 are provided.

  Although a weak vibration is given to the semiconductor wafer W at the time of acoustic measurement, a large impact does not act, and there is no risk of damaging the pattern formed on the surface of the semiconductor wafer W or the semiconductor wafer W itself. In addition, since the crack detection is performed by giving weak vibration to the semiconductor wafer W to generate sound, it is less susceptible to the influence of the pattern formed on the wafer surface compared to the optical detection method, thereby reducing false detection. be able to.

  Further, in the present embodiment, the acoustic measurement is performed in parallel with the alignment process in which the semiconductor wafer W is rotated by the alignment unit 130 to adjust the direction. For this reason, it is not necessary to provide a separate process for collecting sound, and an increase in throughput in the substrate processing apparatus 100 can be suppressed.

  In addition, the presence or absence of a crack in the semiconductor wafer W is detected before the flash heating process in the flash heating unit 160 is performed, and the process is interrupted for the semiconductor wafer W determined to have the crack and the flash heating process is not performed. Therefore, the semiconductor wafer W can be prevented from cracking at the time of the flash heat treatment. As a result, it is possible to prevent contamination of other semiconductor wafers due to wafer breakage and to reduce the cleaning operation of the chamber 6 to minimize the down time of the apparatus.

  Although the embodiments of the present invention have been described above, various modifications can be made to the present invention other than those described above without departing from the scope of the present invention. For example, in the above embodiment, the presence or absence of the crack in the semiconductor wafer W is detected before the flash heating processing in the flash heating unit 160 is performed, but the presence or absence of the crack in the semiconductor wafer W after the flash heating processing is performed May be detected. Then, based on the determination result of the presence or absence of the crack, it is determined whether or not the process after the flash heating process is to be performed on the semiconductor wafer W. This determination may be performed by the control unit 3 or may be performed by the operator based on the determination result displayed on the display unit 373. When detecting the presence or absence of a crack after the flash heating process, the substrate processing apparatus 100 is provided with a mechanism for supporting and rotating the semiconductor wafer W, a contact probe contacting the end of the semiconductor wafer W, a microphone, and the like. Need to be provided separately.

  Further, the presence or absence of the crack in the semiconductor wafer W may be detected both before and after the flash heating process in the flash heating unit 160. Even in the semiconductor wafer W having no crack before the flash heat treatment, a new crack may occur due to the stress acting on the semiconductor wafer W at the time of the flash heat treatment. By detecting the presence or absence of a crack in the semiconductor wafer W both before and after the flash heat treatment, it is possible to detect a new crack generated at the time of such flash heat treatment. Also in this case, based on the determination result of the presence or absence of the crack after the flash heat treatment, it is determined whether or not to execute the process after the flash heat treatment on the semiconductor wafer W.

  In the above embodiment, the flash heat treatment is performed in the substrate processing apparatus 100. However, the present invention is not limited to this, and another substrate process such as a cleaning process may be performed on the semiconductor wafer W. good. Even in the cleaning process, the semiconductor wafer W may be subjected to high-temperature treatment, in which case thermal stress acts on the semiconductor wafer W, so that the technology according to the present invention can be suitably applied. That is, when performing substrate processing in which some stress acts on the semiconductor wafer W, the technique according to the present invention is suitable. When performing substrate processing other than flash heating processing, a unit (for example, cleaning processing unit in the case of cleaning processing) is mounted on the substrate processing apparatus 100 instead of the flash heating unit 160.

  Also, a plurality of contact probes of different types may be provided. FIG. 15 is a diagram showing a configuration example in which a plurality of contact probes are provided. In the example of FIG. 15, three types of contact probes 350a, 350b, and 350c are provided. The three types of contact probes 350a, 350b, and 350c differ in materials, surface roughness, and the like. The three contact probes 350a, 350b, 350c are rotated by the selection mechanism 351 while changing their positions. The selection mechanism 351 selects one of the three contact probes 350 a, 350 b, and 350 c and abuts the end of the semiconductor wafer W supported by the rotation support mechanism 330. A motor or the like can be used as the selection mechanism 351.

  Depending on the material and surface roughness of the contact probe, or the number and size of cracks inherent in the semiconductor wafer W, the semiconductor wafer W does not resonate even if the contact probe is slid along the edge of the semiconductor wafer W Or the resonance may be small. In such a case, the contact probe in contact with the end of the semiconductor wafer W is switched by the selection mechanism 351. Further, in order to improve the measurement accuracy, different contact probes may be sequentially slid along the edge of the semiconductor wafer W to acquire a plurality of frequency spectra.

  In the above embodiment, the semiconductor wafer W is rotated, but instead, the contact probe 350 may be moved and slid along the end of the fixedly supported semiconductor wafer W. . In particular, when the substrate to be treated is a polycrystalline silicon wafer for solar cells, etc., it is difficult to rotate the wafer and slide the contact probe 350 because the wafer is not circular but rectangular. . In such a case, it is preferable to move and slide the contact probe 350 along the edge of the wafer. That is, any configuration may be used as long as the contact probe 350 is relatively moved and slid along the end of the substrate.

  In addition, the microphone 360 may be provided inside the rotation support mechanism 330. FIG. 16 is a view showing a configuration example in which the microphone 360 is provided inside the rotation support mechanism 330. As shown in FIG. In this example, the spin chuck 331 of the rotation support mechanism 330 is a decompression chuck that decompresses the wall portion of the cylinder to suction and support the lower surface of the semiconductor wafer W. A microphone 360 is provided in the inner space of the spin chuck 331. In this way, external noise (for example, the driving noise of the transport robot 150) can be isolated by the wall surface of the spin chuck 331, and the SN ratio can be improved. In particular, when the spin chuck 331 is a decompression chuck, the sound insulation effect is high, so noise collection by the microphone 360 can be suppressed more effectively.

  In the above embodiment, frequency analysis is performed by fast Fourier transform. However, the present invention is not limited to this. For example, another frequency analysis method such as octave analysis may be adopted.

  Alternatively, a bare wafer not patterned may be used as a reference wafer having no crack. However, when the film forming process or the pattern formation is performed on the semiconductor wafer W to be processed, the natural frequency is often different from that of the bare wafer, so the semiconductor wafer W is applied as in the above embodiment. It is preferable to use a wafer which has undergone the same processing steps as the processing as a reference wafer.

  Also, instead of comparing with the reference frequency spectrum of the reference wafer, the frequency spectrum obtained by frequency analysis of the semiconductor wafer processed just before the semiconductor wafer W to be processed and the frequency spectrum of the semiconductor wafer W The presence or absence of a crack in the semiconductor wafer W may be determined by comparing the above. That is, the frequency spectrum is acquired by frequency analysis for all the semiconductor wafers W processed sequentially, and the presence or absence of the crack is detected by comparing them. If the semiconductor wafer W is included in the same lot, the same pattern formation is performed, and the frequency spectrum is the same if there is no crack, so the mutual comparison is preferable.

  In addition, background noise in a state in which the contact probe 350 is not slid along the edge of the semiconductor wafer W is previously measured, and the influence of the background is eliminated from the sound signal collected by the microphone 360. It is good. Specifically, for example, a filter (analog filter or digital filter) for cutting the frequency band of background noise may be provided, or a filter for subtracting background noise from an acoustic signal collected by the microphone 360 may be provided. You may In this way, the SN ratio can be improved. Also, since background noise changes depending on the operating environment and time zone, it is preferable to measure the background noise every lot or every inspection and calibrate the filter sequentially from the viewpoint of improving the stability.

  Further, in the above embodiment, the determination unit 372 determines the presence or absence of the crack in the semiconductor wafer W based on the frequency analysis result by the acoustic analysis unit 371, but even if the operator of the apparatus makes this determination good. Specifically, the display unit 373 displays the reference frequency spectrum (FIG. 13) of the reference wafer having no crack and the frequency spectrum (FIG. 14) of the semiconductor wafer W to be processed. The operator visually determines whether the semiconductor wafer W has a crack or not by visually comparing them. Depending on the number and size of the cracks, it may be difficult for the peak in the frequency spectrum to fluctuate, and in such a case, it may be possible to appropriately detect the presence or absence of a crack if judged by an operator with abundant experience .

  The operator may also determine whether to perform the flash heating process on the semiconductor wafer W. In particular, when it is prescribed that the flash heat treatment is performed depending on the degree of the crack existing in the semiconductor wafer W, it is preferable to determine by the operator.

  In addition, a plurality of acoustic measurement units may be mounted on the substrate processing apparatus 100, and the presence or absence of a crack in the semiconductor wafer W may be detected in parallel. Like the alignment unit 130, each acoustic measurement unit includes a mechanism for supporting and rotating the semiconductor wafer W, a contact probe that contacts the end of the semiconductor wafer W, a microphone, and the like.

  In the above embodiment, the semiconductor wafer W is preheated by light irradiation from the halogen lamp HL, but instead, a susceptor for holding the semiconductor wafer W is placed on a hot plate, The semiconductor wafer W may be preheated by heat conduction from the hot plate.

  Moreover, in the said embodiment, although 30 flash lamps FL were provided in the flash lamp house 5, it is not limited to this, The number of flash lamps FL can be made into arbitrary numbers. . Further, the flash lamp FL is not limited to the xenon flash lamp, and may be a krypton flash lamp. Further, the number of halogen lamps HL provided in the halogen lamp house 4 is not limited to 40, and any number can be used as long as a plurality of the lamps are disposed in the upper and lower stages.

  The substrate to be processed by the substrate processing apparatus according to the present invention is not limited to a semiconductor wafer, and may be a glass substrate used for a flat panel display such as a liquid crystal display device or a substrate for a solar cell. Further, the technique according to the present invention may be applied to bonding of metal and silicon or crystallization of polysilicon. As described above, when the shape of the substrate to be treated is other than circular, it is preferable to move the contact probe 350 along the edge of the substrate.

Reference Signs List 3 control unit 4 halogen lamp house 5 flash lamp house 6 chamber 7 holding unit 10 transfer mechanism 74 susceptor 100 substrate processing apparatus 101 indexer unit 130 alignment unit 140 cooling unit 150 transfer robot 160 flash heating unit 330 rotation support mechanism 331 spin chuck 332 Spin motor 340 Optical mechanism 350 Contact probe 351 Selection mechanism 360 Microphone 371 Acoustic analysis unit 372 Determination unit 373 Display unit FL Flash lamp HL Halogen lamp W Semiconductor wafer

Claims (15)

A crack detection method for detecting a crack existing in a substrate, comprising:
An acoustic generation step of generating an acoustic sound on the substrate by sliding the contact probe along the edge of the substrate;
Sound collection process of collecting the generated sound with a microphone,
An analysis step of performing frequency analysis on the sound collected in the sound collection step;
A determination step of determining the presence or absence of a crack in the substrate from the frequency spectrum obtained in the analysis step;
A crack detection method comprising: In the crack detection method according to claim 1,
In the determination step, the processing target is obtained by comparing the reference frequency spectrum obtained by frequency analysis of a substrate having no crack and the target frequency spectrum obtained by frequency analysis of a substrate to be processed. The crack detection method characterized by judging the existence of a crack of a substrate. In the crack detection method according to claim 2,
The crack detection method characterized in that in the determination step, the presence or absence of a crack of the substrate to be processed is determined based on a comparison between a reference peak in the reference frequency spectrum and a peak included in the target frequency spectrum. In the crack detection method according to any one of claims 1 to 3,
Before performing predetermined substrate processing on a substrate, a crack of the substrate is detected, and whether to execute the substrate processing on the substrate is determined based on the determination result in the determination step. Crack detection method. In the crack detection method according to claim 4,
It is characterized in that a crack of the substrate after the substrate processing is performed is detected, and whether or not a post-process of the substrate processing on the substrate is to be performed based on the determination result in the determination step. Crack detection method. In the crack detection method according to any one of claims 1 to 3,
After performing a predetermined substrate processing on the substrate, a crack of the substrate is detected, and it is determined whether or not to execute the post-processing of the substrate processing on the substrate based on the determination result in the determination step. Characteristic crack detection method. A crack detection device for detecting a crack present in a substrate, comprising:
A contact probe that abuts the end of the substrate;
A driving mechanism for relatively moving the contact probe and the substrate to slide the contact probe along an end of the substrate;
A microphone for collecting the sound generated on the substrate when the contact probe slides along the end of the substrate;
An analysis unit for performing frequency analysis on the sound collected by the microphone;
A determination unit that determines the presence or absence of a crack in the substrate from the frequency spectrum obtained by the frequency analysis;
A crack detection device comprising: In the crack detection device according to claim 7,
The determination unit is to be processed based on comparison of a reference frequency spectrum obtained by frequency analysis of a substrate having no crack and a target frequency spectrum obtained by frequency analysis of a substrate to be processed. A crack detection apparatus characterized by determining presence or absence of a crack in a substrate. In the crack detection device according to claim 8,
The crack detection device, wherein the determination unit determines the presence or absence of a crack in a substrate to be processed based on a comparison between a reference peak in the reference frequency spectrum and a peak included in the target frequency spectrum. In the crack detection device according to any one of claims 7 to 9,
A crack detection device characterized by further comprising a selection mechanism for selecting any one of a plurality of different types of contact probes to be brought into contact with the end of the substrate. The crack detection device according to any one of claims 7 to 10
The crack detection device characterized in that the drive mechanism includes a rotation support mechanism that supports the central portion of the substrate and rotates the substrate. In the crack detection device according to claim 11,
The crack detection device characterized in that the microphone is provided in the rotation support mechanism. A crack detection device according to any one of claims 7 to 12;
A substrate processing unit for performing predetermined substrate processing on the substrate;
Equipped with
Before performing substrate processing in the substrate processing unit on a substrate, a crack in the substrate is detected, and it is determined whether to execute the substrate processing on the substrate based on the determination result of the determination unit. A substrate processing apparatus characterized by In the substrate processing apparatus according to claim 13,
A substrate processing apparatus, comprising: detecting a crack of the substrate after the substrate processing in the substrate processing unit is performed. A crack detection device according to any one of claims 7 to 12;
A substrate processing unit for performing predetermined substrate processing on the substrate;
Equipped with
A substrate processing apparatus, comprising: detecting a crack of the substrate after the substrate processing in the substrate processing unit is performed.

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