JP6414373B1 - Method for evaluating fluidity of resin composition, method for selecting resin composition, and method for manufacturing semiconductor device - Google Patents

Method for evaluating fluidity of resin composition, method for selecting resin composition, and method for manufacturing semiconductor device Download PDF

Info

Publication number
JP6414373B1
JP6414373B1 JP2018540886A JP2018540886A JP6414373B1 JP 6414373 B1 JP6414373 B1 JP 6414373B1 JP 2018540886 A JP2018540886 A JP 2018540886A JP 2018540886 A JP2018540886 A JP 2018540886A JP 6414373 B1 JP6414373 B1 JP 6414373B1
Authority
JP
Japan
Prior art keywords
resin composition
shear modulus
sample
evaluation method
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2018540886A
Other languages
Japanese (ja)
Other versions
JPWO2019171475A1 (en
Inventor
省吾 祖父江
省吾 祖父江
竜也 牧野
竜也 牧野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Showa Denko Materials Co Ltd
Original Assignee
Hitachi Chemical Co Ltd
Showa Denko Materials Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Chemical Co Ltd, Showa Denko Materials Co Ltd filed Critical Hitachi Chemical Co Ltd
Application granted granted Critical
Publication of JP6414373B1 publication Critical patent/JP6414373B1/en
Publication of JPWO2019171475A1 publication Critical patent/JPWO2019171475A1/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01NINVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N11/00Investigating flow properties of materials, e.g. viscosity, plasticity; Analysing materials by determining flow properties
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01NINVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N3/00Investigating strength properties of solid materials by application of mechanical stress
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01NINVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N11/00Investigating flow properties of materials, e.g. viscosity, plasticity; Analysing materials by determining flow properties
    • G01N2011/0046In situ measurement during mixing process
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32135Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/32145Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/4847Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83385Shape, e.g. interlocking features
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92Specific sequence of method steps
    • H01L2224/922Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
    • H01L2224/9222Sequential connecting processes
    • H01L2224/92242Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92247Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Immunology (AREA)
  • Health & Medical Sciences (AREA)
  • Biochemistry (AREA)
  • General Health & Medical Sciences (AREA)
  • Chemical & Material Sciences (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Pathology (AREA)
  • Analytical Chemistry (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Investigating Strength Of Materials By Application Of Mechanical Stress (AREA)

Abstract

本開示は樹脂組成物の流動性評価方法に関する。この方法は、樹脂組成物からなる試料を準備する工程と、試料に対して歪みを与え且つ温度Tにおいて試料のズリ弾性率を測定することによって、温度Tにおける試料のズリ弾性率の時間的変化を把握する工程とを含む。
The present disclosure relates to a method for evaluating the fluidity of a resin composition. This method includes the steps of preparing a sample comprising a resin composition, and measuring the shear modulus of the sample at temperature T by applying strain to the sample and measuring the shear modulus of the sample at temperature T. And the process of grasping.

Description

本開示は、樹脂組成物の流動性評価方法、樹脂組成物の選別方法及び半導体装置の製造方法に関する。   The present disclosure relates to a resin composition fluidity evaluation method, a resin composition selection method, and a semiconductor device manufacturing method.

スマートフォン、タブレットPC等の電子機器の多機能化に伴い、半導体素子を多段に積層することによって高容量化したスタックドMCP(Multi Chip Package)が普及している。半導体素子の実装にはフィルム状接着剤が広く用いられている。しかし、多機能化の傾向があるにも関わらず、現行のワイヤボンドを使用した半導体素子の接続方式ではデータの処理速度に限界がある。他方、充電せずにより長時間使用したいとのニーズが高まっていることから、省電力化も求められつつある。高速化及び省電力化を目的として、半導体素子をまるごとダイボンドフィルムで埋め込むことで素子の小型化を図る構造が開発されている(例えば、特許文献1の図6参照)。   As electronic devices such as smartphones and tablet PCs become multifunctional, stacked MCPs (Multi Chip Packages), which have a high capacity by stacking semiconductor elements in multiple stages, have become widespread. Film adhesives are widely used for mounting semiconductor elements. However, despite the trend toward multi-functionality, there is a limit to the data processing speed in the current semiconductor device connection method using wire bonds. On the other hand, since there is an increasing need to use the battery for a longer time without charging, power saving is being demanded. For the purpose of speeding up and saving power, a structure has been developed in which a semiconductor element is entirely embedded with a die bond film to reduce the size of the element (see, for example, FIG. 6 of Patent Document 1).

また、ワイヤボンドではなく貫通電極によって半導体素子同士を接続する新しい構造の電子機器装置も開発されてきている。貫通電極を有した半導体素子の作製には、半導体素子を支持体に仮固定して加工するための仮固定材が必要となる。この半導体素子は表面に無数の電極を有した構造をしているため、仮固定材には、この表面の微細な凹凸を埋め込む優れた流動性が必要となる(特許文献2)。   In addition, electronic device apparatuses having a new structure in which semiconductor elements are connected to each other by a through electrode instead of a wire bond have been developed. In order to manufacture a semiconductor element having a through electrode, a temporary fixing material for temporarily fixing and processing the semiconductor element on a support is required. Since this semiconductor element has a structure having an infinite number of electrodes on the surface, the temporary fixing material needs excellent fluidity to embed fine irregularities on the surface (Patent Document 2).

特開2017−168850号公報JP 2017-168850 A 国際公開第2017/191815号International Publication No. 2017/191815

樹脂組成物からなるダイボンドフィルムに半導体素子を埋め込む工程においては、ダイボンドフィルムは大きく変形する必要がある。あるいは、仮固定材を構成する樹脂組成物は貫通電極のような微細な凹凸に対して追従することが求められる。半導体装置の製造過程において、埋め込み材料又は仮固定材として使用予定の樹脂組成物がそのような変形能及び追従性を有しているかを事前に予測することは難しく、実際に使ってみないと分からないことが多い。   In the step of embedding a semiconductor element in a die bond film made of a resin composition, the die bond film needs to be greatly deformed. Or it is calculated | required that the resin composition which comprises a temporary fixing material follows a fine unevenness | corrugation like a penetration electrode. In the manufacturing process of a semiconductor device, it is difficult to predict in advance whether the resin composition to be used as an embedding material or a temporary fixing material has such deformability and followability. I often don't know.

従来、樹脂組成物の性能を評価する指標の一つとして流動性が知られている。例えば、レオメータを用いて樹脂組成物のズリ粘度を測定することによって、その流動性を把握し、埋込性の良否を判断することがある。しかし、上述のようなフィルムの大きな変形及び微細な凹凸への追従性はズリ粘度だけでは説明できない事象を含むものであり、従来の方法では樹脂組成物の適否を十全に評価することができなかった。   Conventionally, fluidity is known as one of indexes for evaluating the performance of a resin composition. For example, by measuring the shear viscosity of the resin composition using a rheometer, the fluidity of the resin composition may be grasped and the quality of embedding may be judged. However, the large deformation of the film as described above and the ability to follow fine irregularities include events that cannot be explained only by shear viscosity, and the conventional method can fully evaluate the suitability of the resin composition. There wasn't.

本開示は、上記事情に鑑みてなされたものであり、樹脂組成物の流動性を評価するための新たな方法を提供することを目的とする。本開示は、この評価方法を含む樹脂組成物の選別方法及び半導体装置の製造方法を提供することを目的とする。   The present disclosure has been made in view of the above circumstances, and an object thereof is to provide a new method for evaluating the fluidity of a resin composition. An object of the present disclosure is to provide a resin composition sorting method and a semiconductor device manufacturing method including the evaluation method.

本開示は樹脂組成物の流動性評価方法を提供する。この評価方法は、樹脂組成物からなる試料を準備する工程と、試料に対して歪みを与え且つ温度Tにおいて試料のズリ弾性率を測定することによって、温度Tにおける試料のズリ弾性率の時間的変化を把握する工程とを含む。温度Tにおけるズリ弾性率の時間的変化を把握することで、樹脂組成物の特性(変形能及び微細な凹凸への追従性)をより的確に評価することができる。この評価方法は、例えば、半導体装置の製造過程において使用されるダイボンディングフィルム及び仮固定材等を構成する樹脂組成物の埋込性の良否を判断するのに有用である。   The present disclosure provides a method for evaluating the fluidity of a resin composition. This evaluation method includes a step of preparing a sample made of a resin composition, and measuring the shear modulus of the sample at temperature T by applying strain to the sample and measuring the shear modulus of the sample at temperature T. And a process of grasping changes. By grasping the temporal change of the shear modulus at the temperature T, the characteristics (deformability and followability to fine irregularities) of the resin composition can be more accurately evaluated. This evaluation method is useful, for example, for determining whether the embedding property of the resin composition constituting the die bonding film and the temporary fixing material used in the manufacturing process of the semiconductor device is good.

ズリ弾性率の時間的変化を定量化するため、マクスウェルモデルの応力緩和の式を利用してもよい。すなわち、本開示に係る評価方法は、試料のズリ弾性率の測定結果に基づいて、マクスウェルモデルの応力緩和の下記式(1)を用いて導かれる、G(t)/G=0.3679となる時間(応力緩和時間τ)を読み取る工程を更に含んでもよい。
G(t)=G×e(−t/τ) (1)
[式(1)において、G(t)は時間t(秒)におけるズリ弾性率を示し、Gは初期のズリ弾性率を示し、tは時間(秒)を示し、τは応力緩和時間(秒)を示す。]
なお、「G(t)/G=0.3679」における数値「0.3679」は以下のとおり算出されるものである。
t=τのとき
G(t)=G×e(−1)
G(t)/G=e(−1)=0.3679
The Maxwell model stress relaxation equation may be used to quantify the change in shear modulus over time. That is, in the evaluation method according to the present disclosure, G (t) / G 0 = 0.3679, which is derived using the following equation (1) for stress relaxation of the Maxwell model based on the measurement result of the shear modulus of the sample. A step of reading the time (stress relaxation time τ) to become may be further included.
G (t) = G 0 × e (−t / τ) (1)
[In the formula (1), G (t) represents the shear modulus at time t (seconds), G 0 represents the initial shear modulus, t represents time (seconds), and τ represents the stress relaxation time ( Seconds). ]
The numerical value “0.3679” in “G (t) / G 0 = 0.3679” is calculated as follows.
When t = τ G (t) = G 0 × e (−1)
G (t) / G 0 = e (−1) = 0.3679

本開示は樹脂組成物の選定方法を提供する。この選定方法は、上記の流動性評価方法を、温度Tが120℃である条件下で実施する工程と、評価対象の樹脂組成物が下記条件1,2の両方を満たすか否かを判定する工程とを含み、条件1,2の両方を満たす樹脂組成物を良と判定する。
条件1:120℃における応力緩和時間が12秒以下である。
条件2:120℃における初期のズリ弾性率が35kPa以下である。
The present disclosure provides a method for selecting a resin composition. In this selection method, the above-described fluidity evaluation method is performed under the condition that the temperature T is 120 ° C. and whether the evaluation target resin composition satisfies both of the following conditions 1 and 2 is determined. And a resin composition that satisfies both conditions 1 and 2 is determined to be good.
Condition 1: Stress relaxation time at 120 ° C. is 12 seconds or less.
Condition 2: The initial shear modulus at 120 ° C. is 35 kPa or less.

上記選定方法は、例えば、半導体装置の製造過程において使用されるダイボンディングフィルム及び仮固定材等を構成する樹脂組成物を選定するのに有用である。   The above selection method is useful, for example, for selecting a resin composition that constitutes a die bonding film and a temporary fixing material used in the manufacturing process of a semiconductor device.

本開示に係る半導体装置の製造方法は、この選定方法で良と判定された樹脂組成物を埋め込み材料又は仮固定材として使用するものである。   The semiconductor device manufacturing method according to the present disclosure uses a resin composition determined to be good by this selection method as an embedding material or a temporary fixing material.

本開示によれば、樹脂組成物の流動性を評価するための新たな方法が提供される。すなわち、この評価方法によれば、ズリ粘度だけでは説明が困難であったフィルムの特性(例えば、変形能又は微細な凹凸への追従性)を定量的に評価することができる。また、本開示によれば、上記評価方法を含む樹脂組成物の選別方法及び半導体装置の製造方法が提供される。   According to the present disclosure, a new method for evaluating the fluidity of a resin composition is provided. That is, according to this evaluation method, it is possible to quantitatively evaluate the film characteristics (for example, deformability or followability to fine irregularities) that are difficult to explain only by shear viscosity. Moreover, according to this indication, the selection method of the resin composition containing the said evaluation method and the manufacturing method of a semiconductor device are provided.

図1は半導体装置の一例を模式的に示す断面図である。FIG. 1 is a cross-sectional view schematically showing an example of a semiconductor device. 図2は図1に示す半導体装置を製造するための一連の工程を示す模式断面図である。2 is a schematic cross-sectional view showing a series of steps for manufacturing the semiconductor device shown in FIG. 図3は図1に示す半導体装置を製造するための一連の工程を示す模式断面図である。FIG. 3 is a schematic cross-sectional view showing a series of steps for manufacturing the semiconductor device shown in FIG. 図4は図1に示す半導体装置を製造するための一連の工程を示す模式断面図である。4 is a schematic cross-sectional view showing a series of steps for manufacturing the semiconductor device shown in FIG. 図5は図1に示す半導体装置を製造するための一連の工程を示す模式断面図である。FIG. 5 is a schematic cross-sectional view showing a series of steps for manufacturing the semiconductor device shown in FIG. 図6は図1に示す半導体装置を製造するための一連の工程を示す模式断面図である。6 is a schematic cross-sectional view showing a series of steps for manufacturing the semiconductor device shown in FIG. 図7は試料1〜14に係る樹脂組成物のズリ弾性率の時間的変化を示すグラフである。FIG. 7 is a graph showing temporal changes in the shear modulus of the resin compositions according to Samples 1-14. 図8は試料1〜14に係る樹脂組成物の特性(横軸:ズリ弾性率[kPa]、縦軸:応力緩和時間τ(秒))をプロットしたグラフである。FIG. 8 is a graph plotting the characteristics (horizontal axis: shear modulus [kPa], vertical axis: stress relaxation time τ (seconds)) of the resin compositions according to Samples 1-14.

以下、本開示の実施形態について詳細に説明するが、本発明は以下の実施形態に限定されるものではない。   Hereinafter, embodiments of the present disclosure will be described in detail, but the present invention is not limited to the following embodiments.

<樹脂組成物の流動性評価方法>
本実施形態に係る評価方法は、樹脂組成物の流動性を評価するためのものであり、樹脂組成物からなる試料を準備する工程と、試料に対して歪みを与え且つ温度Tにおいて試料のズリ弾性率を測定することによって、温度Tにおける試料のズリ弾性率の時間的変化を把握する工程とを含む。
<Method for evaluating fluidity of resin composition>
The evaluation method according to the present embodiment is for evaluating the fluidity of a resin composition, and includes a step of preparing a sample made of the resin composition, a strain applied to the sample, and a sample slip at temperature T. And measuring a change in shear modulus of the sample at temperature T by measuring the elastic modulus.

ズリ弾性率の時間的変化を定量化するため、マクスウェルモデルの応力緩和の式を利用してもよい。すなわち、試料のズリ弾性率の測定結果に基づいて、マクスウェルモデルの応力緩和の下記式(1)を用いて、G(t)/G=0.3679となる時間(応力緩和時間τ)を読み取ってもよい。試料の初期ズリ弾性率(G)は試料のズリ弾性率の測定結果に基づいて求めることができる。
G(t)=G×e(−t/τ) (1)
[式(1)において、G(t)は時間t(秒)におけるズリ弾性率を示し、Gは初期のズリ弾性率を示し、tは時間(秒)を示し、τは応力緩和時間(秒)を示す。]
The Maxwell model stress relaxation equation may be used to quantify the change in shear modulus over time. That is, based on the measurement result of the shear modulus of the sample, the time (stress relaxation time τ) when G (t) / G 0 = 0.3679 is obtained using the following formula (1) of stress relaxation of the Maxwell model. You may read. The initial shear modulus (G 0 ) of the sample can be obtained based on the measurement result of the shear modulus of the sample.
G (t) = G 0 × e (−t / τ) (1)
[In the formula (1), G (t) represents the shear modulus at time t (seconds), G 0 represents the initial shear modulus, t represents time (seconds), and τ represents the stress relaxation time ( Seconds). ]

温度Tにおけるズリ弾性率の測定は、例えば、少なくとも10秒にわたって行うことが好ましく、測定時間は30〜1800秒又は60〜600秒であってもよい。温度Tは、安定的に測定を行う観点から、−50〜400℃の範囲の特定の温度であることが好ましく、評価対象の樹脂組成物の種類及び用途等に応じて設定すればよい。例えば、樹脂組成物の種類が熱硬化性樹脂組成物であり且つその用途が半導体装置の製造に使用されるダイボンディングフィルム又は仮固定材である場合、例えば、温度Tは30〜300℃であり、50〜200℃又は80〜150℃であってもよい。   The measurement of the shear modulus at the temperature T is preferably performed, for example, for at least 10 seconds, and the measurement time may be 30 to 1800 seconds or 60 to 600 seconds. The temperature T is preferably a specific temperature in the range of −50 to 400 ° C. from the viewpoint of performing stable measurement, and may be set according to the type and application of the resin composition to be evaluated. For example, when the kind of the resin composition is a thermosetting resin composition and the use is a die bonding film or a temporary fixing material used for manufacturing a semiconductor device, for example, the temperature T is 30 to 300 ° C. 50-200 degreeC or 80-150 degreeC may be sufficient.

試料に対して与える歪みの量は、安定的に測定を行う観点から、0.1〜30%の範囲であることが好ましく、評価対象の樹脂組成物の種類及び用途等に応じて設定すればよい。例えば、樹脂組成物の種類が熱硬化性樹脂組成物であり且つその用途が半導体装置の製造に使用されるダイボンディングフィルム又は仮固定材である場合、例えば、歪みの量は0.5〜25%であり、1〜20%又は2〜15%であってもよい。   The amount of strain applied to the sample is preferably in the range of 0.1 to 30% from the viewpoint of performing stable measurement, and can be set according to the type and application of the resin composition to be evaluated. Good. For example, when the type of the resin composition is a thermosetting resin composition and the application is a die bonding film or a temporary fixing material used for manufacturing a semiconductor device, for example, the amount of distortion is 0.5 to 25. % And may be 1-20% or 2-15%.

試料はフィルム状に形成することが好ましい。試料の厚さは、安定的に測定を行う観点から、10〜1000μmであることが好ましく、評価対象の樹脂組成物の種類及び用途等に応じて設定すればよい。例えば、樹脂組成物の種類が熱硬化性樹脂組成物であり且つその用途が半導体装置の製造において半導体チップ(例えば、コントローラチップ)が埋め込まれるダイボンディングフィルム、又は仮固定材である場合、例えば、フィルムの厚さは50〜800μmであり、80〜600μm又は100〜500μmであってもよい。なお、フィルムの厚さが薄すぎてズリ弾性率の測定が困難である場合は、複数枚を重ね合わせることによって厚さを増した試料を準備すればよい。   The sample is preferably formed in a film shape. The thickness of the sample is preferably 10 to 1000 μm from the viewpoint of stable measurement, and may be set according to the type and application of the resin composition to be evaluated. For example, when the type of the resin composition is a thermosetting resin composition and the use is a die bonding film in which a semiconductor chip (for example, a controller chip) is embedded in manufacturing a semiconductor device, or a temporary fixing material, The thickness of the film is 50 to 800 μm, and may be 80 to 600 μm or 100 to 500 μm. In addition, when the thickness of a film is too thin and it is difficult to measure the shear modulus, a sample with an increased thickness may be prepared by overlapping a plurality of sheets.

本実施形態に係る評価方法によれば、温度Tにおけるズリ弾性率の時間的変化を把握することで、樹脂組成物の特性をより的確に評価することができる。この評価方法は、例えば、半導体装置の製造過程において使用されるダイボンディングフィルムを構成する樹脂組成物の埋込性の良否を判断するのに有用である。   According to the evaluation method according to the present embodiment, the characteristics of the resin composition can be more accurately evaluated by grasping the temporal change in the shear modulus at the temperature T. This evaluation method is useful, for example, for determining whether or not the embedding property of the resin composition constituting the die bonding film used in the manufacturing process of the semiconductor device is good.

<樹脂組成物の選定方法>
本実施形態に係る選定方法は、例えば、半導体装置の製造過程において使用されるダイボンディングフィルムを構成する樹脂組成物を選定するためのものである。すなわち、この選定方法は、上記実施形態に係る流動性評価方法を、温度Tが120℃である条件下で実施する工程と、評価対象の樹脂組成物が下記条件1,2の両方を満たすか否かを判定する工程とを含み、条件1,2の両方を満たす樹脂組成物を良と判定する。
条件1:120℃における応力緩和時間が12秒以下である。
条件2:120℃における初期のズリ弾性率が35kPa以下である。
<Selection method of resin composition>
The selection method according to the present embodiment is, for example, for selecting a resin composition constituting a die bonding film used in the manufacturing process of a semiconductor device. That is, in this selection method, whether the fluidity evaluation method according to the above embodiment is performed under a condition where the temperature T is 120 ° C. and whether the resin composition to be evaluated satisfies both of the following conditions 1 and 2. A resin composition that satisfies both conditions 1 and 2 is determined to be good.
Condition 1: Stress relaxation time at 120 ° C. is 12 seconds or less.
Condition 2: The initial shear modulus at 120 ° C. is 35 kPa or less.

条件1に関し、120℃における応力緩和時間が12秒以下であることは、樹脂組成物に対して熱が加わってから十分に短い時間でズリ弾性率が低下し、流動性が高まることを意味する。これにより、半導体装置を製造に要する時間の短縮化に寄与する。かかる観点から、120℃における応力緩和時間は11秒以下であることが好ましく、0.1〜11秒であってもよい。   Regarding Condition 1, the stress relaxation time at 120 ° C. of 12 seconds or less means that the shear modulus decreases and fluidity increases in a sufficiently short time after heat is applied to the resin composition. . This contributes to shortening the time required for manufacturing the semiconductor device. From this viewpoint, the stress relaxation time at 120 ° C. is preferably 11 seconds or less, and may be 0.1 to 11 seconds.

条件2に関し、120℃における初期のズリ弾性率が35kPa以下であることは、初期の段階からズリ弾性率がある程度低いことを意味する。120℃における初期のズリ弾性率は30kPa以下であることが好ましく、1〜30kPaであってもよい。   Regarding Condition 2, an initial shear modulus of 35 kPa or less at 120 ° C. means that the shear modulus is somewhat low from the initial stage. The initial shear modulus at 120 ° C. is preferably 30 kPa or less, and may be 1 to 30 kPa.

上記実施形態においては、温度Tが120℃である条件下でズリ弾性率の測定を実施する場合を例示したが、半導体装置の製造過程において樹脂組成物が使用される温度条件に応じて温度Tは設定すればよく、例えば80℃又は100℃であってもよいし、140℃であってもよい。   In the above embodiment, the case where the shear modulus is measured under the condition that the temperature T is 120 ° C. is exemplified. However, the temperature T depends on the temperature condition in which the resin composition is used in the manufacturing process of the semiconductor device. May be set, for example, it may be 80 ° C. or 100 ° C., or 140 ° C.

<半導体装置及びその製造方法>
本実施形態に係る半導体装置の製造方法は、上記実施形態に係る選定方法で良と判定された樹脂組成物を埋め込み材料として使用するものである。以下、図面を参照しながら、半導体装置及びその製造方法の一例について説明する。
<Semiconductor device and manufacturing method thereof>
The manufacturing method of the semiconductor device according to the present embodiment uses a resin composition determined as good by the selection method according to the above-described embodiment as an embedding material. Hereinafter, an example of a semiconductor device and a manufacturing method thereof will be described with reference to the drawings.

図1に示す半導体装置100は、基板10に、第1のワイヤ11を介して1段目の第1の半導体素子Waがワイヤボンディング接続されている。更に、第1の半導体素子Wa上に、第2の半導体素子Wbがフィルム状接着剤(樹脂組成物)を介して圧着する工程を経ることで、第2の半導体素子Wb及び第1のワイヤ11がフィルム状接着剤の硬化物20に埋め込まれてなる半導体装置である。半導体装置100では、基板10と第2の半導体素子Wbとが第2のワイヤ12を介して電気的に接続されるとともに、第2の半導体素子Wbが封止材40により封止されている。本実施形態においては、熱硬化性樹脂組成物からなるフィルム状接着剤20P(図3参照)が流動性を評価する対象である。フィルム状接着剤20Pは加熱処理によって硬化物20となるものである。   In the semiconductor device 100 shown in FIG. 1, a first semiconductor element Wa in the first stage is connected to a substrate 10 via a first wire 11 by wire bonding. Further, the second semiconductor element Wb and the first wire 11 are subjected to a process in which the second semiconductor element Wb is pressure-bonded onto the first semiconductor element Wa via a film adhesive (resin composition). Is a semiconductor device formed by being embedded in a cured product 20 of a film adhesive. In the semiconductor device 100, the substrate 10 and the second semiconductor element Wb are electrically connected via the second wire 12, and the second semiconductor element Wb is sealed with the sealing material 40. In this embodiment, the film adhesive 20P (refer FIG. 3) which consists of a thermosetting resin composition is an object which evaluates fluidity | liquidity. The film adhesive 20P becomes a cured product 20 by heat treatment.

基板10は、表面に回路パターン10a,10bを有する。第1の半導体素子Waは、回路パターン10a上に接着剤15を介して圧着されている。第1の半導体素子Waは、半導体装置100を駆動するためのコントローラチップである。第1の半導体素子Waの厚さは、例えば、10〜170μmである。第2の半導体素子Wbは、第1の半導体素子Wa及び回路パターン10bの一部が覆われるようにフィルム状接着剤の硬化物20を介して基板10に搭載されている。第2の半導体素子Wbの厚さは、例えば、20〜400μmであってよい。   The substrate 10 has circuit patterns 10a and 10b on the surface. The first semiconductor element Wa is pressure-bonded onto the circuit pattern 10a via an adhesive 15. The first semiconductor element Wa is a controller chip for driving the semiconductor device 100. The thickness of the first semiconductor element Wa is, for example, 10 to 170 μm. The second semiconductor element Wb is mounted on the substrate 10 via a cured product 20 of a film adhesive so that the first semiconductor element Wa and a part of the circuit pattern 10b are covered. The thickness of the second semiconductor element Wb may be, for example, 20 to 400 μm.

フィルム状接着剤の硬化物20は、基板10上の第1の半導体素子Wa及び回路パターン10a,10bに起因する段差に追従したものであることが好ましい。換言すれば、基板10及びその表面上に配置された第1の半導体素子Waと、硬化物20との界面に空隙がないことが好ましい。   It is preferable that the cured product 20 of the film adhesive follows a step caused by the first semiconductor element Wa and the circuit patterns 10a and 10b on the substrate 10. In other words, it is preferable that there is no void at the interface between the substrate 10 and the first semiconductor element Wa disposed on the surface thereof and the cured product 20.

図2〜6は半導体装置100を製造するための一連の工程を示す模式断面図である。本実施形態に係る半導体装置の製造方法は、第1の半導体素子Waを第1のワイヤ11を介して基板10と電気的に接続する第1のワイヤボンディング工程と、第2の半導体素子Wbとその片面に貼付されたフィルム状接着剤20Pとを有する接着剤付き半導体素子30を準備する工程と、接着剤付き半導体素子30を基板10に接着するダイボンド工程と、第2の半導体素子Wbを第2のワイヤ12を介して基板10と電気的に接続する第2のワイヤボンディング工程とを少なくとも含む。   2 to 6 are schematic cross-sectional views showing a series of steps for manufacturing the semiconductor device 100. The semiconductor device manufacturing method according to the present embodiment includes a first wire bonding step in which the first semiconductor element Wa is electrically connected to the substrate 10 through the first wire 11, and the second semiconductor element Wb. A step of preparing an adhesive-attached semiconductor element 30 having a film-like adhesive 20P affixed on one side thereof, a die bonding step of adhering the adhesive-attached semiconductor element 30 to the substrate 10, and a second semiconductor element Wb And a second wire bonding step of electrically connecting to the substrate 10 via the two wires 12.

図2に示すとおり、基板10上の回路パターン10a上に、接着剤15を有する第1の半導体素子Waを圧着し、第1のワイヤ11を介して基板10上の回路パターン10aと第1の半導体素子Waとを電気的にボンディング接続する(第1のワイヤボンディング工程)。   As shown in FIG. 2, the first semiconductor element Wa having the adhesive 15 is pressure-bonded onto the circuit pattern 10 a on the substrate 10, and the circuit pattern 10 a on the substrate 10 and the first pattern are connected to each other via the first wire 11. The semiconductor element Wa is electrically bonded and connected (first wire bonding step).

図3に示すとおり、第2の半導体素子Wbと、その一方の面にフィルム状接着剤20Pとの接着剤付き半導体素子30を別途準備する(接着剤付き半導体素子を準備する工程)。接着剤付き半導体素子30は、半導体ウェハの片面に、ダイボンディングフィルム(フィルム状接着剤20Pと同じ樹脂組成物)及びダイシングフィルムをこの順序で積層し、ダイシング工程及びピックアップ工程を経ることによって得てもよい。   As shown in FIG. 3, a second semiconductor element Wb and a semiconductor element 30 with an adhesive with a film adhesive 20P on one surface thereof are separately prepared (step of preparing a semiconductor element with an adhesive). The adhesive-attached semiconductor element 30 is obtained by laminating a die bonding film (the same resin composition as the film adhesive 20P) and a dicing film in this order on one surface of a semiconductor wafer, and passing through a dicing step and a pick-up step. Also good.

次に、図4及び図5に示すとおり、接着剤付き半導体素子30を、フィルム状接着剤20Pによって第1のワイヤ11及び第1の半導体素子Waが覆われるように、基板10に圧着させる(ダイボンド工程)。ダイボンド工程は、フィルム状接着剤20Pを80〜180℃、0.01〜0.50MPaの条件で0.5〜3.0秒間圧着することが好ましい。フィルム状接着剤20Pを60〜175℃、0.3〜0.7MPaの条件で、5分間以上加圧及び加熱することで、フィルム状接着剤20Pが硬化して硬化物20となる。   Next, as illustrated in FIGS. 4 and 5, the adhesive-attached semiconductor element 30 is pressure-bonded to the substrate 10 so that the first wire 11 and the first semiconductor element Wa are covered with the film adhesive 20 </ b> P ( Die bonding process). In the die bonding step, the film adhesive 20P is preferably pressure-bonded for 0.5 to 3.0 seconds under conditions of 80 to 180 ° C. and 0.01 to 0.50 MPa. By pressing and heating the film-like adhesive 20P under the conditions of 60 to 175 ° C. and 0.3 to 0.7 MPa for 5 minutes or more, the film-like adhesive 20P is cured and becomes a cured product 20.

次いで、図6に示すとおり、基板10と第2の半導体素子Wbとを第2のワイヤ12を介して電気的に接続する(第2のワイヤボンディング工程)。その後、回路パターン10b、第2のワイヤ12及び第2の半導体素子Wbを封止材40で封止する。このような工程を経ることで半導体装置100を製造することができる。   Next, as shown in FIG. 6, the substrate 10 and the second semiconductor element Wb are electrically connected via the second wire 12 (second wire bonding step). Thereafter, the circuit pattern 10 b, the second wire 12, and the second semiconductor element Wb are sealed with a sealing material 40. The semiconductor device 100 can be manufactured through such steps.

上記実施形態においては、第1のワイヤ11及び第1の半導体素子Waが埋め込まれてなる半導体装置を例示したが、第1のワイヤ11の少なくとも一部のみが埋め込まれてなるワイヤ埋め込み型の半導体装置であってもよい。   In the above embodiment, the semiconductor device in which the first wire 11 and the first semiconductor element Wa are embedded has been illustrated. However, a wire embedded type semiconductor in which only at least a part of the first wire 11 is embedded. It may be a device.

また、上記実施形態においては、流動性の評価対象の一つである埋め込み材料(ダイボンドフィルム)を使用した半導体装置及びその製造方法について説明したが、本開示は仮固定材(仮固定用樹脂フィルム)を評価対象としてもよい。そして、本開示の選定方法によって良と判定された仮固定材を使用して半導体装置を製造してもよい。特許文献2に仮固定材の具体的な構成及び使用方法について詳細に記載されている。仮固定用樹脂フィルムを使用した半導体装置の製造方法は、例えば、以下の工程を含む。
(a)回路が形成された面を有する半導体ウェハと支持体とを仮固定用樹脂フィルムを介して仮固定する工程。
(b)支持体に仮固定された半導体ウェハを加工する工程。
(c)加工された半導体ウェハを支持体及び仮固定用樹脂フィルムから分離する工程。
(d)分離された半導体ウェハを個片化することによって半導体素子を得る工程。
(e)半導体素子を配線基板等に実装する工程。
なお、(a)工程において、回路が形成された面(凹凸を有する面)が仮固定用樹脂フィルムと接するように仮固定する。仮固定用樹脂フィルムが熱硬化性樹脂組成物からなる場合、(a)工程と(b)工程との間に、仮固定用樹脂フィルムを熱硬化させる工程を実施してもよい。
Moreover, in the said embodiment, although the semiconductor device using the embedding material (die-bonding film) which is one of the evaluation objects of fluidity and its manufacturing method were demonstrated, this indication is a temporary fixing material (resin film for temporary fixing). ) May be evaluated. And you may manufacture a semiconductor device using the temporary fixing material determined to be good by the selection method of this indication. Patent Document 2 describes in detail the specific configuration and method of use of the temporary fixing material. The manufacturing method of the semiconductor device using the temporarily fixing resin film includes the following steps, for example.
(A) A step of temporarily fixing a semiconductor wafer having a surface on which a circuit is formed and a support through a temporarily fixing resin film.
(B) The process of processing the semiconductor wafer temporarily fixed to the support body.
(C) A step of separating the processed semiconductor wafer from the support and the temporary fixing resin film.
(D) A step of obtaining a semiconductor element by dividing the separated semiconductor wafer into individual pieces.
(E) A step of mounting a semiconductor element on a wiring board or the like.
In the step (a), the surface on which the circuit is formed (the surface having irregularities) is temporarily fixed so as to be in contact with the temporarily fixing resin film. When the temporarily fixing resin film is made of a thermosetting resin composition, a step of thermosetting the temporarily fixing resin film may be performed between the step (a) and the step (b).

以下、本開示について実施例を挙げてより具体的に説明する。ただし、本発明はこれら実施例に限定されるものではない。   Hereinafter, the present disclosure will be described more specifically with reference to examples. However, the present invention is not limited to these examples.

[積層体の作製]
計14種類のダイボンディング用又は仮固定材用の熱硬化性樹脂組成物(流動性評価対象)を準備した。ポリエチレンテレフタレートフィルム(PETフィルム、帝人デュポンフィルム株式会社製、A31、厚さ38μm)の離型処理面上に各樹脂組成物を塗布した後、90℃で5分間、130℃で5分間加熱乾燥した。これにより、PETフィルム上に樹脂層(厚さ:30μm)を形成した。この樹脂層上に別のPETフィルムを保護フィルムとして更に貼り合わせることによって計14種類の積層体(PETフィルム/樹脂組成物/PETフィルム)を作製した。
[Production of laminate]
A total of 14 types of thermosetting resin compositions for die bonding or temporary fixing materials (subjects of fluidity evaluation) were prepared. Each resin composition was applied on a release treatment surface of a polyethylene terephthalate film (PET film, manufactured by Teijin DuPont Films, Inc., A31, thickness 38 μm), and then heat-dried at 90 ° C. for 5 minutes and 130 ° C. for 5 minutes. . Thereby, a resin layer (thickness: 30 μm) was formed on the PET film. A total of 14 types of laminates (PET film / resin composition / PET film) were prepared by further laminating another PET film as a protective film on the resin layer.

上記のようにして作製した各積層体から試料を作製し、ズリ弾性率を測定するとともに応力緩和時間(τ)を測定した。これらの結果から熱硬化性樹脂組成物の流動性(具体的には段差埋込性)を評価した。   A sample was produced from each laminate produced as described above, the shear modulus was measured, and the stress relaxation time (τ) was measured. From these results, the fluidity (specifically, the step embedding property) of the thermosetting resin composition was evaluated.

[試料の調製]
後述のとおり、ズリ弾性率及び応力緩和時間の測定はいずれも、動的粘弾性装置ARES(ティー・エー・インスツルメント社製)を使用した。樹脂層の厚さが30μmのままでは測定できないため、厚さ30μmの樹脂層を80℃でロールラミネートして6枚重ね合わせた後、打ち抜き加工によって試料(厚さ180μm、10mm角)を得た。
[Sample preparation]
As will be described later, a dynamic viscoelastic device ARES (manufactured by TA Instruments Inc.) was used for measurement of shear modulus and stress relaxation time. Since the measurement cannot be performed with the resin layer thickness of 30 μm, a sample (thickness 180 μm, 10 mm square) was obtained by punching after a 30 μm thick resin layer was roll laminated at 80 ° C. .

[ズリ弾性率の測定]
動的粘弾性装置ARES(ティー・エー・インスツルメント社製)に直径8mmの円形アルミプレート治具をセットし、更にここに試料をセットした。その後、120℃で10%の歪みを与えた状態で保持し、応力の変化を記録した。
[Measurement of shear modulus]
A circular aluminum plate jig having a diameter of 8 mm was set in a dynamic viscoelastic device ARES (manufactured by TA Instruments), and a sample was set here. Thereafter, the sample was held at 120 ° C. with a strain of 10%, and the change in stress was recorded.

[初期のズリ弾性率(G)の算出]
ズリ弾性率の測定結果から、歪みを与えた直後のズリ弾性率を初期のズリ弾性率(G)とした。表1及び表2に計14種類の試料の結果を示す。
[Calculation of initial shear modulus (G 0 )]
From the measurement result of the shear modulus, the shear modulus immediately after applying the strain was defined as the initial shear modulus (G 0 ). Tables 1 and 2 show the results of a total of 14 types of samples.

[応力緩和時間(τ)の算出]
ズリ弾性率の測定結果及び上記式(1)から、G(t)/G=0.3679となる応力緩和時間(τ)を求めた。表1及び表2に計14種類の試料の結果を示す。図7は試料1〜14に係る樹脂組成物のズリ弾性率の時間的変化を示すグラフである。
[Calculation of stress relaxation time (τ)]
From the measurement result of the shear modulus and the above equation (1), the stress relaxation time (τ) at which G (t) / G 0 = 0.3679 was obtained. Tables 1 and 2 show the results of a total of 14 types of samples. FIG. 7 is a graph showing temporal changes in the shear modulus of the resin compositions according to Samples 1-14.

[段差埋込性]
樹脂組成物の段差埋込性(流動性)を以下のようにして評価した。厚さ625μmのシリコンミラーウェハ(6インチ)表面に、樹脂組成物からなるフィルム状接着剤(厚さ30μm)を80℃でロールラミネートにて貼り合せることによって、接着剤付き半導体チップを得た。他方、厚さ725μmシリコンミラーウェハ(8インチ)表面に、ブレードダイシングによって100μmの間隔で複数の溝(幅40μm、深さ40μm)で形成した。
[Step embedding]
The step embedding property (fluidity) of the resin composition was evaluated as follows. A film-like adhesive (thickness 30 μm) made of a resin composition was bonded to the surface of a silicon mirror wafer (6 inches) having a thickness of 625 μm by roll lamination at 80 ° C. to obtain a semiconductor chip with an adhesive. On the other hand, a plurality of grooves (width 40 μm, depth 40 μm) were formed on the surface of a 725 μm thick silicon mirror wafer (8 inches) by blade dicing at intervals of 100 μm.

真空ラミネーター((株)エヌ・ピー・シー製、LM−50X50−S)のステージ上に、溝が形成された面が上面となるようにシリコンミラーウェハ(厚さ725μm)を配置した。その上に、接着剤付き半導体チップを、接着剤が付いている側が下になるように配置した。15mbarの条件下で、120℃の温度、0.1MPaの圧力で2分間加熱加圧し、真空ラミネートした。   A silicon mirror wafer (thickness: 725 μm) was placed on the stage of a vacuum laminator (LM-50X50-S, manufactured by NPC Corporation) so that the surface on which the grooves were formed was the upper surface. On top of that, a semiconductor chip with an adhesive was placed so that the side with the adhesive was on the bottom. Under the condition of 15 mbar, heating and pressing were performed for 2 minutes at a temperature of 120 ° C. and a pressure of 0.1 MPa, and vacuum lamination was performed.

真空ラミネート後、樹脂組成物によって溝が埋められている程度をデジタルマイクロスコープで観察して評価した。すなわち、真空ラミネート後の積層体をエポキシ樹脂注型し、注型樹脂を硬化させた後に研磨によって断面を露出させた。この断面をデジタルマイクロスコープ((株))エーエンス製、VHX−5000)で観察した。埋込性の評価基準は以下のとおりとした。
A:溝が樹脂組成物によって完全に埋まっていると認められる。
B:溝の断面積のうち樹脂組成物によって埋まっている割合が70%以上である。
C:溝の断面積のうち樹脂組成物によって埋まっている割合が70%未満である。
After vacuum lamination, the degree to which the groove was filled with the resin composition was observed and evaluated with a digital microscope. That is, the laminate after vacuum lamination was cast with an epoxy resin, and after the casting resin was cured, the cross section was exposed by polishing. This cross section was observed with a digital microscope (manufactured by Eence, VHX-5000). The embedding evaluation criteria were as follows.
A: It is recognized that the groove is completely filled with the resin composition.
B: The ratio filled with the resin composition in the cross-sectional area of the groove is 70% or more.
C: The ratio of the groove cross-sectional area filled with the resin composition is less than 70%.

表1に示されるように、試料1〜6に係る樹脂組成物は初期のズリ弾性率(G)が35kPa以下(条件2)であり且つ応力緩和時間(τ)が12秒以下(条件1)であり、段差埋込性に優れていた。これに対し、表2に示されるように、条件1及び条件2の両方を充足しない樹脂組成物(試料7,12,13)は段差埋込性が不十分であり、条件1及び条件2の一方を充足しない樹脂組成物(試料8−11,14)も段差埋込性が不十分であった。図8は試料1〜14に係る樹脂組成物の特性(横軸:初期のズリ弾性率[kPa]、縦軸:応力緩和時間(秒))をプロットしたグラフである。このグラフに示されたとおり、段差埋め込み性は初期のズリ弾性率だけでなく、応力緩和時間にも依存する。As shown in Table 1, the resin compositions according to Samples 1 to 6 have an initial shear modulus (G 0 ) of 35 kPa or less (Condition 2) and a stress relaxation time (τ) of 12 seconds or less (Condition 1 It was excellent in step embedding. On the other hand, as shown in Table 2, the resin composition (samples 7, 12, and 13) that does not satisfy both the conditions 1 and 2 has insufficient step embedding, and the conditions 1 and 2 The resin composition that does not satisfy one (Samples 8-11 and 14) also had insufficient step embedding. FIG. 8 is a graph in which the characteristics of the resin compositions according to Samples 1 to 14 (horizontal axis: initial shear modulus [kPa], vertical axis: stress relaxation time (seconds)) are plotted. As shown in this graph, the step embedding property depends not only on the initial shear modulus but also on the stress relaxation time.

本開示によれば、樹脂組成物の流動性を評価するための新たな方法及びこの方法を含む樹脂組成物の選別方法、並びに、半導体装置の製造方法が提供される。   According to the present disclosure, a new method for evaluating the fluidity of a resin composition, a method for selecting a resin composition including this method, and a method for manufacturing a semiconductor device are provided.

10…基板、10a,10b…回路パターン、11…第1のワイヤ、12…第2のワイヤ、15…接着剤、20…フィルム状接着剤の硬化物、20P…フィルム状接着剤(樹脂組成物)、30…接着剤付き半導体素子、40…封止材、100…半導体装置、Wa…第1の半導体素子、Wb…第2の半導体素子 DESCRIPTION OF SYMBOLS 10 ... Board | substrate, 10a, 10b ... Circuit pattern, 11 ... 1st wire, 12 ... 2nd wire, 15 ... Adhesive, 20 ... Hardened | cured material of film adhesive, 20P ... Film adhesive (resin composition ), 30 ... Semiconductor element with adhesive, 40 ... Sealing material, 100 ... Semiconductor device, Wa ... First semiconductor element, Wb ... Second semiconductor element

Claims (11)

樹脂組成物の流動性評価方法であって、
前記樹脂組成物からなる試料を準備する工程と、
前記試料に対して歪みを与え且つ温度Tにおいて前記試料のズリ弾性率を測定することによって、前記温度Tにおける前記試料のズリ弾性率の時間的変化を把握する工程と、
を含む、流動性評価方法。
A method for evaluating the fluidity of a resin composition,
Preparing a sample comprising the resin composition;
Grasping the temporal change of the shear modulus of the sample at the temperature T by applying strain to the sample and measuring the shear modulus of the sample at the temperature T;
A fluidity evaluation method including
前記試料のズリ弾性率の測定結果に基づいて、マクスウェルモデルの応力緩和の下記式(1)を用いて導かれる、G(t)/G=0.3679となる時間tを読み取る工程を更に含む、請求項1に記載の流動性評価方法。
G(t)=G×e(−t/τ) (1)
[式(1)において、G(t)は時間t(秒)におけるズリ弾性率を示し、Gは初期のズリ弾性率を示し、tは時間(秒)を示し、τは応力緩和時間(秒)を示す。]
Based on the measurement result of the shear modulus of the sample, a step of reading a time t that is G (t) / G 0 = 0.3679, which is derived using the following formula (1) of stress relaxation of the Maxwell model The fluidity evaluation method according to claim 1, comprising:
G (t) = G 0 × e (−t / τ) (1)
[In the formula (1), G (t) represents the shear modulus at time t (seconds), G 0 represents the initial shear modulus, t represents time (seconds), and τ represents the stress relaxation time ( Seconds). ]
前記試料のズリ弾性率の測定結果に基づいて、初期のズリ弾性率を把握する工程を更に含む、請求項1又は2に記載の流動性評価方法。   The fluidity evaluation method according to claim 1, further comprising a step of grasping an initial shear modulus based on a measurement result of a shear modulus of the sample. 少なくとも60秒にわたって前記試料のズリ弾性率を測定する、請求項1〜3のいずれか一項に記載の流動性評価方法。   The fluidity evaluation method according to any one of claims 1 to 3, wherein the shear modulus of the sample is measured for at least 60 seconds. 前記温度Tが−50〜400℃の範囲の特定の温度である、請求項1〜4のいずれか一項に記載の流動性評価方法。   The fluidity evaluation method according to any one of claims 1 to 4, wherein the temperature T is a specific temperature in a range of -50 to 400 ° C. 前記試料に対して与える歪みの量が1〜30%である、請求項1〜5のいずれか一項に記載の流動性評価方法。   The fluidity evaluation method according to any one of claims 1 to 5, wherein an amount of strain applied to the sample is 1 to 30%. 前記試料の厚さが0.01〜1mmである、請求項1〜6のいずれか一項に記載の流動性評価方法。   The fluidity evaluation method according to any one of claims 1 to 6, wherein the sample has a thickness of 0.01 to 1 mm. 前記樹脂組成物は半導体装置の製造に用いられる材料である、請求項1〜7のいずれか一項に記載の流動性評価方法。   The fluidity evaluation method according to claim 1, wherein the resin composition is a material used for manufacturing a semiconductor device. 前記樹脂組成物が埋め込み材料である、請求項8に記載の流動性評価方法。   The fluidity evaluation method according to claim 8, wherein the resin composition is an embedding material. 請求項1〜9のいずれか一項に記載の流動性評価方法を、前記温度Tが120℃である条件下で実施する工程と、
評価対象の樹脂組成物が下記条件1,2の両方を満たすか否かを判定する工程と、
を含み、
前記条件1,2の両方を満たす樹脂組成物を良と判定する、樹脂組成物の選別方法。
条件1:120℃における応力緩和時間が12秒以下である。
条件2:120℃における初期のズリ弾性率が35kPa以下である。
Implementing the fluidity evaluation method according to any one of claims 1 to 9 under a condition in which the temperature T is 120 ° C;
A step of determining whether or not the resin composition to be evaluated satisfies both of the following conditions 1 and 2,
Including
A method for selecting a resin composition, wherein a resin composition satisfying both of the conditions 1 and 2 is determined to be good.
Condition 1: Stress relaxation time at 120 ° C. is 12 seconds or less.
Condition 2: The initial shear modulus at 120 ° C. is 35 kPa or less.
請求項10に記載の選別方法で良と判定された樹脂組成物を埋め込み材料又は仮固定材として使用する、半導体装置の製造方法。   A method for manufacturing a semiconductor device, wherein the resin composition determined to be good by the selection method according to claim 10 is used as an embedding material or a temporary fixing material.
JP2018540886A 2018-03-06 2018-03-06 Method for evaluating fluidity of resin composition, method for selecting resin composition, and method for manufacturing semiconductor device Active JP6414373B1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2018/008614 WO2019171475A1 (en) 2018-03-06 2018-03-06 Method for evaluating flowability of resin composition, method for identifying resin composition, and method for producing semiconductor device

Publications (2)

Publication Number Publication Date
JP6414373B1 true JP6414373B1 (en) 2018-10-31
JPWO2019171475A1 JPWO2019171475A1 (en) 2020-04-16

Family

ID=64017173

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2018540886A Active JP6414373B1 (en) 2018-03-06 2018-03-06 Method for evaluating fluidity of resin composition, method for selecting resin composition, and method for manufacturing semiconductor device

Country Status (4)

Country Link
JP (1) JP6414373B1 (en)
KR (1) KR102455721B1 (en)
CN (1) CN111801567B (en)
WO (1) WO2019171475A1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111426554A (en) * 2020-03-23 2020-07-17 天津大学 Semiconductor chip high temperature shear test anchor clamps

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20230167521A (en) 2022-06-02 2023-12-11 에쓰대시오일 주식회사 Method and Apparatus for measuring polymer flowability

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010256293A (en) * 2009-04-28 2010-11-11 Nitto Denko Corp Program for outputting stress-strain curve equation and apparatus thereof
JP2014175459A (en) * 2013-03-08 2014-09-22 Hitachi Chemical Co Ltd Semiconductor device and semiconductor device manufacturing method

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200834364A (en) * 2006-10-06 2008-08-16 Hitachi Chemical Co Ltd Method for analyzing fluidity of resin material including particles and fluidity analysis system
KR101712216B1 (en) * 2008-12-10 2017-03-03 스미토모 베이클리트 컴퍼니 리미티드 Resin composition for encapsulating semiconductor, method for producing semiconductor device and semiconductor device
US20120280425A1 (en) * 2009-11-24 2012-11-08 Sumitomo Bakelite Co., Ltd. Mold for measuring flow characteristics, method for measuring flow characteristics, resin composition for encapsulating semiconductor, and method for manufacturing semiconductor apparatus
JP5639930B2 (en) * 2010-03-02 2014-12-10 三菱樹脂株式会社 SOLAR CELL SEALING MATERIAL AND SOLAR CELL MODULE PRODUCED BY USING THE SAME
CN103238054A (en) * 2010-09-15 2013-08-07 美国弗劳恩霍夫股份公司 Methods and apparatus for detecting cross-linking in a polymer
JP2013165263A (en) * 2012-01-13 2013-08-22 Mitsubishi Plastics Inc Solar cell module having good appearance and manufacturing method thereof
JP6347657B2 (en) * 2014-04-22 2018-06-27 デクセリアルズ株式会社 Protective tape and method of manufacturing semiconductor device using the same
KR101975004B1 (en) * 2015-04-30 2019-05-03 주식회사 엘지화학 The method for predicting polymer processing
JP6844119B2 (en) 2016-04-11 2021-03-17 株式会社豊田中央研究所 Optical frequency sweep laser light source and laser radar
JP6191799B1 (en) 2017-04-19 2017-09-06 日立化成株式会社 Semiconductor device, semiconductor device manufacturing method, and film adhesive

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010256293A (en) * 2009-04-28 2010-11-11 Nitto Denko Corp Program for outputting stress-strain curve equation and apparatus thereof
JP2014175459A (en) * 2013-03-08 2014-09-22 Hitachi Chemical Co Ltd Semiconductor device and semiconductor device manufacturing method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111426554A (en) * 2020-03-23 2020-07-17 天津大学 Semiconductor chip high temperature shear test anchor clamps
CN111426554B (en) * 2020-03-23 2021-10-08 天津大学 Semiconductor chip high temperature shear test anchor clamps

Also Published As

Publication number Publication date
CN111801567A (en) 2020-10-20
KR20200125624A (en) 2020-11-04
KR102455721B1 (en) 2022-10-17
CN111801567B (en) 2023-08-11
WO2019171475A1 (en) 2019-09-12
JPWO2019171475A1 (en) 2020-04-16

Similar Documents

Publication Publication Date Title
KR102374162B1 (en) Method of quantifying adhesion strength of interlayer adhesive element in tensile mode for staked semiconductor device and measurement apparatus for quantifying the same
JP5323310B2 (en) Connection structure and manufacturing method thereof
CN104615981B (en) A kind of fingerprint recognition modular structure and preparation method thereof
JP6414373B1 (en) Method for evaluating fluidity of resin composition, method for selecting resin composition, and method for manufacturing semiconductor device
CN103855122B (en) Encapsulation vertical power device and its manufacture method including compression stress
TW200603245A (en) Adhesive sheet commonly used for dicing/die bonding and semiconductor device using the same
JP2007250886A (en) Manufacturing method of semiconductor device
US8445328B2 (en) Method for producing chip elements equipped with wire insertion grooves
CN101627465A (en) Adhesive film for semiconductor and semiconductor device using the adhesive film
JP7008239B2 (en) Insulated circuit board and its manufacturing method
CN102461348B (en) Electrode base
TW201250808A (en) Non-uniform vacuum profile die attach tip
Feiertag et al. Flip chip packaging for MEMS microphones
CN116936377A (en) Board-level fan-out packaging method
CN102707100A (en) Bare chip test device for reversing electrical interconnection substrate
WO2017029082A1 (en) Method for manufacturing a semiconductor device and the corresponding device
CN109390308B (en) Semiconductor device having wire bonding and sintering regions and manufacturing process thereof
JP2019110223A (en) Power module substrate and manufacturing method therefor
US20060273441A1 (en) Assembly structure and method for chip scale package
JP7067114B2 (en) Insulated circuit board and its manufacturing method
JP5296846B2 (en) Connection sheet
Kuo et al. Process and characterization of ultra-thin film packages
WO2019171467A1 (en) Semiconductor device, and method for manufacturing same
Cheung et al. Determination of the interfacial fracture toughness of laminated silicon die on adhesive dicing tape from stud pull measurement
KR20150069913A (en) Specimens for measuring the bonding strength of thin film and methods for measuring the bonding strength of thin film using the same

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20180803

A871 Explanation of circumstances concerning accelerated examination

Free format text: JAPANESE INTERMEDIATE CODE: A871

Effective date: 20180803

A975 Report on accelerated examination

Free format text: JAPANESE INTERMEDIATE CODE: A971005

Effective date: 20180831

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20180904

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20180917

R151 Written notification of patent or utility model registration

Ref document number: 6414373

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R151

S531 Written request for registration of change of domicile

Free format text: JAPANESE INTERMEDIATE CODE: R313531

S533 Written request for registration of change of name

Free format text: JAPANESE INTERMEDIATE CODE: R313533

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

S531 Written request for registration of change of domicile

Free format text: JAPANESE INTERMEDIATE CODE: R313531

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350