JP2019110223A - Power module substrate and manufacturing method therefor - Google Patents

Abstract

To provide a power module substrate and a manufacturing method therefor that can ensure good inspection accuracy of a bonding interface of each component constituting a power module and the good adhesion between a circuit layer and a resin.SOLUTION: A power module substrate includes a ceramic substrate and a circuit layer made of copper or aluminum formed on one surface of the ceramic substrate, and the circuit layer includes a first circuit layer region on which an element is mounted and a second circuit layer region excluding the first circuit layer region, and is provided such that an average crystal grain diameter of the first circuit layer region is smaller than an average crystal grain diameter of the second circuit layer region.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a power module substrate used for a semiconductor device that controls large current and high voltage, and a method of manufacturing the same.

As a power module substrate used for a power module, for example, a ceramic substrate such as AlN (aluminum nitride), Al ₂ O ₃ (alumina), Si ₃ N ₄ (silicon nitride), etc., and one surface of this ceramic substrate are joined There is known a structure having a circuit layer made of a metal excellent in conductivity such as aluminum (Al) or copper (Cu). In this type of power module substrate, a metal layer made of metal excellent in thermal conductivity is formed on the other surface of the ceramic substrate, or a heat dissipation layer (heat sink) is joined via the metal layer. Also done.

  For example, Patent Document 1 discloses a circuit board in which a copper circuit is formed on the surface of a ceramic substrate (ceramic substrate), or a heat dissipation copper plate is formed on the back surface of the ceramic substrate together with the copper circuit.

  A power module is manufactured by soldering (mounting) a semiconductor element such as a power element on the surface (upper surface) of the circuit layer of the power module substrate configured as described above. In addition, the power module on which the semiconductor element is mounted may be sealed with potting resin or molding resin from the viewpoint of securing insulation, wiring protection, and the like.

Patent No. 3211856

By the way, the inspection of the bonding interface between the circuit layer and the semiconductor element in the power module, the bonding interface between the circuit layer and the ceramic substrate, etc. is carried out using an ultrasonic scanning imaging device (SAT: Scanning Acoustic Tomograph). It is known to be performed via each layer of a module substrate.
However, when joining a metal such as copper to a ceramic substrate to form a circuit layer, for example, when joining a copper (Cu) plate to be a circuit layer to a ceramic substrate, the activity of an Ag-Cu-Ti system or the like is usually It is necessary to heat at a temperature of 800 ° C. or more using a metal brazing material. When heated in such a temperature range, copper crystal grains become coarser than before heating. Therefore, when the bonding interface (solder bonding portion) between the circuit layer and the semiconductor element is inspected by the ultrasonic imaging apparatus through the power module substrate (circuit layer), the reflection of ultrasonic waves in the circuit layer is large. It is a problem to reduce the inspection accuracy.

  On the other hand, it is conceivable to use a material for the circuit layer in which the crystal grains are not easily coarsened even if high heat is applied as a countermeasure, but in this case, the surface roughness (surface roughness) of the circuit layer surface decreases. When resin-sealing a power module mounted with a semiconductor element, there is a problem that the adhesion between the resin and the circuit layer is reduced.

  The present invention has been made in view of such circumstances, and ensures good inspection accuracy of the bonding interface of each component constituting the power module, and can ensure good adhesion between the circuit layer and the resin. An object of the present invention is to provide a module substrate and a method of manufacturing the same.

  The power module substrate according to the present invention comprises a ceramic substrate and a circuit layer made of copper or aluminum formed on one surface of the ceramic substrate, wherein the circuit layer is a first circuit layer region on which an element is mounted And a second circuit layer area excluding the first circuit layer area, wherein an average crystal grain size of the first circuit layer area is smaller than an average crystal grain size of the second circuit layer area.

In the circuit layer of the power module substrate, the average crystal grain size in the first circuit layer area on which an element such as a semiconductor element is mounted is smaller than the average crystal grain size in the peripheral second circuit layer area. Therefore, when the bonding interface between the element and the circuit layer is inspected through the circuit layer by the ultrasonic imaging apparatus, the reflection of the ultrasonic wave can be reduced even in the circuit layer, and the inspection accuracy can be favorably maintained.
On the other hand, since the second crystal layer region in the periphery of the first circuit layer region has an average crystal grain size larger than that of the first circuit layer region, the surface of the second circuit layer region is larger than the first circuit layer region. The surface roughness (surface roughness) can be set large. When a power module having elements mounted on a circuit layer is resin-sealed, stress tends to be concentrated at the corner portions disposed at the periphery of the circuit layer, so the surface roughness of the second circuit layer region disposed at the periphery By providing a large degree, the mold resin can be firmly fixed to the peripheral edge of the circuit layer, and the adhesion between the mold resin and the circuit layer can be favorably maintained.

  As a preferred embodiment of the power module substrate according to the present invention, a metal layer made of the same metal as the circuit layer is provided on the other surface of the ceramic substrate, and the metal layer faces at least the first circuit layer region. The first metal layer region may be disposed, and the first metal layer region may be provided to have the same average crystal grain size as the first circuit layer region.

  Even in a power module substrate having a metal layer on the other surface of the ceramic substrate, the first metal layer region facing the first circuit layer region of the circuit layer is provided with the same average crystal grain size as the first circuit layer region. Thus, when inspecting the bonding interface between the element and the circuit layer through the power module substrate by the ultrasonic imaging apparatus, the reflection of the ultrasonic wave can be reduced even in the metal layer in addition to the circuit layer, and the inspection accuracy is good. Can be secured.

  As a preferred embodiment of the power module substrate according to the present invention, when the circuit layer is copper, an average crystal grain size of the first circuit layer region may be less than 250 μm. In addition, when the circuit layer is aluminum, an average crystal grain size of the first circuit layer region may be less than 375 μm.

  When the circuit layer is copper or aluminum, by adjusting the average crystal grain size of the first circuit layer region to the above range, both the inspection accuracy by the ultrasonic imaging apparatus and the adhesion at the time of resin sealing Can be secured well.

  The method for manufacturing a power module substrate according to the present invention includes a circuit layer forming step of bonding a metal plate to be a circuit layer to one surface of a ceramic substrate to form the circuit layer on the ceramic substrate, Among the circuit layers, as a first metal material to be a first circuit layer region on which the element is mounted, crystal grains by heating rather than a second metal material to be a second circuit layer region excluding the first circuit layer region A crystal grain suppressing material in which coarsening is suppressed is prepared, and in the circuit layer forming step, the first metal material and the second metal material are disposed adjacent to each other via a brazing material, and A laminate of the first metal material, the brazing material, and the second metal material for the circuit layer is disposed on one surface of the ceramic substrate via the same brazing material as the brazing material. In front of the ceramic substrate The first metal material and the second metal material are joined by pressing and heating in the stacking direction with the circuit layer laminate, and the first metal material and the second metal material are made of the ceramic. Bonding to a substrate, the circuit layer having the first circuit layer region and the second circuit layer region is formed on one surface of the ceramic substrate.

  Thus, the first circuit layer region and the second circuit layer region are provided by using, as the first metal material, the crystal grain suppressing material in which the coarsening of crystal grains due to heating is suppressed more than the second metal material. The circuit layer can be easily formed. Further, in the circuit layer forming step, bonding of the first metal material and the second metal material constituting the circuit layer and bonding of the first metal material and the second metal material to the ceramic substrate can be simultaneously performed. Since it is possible to use a common brazing filler material required for each, the manufacturing process of the power module substrate can be simplified.

  According to the present invention, the inspection accuracy of the bonding interface of each component constituting the power module can be favorably secured, and the adhesion between the circuit layer and the resin can be favorably secured.

It is the longitudinal cross-sectional view which represented typically the power module using the board | substrate for power modules of 1st Embodiment of this invention. It is a schematic diagram of the board | substrate for power modules shown in FIG. 1, (a) is a longitudinal cross-sectional view, (b) is the top view seen from the circuit layer side. It is a longitudinal cross-sectional view which shows the manufacturing method of the board | substrate for power modules shown in FIG. 2 to process order. It is the longitudinal cross-sectional view which represented typically the board | substrate for power modules of 2nd Embodiment of this invention. It is the longitudinal cross-sectional view which represented typically the board | substrate for power modules of 3rd Embodiment of this invention. It is the longitudinal cross-sectional view which represented typically the power module of a double-sided cooling structure.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
FIG. 1 shows a power module 101 using a power module substrate 10 manufactured by the method for manufacturing a power module substrate according to the first embodiment of the present invention. The power module 101 includes a power module substrate 10 and an element 91 such as a semiconductor element mounted on the surface of the power module substrate 10, and the element 91 and the power module substrate 10 are molded of epoxy resin or the like. The resin is sealed with a resin 81. The power module 101 is used in a state where the exposed surface of the power module 101 (the exposed surface of the power module substrate 10) is pressed against and fixed to a surface such as a heat sink (not shown).

As shown in FIG. 2A, the power module substrate 10 includes a ceramic substrate 11, a circuit layer 12 formed on one surface of the ceramic substrate 11, and a metal formed on the other surface of the ceramic substrate 11. And a layer 13.
The ceramic substrate 11 is formed of a ceramic material such as AlN (aluminum nitride), Al ₂ O ₃ (alumina), Si ₃ N ₄ (silicon nitride) or the like.

The circuit layer 12 is formed of copper (pure copper or copper alloy) or aluminum (pure aluminum or aluminum alloy), and a metal plate made of these metals is formed of Ag—Cu—Ti or Al— on one side of the ceramic substrate 11. It forms by joining by brazing joining materials, such as Si type | system | group. Further, as shown in FIG. 1 and FIG. 2, the circuit layer 12 includes a first circuit layer region 121 on which the element 91 is mounted, and a second circuit layer region 122 excluding the first circuit layer region 121. The average crystal grain size of the first circuit layer area 121 is smaller than the average crystal grain size of the second circuit layer area 122. In addition, since the second circuit layer region 122 in the periphery of the first circuit layer region 121 has an average crystal grain size larger than that of the first circuit layer region 121, the second circuit layer is more than the first circuit layer region 121. The surface roughness (surface roughness, arithmetic mean roughness Ra) of the surface of the region 122 is provided large.
Reference numeral 92 in FIG. 1 denotes a bonding layer such as a solder material for fixing the element 91, and the region on which the element 91 is mounted includes the region where the bonding layer 92 is formed.

  In the first embodiment, as shown in the plan view of FIG. 2B viewed from the circuit layer 12 side, the first circuit layer region 121 is provided in a rectangular shape, and the periphery of the first circuit layer region 121 is provided. To surround the second circuit layer region 122 in the shape of a rectangular frame. The shapes of the first circuit layer region 121 and the second circuit layer region 122 are not limited to the above shapes, and can be formed in any shape such as a circle.

The average crystal grain size of the first circuit layer region 121 is preferably less than 250 μm when the circuit layer 12 is copper (Cu). On the other hand, when the circuit layer 12 is aluminum (Al), the average crystal grain size of the first circuit layer region 121 is preferably less than 375 μm.
By adjusting the average crystal grain size of the first circuit layer region 121 within the above range, the reflection of ultrasonic waves in the circuit layer 12 can be reduced, and inspection by the ultrasonic imaging and inspection device (SAT) performed through the circuit layer 12 Good accuracy can be ensured. On the other hand, when the power module 101 in which the element 91 is mounted on the circuit layer 12 is resin-sealed, the stress is easily concentrated on the corner portions disposed on the periphery of the circuit layer 12. The mold resin 81 can be firmly fixed to the periphery of the circuit layer 12 by setting the surface roughness of the two circuit layer region 122 large. Therefore, both the inspection accuracy by the ultrasonic imaging apparatus and the adhesion at the time of resin sealing can be favorably secured. In addition, in order to ensure the adhesiveness at the time of resin sealing reliably, the first circuit layer area 121 is formed in an area 0.5 mm or more from the peripheral edge of the circuit layer 12, and the second circuit layer area 122 is formed. It is desirable to secure the area.

The metal layer 13 is made of the same metal as the circuit layer 12 and is formed by bonding a metal plate to the other surface of the ceramic substrate 11 with a brazing material as in the circuit layer 12. In addition, as shown in FIGS. 1 and 2A, the metal layer 13 includes at least a first metal layer region 131 disposed to face the first circuit layer region 121, and the first metal layer region 131 is provided. Are provided at the same average crystal grain size as the first circuit layer area 121. In this case, the metal layer 13 is provided with a rectangular frame-shaped second metal layer region 132 in a portion excluding the first metal layer region 131, that is, a portion facing the second circuit layer region 122. The average grain size of the layer region 131 is smaller than the average grain size of the second metal layer region 132.
Although the metal layer 13 is formed to have the same plane area as the circuit layer 12 in FIG. 1 and the like, the metal layer 13 may have a plane area different from that of the circuit layer 12.

The average crystal grain size of each of the first circuit layer area 121 and the second circuit layer area 122, the first metal layer area 131, and the second metal layer area 132 is measured, for example, using an optical microscope. In this embodiment, the number of crystal grains completely included in the measurement range of a known area (for example, 5000 mm ² ) observed by an optical microscope, and the number of half of the crystal grains cut around the measurement range The circle equivalent diameter (the diameter of a circle having the same area as the unit area of the metal particles) is calculated from the area obtained by dividing the area of the measurement range by the total number of crystal grains, with the total number of crystal grains as the total number of crystal grains. The equivalent circle diameter was taken as each average grain size.

Regarding the dimensions of the power module substrate 10 configured as above, for example, the thickness of the ceramic substrate 11 made of Si ₃ N ₄ (silicon nitride) is 0.1 mm to 1.5 mm, Cu (copper) The board thickness of the circuit layer 12 and the metal layer 13 which consist of these is 0.05 mm-3.0 mm. However, these dimensions are not limited to the above numerical range.

  The element 91 is an electronic component provided with a semiconductor, and various functions such as an insulated gate bipolar transistor (IGBT), a metal oxide semiconductor field effect transistor (MOSFET), a free wheeling diode (FWD), and the like according to the required function. A semiconductor device is selected. In this case, although the device 91 is not shown, an upper electrode portion is provided at the upper portion, a lower electrode portion is provided at the lower portion, and the lower electrode portion is joined to the upper surface of the circuit layer 12 by soldering or the like. Thus, the element 91 is mounted on the top surface of the circuit layer 12. The upper electrode portion of the element 91 is connected to the circuit electrode portion or the like of the circuit layer 12 through a lead frame (not shown) or the like.

Further, the power module 101 is integrated by resin-sealing the element 91 and the power module substrate 10 with the mold resin 81 except for the back surface side of the metal layer 13. As the mold resin 81, for example, an epoxy resin containing SiO ₂ filler can be used, and for example, it is molded by transfer molding.

  Next, a method of manufacturing the power module substrate 10 will be described in the order of steps with reference to FIG.

  As shown in FIGS. 1 and 2, in the power module substrate 10 having the circuit layer 12 and the metal layer 13 on both sides of the ceramic substrate 11, the circuit layer forming step of forming the circuit layer 12 and the metal layer 13. And the metal layer forming step of forming the metal layer can be performed simultaneously. In the circuit layer forming step, a metal plate to be the circuit layer 12 is joined to one surface of the ceramic substrate 11 to form the circuit layer 12 on the ceramic substrate 11. In the metal layer forming step, a metal plate to be the metal layer 13 is joined to the other surface of the ceramic substrate 11 to form the ceramic substrate 11 metal layer 13.

  As a metal plate to be the circuit layer 12, as shown in FIG. 3A, a first metal material 221a to be the first circuit layer region 121 and a second metal material 222a to be the second circuit layer region 122 are prepared. Do. As the first metal material 221 a, a crystal grain suppressing material in which coarsening of crystal grains due to heating is suppressed is used more than that of the second metal material 222 a that is to be the second circuit layer region 122. As the crystal grain suppressing material, if it is a copper material, when it is heated at 800 ° C., coarsening of crystal grains is suppressed, and a material having an average crystal grain size of less than 250 μm can be suitably used. Specifically, GOFC manufactured by Furukawa Electric Co., Ltd. can be used for the first metal material 221 a as a crystal grain suppressing material. On the other hand, oxygen-free copper (OFC) of a general rolling plate can be used for the second metal material 222a. When the second metal material 222 a is heated at 800 ° C., the crystal grains become coarse, and the average crystal grain size becomes 250 μm or more.

  In addition, these metal materials 221a and 222a are each formed in a desired external shape by punching out a plate material by press processing. For example, the first metal material 221 a is formed in a rectangular plate shape having a plane area on which the element 91 can be mounted. On the other hand, the second metal material 222a has a rectangular hole 223 into which the first metal material 221a can be fitted, and is formed in a rectangular plate shape larger than the first metal material 221a.

  Further, in the present embodiment, the metal plate to be the metal layer 13 is formed in the same configuration as the metal materials 221 a and 222 a to be the circuit layer 12. That is, as the metal plate to be the metal layer 13, the first metal material 221b having the same configuration as the first metal material 221a and the second metal material 222b having the same configuration as the second metal material 222a are used.

  Further, as the brazing material 224 for joining the first metal materials 221a and 221b, the second metal materials 222a and 222b, and the ceramic substrate 11, for example, an Ag-Cu-Ti-based brazing material can be used. In this case, the brazing material 224 can be easily handled by applying the brazing material in advance to each bonding surface or any bonding surface of the first metal materials 221a and 221b and the second metal materials 222a and 222b. In FIG. 3B, the brazing material 224 is applied in advance to the lower surface of the first metal material 221a and the upper surface of the first metal material 221b, and the lower surface of the second metal material 222a and the inner surface of the rectangular hole 223, and the second The brazing material 224 is applied in advance to the upper surface of the metal material 222 b and the inner surface of the rectangular hole 223.

  As shown in FIG. 2C, the first metal material 221a and the second metal material 222a that form the circuit layer 12 are disposed adjacent to each other via the brazing material 224, and these first metal materials 221a are also provided. The circuit layer laminate 251 composed of the brazing material 224 and the second metal material 222 a is disposed on one surface of the ceramic substrate 11 with the same brazing material 224 interposed therebetween. Similarly, on the other surface of the ceramic substrate 11, the metal layer laminate 252 composed of the first metal material 221b forming the metal layer 13, the brazing material 224, and the second metal material 222b is the same. It arrange | positions via the brazing bonding material 224 in piles. In this state, as shown by a white arrow in FIG. 2C, the metal layer laminate 252, the ceramic substrate 11, and the circuit layer laminate 251 are pressurized and heated in the stacking direction.

  Thereby, while joining the 1st metal material 221a and the 2nd metal material 222a used as circuit layer 12, these 1st metal material 221a and the 2nd metal material 222a are joined to one side of ceramics board 11, Then, the circuit layer 12 having the first circuit layer area 121 and the second circuit layer area 122 is formed on one surface of the ceramic substrate 11. At the same time, the first metal material 221b and the second metal material 222b to be the metal layer 13 are joined, and the first metal material 221b and the second metal material 222b are joined to the other surface of the ceramic substrate 11 Then, the metal layer 13 having the first metal layer region 131 and the second metal layer region 132 is formed on the other surface of the ceramic substrate 11. As a result, as shown in FIG. 2D, the power module substrate 10 in which the metal layer 13, the ceramic substrate 11, and the circuit layer 12 are sequentially stacked is manufactured.

  Then, as shown in FIG. 1, the element 91 is mounted on the power module substrate 10 manufactured in this manner. The element 91 is bonded to the upper surface of the first circuit layer area 121 of the circuit layer 12 via a bonding layer 92 made of, for example, silver sintering or a solder bonding material. Moreover, although illustration is abbreviate | omitted, a required wiring etc. are connected to the element 91, the circuit layer 12 and the element 91 are electrically connected, and the power module 101 is manufactured. Thereafter, the entire power module 101 excluding the lower surface of the metal layer 13 is sealed with the mold resin 81. The surface of the second circuit layer region 122 provided on the periphery of the circuit layer 12 is provided with a larger surface roughness than the surface of the first circuit layer region 121, so the mold resin 81 is large on the surface of the circuit layer 12. It can be tightly bonded to the surface of the exposed second circuit layer region 122 in intimate contact therewith.

  In the power module substrate 10 of the power module 101 configured as described above, the circuit layer 12 is mounted on (mounted on) the element 91, and the average crystal grain size of the first circuit layer region 121 is used as the peripheral second circuit layer region. Because the average crystal grain size of 122 is made smaller, reflection of the ultrasonic wave is also reflected in the circuit layer 12 when the bonding interface between the element 91 and the circuit layer 12 is inspected via the circuit layer 12 by the ultrasonic imaging apparatus. Can be reduced, and inspection accuracy can be secured satisfactorily. Further, even in the metal layer 13 formed on the other surface of the ceramic substrate 11, the first metal layer region 131 facing the first circuit layer region 121 of the circuit layer 12 has the same average crystal grain as the first circuit layer region 121 Because the diameter is provided, when inspecting the bonding interface between the element 91 and the circuit layer 12 through the power module substrate 10 with the ultrasonic imaging apparatus, ultrasonic waves can be generated from the metal layer 13 in addition to the circuit layer 12. The reflection can be reduced, and the inspection accuracy can be satisfactorily maintained.

  On the other hand, since the second crystal layer area 122 around the first circuit layer area 121 of the circuit layer 12 has an average crystal grain size larger than that of the first circuit layer area 121, the second crystal layer area 122 is larger than the first circuit layer area 121. The surface roughness (surface roughness) of the surface of the second circuit layer area 122 can be set large. When resin sealing the power module 101 in which the element 91 is mounted on the circuit layer 12, stress tends to be concentrated at the corner portions disposed on the peripheral edge of the circuit layer 12, so the second circuit layer region disposed on the peripheral edge By providing a large surface roughness 122, the resin can be firmly fixed to the peripheral edge of the circuit layer 12, and the adhesion between the resin and the circuit layer 12 can be favorably maintained. The power module 101 configured in this way is subject to thermal cycles and the like in the use environment, but the mold resin 81 is firmly in close contact with the surface of the circuit layer 12 so that peeling does not easily occur, and long-term reliability is improved. it can.

  Moreover, according to the method of manufacturing the power module substrate of the present embodiment, the crystal grain suppressing material in which the coarsening of the crystal grains due to heating is suppressed as compared to the second metal material 222a is used as the first metal material 221a. The circuit layer 12 including the first circuit layer region 121 and the second circuit layer region 122 can be easily formed. In the circuit layer forming step, bonding of the first metal material 221a and the second metal material 222a constituting the circuit layer 12, bonding of the first metal material 221a and the second metal material 222a to the ceramic substrate 11, and Can be performed at the same time, and a common thing can be used for the brazing material 224 necessary for each. Therefore, the manufacturing process of the power module substrate 10 can be simplified.

In the first embodiment described above, the power module substrate 10 is configured to include the metal layer 13 formed on the other surface of the ceramic substrate 11, but the power of the second embodiment shown in FIG. The present invention also includes a configuration including only the circuit layer 12 formed on one surface without providing a metal layer on the other surface of the ceramic substrate 11 as in the module substrate 20.
In the first embodiment described above, the metal layer 13 is configured to include the first metal layer region 131 and the second metal layer region 132. However, the power module substrate of the third embodiment shown in FIG. As in 30, the metal layer 33 may be composed of only the first metal layer region 131.
In the second embodiment and the third embodiment, the same reference numerals as in the first embodiment denote the same elements as in the first embodiment, and a description thereof will be omitted.

The present invention is not limited to the configuration of the above embodiment, and various modifications can be made in the detailed configuration without departing from the spirit of the present invention.
For example, in the above embodiment, one side (lower electrode portion) of the element 91 is mounted on the circuit layer 12 of the power module substrate 10, but as in the power module 102 shown in FIG. It is also possible to provide a double-sided cooling structure by arranging the module substrates 10 respectively.

Moreover, in the said embodiment, although the circuit layer 12 and the metal layer 13 which varied the average grain size for every area | region were formed with copper (pure copper or copper alloy), aluminum (pure aluminum or aluminum alloy) is used. Also, the circuit layer 12 and the metal layer 13 can be formed by changing the average crystal grain size in each region.
For example, the average grain size can be controlled by adjusting the rolling reduction per pass in a rolling process of rolling an aluminum ingot to a desired thickness. Specifically, the average grain size can be increased by increasing the rolling reduction per pass. And, by using the rolling material in which the average crystal grain size is adjusted in this manner, a power module substrate having circuit layers having different average crystal grain sizes in the first circuit layer area and the second circuit layer area can be easily obtained. It can be manufactured.

  Hereinafter, the effects of the present invention will be described in detail using examples, but the present invention is not limited to the following examples.

As shown in Tables 1 and 2, Examples 1-1 to 1-3 and 2-1 to 2-3 of the power module in which the element and the substrate for the power module are joined and Comparative Examples 1-1 to 1-3 And 2-1 to 2-3 were produced. As the power module substrate, one having a circuit layer having a configuration shown in Tables 1 and 2 formed on one surface of a ceramic substrate was used.
In Examples 1-1 to 1-3 and 2-1 to 2-3, the circuit layer has an average crystal grain size in the first circuit layer region on which the element is mounted compared to the other second circuit layer regions. It was made small. On the other hand, in Comparative Examples 1-1 to 1-2 and 2-1 to 2-2, the circuit layer has a uniform average crystal grain size without distinction between the first circuit layer region and the second circuit layer region. It formed by the metal plate. Further, in Comparative Example 1-3 and Comparative Example 2-3, the first circuit layer region on which the element is mounted is formed to have an average crystal grain size larger than that of the other second circuit layer regions.

As a ceramic substrate, a rectangular plate made of Si ₃ N ₄ (silicon nitride) and having a thickness of 0.32 mm and a planar size of 30 mm × 30 mm was used. As the circuit layer, a rectangular plate having a thickness of 1.6 mm and a plane size of 28 mm × 28 mm is used. The 23 mm × 23 mm range in the central portion of the circuit layer is the first circuit layer region, and the periphery of the first circuit layer region As the second circuit layer region. In addition, when each metal plate to be a circuit layer is copper, an Ag-Cu-Ti brazing filler metal is used, and in the case of aluminum, an Al-Si brazing filler metal is used to form a ceramic substrate and a metal plate. It joined and produced the substrate for power modules.

The surface roughness of the upper surface of the circuit layer of each of the obtained power module substrates was measured, and the surface roughness of the first circuit layer region and the second circuit layer region on the surface of the circuit layer was measured. In Comparative Examples 1-1 to 1-2 and 2-1 to 2-2, the surface roughness of the portions corresponding to the first circuit layer region and the second circuit layer region was measured.
Subsequently, an element was joined to the surface of the circuit layer (1st circuit layer area | region) of each board | substrate for power modules with a solder material (Sn-Cu-type solder material), and the power module was manufactured. Then, for the obtained power module, the solder joint layer is inspected from both the element side not through the circuit layer and the power module substrate side through the circuit layer, and the void area ratio in the solder joint layer is measured did. Further, the element of the obtained power module and the substrate for the power module were resin-sealed, and the adhesion between the resin and the circuit layer was evaluated. As resin, epoxy resin was used and resin sealing was performed by transfer molding.

(Measurement of surface roughness of circuit layer surface)
The surface roughness (Ra) of the surface of the circuit layer (first circuit layer region and second circuit layer region) was measured using a surf tester (SJ-410 manufactured by Mitutoyo). The results are shown in Tables 1 and 2.

(Method of measuring the diameter of the void in the solder joint layer)
The bonding interface (solder bonding layer) between the circuit layer and the element was observed for the obtained power module using an ultrasonic imaging apparatus (SAT, ES5000 manufactured by Hitachi Engineering & Services Co., Ltd.). The observation of the bonding interface between the circuit layer and the element is performed from both the power module substrate side via the circuit layer and the element side not via the circuit layer, and the diameter of the void observed by the ultrasonic imaging apparatus is It measured from each direction. The diameter of a void calculated the diameter of the circle which has the same area from the area of the observed void, and made this circle equivalent diameter the diameter of a void. When a plurality of voids were present in one bonding interface, the average value of the diameters of the respective voids (average diameter) was calculated. Further, the ratio (D1 / D2) × 100 [%] of the average diameter D1 of the voids when observed from the element side and the average diameter D2 of the voids when observed from the power module substrate side was calculated.

  As the value of the ratio obtained is smaller, the difference between the average diameter of the void when observed from the element side and the average diameter of the void when observed from the power module substrate side is smaller, and good inspection accuracy is obtained. Be In this case, if the value of the ratio is less than ± 10% (more than 90% but less than 110%), the evaluation of the inspection accuracy is regarded as “good” and ± 10% or more (ratio is 90% or less or 110%) The above case was evaluated as "No". The results are shown in Tables 3 and 4.

(Evaluation of adhesion by pudding cup test)
The adhesion between the mold resin and the power module substrate was evaluated by the pudding cup test. The pudding cup test was performed based on international standard ISO19095-1-4 of the resin-metal joint characteristic evaluation test method. Specifically, a resin having a purine cup shape was formed on the surface of the circuit layer of the power module substrate, and a shear peel strength test of the resin was conducted. Then, when the obtained shear peel strength was 15 MPa or more, the adhesion between the mold resin and the power module substrate was regarded as good “o”, and the case where the shear peel strength was less than 15 MPa was evaluated as no “x”. The results are shown in Tables 3 and 4.

  As can be seen from the results in Tables 3 and 4, when the circuit layer is copper, the inspection accuracy by the ultrasonic imaging apparatus and the resin sealing can be achieved by setting the average crystal grain size in the first circuit layer region to less than 250 μm. Both the adhesion at the time of stop can be secured well. In addition, when the circuit layer is aluminum, by setting the average crystal grain size of the first circuit layer region to less than 375 μm, both the inspection accuracy by the ultrasonic imaging apparatus and the adhesion at the time of resin sealing are It can be secured well.

10, 20, 30 Power Module Substrate 11 Ceramic Substrate 12 Circuit Layer 13, 33 Metal Layer 81 Mold Resin 91 Element 92 Bonding Layer 101, 102 Power Module 121 First Circuit Layer Region 122 Second Circuit Layer Region 131 First Metal Layer Region 132 second metal layer region 221a, 221b first metal material 222a, 222b second metal material 223 rectangular hole 224 solder joint material 251 laminate for circuit layer 252 laminate for metal layer

Claims (5)

A ceramic substrate and a circuit layer made of copper or aluminum formed on one surface of the ceramic substrate;
The circuit layer includes a first circuit layer region on which the element is mounted and a second circuit layer region excluding the first circuit layer region.
A substrate for a power module, wherein an average crystal grain size of the first circuit layer area is smaller than an average crystal grain size of the second circuit layer area. The other surface of the ceramic substrate is provided with a metal layer made of the same metal as the circuit layer,
The metal layer comprises at least a first metal layer region disposed opposite to the first circuit layer region,
The power module substrate according to claim 1, wherein the first metal layer region is provided to have the same average crystal grain size as the first circuit layer region.   The substrate for a power module according to claim 1 or 2, wherein when the circuit layer is copper, an average crystal grain size of the first circuit layer region is less than 250 μm.   The substrate for a power module according to claim 1 or 2, wherein when the circuit layer is aluminum, an average crystal grain size of the first circuit layer region is less than 375 μm. It has a circuit layer forming step of bonding a metal plate to be a circuit layer to one surface of the ceramic substrate to form the circuit layer on the ceramic substrate,
Among the circuit layers, as a first metal material to be a first circuit layer region on which an element is mounted, crystal grains by heating rather than a second metal material to be a second circuit layer region excluding the first circuit layer region Prepare a grain control material in which the coarsening of the grain is suppressed,
In the circuit layer forming step, the first metal material and the second metal material are disposed adjacent to each other via a brazing material, and the first metal material, the brazing material, and the second metal are provided. In a state in which the laminate for the circuit layer with the material is disposed on one surface of the ceramic substrate with the same brazing material as the brazing material, the laminating direction of the ceramic substrate and the laminate for the circuit layer By heating and pressurizing the first metal material and the second metal material, and bonding the first metal material and the second metal material to the ceramic substrate, the ceramic substrate Forming the circuit layer having the first circuit layer region and the second circuit layer region on one surface of the power module substrate.

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