JP6399772B2 - マイクロプロセッサ及び装置 - Google Patents

マイクロプロセッサ及び装置 Download PDF

Info

Publication number
JP6399772B2
JP6399772B2 JP2014050469A JP2014050469A JP6399772B2 JP 6399772 B2 JP6399772 B2 JP 6399772B2 JP 2014050469 A JP2014050469 A JP 2014050469A JP 2014050469 A JP2014050469 A JP 2014050469A JP 6399772 B2 JP6399772 B2 JP 6399772B2
Authority
JP
Japan
Prior art keywords
reorder buffer
checkpoint
data
rename
renaming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2014050469A
Other languages
English (en)
Japanese (ja)
Other versions
JP2014179096A (ja
JP2014179096A5 (enExample
Inventor
アイアンガー，ラビ
サンシャナクリシュナン，プラースナ
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US13/831,488 external-priority patent/US9448799B2/en
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of JP2014179096A publication Critical patent/JP2014179096A/ja
Publication of JP2014179096A5 publication Critical patent/JP2014179096A5/ja
Application granted granted Critical
Publication of JP6399772B2 publication Critical patent/JP6399772B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/22—Microcontrol or microprogram arrangements
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3838—Dependency mechanisms, e.g. register scoreboarding
    • G06F9/384—Register renaming
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3854—Instruction completion, e.g. retiring, committing or graduating
    • G06F9/3856—Reordering of instructions, e.g. using queues or age tags
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3861—Recovery, e.g. branch miss-prediction, exception handling
    • G06F9/3863—Recovery, e.g. branch miss-prediction, exception handling using multiple copies of the architectural state, e.g. shadow registers

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Retry When Errors Occur (AREA)
  • Advance Control (AREA)
  • Executing Machine-Instructions (AREA)
JP2014050469A 2013-03-14 2014-03-13 マイクロプロセッサ及び装置 Active JP6399772B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US13/831,488 US9448799B2 (en) 2013-03-14 2013-03-14 Reorder-buffer-based dynamic checkpointing for rename table rebuilding
US13/831,488 2013-03-14

Publications (3)

Publication Number Publication Date
JP2014179096A JP2014179096A (ja) 2014-09-25
JP2014179096A5 JP2014179096A5 (enExample) 2017-04-13
JP6399772B2 true JP6399772B2 (ja) 2018-10-03

Family

ID=51419101

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2014050469A Active JP6399772B2 (ja) 2013-03-14 2014-03-13 マイクロプロセッサ及び装置

Country Status (4)

Country Link
JP (1) JP6399772B2 (enExample)
KR (1) KR102010317B1 (enExample)
CN (1) CN104050027B (enExample)
DE (1) DE102014103183A1 (enExample)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9448800B2 (en) * 2013-03-14 2016-09-20 Samsung Electronics Co., Ltd. Reorder-buffer-based static checkpointing for rename table rebuilding

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5630149A (en) 1993-10-18 1997-05-13 Cyrix Corporation Pipelined processor with register renaming hardware to accommodate multiple size registers
WO1996025705A1 (en) * 1995-02-14 1996-08-22 Fujitsu Limited Structure and method for high-performance speculative execution processor providing special features
JP2000285082A (ja) * 1999-03-31 2000-10-13 Toshiba Corp 中央演算装置及びコンパイル方法
US6742112B1 (en) * 1999-12-29 2004-05-25 Intel Corporation Lookahead register value tracking
US6629233B1 (en) 2000-02-17 2003-09-30 International Business Machines Corporation Secondary reorder buffer microprocessor
US20060149931A1 (en) * 2004-12-28 2006-07-06 Akkary Haitham Runahead execution in a central processing unit
US20070043934A1 (en) * 2005-08-22 2007-02-22 Intel Corporation Early misprediction recovery through periodic checkpoints
US7747841B2 (en) 2005-09-26 2010-06-29 Cornell Research Foundation, Inc. Method and apparatus for early load retirement in a processor system
US7809926B2 (en) * 2006-11-03 2010-10-05 Cornell Research Foundation, Inc. Systems and methods for reconfiguring on-chip multiprocessors
US8909902B2 (en) * 2008-11-24 2014-12-09 Intel Corporation Systems, methods, and apparatuses to decompose a sequential program into multiple threads, execute said threads, and reconstruct the sequential execution
US9052890B2 (en) 2010-09-25 2015-06-09 Intel Corporation Execute at commit state update instructions, apparatus, methods, and systems

Also Published As

Publication number Publication date
KR20140113305A (ko) 2014-09-24
DE102014103183A8 (de) 2014-11-13
KR102010317B1 (ko) 2019-08-13
CN104050027B (zh) 2018-11-27
CN104050027A (zh) 2014-09-17
DE102014103183A1 (de) 2014-09-18
JP2014179096A (ja) 2014-09-25

Similar Documents

Publication Publication Date Title
US9256428B2 (en) Load latency speculation in an out-of-order computer processor
TWI506550B (zh) 管線式微處理器、執行兩種條件分支指令的方法以及其電腦程式產品
CN101329622B (zh) 微处理器以及宏指令执行方法
US8650554B2 (en) Single thread performance in an in-order multi-threaded processor
CN105122206B (zh) 用于支持推测的访客返回地址栈仿真的方法和装置
TWI411957B (zh) 亂序執行微處理器、微處理器及其相關之提升效能之方法及執行方法
US20090241084A1 (en) Method, system and computer program product for exploiting orthogonal control vectors in timing driven systems
TW201042543A (en) Out-of-order execution microprocessor and operation method thereof
JP2011086289A (ja) レジスタ状態の保存および復元
US12423408B1 (en) Systems and methods for optimizing authentication branch instructions
JP6533643B2 (ja) マイクロプロセッサ及びこれを使用した電子機器
US9311137B2 (en) Delaying interrupts for a transactional-execution facility
WO2019094492A1 (en) System and method of vliw instruction processing using reduced-width vliw processor
JP6399772B2 (ja) マイクロプロセッサ及び装置
CN102163139B (zh) 微处理器融合载入算术/逻辑运算及跳跃宏指令
US20120144390A1 (en) Customized computer image preparation and deployment including virtual machine mode
JP2007206933A (ja) 情報処理装置、情報処理装置におけるブートローダ生成方法およびプログラム転送方法
JP5621232B2 (ja) アウトオブオーダー実行プロセッサ
JP2014179096A5 (enExample)
JPH076038A (ja) 情報処理装置
TW201044269A (en) Microprocessor and micro-operation execution method thereof

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20170309

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20170309

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20180227

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20180528

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20180807

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20180904

R150 Certificate of patent or registration of utility model

Ref document number: 6399772

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250