JP6389515B2 - 半導体モジュール - Google Patents
半導体モジュール Download PDFInfo
- Publication number
- JP6389515B2 JP6389515B2 JP2016517775A JP2016517775A JP6389515B2 JP 6389515 B2 JP6389515 B2 JP 6389515B2 JP 2016517775 A JP2016517775 A JP 2016517775A JP 2016517775 A JP2016517775 A JP 2016517775A JP 6389515 B2 JP6389515 B2 JP 6389515B2
- Authority
- JP
- Japan
- Prior art keywords
- lead frame
- semiconductor module
- solder
- solder flow
- suppressing portion
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000004065 semiconductor Substances 0.000 title claims description 95
- 229910000679 solder Inorganic materials 0.000 claims description 59
- 238000000034 method Methods 0.000 claims description 6
- 230000000452 restraining effect Effects 0.000 claims description 4
- 238000005476 soldering Methods 0.000 claims description 4
- 238000005520 cutting process Methods 0.000 claims description 3
- 238000004080 punching Methods 0.000 claims description 2
- 230000001105 regulatory effect Effects 0.000 claims 2
- 230000001629 suppression Effects 0.000 description 10
- 229920005989 resin Polymers 0.000 description 6
- 239000011347 resin Substances 0.000 description 6
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 238000007789 sealing Methods 0.000 description 4
- 238000004804 winding Methods 0.000 description 4
- 238000012544 monitoring process Methods 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 238000006073 displacement reaction Methods 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 230000017525 heat dissipation Effects 0.000 description 2
- 229910052742 iron Inorganic materials 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000000465 moulding Methods 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000032683 aging Effects 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 238000009499 grossing Methods 0.000 description 1
- 230000012447 hatching Effects 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 229920001187 thermosetting polymer Polymers 0.000 description 1
- 238000011144 upstream manufacturing Methods 0.000 description 1
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Description
特許文献1に提示された半導体モジュールは、各ターミナルに素子が実装されていない空間が多く、素子実装率を上げることで、まだまだ小型化の余地がある。さらに、半導体モジュールを小型化することで、リードフレームの歩留まり向上が図れる。
また、本発明に係る半導体モジュールは、複数ターミナルからなるリードフレーム上に電子部品およびバスバーを半田実装して形成される半導体モジュールであって、リードフレームは、半田実装される部品の周囲の一部に、リードフレーム上での半田の流れ方向を規制できる半田流れ抑制部が形成されており、半田流れ抑制部は、リードフレームの部品実装面に対して、半田実装される部品側に凹となる形状を含んで構成され、凹となる形状は、リードフレームを半抜き加工する際に形成されるものである。
図1は、本発明の実施の形態1における半導体モジュールを適用した装置として、車両に装着されたパワーステアリング装置を例として示した全体回路図である。この装置は、モータ1、制御ユニット2から構成され、両部位が一体化されている。
(手順1)成形金型のキャビティ内に、半導体素子、電子部品等を実装したリードフレーム31を載置する。このとき、リードフレーム31は、金型上にある固定ピンまたは可動ピンにより位置固定される。
(手順2)続いて、成形金型が密閉され、エポキシ樹脂などの熱硬化性樹脂がキャビティ内に充填されて封止樹脂30が形成される。
なお、封止樹脂30で各部位を覆うのではなく、外枠形成し、その中をシリコン樹脂でカバーする構造でもよい。
先の実施の形態1では、位置ずれ抑制部として、凸形状36をリードフレーム31に形成する場合について説明した。これに対して、本実施の形態2では、リードフレーム31に設ける半田流れ抑制部を、凸形状36ではない構造で実現する場合について説明する。そこで、このような相違点に伴う変更部分を中心に以下に説明を行い、上述の半導体モジュールと同じ構成部分については、ここでの説明を省略する。
先の実施の形態1、2では、U相、V相、W相の各半導体モジュールで、個別にモジュール化する構造について説明した。これに対して、本実施の形態3では、インバータ3を構成していた3つの半導体モジュールを、1モジュール化する場合について説明する。
本実施の形態4では、先の実施の形態3の構造に対して、さらなる高実装化を実現するための構造について説明する。図10は、本発明の実施の形態4における半田流れ抑制部を適用した半導体モジュールの半完成状態の透視図であり、先の図8に対応して、3つの半導体モジュールが1モジュール化されている場合を例示している。
Claims (9)
- 複数ターミナルからなるリードフレーム上に電子部品およびバスバーを半田実装して形成される半導体モジュールであって、
前記リードフレームは、半田実装される部品の周囲の一部に、リードフレーム上での半田の流れ方向を規制できる半田流れ抑制部が形成されており、
前記半田流れ抑制部は、前記リードフレームの部品実装面に対して、半田実装される前記部品側に凸となる形状を含んで構成され、前記凸となる形状は、前記リードフレームを加工する際に形成される
半導体モジュール。 - 請求項1に記載の半導体モジュールにおいて、
前記凸となる形状は、前記リードフレームの厚み以上の幅を有する切欠き、または穴の加工バリを前記部品実装面側に向けることで形成されている
半導体モジュール。 - 請求項1に記載の半導体モジュールにおいて、
前記半田流れ抑制部として前記リードフレームに設けられる前記凸となる形状は、半抜き工法で加工することで形成されている
半導体モジュール。 - 複数ターミナルからなるリードフレーム上に電子部品およびバスバーを半田実装して形成される半導体モジュールであって、
前記リードフレームは、半田実装される部品の周囲の一部に、リードフレーム上での半田の流れ方向を規制できる半田流れ抑制部が形成されており、
前記半田流れ抑制部は、前記リードフレームの部品実装面に対して、半田実装される前記部品側に凹となる形状を含んで構成され、前記凹となる形状は、前記リードフレームを半抜き加工する際に形成される
半導体モジュール。 - 請求項1から4のいずれか1項に記載の半導体モジュールにおいて、
前記リードフレームは、同電位のターミナル間を接続するバスバーの半田部近傍の少なくとも一部分に、前記半田流れ抑制部が設けられている
半導体モジュール。 - 請求項1または4に記載の半導体モジュールにおいて、
前記リードフレームは、半田実装される電子部品間または前記リードフレームのターミナル間、もしくは前記電子部品と前記ターミナル間を接続するバスバーに関して、異なる電位で立体交差する2組の前記バスバーの半田部近傍に、前記半田流れ抑制部が設けられている
半導体モジュール。 - 請求項1または4に記載の半導体モジュールにおいて、
3相以上の多相インバータ装置を駆動する複数のスイッチング素子を備えた半導体がモジュール化される際に、前記多相インバータ装置の相毎で個別に、前記半田流れ抑制部が形成された前記リードフレームを用いてモジュール化されている
半導体モジュール。 - 請求項1または4に記載の半導体モジュールにおいて、
3相以上の多相インバータ装置を駆動する複数のスイッチング素子を備えた半導体がモジュール化される際に、前記多相インバータ装置の2相または3相毎に、前記半田流れ抑制部が形成された前記リードフレームを用いてモジュール化されている
半導体モジュール。 - 請求項8に記載の半導体モジュールにおいて、
前記半田流れ抑制部は、異相間の同電位のターミナルを接続するバスバーの半田部近傍に設けられている
半導体モジュール。
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PCT/JP2014/062469 WO2015170399A1 (ja) | 2014-05-09 | 2014-05-09 | 半導体モジュール |
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EP (1) | EP3142144A4 (ja) |
JP (1) | JP6389515B2 (ja) |
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DD248906A1 (de) | 1985-08-08 | 1987-08-19 | Seghers A Mikroelektronik Veb | Traeger zur herstellung von transistoren mittlerer leistung fuer die aufsetz- und hybridtechnik |
US5367124A (en) * | 1993-06-28 | 1994-11-22 | International Business Machines Corporation | Compliant lead for surface mounting a chip package to a substrate |
JPH0992776A (ja) * | 1995-09-28 | 1997-04-04 | Mitsubishi Electric Corp | リードフレームおよび半導体装置 |
JPH09283687A (ja) | 1996-04-18 | 1997-10-31 | Toyota Autom Loom Works Ltd | リードフレーム及び半導体装置 |
KR100231086B1 (ko) * | 1996-09-06 | 1999-11-15 | 윤종용 | 관통 슬릿이 형성된 다이패드를 포함하는 반도체 칩 패키지 |
JP3285815B2 (ja) * | 1998-03-12 | 2002-05-27 | 松下電器産業株式会社 | リードフレーム,樹脂封止型半導体装置及びその製造方法 |
TW472951U (en) * | 2000-10-16 | 2002-01-11 | Siliconix Taiwan Ltd | Leadframe chip with trench |
JP2007012857A (ja) * | 2005-06-30 | 2007-01-18 | Renesas Technology Corp | 半導体装置 |
TWI310979B (en) * | 2006-07-11 | 2009-06-11 | Chipmos Technologies Shanghai Ltd | Chip package and manufacturing method threrof |
TWI302373B (en) * | 2006-07-18 | 2008-10-21 | Chipmos Technologies Shanghai Ltd | Chip package structure |
JP2008270290A (ja) | 2007-04-16 | 2008-11-06 | Sumitomo Electric Ind Ltd | パワーモジュール、その製造方法および素子接続用バスバー |
JP5200673B2 (ja) | 2008-06-10 | 2013-06-05 | 株式会社デンソー | 電子部品搭載構造 |
US8354303B2 (en) * | 2009-09-29 | 2013-01-15 | Texas Instruments Incorporated | Thermally enhanced low parasitic power semiconductor package |
JP5067679B2 (ja) | 2010-05-21 | 2012-11-07 | 株式会社デンソー | 半導体モジュール、および、それを用いた駆動装置 |
CN109194153A (zh) * | 2010-11-02 | 2019-01-11 | 三菱电机株式会社 | 电动式动力转向用电源模块及使用其的电动式动力转向驱动控制装置 |
JP5762078B2 (ja) * | 2011-03-28 | 2015-08-12 | 新光電気工業株式会社 | リードフレーム |
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US9935040B2 (en) | 2018-04-03 |
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CN106415831B (zh) | 2020-04-28 |
US20170018486A1 (en) | 2017-01-19 |
WO2015170399A1 (ja) | 2015-11-12 |
EP3142144A1 (en) | 2017-03-15 |
JPWO2015170399A1 (ja) | 2017-04-20 |
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