JP6386443B2 - ネットワーキング装置及びネットワーキング方法 - Google Patents
ネットワーキング装置及びネットワーキング方法 Download PDFInfo
- Publication number
- JP6386443B2 JP6386443B2 JP2015506047A JP2015506047A JP6386443B2 JP 6386443 B2 JP6386443 B2 JP 6386443B2 JP 2015506047 A JP2015506047 A JP 2015506047A JP 2015506047 A JP2015506047 A JP 2015506047A JP 6386443 B2 JP6386443 B2 JP 6386443B2
- Authority
- JP
- Japan
- Prior art keywords
- physical layer
- networking device
- data
- clock
- communication port
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
- G06F13/4221—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4063—Device-to-bus coupling
- G06F13/4068—Electrical coupling
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/0635—Clock or time synchronisation in a network
- H04J3/0685—Clock or time synchronisation in a node; Intranode synchronisation
- H04J3/0697—Synchronisation in a packet node
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06Q—INFORMATION AND COMMUNICATION TECHNOLOGY [ICT] SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES; SYSTEMS OR METHODS SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES, NOT OTHERWISE PROVIDED FOR
- G06Q40/00—Finance; Insurance; Tax strategies; Processing of corporate or income taxes
- G06Q40/04—Trading; Exchange, e.g. stocks, commodities, derivatives or currency exchange
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
- H04Q2213/13352—Self-routing networks, real-time routing
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Computer Hardware Design (AREA)
- Data Exchanges In Wide-Area Networks (AREA)
- Communication Control (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201261625946P | 2012-04-18 | 2012-04-18 | |
| US61/625,946 | 2012-04-18 | ||
| PCT/AU2013/000404 WO2013155566A1 (en) | 2012-04-18 | 2013-04-18 | A networking apparatus and a method for networking |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2015518687A JP2015518687A (ja) | 2015-07-02 |
| JP6386443B2 true JP6386443B2 (ja) | 2018-09-05 |
Family
ID=49382713
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2015506047A Active JP6386443B2 (ja) | 2012-04-18 | 2013-04-18 | ネットワーキング装置及びネットワーキング方法 |
Country Status (9)
| Country | Link |
|---|---|
| US (1) | US9612992B2 (https=) |
| EP (1) | EP2839621A4 (https=) |
| JP (1) | JP6386443B2 (https=) |
| KR (1) | KR20150003261A (https=) |
| AU (1) | AU2013248939B2 (https=) |
| CA (1) | CA2870483A1 (https=) |
| IN (1) | IN2014MN02332A (https=) |
| SG (1) | SG11201406659SA (https=) |
| WO (1) | WO2013155566A1 (https=) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR102002888B1 (ko) * | 2013-11-05 | 2019-07-23 | 휴렛-팩커드 디벨롭먼트 컴퍼니, 엘.피. | 전자 장치 및 전자 장치의 신호선 연결 상태 확인 방법 |
| US9674118B2 (en) | 2014-03-19 | 2017-06-06 | xCelor LLC | System and method for low-latency network data switching |
| CA2948036A1 (en) | 2014-05-26 | 2015-12-03 | Zomojo Pty Ltd | A trading system |
| DE102016200964A1 (de) * | 2016-01-25 | 2017-07-27 | Siemens Aktiengesellschaft | Verfahren zur Informationsübertragung in einem Kommunikationsnetz |
| US11055292B2 (en) | 2017-11-21 | 2021-07-06 | Gto Llc | Systems and methods for generating and arbitrating among multiple market-data feeds |
| AU2020280261A1 (en) * | 2019-05-22 | 2021-10-07 | Zomojo Pty Ltd | A networking apparatus and a method for networking |
| CN113364832B (zh) * | 2021-04-26 | 2022-09-27 | 北京旷视科技有限公司 | 数据传输通道部署方法及装置、跨网数据传输方法及装置 |
Family Cites Families (23)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0828713B2 (ja) * | 1993-05-19 | 1996-03-21 | 日本電気株式会社 | クロスコネクト装置 |
| JP2888291B2 (ja) * | 1996-12-05 | 1999-05-10 | 日本電気株式会社 | 信号断検出回路 |
| US6377575B1 (en) * | 1998-08-05 | 2002-04-23 | Vitesse Semiconductor Corporation | High speed cross point switch routing circuit with word-synchronous serial back plane |
| US6310521B1 (en) | 1999-12-23 | 2001-10-30 | Cypress Semiconductor Corp. | Reference-free clock generation and data recovery PLL |
| US6856600B1 (en) * | 2000-01-04 | 2005-02-15 | Cisco Technology, Inc. | Method and apparatus for isolating faults in a switching matrix |
| US6243510B1 (en) | 2000-03-13 | 2001-06-05 | Apcon, Inc. | Electronically-controllable fiber optic patch panel |
| EP1310065A2 (en) | 2000-08-15 | 2003-05-14 | Conexant Systems, Inc. | Switches and routers, with parallel domains operating at a reduced speed |
| US6737958B1 (en) | 2000-11-16 | 2004-05-18 | Free Electron Technology Inc. | Crosspoint switch with reduced power consumption |
| US6704882B2 (en) * | 2001-01-22 | 2004-03-09 | Mayo Foundation For Medical Education And Research | Data bit-to-clock alignment circuit with first bit capture capability |
| US20020161912A1 (en) | 2001-03-19 | 2002-10-31 | Vasquez Silverio C. | Ethernet cross point switch for connecting multiple network sections with different speeds within physical layer protocol |
| US9032097B2 (en) | 2001-04-26 | 2015-05-12 | Nokia Corporation | Data communication with remote network node |
| US7200153B2 (en) * | 2001-09-20 | 2007-04-03 | Intel Corporation | Method and apparatus for autosensing LAN vs WAN to determine port type |
| KR20100114942A (ko) * | 2002-05-13 | 2010-10-26 | 페어차일드 세미컨덕터 코포레이션 | 직렬화기 및 비직렬화기 기능을 갖는 교차점 스위치 |
| US20040081196A1 (en) * | 2002-10-29 | 2004-04-29 | Elliott Stephen J. | Protocol independent hub |
| US7224184B1 (en) | 2004-11-05 | 2007-05-29 | Xilinx, Inc. | High bandwidth reconfigurable on-chip network for reconfigurable systems |
| US20080192727A1 (en) | 2007-02-09 | 2008-08-14 | Remote Switch Systems | Reconfiguration of Non-Fully Populated Switch Arrays |
| US20080240090A1 (en) * | 2007-03-28 | 2008-10-02 | Adc Dsl Systems, Inc. | Programmable high speed crossbar switch |
| JP2008252753A (ja) * | 2007-03-30 | 2008-10-16 | Nec Corp | セル処理装置、セルのスイッチ処理方法 |
| JP5381089B2 (ja) * | 2008-12-25 | 2014-01-08 | 富士通株式会社 | 光信号処理装置 |
| WO2011055511A1 (ja) * | 2009-11-04 | 2011-05-12 | 日本電気株式会社 | 半導体装置及びその製造方法 |
| US8417867B2 (en) * | 2010-11-17 | 2013-04-09 | Xilinx, Inc. | Multichip module for communications |
| US8743715B1 (en) * | 2011-01-24 | 2014-06-03 | OnPath Technologies Inc. | Methods and systems for calibrating a network switch |
| US9819611B2 (en) | 2012-03-12 | 2017-11-14 | Boobera Lagoon Technology, Llc | Network device and a method for networking |
-
2013
- 2013-04-18 IN IN2332MUN2014 patent/IN2014MN02332A/en unknown
- 2013-04-18 SG SG11201406659SA patent/SG11201406659SA/en unknown
- 2013-04-18 KR KR1020147030925A patent/KR20150003261A/ko not_active Abandoned
- 2013-04-18 EP EP13778089.6A patent/EP2839621A4/en not_active Withdrawn
- 2013-04-18 CA CA2870483A patent/CA2870483A1/en not_active Abandoned
- 2013-04-18 AU AU2013248939A patent/AU2013248939B2/en active Active
- 2013-04-18 US US14/232,689 patent/US9612992B2/en active Active
- 2013-04-18 WO PCT/AU2013/000404 patent/WO2013155566A1/en not_active Ceased
- 2013-04-18 JP JP2015506047A patent/JP6386443B2/ja active Active
Also Published As
| Publication number | Publication date |
|---|---|
| AU2013248939B2 (en) | 2015-05-07 |
| IN2014MN02332A (https=) | 2015-08-14 |
| AU2013248939A1 (en) | 2014-01-23 |
| KR20150003261A (ko) | 2015-01-08 |
| JP2015518687A (ja) | 2015-07-02 |
| WO2013155566A1 (en) | 2013-10-24 |
| US9612992B2 (en) | 2017-04-04 |
| EP2839621A1 (en) | 2015-02-25 |
| CA2870483A1 (en) | 2013-10-24 |
| SG11201406659SA (en) | 2014-11-27 |
| EP2839621A4 (en) | 2015-04-29 |
| US20150046613A1 (en) | 2015-02-12 |
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