JP6377865B2 - リング発振器ベースの物理的複製不可関数および年齢検知回路を使用した集積回路識別およびディペンダビリティ検証 - Google Patents
リング発振器ベースの物理的複製不可関数および年齢検知回路を使用した集積回路識別およびディペンダビリティ検証 Download PDFInfo
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- JP6377865B2 JP6377865B2 JP2018000620A JP2018000620A JP6377865B2 JP 6377865 B2 JP6377865 B2 JP 6377865B2 JP 2018000620 A JP2018000620 A JP 2018000620A JP 2018000620 A JP2018000620 A JP 2018000620A JP 6377865 B2 JP6377865 B2 JP 6377865B2
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
- H03K3/03—Astable circuits
- H03K3/0315—Ring oscillators
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09C—CIPHERING OR DECIPHERING APPARATUS FOR CRYPTOGRAPHIC OR OTHER PURPOSES INVOLVING THE NEED FOR SECRECY
- G09C1/00—Apparatus or methods whereby a given sequence of signs, e.g. an intelligible text, is transformed into an unintelligible sequence of signs by transposing the signs or groups of signs or by replacing them by others according to a predetermined system
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/84—Generating pulses having a predetermined statistical distribution of a parameter, e.g. random pulse generators
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/156—Arrangements in which a continuous pulse train is transformed into a train having a desired pattern
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/08—Key distribution or management, e.g. generation, sharing or updating, of cryptographic keys or passwords
- H04L9/0861—Generation of secret information including derivation or calculation of cryptographic keys or passwords
- H04L9/0866—Generation of secret information including derivation or calculation of cryptographic keys or passwords involving user or device identifiers, e.g. serial number, physical or biometrical information, DNA, hand-signature or measurable physical characteristics
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/32—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols including means for verifying the identity or authority of a user of the system or for message authentication, e.g. authorization, entity authentication, data integrity or data verification, non-repudiation, key authentication or verification of credentials
- H04L9/3271—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols including means for verifying the identity or authority of a user of the system or for message authentication, e.g. authorization, entity authentication, data integrity or data verification, non-repudiation, key authentication or verification of credentials using challenge-response
- H04L9/3278—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols including means for verifying the identity or authority of a user of the system or for message authentication, e.g. authorization, entity authentication, data integrity or data verification, non-repudiation, key authentication or verification of credentials using challenge-response using physically unclonable functions [PUF]
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K13/00—Apparatus or processes specially adapted for manufacturing or adjusting assemblages of electric components
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
- H04L2209/12—Details relating to cryptographic hardware or logic circuitry
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
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- Engineering & Computer Science (AREA)
- Computer Security & Cryptography (AREA)
- Physics & Mathematics (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Nonlinear Science (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Semiconductor Integrated Circuits (AREA)
- Tests Of Electronic Circuits (AREA)
Description
一実装形態は、チップ年齢検出および(たとえば、固有の識別子/キーを生成するための)PUF機能の両方を提供するリング発振器(RO)ベースの回路を提供する。すなわち、年齢検出センサおよびPUFは、1つまたは複数のリング発振器チェーンおよび/または選択器回路を共有することにより、同じリング発振器回路配列で実装することができる。共通の、または共有される回路に、これらのセキュリティおよびチップ健全性監視機能の両方を一体化することによって、ダイ内に必要とされる面積を減少させる。
図3は、本開示の一態様に従う例示的なチップ識別およびチップ健全性監視装置300の高レベル概略図を図示する。装置300は、PUFおよび年齢センサ回路302、処理回路304、および/またはメモリ回路306を含むことができる。
104 リング発振器、RO
106 スイッチ、マルチプレクサ
108 スイッチ、マルチプレクサ
110 カウンタ
112 カウンタ
114 対比較
200 IC年齢センサ回路
202 RO
204 RO
206 位相比較器
300 チップ識別およびチップ健全性監視装置
302 PUFおよび年齢センサ回路
304 処理回路
306 メモリ回路
310 RO配列
312 RO選択器回路
314 出力機能回路
316 RO
318 PUFモジュール
320 チップ年齢センサモジュール
322a RO周波数出力
322b RO周波数出力
322c RO周波数出力
322n RO周波数出力
324a RO周波数、入力周波数、出力
324b RO周波数、入力周波数、出力
326 出力応答、出力ストリング、チップ識別値応答、回路年齢情報応答
328 チップ識別チャレンジ、健全性監視チャレンジ、チャレンジ
330 チップ識別子
332 チップ年齢値、使用期限年数
400 リング発振器、RO
402 ANDゲート
404a インバータ
404b インバータ
404c インバータ
404n インバータ
406 入力端子
408 入力端子
410 出力端子
412 RO出力
502 PUF RO
504 PUF RO
506 PUF RO
508 ストレスを受けるRO
510 アイドル状態の基準RO
512 第1のスイッチ
514 第2のスイッチ
516 第1のカウンタ
518 第2のカウンタ
520 比較器
522 チップ識別子またはキー生成チャレンジ
524 出力
526 出力
528 出力
530 PUF RO信号、RO出力
532 PUF RO信号、RO出力
534 RO出力、出力信号、出力応答信号
600 チップ識別およびチップ健全性監視装置
602 PUFおよび年齢センサ回路
604 処理回路
606 メモリ回路
610 RO配列
612 RO選択器回路
624a RO出力
624b RO出力
700 電子デバイス
702 回路モジュール、回路A
704 回路モジュール、回路B
706 回路モジュール、回路C
708 回路モジュール、回路N
710 バス
712 PUFおよび年齢センサ回路、PUF/ASC
714 PUFおよび年齢センサ回路、PUF/ASC
716 PUFおよび年齢センサ回路、PUF/ASC
718 PUFおよび年齢センサ回路、PUF/ASC
720 処理回路
722 メモリ回路
724 他のプロセッサ
Claims (1)
- 集積回路であって、
部分的に、物理的複製不可関数(PUF)を実装するように構成される第1の複数のリング発振器と、
部分的に、前記集積回路の年齢を提供する年齢センサ回路を実装するように構成される第2の複数のリング発振器と、
前記第1の複数のリング発振器および前記第2の複数のリング発振器と結合される、リング発振器選択回路と
を備え、
前記リング発振器選択回路が、前記第1の複数のリング発振器および/または前記第2の複数のリング発振器のうちの少なくとも1つから、互いに異なる少なくとも2つのリング発振器の出力を選択するように適合され、
前記リング発振器選択回路が、前記PUFおよび前記年齢センサ回路によって共通に共有され、
前記第2の複数のリング発振器が、前記第2の複数のリング発振器のうちの、ストレスを受けるリング発振器とアイドル状態の基準のリング発振器との間の周波数差分測定を実施することによる回路年齢情報を確認することにより前記年齢センサ回路を実装する、集積回路。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US13/764,507 US9083323B2 (en) | 2013-02-11 | 2013-02-11 | Integrated circuit identification and dependability verification using ring oscillator based physical unclonable function and age detection circuitry |
US13/764,507 | 2013-02-11 |
Related Parent Applications (1)
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JP2015557029A Division JP6359035B2 (ja) | 2013-02-11 | 2014-02-05 | リング発振器ベースの物理的複製不可関数および年齢検知回路を使用した集積回路識別およびディペンダビリティ検証 |
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Publication Number | Publication Date |
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JP2018082483A JP2018082483A (ja) | 2018-05-24 |
JP6377865B2 true JP6377865B2 (ja) | 2018-08-22 |
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JP2015557029A Active JP6359035B2 (ja) | 2013-02-11 | 2014-02-05 | リング発振器ベースの物理的複製不可関数および年齢検知回路を使用した集積回路識別およびディペンダビリティ検証 |
JP2018000620A Active JP6377865B2 (ja) | 2013-02-11 | 2018-01-05 | リング発振器ベースの物理的複製不可関数および年齢検知回路を使用した集積回路識別およびディペンダビリティ検証 |
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Country Status (7)
Country | Link |
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US (1) | US9083323B2 (ja) |
EP (1) | EP2954615B1 (ja) |
JP (2) | JP6359035B2 (ja) |
KR (1) | KR101681219B1 (ja) |
CN (1) | CN104969468B (ja) |
TW (1) | TWI545900B (ja) |
WO (1) | WO2014124023A1 (ja) |
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JP2009016586A (ja) * | 2007-07-05 | 2009-01-22 | Nec Electronics Corp | 半導体装置およびその製造方法 |
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US9083323B2 (en) | 2015-07-14 |
US20140225639A1 (en) | 2014-08-14 |
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CN104969468A (zh) | 2015-10-07 |
JP2018082483A (ja) | 2018-05-24 |
EP2954615A1 (en) | 2015-12-16 |
KR101681219B1 (ko) | 2016-12-01 |
JP2016508003A (ja) | 2016-03-10 |
TWI545900B (zh) | 2016-08-11 |
WO2014124023A1 (en) | 2014-08-14 |
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