JP6352386B2 - 定数キャッシュを使用してより効率的にリテラル生成データを従属命令に転送するための方法および装置 - Google Patents

定数キャッシュを使用してより効率的にリテラル生成データを従属命令に転送するための方法および装置 Download PDF

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JP6352386B2
JP6352386B2 JP2016502276A JP2016502276A JP6352386B2 JP 6352386 B2 JP6352386 B2 JP 6352386B2 JP 2016502276 A JP2016502276 A JP 2016502276A JP 2016502276 A JP2016502276 A JP 2016502276A JP 6352386 B2 JP6352386 B2 JP 6352386B2
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instruction
entry
pipeline
register
cache
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JP2016512366A (ja
JP2016512366A5 (enExample
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ジェームズ・ノリス・ディーフェンダルファー
マイケル・ウィリアム・モロー
ロドニー・ウェイン・スミス
ジェフェリー・エム・ショットミラー
ダニエル・エス・ヒグドン
マイケル・スコット・マッキルヴェイン
ブライアン・マイケル・ステンペル
クリン・ナレンドラ・コタリ
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クアルコム，インコーポレイテッド
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing
    • G06F9/383—Operand prefetching
    • G06F9/3832—Value prediction for operands; operand history buffers
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30032—Movement instructions, e.g. MOVE, SHIFT, ROTATE, SHUFFLE
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing
    • G06F9/3826—Bypassing or forwarding of data results, e.g. locally between pipeline stages or within a pipeline stage
    • G06F9/3828—Bypassing or forwarding of data results, e.g. locally between pipeline stages or within a pipeline stage with global bypass, e.g. between pipelines, between clusters

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  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
  • Executing Machine-Instructions (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
JP2016502276A 2013-03-14 2014-03-14 定数キャッシュを使用してより効率的にリテラル生成データを従属命令に転送するための方法および装置 Expired - Fee Related JP6352386B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US13/827,867 2013-03-14
US13/827,867 US20140281391A1 (en) 2013-03-14 2013-03-14 Method and apparatus for forwarding literal generated data to dependent instructions more efficiently using a constant cache
PCT/US2014/026907 WO2014152064A1 (en) 2013-03-14 2014-03-14 Method and apparatus for forwarding literal generated data to dependent instructions more efficiently using a constant cache

Publications (3)

Publication Number Publication Date
JP2016512366A JP2016512366A (ja) 2016-04-25
JP2016512366A5 JP2016512366A5 (enExample) 2017-03-30
JP6352386B2 true JP6352386B2 (ja) 2018-07-04

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JP2016502276A Expired - Fee Related JP6352386B2 (ja) 2013-03-14 2014-03-14 定数キャッシュを使用してより効率的にリテラル生成データを従属命令に転送するための方法および装置

Country Status (6)

Country Link
US (1) US20140281391A1 (enExample)
EP (1) EP2972791B1 (enExample)
JP (1) JP6352386B2 (enExample)
KR (1) KR102055228B1 (enExample)
CN (1) CN105009073B (enExample)
WO (1) WO2014152064A1 (enExample)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20150019845A1 (en) * 2013-07-09 2015-01-15 Texas Instruments Incorporated Method to Extend the Number of Constant Bits Embedded in an Instruction Set
US10324723B2 (en) * 2014-07-02 2019-06-18 Nxp Usa, Inc. Systems and methods for processing both instructions and constant values from a memory of a digital processor accessed by separate pointers
US20160092219A1 (en) * 2014-09-29 2016-03-31 Qualcomm Incorporated Accelerating constant value generation using a computed constants table, and related circuits, methods, and computer-readable media
US20160170770A1 (en) * 2014-12-12 2016-06-16 Qualcomm Incorporated Providing early instruction execution in an out-of-order (ooo) processor, and related apparatuses, methods, and computer-readable media
US10671398B2 (en) * 2017-08-02 2020-06-02 International Business Machines Corporation Low-overhead, low-latency operand dependency tracking for instructions operating on register pairs in a processor core

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US4197580A (en) * 1978-06-08 1980-04-08 Bell Telephone Laboratories, Incorporated Data processing system including a cache memory
US5123097A (en) * 1989-01-05 1992-06-16 Bull Hn Information Systems Inc. Apparatus and method for simultaneous execution of a write instruction and a succeeding read instruction in a data processing system with a store through cache strategy
JPH04130942A (ja) * 1990-09-21 1992-05-01 Hitachi Ltd ディジタル信号処理装置
JP2539974B2 (ja) * 1991-11-20 1996-10-02 富士通株式会社 情報処理装置におけるレジスタの読出制御方式
US6112019A (en) * 1995-06-12 2000-08-29 Georgia Tech Research Corp. Distributed instruction queue
US6505293B1 (en) * 1999-07-07 2003-01-07 Intel Corporation Register renaming to optimize identical register values
US6742112B1 (en) * 1999-12-29 2004-05-25 Intel Corporation Lookahead register value tracking
US6728870B1 (en) * 2000-10-06 2004-04-27 Intel Corporation Register move operations
US7105576B2 (en) * 2002-04-24 2006-09-12 Research Development Foundation Synergistic effects of nuclear transcription factor NF-κB inhibitors and anti-neoplastic agents
EP1387254B1 (en) * 2002-07-31 2012-12-12 Texas Instruments Incorporated Skip instruction carrying out a test with immediate value
SE527350C8 (sv) * 2003-08-18 2006-03-21 Gallaher Snus Ab Lock till snusdosa
US9557994B2 (en) * 2004-07-13 2017-01-31 Arm Limited Data processing apparatus and method for performing N-way interleaving and de-interleaving operations where N is an odd plural number
US7343482B2 (en) * 2004-10-20 2008-03-11 Arm Limited Program subgraph identification
KR101355496B1 (ko) * 2005-08-29 2014-01-28 디 인벤션 사이언스 펀드 원, 엘엘씨 복수의 병렬 클러스터들을 포함하는 계층 프로세서의스케쥴링 메카니즘
US8176265B2 (en) * 2006-10-30 2012-05-08 Nvidia Corporation Shared single-access memory with management of multiple parallel requests
US7900027B2 (en) * 2008-01-31 2011-03-01 International Business Machines Corporation Scalable link stack control method with full support for speculative operations
US20100004994A1 (en) * 2008-07-02 2010-01-07 Global Launch Incorporated Methods for facilitating communications between businesses and consumers
US20110047357A1 (en) * 2009-08-19 2011-02-24 Qualcomm Incorporated Methods and Apparatus to Predict Non-Execution of Conditional Non-branching Instructions

Also Published As

Publication number Publication date
EP2972791B1 (en) 2019-08-07
KR20150129822A (ko) 2015-11-20
EP2972791A1 (en) 2016-01-20
CN105009073B (zh) 2019-01-15
JP2016512366A (ja) 2016-04-25
US20140281391A1 (en) 2014-09-18
KR102055228B1 (ko) 2019-12-12
CN105009073A (zh) 2015-10-28
WO2014152064A1 (en) 2014-09-25

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