KR102055228B1 - 상수 캐시를 이용하여 리터럴 생성 데이터를 의존 명령들로 보다 효율적으로 포워딩하기 위한 방법 및 장치 - Google Patents

상수 캐시를 이용하여 리터럴 생성 데이터를 의존 명령들로 보다 효율적으로 포워딩하기 위한 방법 및 장치 Download PDF

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KR102055228B1
KR102055228B1 KR1020157028732A KR20157028732A KR102055228B1 KR 102055228 B1 KR102055228 B1 KR 102055228B1 KR 1020157028732 A KR1020157028732 A KR 1020157028732A KR 20157028732 A KR20157028732 A KR 20157028732A KR 102055228 B1 KR102055228 B1 KR 102055228B1
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instruction
entry
pipeline
register
value
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KR20150129822A (ko
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제임스 노리스 디펜더퍼
마이클 윌리엄 모로우
로드니 웨인 스미스
제프리 엠. 스코트밀러
다니엘 에스. 히그돈
마이클 스코트 매킬베인
브라이언 마이클 스템펠
쿨린 나렌드라 코타리
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퀄컴 인코포레이티드
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing
    • G06F9/383—Operand prefetching
    • G06F9/3832—Value prediction for operands; operand history buffers
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30032—Movement instructions, e.g. MOVE, SHIFT, ROTATE, SHUFFLE
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing
    • G06F9/3826—Bypassing or forwarding of data results, e.g. locally between pipeline stages or within a pipeline stage
    • G06F9/3828—Bypassing or forwarding of data results, e.g. locally between pipeline stages or within a pipeline stage with global bypass, e.g. between pipelines, between clusters

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  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
  • Executing Machine-Instructions (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
KR1020157028732A 2013-03-14 2014-03-14 상수 캐시를 이용하여 리터럴 생성 데이터를 의존 명령들로 보다 효율적으로 포워딩하기 위한 방법 및 장치 Active KR102055228B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US13/827,867 US20140281391A1 (en) 2013-03-14 2013-03-14 Method and apparatus for forwarding literal generated data to dependent instructions more efficiently using a constant cache
US13/827,867 2013-03-14
PCT/US2014/026907 WO2014152064A1 (en) 2013-03-14 2014-03-14 Method and apparatus for forwarding literal generated data to dependent instructions more efficiently using a constant cache

Publications (2)

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KR20150129822A KR20150129822A (ko) 2015-11-20
KR102055228B1 true KR102055228B1 (ko) 2019-12-12

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KR1020157028732A Active KR102055228B1 (ko) 2013-03-14 2014-03-14 상수 캐시를 이용하여 리터럴 생성 데이터를 의존 명령들로 보다 효율적으로 포워딩하기 위한 방법 및 장치

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US (1) US20140281391A1 (enExample)
EP (1) EP2972791B1 (enExample)
JP (1) JP6352386B2 (enExample)
KR (1) KR102055228B1 (enExample)
CN (1) CN105009073B (enExample)
WO (1) WO2014152064A1 (enExample)

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US20150019845A1 (en) * 2013-07-09 2015-01-15 Texas Instruments Incorporated Method to Extend the Number of Constant Bits Embedded in an Instruction Set
US10324723B2 (en) * 2014-07-02 2019-06-18 Nxp Usa, Inc. Systems and methods for processing both instructions and constant values from a memory of a digital processor accessed by separate pointers
US20160092219A1 (en) * 2014-09-29 2016-03-31 Qualcomm Incorporated Accelerating constant value generation using a computed constants table, and related circuits, methods, and computer-readable media
US20160170770A1 (en) * 2014-12-12 2016-06-16 Qualcomm Incorporated Providing early instruction execution in an out-of-order (ooo) processor, and related apparatuses, methods, and computer-readable media
US10671398B2 (en) * 2017-08-02 2020-06-02 International Business Machines Corporation Low-overhead, low-latency operand dependency tracking for instructions operating on register pairs in a processor core

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US6505293B1 (en) 1999-07-07 2003-01-07 Intel Corporation Register renaming to optimize identical register values
US20100106944A1 (en) 2004-07-13 2010-04-29 Arm Limited Data processing apparatus and method for performing rearrangement operations

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US4197580A (en) * 1978-06-08 1980-04-08 Bell Telephone Laboratories, Incorporated Data processing system including a cache memory
US5123097A (en) * 1989-01-05 1992-06-16 Bull Hn Information Systems Inc. Apparatus and method for simultaneous execution of a write instruction and a succeeding read instruction in a data processing system with a store through cache strategy
JPH04130942A (ja) * 1990-09-21 1992-05-01 Hitachi Ltd ディジタル信号処理装置
JP2539974B2 (ja) * 1991-11-20 1996-10-02 富士通株式会社 情報処理装置におけるレジスタの読出制御方式
US6112019A (en) * 1995-06-12 2000-08-29 Georgia Tech Research Corp. Distributed instruction queue
US6742112B1 (en) * 1999-12-29 2004-05-25 Intel Corporation Lookahead register value tracking
US6728870B1 (en) * 2000-10-06 2004-04-27 Intel Corporation Register move operations
AU2003221767B2 (en) * 2002-04-24 2008-07-31 Research Development Foundation Synergistic effects of nuclear transcription factor NF-kB inhibitors and anti-neoplastic agents
EP1387254B1 (en) * 2002-07-31 2012-12-12 Texas Instruments Incorporated Skip instruction carrying out a test with immediate value
SE527350C8 (sv) * 2003-08-18 2006-03-21 Gallaher Snus Ab Lock till snusdosa
US7343482B2 (en) * 2004-10-20 2008-03-11 Arm Limited Program subgraph identification
GB2444455A (en) * 2005-08-29 2008-06-04 Searete Llc Scheduling mechanism of a hierarchical processor including multiple parallel clusters
US8176265B2 (en) * 2006-10-30 2012-05-08 Nvidia Corporation Shared single-access memory with management of multiple parallel requests
US7900027B2 (en) * 2008-01-31 2011-03-01 International Business Machines Corporation Scalable link stack control method with full support for speculative operations
US20100004994A1 (en) * 2008-07-02 2010-01-07 Global Launch Incorporated Methods for facilitating communications between businesses and consumers
US20110047357A1 (en) * 2009-08-19 2011-02-24 Qualcomm Incorporated Methods and Apparatus to Predict Non-Execution of Conditional Non-branching Instructions

Patent Citations (2)

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Publication number Priority date Publication date Assignee Title
US6505293B1 (en) 1999-07-07 2003-01-07 Intel Corporation Register renaming to optimize identical register values
US20100106944A1 (en) 2004-07-13 2010-04-29 Arm Limited Data processing apparatus and method for performing rearrangement operations

Also Published As

Publication number Publication date
CN105009073A (zh) 2015-10-28
WO2014152064A1 (en) 2014-09-25
CN105009073B (zh) 2019-01-15
JP2016512366A (ja) 2016-04-25
JP6352386B2 (ja) 2018-07-04
KR20150129822A (ko) 2015-11-20
EP2972791A1 (en) 2016-01-20
EP2972791B1 (en) 2019-08-07
US20140281391A1 (en) 2014-09-18

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