JP6329649B2 - 電子ディスプレイ、コンピューティングデバイス、それらの方法、及びコンピュータプログラム - Google Patents

電子ディスプレイ、コンピューティングデバイス、それらの方法、及びコンピュータプログラム Download PDF

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JP6329649B2
JP6329649B2 JP2016569643A JP2016569643A JP6329649B2 JP 6329649 B2 JP6329649 B2 JP 6329649B2 JP 2016569643 A JP2016569643 A JP 2016569643A JP 2016569643 A JP2016569643 A JP 2016569643A JP 6329649 B2 JP6329649 B2 JP 6329649B2
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image
display
duration
counter value
pixel
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Japanese (ja)
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JP2017522586A5 (enExample
JP2017522586A (ja
Inventor
クリストファー ピー． タン，
クリストファー ピー． タン，
テソン キム，
テソン キム，
サンドロ エイチ． ピンツ，
サンドロ エイチ． ピンツ，
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Apple Inc
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Apple Inc
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2092—Details of a display terminals using a flat panel, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0819—Several active elements per pixel in active matrix panels used for counteracting undesired variations, e.g. feedback or autozeroing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0243—Details of the generation of driving signals
    • G09G2310/0254—Control of polarity reversal in general, other than for liquid crystal displays
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/06—Details of flat display driving waveforms
    • G09G2310/061—Details of flat display driving waveforms for resetting or blanking
    • G09G2310/063—Waveforms for resetting the whole screen at once
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/08—Details of timing specific for flat panels, other than clock recovery
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0204—Compensation of DC component across the pixels in flat panels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2340/00—Aspects of display data processing
    • G09G2340/04—Changes in size, position or resolution of an image
    • G09G2340/0407—Resolution change, inclusive of the use of different resolutions for different screen areas
    • G09G2340/0435—Change or adaptation of the frame rate of the video stream
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3614—Control of polarity reversal in general

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Liquid Crystal (AREA)
  • Liquid Crystal Display Device Control (AREA)
JP2016569643A 2014-06-25 2015-06-01 電子ディスプレイ、コンピューティングデバイス、それらの方法、及びコンピュータプログラム Active JP6329649B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US201462017081P 2014-06-25 2014-06-25
US62/017,081 2014-06-25
PCT/US2015/033533 WO2015199910A1 (en) 2014-06-25 2015-06-01 Inversion balancing compensation

Publications (3)

Publication Number Publication Date
JP2017522586A JP2017522586A (ja) 2017-08-10
JP2017522586A5 JP2017522586A5 (enExample) 2017-10-19
JP6329649B2 true JP6329649B2 (ja) 2018-05-23

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JP2016569643A Active JP6329649B2 (ja) 2014-06-25 2015-06-01 電子ディスプレイ、コンピューティングデバイス、それらの方法、及びコンピュータプログラム

Country Status (6)

Country Link
US (1) US9767726B2 (enExample)
EP (1) EP3161814A1 (enExample)
JP (1) JP6329649B2 (enExample)
KR (1) KR101782762B1 (enExample)
CN (1) CN106415699B (enExample)
WO (1) WO2015199910A1 (enExample)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9984608B2 (en) * 2014-06-25 2018-05-29 Apple Inc. Inversion balancing compensation
JP6551724B2 (ja) 2015-01-20 2019-07-31 Ｔｉａｎｍａ Ｊａｐａｎ株式会社 液晶表示用の極性反転制御装置、液晶表示装置、その駆動方法及び駆動プログラム
WO2017047464A1 (ja) * 2015-09-14 2017-03-23 シャープ株式会社 液晶表示装置およびその駆動方法
US10223987B2 (en) * 2015-10-30 2019-03-05 Nvidia Corporation Regional DC balancing for a variable refresh rate display panel
US10417971B2 (en) 2017-03-17 2019-09-17 Apple Inc. Early pixel reset systems and methods
CN107564481A (zh) * 2017-08-24 2018-01-09 四川长虹电器股份有限公司 显示装置的护眼模式调节系统
EP4064267A4 (en) 2020-02-06 2023-03-01 Samsung Electronics Co., Ltd. DISPLAY DRIVE METHOD AND THIS SUPPORTING ELECTRONIC DEVICE
JP7391773B2 (ja) * 2020-06-10 2023-12-05 株式会社ジャパンディスプレイ 液晶表示装置及び表示システム
TWI779494B (zh) * 2021-02-18 2022-10-01 瑞昱半導體股份有限公司 應用於顯示器的控制電路與控制方法
CN114756189B (zh) * 2022-04-27 2025-07-01 深圳市爱协生科技股份有限公司 显示数据处理方法、装置、显示驱动芯片和显示设备

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100344186B1 (ko) * 1999-08-05 2002-07-19 주식회사 네오텍리서치 액정표시장치의 소오스 구동회로 및 그 구동방법
GB0309803D0 (en) 2003-04-29 2003-06-04 Cambridge Display Tech Ltd Display driver methods and apparatus
JP4390483B2 (ja) 2003-06-19 2009-12-24 シャープ株式会社 液晶中間調表示方法及びその方法を用いた液晶表示装置
JP5299741B2 (ja) 2007-10-24 2013-09-25 Ｎｌｔテクノロジー株式会社 表示パネルの制御装置、液晶表示装置、電子機器、表示装置の駆動方法、及び制御プログラム
KR101501481B1 (ko) * 2008-12-24 2015-03-30 삼성디스플레이 주식회사 디스플레이장치, 백라이트 유닛 및 상기 디스플레이 장치의구동 방법
JP2010191038A (ja) 2009-02-17 2010-09-02 Seiko Epson Corp 液晶表示装置の駆動方法、液晶表示装置および電子機器
US8248341B2 (en) 2009-04-15 2012-08-21 Store Electronic Systems Sa Low power active matrix display
JP2013522665A (ja) 2010-03-12 2013-06-13 クォルコム・メムズ・テクノロジーズ・インコーポレーテッド ディスプレイのリフレッシュレートを増大可能とするライン逓倍
US9607537B2 (en) 2010-12-23 2017-03-28 Microsoft Technology Licensing, Llc Display region refresh
CN103000159B (zh) * 2011-09-13 2015-06-24 联想(北京)有限公司 一种显示控制方法、显示控制装置及显示器
CN104115216B (zh) * 2012-02-20 2016-12-14 夏普株式会社 驱动装置和显示装置
KR101935356B1 (ko) 2012-04-27 2019-01-04 엘지전자 주식회사 디스플레이 프로세서 제어방법
WO2014002607A1 (ja) * 2012-06-29 2014-01-03 シャープ株式会社 表示装置の駆動方法、表示装置、および液晶表示装置
WO2014080810A1 (ja) * 2012-11-20 2014-05-30 シャープ株式会社 液晶表示装置およびその駆動方法
US10013940B2 (en) * 2012-12-31 2018-07-03 Nvidia Corporation Method and apparatus to reduce panel power through horizontal interlaced addressing
WO2015087587A1 (ja) * 2013-12-11 2015-06-18 シャープ株式会社 液晶表示装置およびその駆動方法
KR20150069748A (ko) * 2013-12-16 2015-06-24 삼성디스플레이 주식회사 표시 패널의 구동 방법 및 이를 수행하기 위한 표시 장치
US9830871B2 (en) * 2014-01-03 2017-11-28 Nvidia Corporation DC balancing techniques for a variable refresh rate display
US9711099B2 (en) * 2014-02-26 2017-07-18 Nvidia Corporation Techniques for avoiding and remedying DC bias buildup on a flat panel variable refresh rate display
US9384703B2 (en) * 2014-02-26 2016-07-05 Nvidia Corporation Techniques for avoiding and remedying DC bias buildup on a flat panel variable refresh rate display

Also Published As

Publication number Publication date
US9767726B2 (en) 2017-09-19
KR101782762B1 (ko) 2017-09-27
US20150379918A1 (en) 2015-12-31
WO2015199910A1 (en) 2015-12-30
EP3161814A1 (en) 2017-05-03
CN106415699B (zh) 2020-01-17
JP2017522586A (ja) 2017-08-10
CN106415699A (zh) 2017-02-15
KR20160143869A (ko) 2016-12-14

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