JP6289583B1 - Power semiconductor device - Google Patents

Power semiconductor device Download PDF

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JP6289583B1
JP6289583B1 JP2016207473A JP2016207473A JP6289583B1 JP 6289583 B1 JP6289583 B1 JP 6289583B1 JP 2016207473 A JP2016207473 A JP 2016207473A JP 2016207473 A JP2016207473 A JP 2016207473A JP 6289583 B1 JP6289583 B1 JP 6289583B1
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wiring
bonding material
switching element
semiconductor device
bonding
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JP2018073848A (en
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貴夫 三井
貴夫 三井
優 福
優 福
石井 隆一
隆一 石井
範之 別芝
範之 別芝
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Mitsubishi Electric Corp
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/401Disposition
    • H01L2224/40135Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/40137Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Abstract

【課題】配線材を接合する接合材にはんだの濡れ性をよくするためにフラックス入りのはんだを用いると、はんだボールが発生しやすくなり、はんだボールが半導体素子上に乗る可能性がある。また、フラックスが飛散し、半導体素子に付着する。これらは、絶縁不良の原因となる。【解決手段】 この発明に係る電力半導体装置は、半導体スイッチング素子と、半導体スイッチング素子が第1の接合材によって接合される絶縁基板と、半導体スイッチング素子に接続される配線材と、半導体スイッチング素子と配線材とが接合される第2の接合材と、絶縁基板に接着され配線材の位置を決める配線位置決め部材とを備え、第2の接合材は、還元剤を含まないことを特徴とする。【選択図】図1BWhen a solder containing flux is used as a bonding material for bonding a wiring material to improve solder wettability, solder balls are likely to be generated, and the solder balls may be placed on a semiconductor element. Further, the flux is scattered and adheres to the semiconductor element. These cause insulation failure. A power semiconductor device according to the present invention includes a semiconductor switching element, an insulating substrate to which the semiconductor switching element is bonded by a first bonding material, a wiring material connected to the semiconductor switching element, a semiconductor switching element, A second bonding material to which the wiring material is bonded and a wiring positioning member that is bonded to the insulating substrate and determines the position of the wiring material are provided, and the second bonding material does not contain a reducing agent. [Selection] Figure 1B

Description

この発明は、モータなどを制御する電力変換装置などに搭載される電力半導体装置に関する。   The present invention relates to a power semiconductor device mounted on a power conversion device that controls a motor or the like.

近年、車載用電力半導体装置において、大出力化が進行する一方で、高信頼性に加え小型軽量化、高効率化が求められるようになってきている。その結果、配線の電流密度が上がり、配線の温度上昇が大きくなり、例えば、配線基板と配線との接合部などへのストレスが大きく、接合部の信頼性が大きな問題となっている。また、小型化のため、高密度実装が必要となり、半導体素子や配線に高い位置精度が求められるようになってきた。そこで、接合部へのストレスを緩和し、精度よく実装可能な電力半導体装置の構造が求められている。
従来の電力半導体装置では、配線に突起を設け、はんだの厚さを管理することにより、はんだのストレスを管理して信頼性を確保したものがある(例えば、特許文献1参照)。
また、配線にアーチ形状を設けることで、はんだへのストレスを低減し、信頼性を確保したものがある(例えば、特許文献2参照)。
2. Description of the Related Art In recent years, in-vehicle power semiconductor devices have been increasing in output, and in addition to high reliability, reduction in size, weight, and efficiency have been demanded. As a result, the current density of the wiring is increased, and the temperature rise of the wiring is increased. For example, the stress on the junction between the wiring board and the wiring is large, and the reliability of the junction is a big problem. Further, for miniaturization, high-density mounting is required, and high positional accuracy has been required for semiconductor elements and wiring. Therefore, there is a demand for a structure of a power semiconductor device that can relieve stress on the junction and can be mounted with high accuracy.
In some conventional power semiconductor devices, a protrusion is provided on the wiring and the thickness of the solder is managed, thereby managing the stress of the solder and ensuring reliability (see, for example, Patent Document 1).
In addition, there is one in which an arch shape is provided in the wiring to reduce the stress on the solder and ensure reliability (for example, see Patent Document 2).

特開2003−243601号公報JP 2003-243601A 特開2008−41851号公報JP 2008-41851 A

特許文献1では、銅表面を還元し、はんだの濡れ性をよくするためにフラックス入りのはんだを用いると、はんだボールが発生しやすくなり、はんだボールが半導体素子上に乗る可能性がある。また、フラックスが飛散し、半導体素子に付着する。これらは、絶縁不良の原因となり、特に電圧を数kVで用いる場合、わずかな不純物により、絶縁不良に至ることがあるため、入念に洗浄する必要がある。フラックスの場合、絶縁に悪影響を与えないものも存在するが、採用には膨大な評価が必要となるといった課題がある。
また、部材を高密度に配置するため、ワイヤボンドで配線する方法も考えられるが、小型化により配線の電流密度が高くなっており、ワイヤボンドでは大電流密度への対応は不適である。
特許文献2では、配線にアーチ形状を設けて、はんだへのストレスを低減している。しかし、配線長が伸びることで、配線のインダクタンスが大きくなり、サージなどのノイズの増加を招いてしまうといった課題がある。
なお、両先行技術文献とも、半導体素子と配線が近くなることに対する対策は述べられていない。はんだの表面張力による、セルフアライメントだけでは、高い位置精度は得られない。治具による位置のアライメントでは、治具の熱容量などがはんだ付けの状態に影響するため、はんだ付けのタクトが長くなる。
この発明は、上記のような問題点を解決するためになされたものであり、生産性がよく高信頼性を確保した電力半導体装置を得ることを目的としている。
In Patent Document 1, when a solder containing flux is used to reduce the copper surface and improve the wettability of the solder, solder balls are likely to be generated, and the solder balls may be placed on the semiconductor element. Further, the flux is scattered and adheres to the semiconductor element. These cause insulation failure, and in particular, when a voltage is used at several kV, insulation failure may occur due to a slight amount of impurities, and therefore it is necessary to carefully clean them. Some fluxes do not adversely affect insulation, but there is a problem that enormous evaluation is required for their use.
In order to arrange the members at a high density, a method of wiring by wire bonding is also conceivable, but the current density of the wiring is increased due to miniaturization, and the wire bond is unsuitable for dealing with a large current density.
In Patent Document 2, the wiring is provided with an arch shape to reduce stress on the solder. However, when the wiring length is increased, there is a problem that the inductance of the wiring is increased and noise such as surge is increased.
Note that neither of the prior art documents describes a countermeasure against the close proximity of the semiconductor element and the wiring. High position accuracy cannot be obtained only by self-alignment due to the surface tension of the solder. In the position alignment by the jig, the heat capacity of the jig affects the soldering state, so that the soldering tact time becomes longer.
The present invention has been made to solve the above-described problems, and an object of the present invention is to obtain a power semiconductor device with high productivity and high reliability.

この発明に係る電力半導体装置は、半導体スイッチング素子と、半導体スイッチング素子が第1の接合材によって接合される絶縁基板と、半導体スイッチング素子に接続される第1の配線材と、絶縁基板に接続される第2の配線材と、絶縁基板に接着され第1及び第2の配線材の位置を決める配線位置決め部材とを備え、第1及び第2の配線材は配線位置決め部材によって位置決めされ、還元剤を含まない第2の接合材により接合されているとともに、第1の接合材と第2の接合材との間に、前記配線位置決め部材により形成された壁が設けられていることを特徴とする。 A power semiconductor device according to the present invention is connected to a semiconductor switching element, an insulating substrate to which the semiconductor switching element is bonded by a first bonding material, a first wiring material connected to the semiconductor switching element, and the insulating substrate. that a second wiring member, and a wire positioning member for positioning the first and second wiring member is bonded to the insulating substrate, the first and second wiring member are positioned by the wiring positioning member, a reducing agent And a wall formed by the wiring positioning member is provided between the first bonding material and the second bonding material. .

この発明によれば、配線を精度良く実装することが可能であり、高密度実装が可能とな
ることで、電力半導体装置を小型化できる。また、還元剤を含まない接合材を使用するた
め、はんだボールを抑制でき、フラックスの飛散が無いことから、絶縁信頼性に優れ、フ
ラックスやはんだボール除去のための洗浄工程が不要となり、生産性が向上する。さらに
は、フラックスや洗浄液などの化学物質の使用量が削減できるため、地球環境の保全にも
貢献できる。さらに、壁を設けることにより、第1の接合材と第2の接合材が触れることを防ぐことが可能である。
According to the present invention, the wiring can be mounted with high accuracy, and the power semiconductor device can be reduced in size by enabling high-density mounting. In addition, since a bonding material that does not contain a reducing agent is used, solder balls can be suppressed, and there is no scattering of flux, so that insulation reliability is excellent, and a cleaning process for removing flux and solder balls is not required. Will improve. Furthermore, since the amount of chemical substances such as flux and cleaning liquid can be reduced, it can contribute to the preservation of the global environment. Furthermore, by providing a wall, it is possible to prevent the first bonding material and the second bonding material from touching each other.

本発明の実施の形態1による電力半導体装置を示す上面図である。1 is a top view showing a power semiconductor device according to a first embodiment of the present invention. 本発明の実施の形態1による電力半導体装置を示す断面図である。It is sectional drawing which shows the power semiconductor device by Embodiment 1 of this invention. 本発明の実施の形態2による電力半導体装置を示す断面図である。It is sectional drawing which shows the power semiconductor device by Embodiment 2 of this invention. 本発明の実施の形態2による配線材の形状変更による効果を示す図である。It is a figure which shows the effect by the shape change of the wiring material by Embodiment 2 of this invention. 本発明の実施の形態2において、実施の形態1の形状で同等の効果を得るための配線材の形状を示す側面図である。In Embodiment 2 of this invention, it is a side view which shows the shape of the wiring material for obtaining the same effect with the shape of Embodiment 1. FIG. 本発明の実施の形態3による電力半導体装置を示す上面図である。It is a top view which shows the power semiconductor device by Embodiment 3 of this invention. 本発明の実施の形態3による電力半導体装置を示す断面図である。It is sectional drawing which shows the electric power semiconductor device by Embodiment 3 of this invention.

実施の形態1.
図1Aは、本発明の実施の形態1の電力半導体装置を示す上面図であり、図1Bはその断面図である。
電力半導体装置は、例えばMOSFET(Metal-Oxide-Semiconductor Field-Effect Transistor)やIGBT(Insulated Gate Bipolar Transistor)等のスイッチング素子1a、スイッチング素子1bと、ダイオードなどの半導体素子2a、半導体素子2bが、絶縁性のセラミック3(例えば、窒化珪素など)の両面に銅(Cu)などの導電率の大きな金属板4を貼りあわせた絶縁基板5に接合材6aを用いて実装される。
絶縁基板5には、銅(Cu)などの導電率の大きな金属からなり、外部からのストレスを緩和するための屈曲部を有する配線材7a、配線材7bを位置決めする機構である配線位置決め部材8を有する。すなわち、スイッチング素子1a、スイッチング素子1b、および半導体素子2a、半導体素子2bと接続する配線材7aと、絶縁基板5と接続する配線材7bとを、絶縁樹脂からなる配線位置決め部材8で位置決めを行う、図1A中、位置決め部をPと表示する。配線位置決め部材8は図示しない接着材により絶縁基板5に接着される。
配線材7a、及び配線材7bは、例えば接合材6bの厚さより背の低い突起を有しており、還元剤などの有機物を含まない、はんだなどの金属接合するための接合材6bをかしめる。また、配線材7bは絶縁基板5と接合材6bにより接合され、配線材7aはスイッチング素子1a、スイッチング素子1b、及び半導体素子2a、半導体素子2bと接合材6bにより接合される。接合工程では、還元雰囲気にて絶縁基板5を還元した後、真空状態で接合材6bを溶融させ、冷却することで接合する。
上述した電力半導体装置Aは絶縁や異物混入を防ぐ目的でゲルなどの充填材9が充填され、冷却器(図示せず)に設置、外部配線(図示せず)に接続され、電力変換装置などに組み込まれる。
Embodiment 1 FIG.
1A is a top view showing a power semiconductor device according to Embodiment 1 of the present invention, and FIG. 1B is a cross-sectional view thereof.
In the power semiconductor device, for example, a switching element 1a such as a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) or an IGBT (Insulated Gate Bipolar Transistor), a switching element 1b, a semiconductor element 2a such as a diode, and a semiconductor element 2b are insulated. Is mounted on an insulating substrate 5 in which a conductive metal plate 4 such as copper (Cu) is bonded to both surfaces of a conductive ceramic 3 (for example, silicon nitride) using a bonding material 6a.
The insulating substrate 5 is made of a metal having a high conductivity such as copper (Cu), and has a wiring member 7a having a bent portion for alleviating external stress, and a wiring positioning member 8 which is a mechanism for positioning the wiring member 7b. Have That is, the switching element 1a, the switching element 1b, the semiconductor element 2a, the wiring member 7a connected to the semiconductor element 2b, and the wiring member 7b connected to the insulating substrate 5 are positioned by the wiring positioning member 8 made of insulating resin. In FIG. 1A, the positioning portion is indicated as P. The wiring positioning member 8 is bonded to the insulating substrate 5 with an adhesive (not shown).
The wiring material 7a and the wiring material 7b have, for example, protrusions that are shorter than the thickness of the bonding material 6b, and caulk the bonding material 6b for bonding metals such as solder that does not contain organic substances such as a reducing agent. . The wiring material 7b is bonded to the insulating substrate 5 by the bonding material 6b, and the wiring material 7a is bonded to the switching element 1a, the switching element 1b, the semiconductor element 2a, the semiconductor element 2b, and the bonding material 6b. In the bonding process, after the insulating substrate 5 is reduced in a reducing atmosphere, the bonding material 6b is melted in a vacuum state and bonded by cooling.
The above-described power semiconductor device A is filled with a filler 9 such as gel for the purpose of preventing insulation and contamination by foreign matter, and is installed in a cooler (not shown) and connected to external wiring (not shown). Embedded in.

このような構成により、配線材7a、配線材7bは、屈曲部を持つことで、硬い樹脂などでモールドしない構造であっても、外部から配線材7a、7bに加わるストレスを緩和することが可能である。そのため、外部からのストレスが原因の一つとなる、接合材6b
のクラック低減が可能になり信頼性が向上する。
With such a configuration, the wiring material 7a and the wiring material 7b have a bent portion, so that the stress applied to the wiring materials 7a and 7b from the outside can be relieved even if the wiring material 7a and the wiring material 7b are not molded with a hard resin or the like. It is. Therefore, the joining material 6b, which is caused by external stress, is one of the causes.
The crack can be reduced and the reliability is improved.

さらに、フラックスなどの還元剤を含まない接合材6bを用いることで、還元剤の排出が無いため、接合材6bの溶融時に接合材6bの飛散を抑制できる。すなわち、フラックスなどの還元剤が入っている場合、接合材6bの溶融時に還元剤が外に排出されるが、その際に接合材6bも巻き込んで排出され、周囲に付着してしまう。   Furthermore, since the reducing agent is not discharged by using the bonding material 6b that does not contain a reducing agent such as flux, scattering of the bonding material 6b can be suppressed when the bonding material 6b is melted. That is, when a reducing agent such as flux is contained, the reducing agent is discharged to the outside when the bonding material 6b is melted. At that time, the bonding material 6b is also drawn and discharged and adheres to the surroundings.

また、通常、還元剤入りの接合材を用いると、接合材周りに還元剤が残渣として残る。使用電圧が低い数十V程度の場合は、還元剤の種類によっては残っていても問題ない。しかし、数百Vから数千Vで使用される場合、絶縁不良の原因となる。そのため、還元剤除去のため洗浄が必要となる。しかし、還元剤を含まない接合材6bを用いることで、洗浄工程を省略でき、生産性が向上するだけでなく、洗浄液の管理や、廃液処理などを行う必要が無く、設備投資も抑制できる。さらには、フラックスや洗浄液などの化学物質の使用量を削減できるため、地球環境の保全にも貢献できる。   In general, when a bonding material containing a reducing agent is used, the reducing agent remains as a residue around the bonding material. When the operating voltage is low, which is about several tens of volts, there is no problem even if it remains depending on the type of reducing agent. However, when it is used at several hundred volts to several thousand volts, it causes insulation failure. Therefore, cleaning is necessary for removing the reducing agent. However, by using the bonding material 6b that does not contain a reducing agent, the cleaning process can be omitted, and not only the productivity is improved, but also the management of the cleaning liquid and the waste liquid treatment need not be performed, and the capital investment can be suppressed. Furthermore, the amount of chemical substances such as flux and cleaning solution can be reduced, which contributes to the preservation of the global environment.

配線材7a、配線材7bの突起部に、接合材6bをかしめることで、接合材6bの位置決めが不要となり生産性が向上する。配線材7a、配線材7bに突起を設けると、配線材7a、配線材7bの自立には3つ以上の突起が必要となる。しかし、配線材7aは比較的スペースに余裕があるが、配線材7bの場合、複数の突起を設けることは困難である。これに対し、接合材6bの厚さより背の低い突起に、接合材6bをかしめることで、突起面が隠れ平面になるため、突起が1つでも自立する。そのため、部品の供給が容易になり、生産性が向上する。   By caulking the bonding material 6b to the protrusions of the wiring material 7a and the wiring material 7b, positioning of the bonding material 6b becomes unnecessary and productivity is improved. When the wiring material 7a and the wiring material 7b are provided with protrusions, three or more protrusions are required for the wiring material 7a and the wiring material 7b to be independent. However, the wiring member 7a has a relatively large space, but in the case of the wiring member 7b, it is difficult to provide a plurality of protrusions. On the other hand, since the projection surface becomes a hidden plane by caulking the bonding material 6b to a projection having a height shorter than the thickness of the bonding material 6b, even one projection is self-supporting. As a result, parts can be supplied easily, and productivity is improved.

また、突起を配線材7a、配線材7bに接合材6bをかしめた面は、還元雰囲気下において、還元効果のある気体が侵入しにくく、配線材7a、配線材7bの酸化状態によっては還元雰囲気下において接合に必要な程度に十分に還元されない。そこで、配線材7a、配線材7bは予め還元しておき、接合するまで接合に問題ない程度に配線材7a、配線材7bの酸化状態を管理する必要がある。しかし、予め還元された配線材7a、配線材7bを真空状態で保存しておけば、開封後1日程度は接合材6bの濡れ性に問題ないため、実際の工程で管理が煩雑になることはない。なお、接合材6bをかしめる突起は、はんだ厚さをコントロールするための突起として用いても良い。接合材6bに発生し、クラックの原因となるせん断応力は、はんだ厚さによって変わるため、接合材6bの厚さを管理することで、接合材6bのクラックの進展をコントロールできる。   In addition, the surface where the protrusions are caulked with the wiring material 7a and the bonding material 6b on the wiring material 7b is unlikely to allow a gas having a reducing effect to enter in a reducing atmosphere. Below, it is not fully reduced to the extent necessary for bonding. Therefore, it is necessary to reduce the wiring material 7a and the wiring material 7b in advance, and to manage the oxidation state of the wiring material 7a and the wiring material 7b to the extent that there is no problem in the bonding until they are bonded. However, if the reduced wiring material 7a and the wiring material 7b are stored in a vacuum state, there is no problem with the wettability of the bonding material 6b for about one day after opening, and management becomes complicated in the actual process. There is no. In addition, you may use the protrusion which crimps the joining material 6b as a protrusion for controlling solder thickness. Since the shear stress generated in the bonding material 6b and causing cracks varies depending on the solder thickness, the progress of the crack in the bonding material 6b can be controlled by managing the thickness of the bonding material 6b.

配線位置決め部材8に、配線材7a、配線材7bをアウトサートすることで位置が決められる。配線位置決め部材8に配線材7a、配線材7bをインサートした場合、位置精度は向上するが、配線位置決め部材8と配線材7a、配線材7bの熱膨張差により反りが発生し、温度サイクル時に大きなストレスがかかる。アウトサートであれば、反りを抑えられ、接合材6bへのストレスを低減でき、信頼性が向上する。
なお、真空状態で接合材6bを溶融させることで、接合材6b内のボイドの低減や、はんだボールの抑制が可能となる。これは、接合材6bを大気圧中で溶融させると、周囲の空気を巻き込むことがあり、この空気が真空時に排出されることで接合材6bが飛散するが、真空中で接合材6bを溶融させると、周囲に巻き込む空気がほぼないためである。
The position is determined by outsertting the wiring member 7a and the wiring member 7b to the wiring positioning member 8. When the wiring material 7a and the wiring material 7b are inserted into the wiring positioning member 8, the positional accuracy is improved, but warpage occurs due to a difference in thermal expansion between the wiring positioning member 8, the wiring material 7a, and the wiring material 7b, which is large during the temperature cycle. It takes stress. If it is outsert, warpage can be suppressed, stress on the bonding material 6b can be reduced, and reliability is improved.
In addition, by melting the bonding material 6b in a vacuum state, it is possible to reduce voids in the bonding material 6b and to suppress solder balls. This is because, when the bonding material 6b is melted at atmospheric pressure, ambient air may be entrained, and when the air is discharged during vacuum, the bonding material 6b is scattered, but the bonding material 6b is melted in vacuum. This is because there is almost no air trapped around.

実施の形態2.
図2は、この発明の実施の形態2による電力半導体装置を示す断面図である。
実施の形態1の配線材7a、配線材7bの曲げ部を無くし、配線材7a、配線材7bの根元の板厚を、部分的に薄くしたものである。形状は、鋭角形状で薄い部分を設けるより円形状で薄い部分を設ける方がよい。応力集中によって、配線材7a、配線材7bが破断するのを防ぐためである。
Embodiment 2. FIG.
2 is a sectional view showing a power semiconductor device according to a second embodiment of the present invention.
The bent portions of the wiring material 7a and the wiring material 7b of the first embodiment are eliminated, and the base plate thickness of the wiring material 7a and the wiring material 7b is partially reduced. As for the shape, it is better to provide a circular and thin portion than to provide a thin portion with an acute angle shape. This is to prevent the wiring material 7a and the wiring material 7b from breaking due to the stress concentration.

実施の形態1の配線材7a、配線材7bの形状では、緩衝機構を設けるのに屈曲部を設けるため、配線長さが伸びることにより、配線インダクタンスが増加してしまい、これによるサージなどのノイズの増加が懸念される。一方、図2のような形状であれば、インダクタンスの増加はほぼなく、配線材7a、配線材7bの剛性を低下させることができる。   In the shape of the wiring material 7a and the wiring material 7b of the first embodiment, since the bent portion is provided to provide the buffer mechanism, the wiring length is increased due to the extension of the wiring length, resulting in noise such as surge. There is concern about the increase. On the other hand, with the shape as shown in FIG. 2, there is almost no increase in inductance, and the rigidity of the wiring member 7a and the wiring member 7b can be reduced.

図3に、長さ15mm、幅8mm、板厚1mmの配線材を基準として、下から3mmの位置に、R3mmの形状で部分的に薄くした構造により効果を検証した結果を示す。
基準とする板厚1mmの配線材に比べ、部分的に板厚を0.6mmにすることで、曲げ剛
性が約2割低下する。この効果を実施の形態1の形状のように屈曲部を設けることで実現するには、図4のような形状となり、配線長が約3mmも長くなり、インダクタンスが増加する。
配線材7a、配線材7bの一部を細くすることで、僅かに配線材7a、配線材7bの発熱量の増加は発生するが、数十〜数百W発熱するスイッチング素子1a、スイッチング素子1b、半導体素子2a、半導体素子2bに比べれば無視できる発熱量である。また、銅などの金属は熱伝導率も高いことに加え、絶縁基板5は冷却器に設置されるため、冷却によって配線材7a、配線材7bの発熱増加による温度上昇、周りへの熱干渉の影響は無視できるようになる。
なお、板厚を部分的に薄くする位置は、可能な限り配線材7a、配線材7bの根元側に設ける方が外部からのストレス緩和の効果が大きい。
FIG. 3 shows a result of verifying the effect by a structure in which the thickness is 3 mm from the bottom and is partially thinned in the shape of R3 mm with reference to a wiring material having a length of 15 mm, a width of 8 mm, and a plate thickness of 1 mm.
Compared to the wiring material having a plate thickness of 1 mm as a reference, the bending rigidity is reduced by about 20% by partially setting the plate thickness to 0.6 mm. In order to realize this effect by providing a bent portion as in the shape of the first embodiment, the shape is as shown in FIG. 4, the wiring length is increased by about 3 mm, and the inductance is increased.
By thinning part of the wiring material 7a and the wiring material 7b, the heating amount of the wiring material 7a and the wiring material 7b slightly increases, but the switching element 1a and switching element 1b that generate heat of several tens to several hundreds W. The calorific value is negligible compared to the semiconductor elements 2a and 2b. In addition to the high thermal conductivity of metals such as copper, since the insulating substrate 5 is installed in a cooler, the temperature rises due to increased heat generation of the wiring material 7a and the wiring material 7b due to cooling, and the heat interference to the surroundings. The effect will be negligible.
It should be noted that it is more effective to relieve stress from the outside when the position where the plate thickness is partially reduced is provided on the base side of the wiring member 7a and the wiring member 7b as much as possible.

実施の形態3.
図5A、図5Bは、本発明の実施の形態3による電力半導体装置を示す上面図と断面図
である。
実施の形態1の配線位置決め部材8の形状を変更したものであり、スイッチング素子1
a、スイッチング素子1bと、配線材7bとの間に、配線材位置決め部材8により、壁1
0を形成した構成としている。
接合材6bが必要以上に濡れ拡がらないよう、絶縁基板5の金属板4の表面に、接合材
6bが濡れない有機物などのレジストでパターングする場合がある。このように、周り
にレジストなどで接合材6bの広がりを抑制している場合でも、接合材6bが溶融した際
に、配線材7bの重みなどで接合材6bがレジストに乗り上げる時がある。
Embodiment 3 FIG.
5A and 5B are a top view and a cross-sectional view showing a power semiconductor device according to Embodiment 3 of the present invention.
The shape of the wiring positioning member 8 of the first embodiment is changed, and the switching element 1
a, the wall 1 is positioned between the switching element 1b and the wiring member 7b by the wiring member positioning member 8;
In this configuration, 0 is formed.
As the bonding material 6b is not spread wetting than necessary, the surface of the metal plate 4 of the insulating substrate 5, there is a case where the putter two ring with a resist, such as organic bonding material 6b is not wet. As described above, even when the bonding material 6b is prevented from spreading around by a resist or the like, when the bonding material 6b is melted, the bonding material 6b sometimes runs on the resist due to the weight of the wiring material 7b or the like.

近年、SiCなどのワイドギャップ半導体からなるスイッチング素子、半導体素子は、高温動作可能という特徴を活かすため、接合材6aに、高温で適用可能なAgなどの焼結材が用いられることがある。スイッチング素子1a、スイッチング素子1b、半導体素子2a、半導体素子2bのための接合材6aに、Agなどの焼結材が使われる場合、接合材6bが僅かでも接合材6aに触れると、接合材6bが接合材6aに吸い取られ、配線材7bのための接合材6bの量が足りなくなる恐れがある。接合材6bが接合材6aに吸い取られる理由としては、焼結材は空孔を多く持っているため、表面に濡れるだけでなく、接合材6aの内部にも接合材6bが侵入しやすいためである。そこで、接合材6aと接合材6bが触れないよう、壁10を設けることで、接合材6aと接合材6bが触れることを防ぐことが可能である。
また、アウトサートの場合、接合前に配線材7bが動いたり、倒れたりする可能性がある。壁10を含め、4方向を壁にして位置決めすることで、配線材7bの位置ずれ、倒れ
を防止できる。
In recent years, a switching element and a semiconductor element made of a wide gap semiconductor such as SiC are often made of a sintered material such as Ag that can be applied at a high temperature for the bonding material 6a in order to take advantage of the feature that it can operate at a high temperature. When a bonding material 6a for the switching element 1a, the switching element 1b, the semiconductor element 2a, and the semiconductor element 2b is used, a sintered material such as Ag is used. If the bonding material 6b touches the bonding material 6a even slightly, the bonding material 6b May be absorbed by the bonding material 6a, and the amount of the bonding material 6b for the wiring material 7b may be insufficient. The reason why the bonding material 6b is absorbed by the bonding material 6a is that the sintered material has many pores, so that the bonding material 6b not only gets wet on the surface but also easily enters the bonding material 6a. is there. Therefore, by providing the wall 10 so that the bonding material 6a and the bonding material 6b do not touch each other, it is possible to prevent the bonding material 6a and the bonding material 6b from touching each other.
Further, in the case of outsert, there is a possibility that the wiring member 7b moves or falls before joining. Positioning and positioning of the wiring member 7b can be prevented by positioning with the four directions including the wall 10 as walls.

なお、この発明は、その発明の範囲内において、各実施の形態を自由に組み合わせたり、各実施の形態を適宜、変形、省略することが可能である。
また、図中、同一符号は同一構成または相当部分を示す。
It should be noted that within the scope of the present invention, the embodiments can be freely combined, or the embodiments can be appropriately modified or omitted.
Moreover, in the figure, the same code | symbol shows the same structure or an equivalent part.

1a スイッチング素子、1b スイッチング素子、2a 半導体素子、
2b 半導体素子、3 セラミック、4 金属板、5 絶縁基板、6a 接合材、
6b 接合材、7a 配線材、7b 配線材、8 配線位置決め部材、9 充填材、
10 壁
1a switching element, 1b switching element, 2a semiconductor element,
2b semiconductor element, 3 ceramic, 4 metal plate, 5 insulating substrate, 6a bonding material,
6b bonding material, 7a wiring material, 7b wiring material, 8 wiring positioning member, 9 filler,
10 walls

Claims (5)

半導体スイッチング素子と、前記半導体スイッチング素子が第1の接合材によって接合される絶縁基板と、前記半導体スイッチング素子に接続される第1の配線材と、前記絶縁基板に接続される第2の配線材と、前記絶縁基板に接着され前記第1及び前記第2の配線材の位置を決める配線位置決め部材とを備え、前記第1及び前記第2の配線材は前記配線位置決め部材によって位置決めされ、還元剤を含まない第2の接合材により接合されているとともに、前記第1の接合材と前記第2の接合材との間に、前記配線位置決め部材により形成された壁が設けられていることを特徴とする電力半導体装置。 A semiconductor switching element, an insulating substrate to which the semiconductor switching element is bonded by a first bonding material, a first wiring material connected to the semiconductor switching element, and a second wiring material connected to the insulating substrate And a wiring positioning member that is bonded to the insulating substrate and determines the positions of the first and second wiring members, wherein the first and second wiring members are positioned by the wiring positioning member, and a reducing agent. And a wall formed by the wiring positioning member is provided between the first bonding material and the second bonding material. A power semiconductor device. 前記半導体スイッチング素子に接続される前記第1の配線材、および前記絶縁基板に接続される前記第2の配線材の裏面に、前記第2の接合材の厚さ以下の高さの突起を有することを特徴とする、請求項1に記載の電力半導体装置。 Protrusions having a height less than or equal to the thickness of the second bonding material are provided on the back surfaces of the first wiring material connected to the semiconductor switching element and the second wiring material connected to the insulating substrate. The power semiconductor device according to claim 1, wherein: 前記第1の配線材、及び前記第2の配線材は、一部の板厚が他の部分の板厚より薄く形成されていることを特徴とする請求項1または2に記載の電力半導体装置。 3. The power semiconductor device according to claim 1, wherein the first wiring member and the second wiring member are formed such that a part of the plate thickness is thinner than that of the other part. . 前記第1の接合材は焼結材であることを特徴とする請求項1から3のいずれか一項に記載の電力半導体装置。 The power semiconductor device according to any one of claims 1 to 3 , wherein the first bonding material is a sintered material. 前記半導体スイッチング素子が、ワイドギャップ半導体からなることを特徴とする、請求項1からのいずれか一項に記載の電力半導体装置。 It said semiconductor switching element, characterized by comprising the wide-gap semiconductor, a power semiconductor device according to any one of claims 1 to 4.
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JP2005072098A (en) * 2003-08-20 2005-03-17 Fuji Electric Holdings Co Ltd Semiconductor device
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