JP6239048B2 - Semiconductor package - Google Patents

Description

  The present invention relates to a wafer level chip size package (WLCSP) type semiconductor package that performs packaging in a wafer state.

  For example, noise generated in the image sensor increases as the temperature rises. In particular, in an electronic endoscope, an image pickup element is disposed in an extremely tight space that is airtight, and a light guide serving as a heat source is also disposed adjacently. Therefore, a heat dissipation measure is extremely important for maintaining and improving image quality. In an electronic endoscope, an imaging device is connected from a bonding electrode on the front surface to a circuit board disposed on the back surface via a bonding wire, a TAB tape, etc., and the heat of the imaging device is applied to the bonding wire or TAB (Tape Automated Bonding) tape. Heat is dissipated through the wiring or the joint surface between the back surface of the image sensor and the circuit board. In order to increase the heat dissipation efficiency, a configuration in which a member having high thermal conductivity is disposed in the vicinity of the back surface of the image sensor has been proposed (Patent Document 1). In recent years, along with the reduction in size and weight of electronic devices, WLCSP technology has been developed in which a semiconductor package remains in a wafer state, and an imaging device using WLCSP technology has also been adopted in cellular phones and the like ( Cited reference 2).

JP 2002-291893 A JP 2008-130738 A

  When this WLCSP type image pickup device is mounted on an electronic endoscope, the image pickup device is bonded to a circuit board via a BGA (Ball Grid Array) bump formed on the back surface thereof. It will be through. On the other hand, in an electronic endoscope, since it is necessary to perform wiring through a thin flexible tube, the number of I / O pins of the image sensor is limited, and the number of bumps is small. For this reason, the image pickup device cannot sufficiently dissipate heat, which may lead to degradation of image quality.

  The present invention has been made in view of the above-described problems, and an object thereof is to provide a WLCSP type semiconductor package having high heat dissipation efficiency.

  The semiconductor package of the present invention is a semiconductor package that has undergone wafer level chip size package processing, and that BGA bumps are formed in a grid pattern on the bottom surface of the package, and the BGA bumps are arranged at all grid points. It is a feature.

  A part of the BGA bump is, for example, a dummy bump, and the BGA bump is preferably arranged at a minimum workable pitch. The semiconductor package of the present invention is effective, for example, in an application to an image sensor. The dummy bump is preferably connected to a ground pattern of a semiconductor package, for example.

  The circuit board of the present invention is a circuit board on which the semiconductor package is mounted, and is characterized by including lands corresponding to all the BGA bumps.

  In the circuit board, it is preferable that at least one land bonded to the dummy bump is connected to the ground pattern.

  An imaging unit according to the present invention includes the semiconductor package and a circuit board on which the semiconductor package is mounted, and the circuit board includes lands corresponding to all the BGA bumps.

  In the imaging unit, it is preferable that at least one land bonded to the dummy bump is connected to the ground pattern.

  The electronic endoscope according to the present invention is characterized in that the imaging unit is mounted.

  According to the present invention, a WLCSP type semiconductor package with high heat dissipation efficiency can be provided.

It is a sectional side view which shows the structure of the imaging unit carrying the WLCSP type semiconductor package which is one Embodiment of this invention. It is the top view which looked at the semiconductor package of this embodiment from the bottom face side. It is the top view seen from the bottom face side of the modification of a semiconductor package.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a side sectional view showing a configuration of an image pickup unit on which a WLCSP type semiconductor package according to an embodiment of the present invention is mounted.

  The imaging unit 10 is mounted on an electronic endoscope, for example, and includes a WLCSP type semiconductor package 11 and a circuit board package 12. In the present embodiment, the semiconductor package 11 is an image sensor, and is mainly composed of a glass layer 13, a resin layer 14, a silicon layer 15, and BGA bumps 16 arranged in a lattice pattern.

  The circuit board package 12 is formed with lands 17 arranged in a grid corresponding to all the BGA bumps of the semiconductor package 11, for example, and all the BGA bumps 16 are joined to the corresponding lands 17 by soldering or the like. Is done. Further, a gap corresponding to the height of the BGA bump 16 is formed between the silicon layer 15 and the circuit board package 12, and this gap is filled with a resin filler 18 having high thermal conductivity.

  The circuit board package 12 is provided with a plurality of cable joining lands 19 for connecting cables, and the signal lines 21 of the cables 20 are joined using solder or the like. In FIG. 1, a part of the circuit board package 12 is shown as a cutaway view, and a part of the wiring of the ground pattern 22 is schematically shown. In the example of FIG. 1, the bump 16G is a ground terminal that constitutes a ground pattern (not shown) of the semiconductor package 11, for example, and is connected to the ground line 21G of the cable 20 via the land 17G. The bump 16D is a dummy bump described later, and the land 17D corresponding to the dummy bump 16D is a dummy land. In the illustrated example, the dummy land 17D is connected to the ground pattern 22 (land 17G). The circuit board package 12 is mounted with electronic components 23, 24, etc. as necessary.

  FIG. 2 is a plan view of the semiconductor package 11 of the present embodiment as viewed from the bottom side. In the present embodiment, BGA bumps are arranged in a grid pattern on the bottom surface of the semiconductor package 11, and in the example of FIG. 2, BGA bumps (white circles and black circles) in a square grid pattern with a total of 25 grid points of 5 × 5 in length and width. ) Is arranged. BGA bumps are formed on all of the lattice points. In FIG. 2, 18 BGA bumps 16E indicated by white circles out of 25 BGA bumps are I / O pins of the semiconductor package 11, and 7 BAG bumps indicated by black circles are shown. The BGA bump 16D is a dummy bump.

  Conventionally, in a WLCSP type semiconductor package, bump pitch is set according to necessary I / O pins, and bumps are basically not arranged in an extra space. For example, I / O pins are gathered at the peripheral edge of the bottom surface, and the vicinity of the center of the bottom surface is an empty area where no bump is formed. On the other hand, in the present embodiment, for example, all the bumps that can be arranged at the minimum pitch that can be stably processed in the subsequent process of manufacturing the semiconductor package are formed. That is, in this embodiment, the number of I / O pins required for the semiconductor package is not allocated to the number of rows and columns of BGA bumps, but the total bonding area by BGA bumps is determined from, for example, the package size and the processable pitch in the manufacturing process. As many BGA bumps as possible can be arranged to be as large as possible.

  For example, in the example of FIG. 2, since there are 18 I / O pins, it is possible to provide two dummy bumps 16D in 5 rows × 4 columns, but in this embodiment, in order to obtain a larger bonding area, an arrangement of BGA bumps Is 5 rows × 5 columns (assuming that the bump cross-sectional area is constant). In the present embodiment, of the BGA bumps arranged in this way, seven bumps other than the I / O pins are used as dummy bumps 16D. Although the dummy bumps 16D may be in an electrically floating state, the heat dissipation effect can be further improved by connecting to the ground pattern in the semiconductor package 11 as in this embodiment. The dummy bumps 16D can be arranged on arbitrary lattice points, but it is preferable that the dummy bumps 16D are arranged at positions where wiring can be easily routed on the circuit board package 12 side.

  Further, when a combination of the bump size and the minimum processing pitch of the bumps can be selected, a combination in which the number of bumps corresponding to the total bump bonding area × the bump cross-sectional area becomes larger may be selected. For example, in the example of FIG. 2, the bump size can be increased to make the BGA 4 rows × 5 columns as described above. FIG. 3 shows a configuration in which, when the number of I / O pins required in a semiconductor package having the same size as that of FIG. 2 is 16, the bump size is increased and the BGA is made into 4 rows × 4 columns to eliminate dummy bumps. Show.

  As described above, according to the present embodiment, the bump bonding area can be increased in the WLCSP type semiconductor package, and heat can be more efficiently transferred to the circuit board side through the bumps. Be improved.

  In the present embodiment, the heat dissipation effect is further enhanced by providing lands on the circuit board package corresponding to all the bumps of the semiconductor package or connecting the dummy bumps to the ground pattern. In this embodiment, since the dummy land of the circuit board is also connected to the ground pattern and the ground line of the cable, heat is efficiently discharged to the cable.

  In this embodiment, lands corresponding to all the BGA bumps of the semiconductor package are provided in the circuit board package. However, the number of lands may be different from the number of bumps. Further, the dummy bumps and the dummy lands are not necessarily connected to the ground pattern. Further, the arrangement of the BGA bumps is not limited to a square lattice, and may be a hexagonal lattice arrangement, and the bump, land, and signal line may be joined by a method other than soldering. In the present embodiment, the electronic endoscope has been described as an example, but the present invention can also be applied to other electronic devices (particularly imaging units) that need to sufficiently consider heat dissipation.

DESCRIPTION OF SYMBOLS 10 Image pickup unit 11 WLCSP type semiconductor package 12 Circuit board package 13 Glass layer 15 Silicon layer 16 BGA bump 16D Dummy bump 16E I / O pin 16G Ground terminal (bump)
17 Bump Bond Land 17D Dummy Land 19 Cable Bond Land 20 Cable 21 Signal Line 21G Ground Line 22 Ground Pattern

Claims (9)

An electronic endoscope in which a semiconductor package including an image pickup device subjected to wafer level, chip size, and package processing is mounted and wiring is performed through a flexible tube , and BGA bumps are formed in a lattice pattern on the bottom surface of the semiconductor package are formed on the BGA bumps arranged on all grid points, the Ri portion of the dummy bumps der bumps located on the periphery of the BGA bumps, contained in a plurality of sides wherein the dummy bumps constitutes the peripheral portion And an electronic endoscope connected to a signal line of a cable through a circuit board . The electronic endoscope according to claim 1, wherein the BGA bumps are arranged at a minimum workable pitch. The electronic endoscope according to claim 1, wherein the BGA bumps are arranged in a square lattice pattern. The electronic endoscope according to claim 3, wherein the BGA bump is disposed at a corner of the square lattice. Electronic endoscope according to any one of claim 1 to 4, characterized in that said at least one dummy bumps are connected to the ground pattern of the semiconductor package. The electronic endoscope according to any one of claims 1 to 5, wherein the circuit board includes lands corresponding to all the BGA bumps. The electronic endoscope according to any one of claims 1 to 6, wherein a plurality of dummy bumps in the dummy bumps are arranged adjacent to each other. The electronic endoscope according to claim 1, wherein all of the dummy bumps are disposed in the peripheral portion. The electronic endoscope according to any one of claims 1 to 8, wherein a plurality of dummy bumps are provided on each of opposite sides in the peripheral portion.

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