JP6160802B2 - ビット符号化装置、ビット復号装置、送信装置、受信装置、ビット符号化方法、ビット復号方法、送信方法、受信方法およびプログラム - Google Patents

ビット符号化装置、ビット復号装置、送信装置、受信装置、ビット符号化方法、ビット復号方法、送信方法、受信方法およびプログラム Download PDF

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JP6160802B2
JP6160802B2 JP2012179870A JP2012179870A JP6160802B2 JP 6160802 B2 JP6160802 B2 JP 6160802B2 JP 2012179870 A JP2012179870 A JP 2012179870A JP 2012179870 A JP2012179870 A JP 2012179870A JP 6160802 B2 JP6160802 B2 JP 6160802B2
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Prior art keywords
bit
unit
bit string
decoding
llr
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JP2012179870A
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Japanese (ja)
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JP2014039127A (ja
JP2014039127A5 (https=
Inventor
淳悟 後藤
淳悟 後藤
高橋　宏樹
宏樹 高橋
中村　理
理 中村
一成 横枕
一成 横枕
泰弘 浜口
泰弘 浜口
信介 衣斐
信介 衣斐
政一 三瓶
政一 三瓶
伸一 宮本
伸一 宮本
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Sharp Corp
University of Osaka NUC
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Osaka University NUC
Sharp Corp
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Priority to JP2012179870A priority Critical patent/JP6160802B2/ja
Priority to PCT/JP2013/071889 priority patent/WO2014027664A1/ja
Priority to US14/420,873 priority patent/US9680602B2/en
Publication of JP2014039127A publication Critical patent/JP2014039127A/ja
Publication of JP2014039127A5 publication Critical patent/JP2014039127A5/ja
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2957—Turbo codes and decoding
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0041—Arrangements at the transmitter end
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045—Arrangements at the receiver end
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0064—Concatenated codes
    • H04L1/0066—Parallel concatenated codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0067—Rate matching
    • H04L1/0068—Rate matching by puncturing

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Quality & Reliability (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Error Detection And Correction (AREA)
JP2012179870A 2012-08-14 2012-08-14 ビット符号化装置、ビット復号装置、送信装置、受信装置、ビット符号化方法、ビット復号方法、送信方法、受信方法およびプログラム Expired - Fee Related JP6160802B2 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2012179870A JP6160802B2 (ja) 2012-08-14 2012-08-14 ビット符号化装置、ビット復号装置、送信装置、受信装置、ビット符号化方法、ビット復号方法、送信方法、受信方法およびプログラム
PCT/JP2013/071889 WO2014027664A1 (ja) 2012-08-14 2013-08-13 ビット符号化装置、ビット復号装置、送信装置、受信装置、ビット符号化方法、ビット復号方法、送信方法、受信方法およびプログラム
US14/420,873 US9680602B2 (en) 2012-08-14 2013-08-13 Bit coding device, bit decoding device, transmission device, reception device, bit coding method, bit decoding method, transmission method, reception method, and program

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2012179870A JP6160802B2 (ja) 2012-08-14 2012-08-14 ビット符号化装置、ビット復号装置、送信装置、受信装置、ビット符号化方法、ビット復号方法、送信方法、受信方法およびプログラム

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JP2014039127A JP2014039127A (ja) 2014-02-27
JP2014039127A5 JP2014039127A5 (https=) 2015-09-24
JP6160802B2 true JP6160802B2 (ja) 2017-07-12

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US (1) US9680602B2 (https=)
JP (1) JP6160802B2 (https=)
WO (1) WO2014027664A1 (https=)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20150117866A1 (en) * 2013-10-31 2015-04-30 Zte Corporation Quadrature amplitude modulation symbol mapping
JP6634694B2 (ja) * 2014-06-06 2020-01-22 ソニー株式会社 情報処理装置、情報処理方法およびプログラム
JP7064828B2 (ja) * 2017-03-22 2022-05-11 株式会社日立国際電気 無線通信システム
CN119382754A (zh) 2017-10-26 2025-01-28 松下电器（美国）知识产权公司 通信装置以及通信方法
CN120301437A (zh) * 2024-01-09 2025-07-11 华为技术有限公司 一种编码方法、解码方法及装置

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2847991B2 (ja) * 1991-02-22 1999-01-20 日本電気株式会社 データ通信方式
JPH06311053A (ja) * 1993-04-26 1994-11-04 Toshiba Corp 誤り訂正符号化装置及び誤り訂正復号化装置
US7236526B1 (en) * 1999-02-09 2007-06-26 Sony Corporation Coding system and its method, coding device and its method, decoding device and its method, recording device and its method, and reproducing device and its method
JP3987274B2 (ja) * 2000-08-21 2007-10-03 株式会社日立国際電気 多値変調方式の伝送装置
JP5356073B2 (ja) * 2009-03-06 2013-12-04 シャープ株式会社 符号化装置、受信装置、無線通信システム、パンクチャパターン選択方法及びそのプログラム
US8451952B2 (en) * 2009-12-30 2013-05-28 Telefonaktiebolaget L M Ericsson (Publ) Iterative decoding and demodulation with feedback attenuation
JP5532324B2 (ja) * 2010-07-29 2014-06-25 シャープ株式会社 送信装置、受信装置、送信方法、受信方法およびプログラム
US9077383B2 (en) * 2011-01-21 2015-07-07 Panasonic Intellectual Property Corporation Of America Encoding method, and decoding method
WO2013005766A1 (ja) * 2011-07-04 2013-01-10 日本電信電話株式会社 伝送システム及び伝送方法
JP5833633B2 (ja) * 2011-07-27 2015-12-16 パナソニック インテレクチュアル プロパティ コーポレーション オブアメリカＰａｎａｓｏｎｉｃ Ｉｎｔｅｌｌｅｃｔｕａｌ Ｐｒｏｐｅｒｔｙ Ｃｏｒｐｏｒａｔｉｏｎ ｏｆ Ａｍｅｒｉｃａ 符号化方法、復号方法

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Publication number Publication date
WO2014027664A1 (ja) 2014-02-20
US9680602B2 (en) 2017-06-13
JP2014039127A (ja) 2014-02-27
US20150244496A1 (en) 2015-08-27

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