JP6115564B2 - データ処理システム、半導体集積回路およびその制御方法 - Google Patents

データ処理システム、半導体集積回路およびその制御方法 Download PDF

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Publication number
JP6115564B2
JP6115564B2 JP2014504730A JP2014504730A JP6115564B2 JP 6115564 B2 JP6115564 B2 JP 6115564B2 JP 2014504730 A JP2014504730 A JP 2014504730A JP 2014504730 A JP2014504730 A JP 2014504730A JP 6115564 B2 JP6115564 B2 JP 6115564B2
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JP
Japan
Prior art keywords
data processing
memory
data
memory block
processing unit
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Expired - Fee Related
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JP2014504730A
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English (en)
Japanese (ja)
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JPWO2013136857A1 (ja
Inventor
正吾 中谷
正吾 中谷
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NEC Corp
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NEC Corp
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3877—Concurrent instruction execution, e.g. pipeline or look ahead using a slave processor, e.g. coprocessor
    • G06F9/3879—Concurrent instruction execution, e.g. pipeline or look ahead using a slave processor, e.g. coprocessor for non-native instruction execution, e.g. executing a command; for Java instruction set
    • G06F9/3881—Arrangements for communication of instructions and data
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30181—Instruction operation extension or modification
    • G06F9/30189—Instruction operation extension or modification according to execution mode, e.g. mode flag
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3877—Concurrent instruction execution, e.g. pipeline or look ahead using a slave processor, e.g. coprocessor

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  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
  • Multi Processors (AREA)
  • Dram (AREA)
JP2014504730A 2012-03-13 2013-01-25 データ処理システム、半導体集積回路およびその制御方法 Expired - Fee Related JP6115564B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2012055903 2012-03-13
JP2012055903 2012-03-13
PCT/JP2013/051539 WO2013136857A1 (fr) 2012-03-13 2013-01-25 Système de traitement de données, circuit intégré semi-conducteur, et procédé de commande associé

Publications (2)

Publication Number Publication Date
JPWO2013136857A1 JPWO2013136857A1 (ja) 2015-08-03
JP6115564B2 true JP6115564B2 (ja) 2017-04-19

Family

ID=49160779

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2014504730A Expired - Fee Related JP6115564B2 (ja) 2012-03-13 2013-01-25 データ処理システム、半導体集積回路およびその制御方法

Country Status (2)

Country Link
JP (1) JP6115564B2 (fr)
WO (1) WO2013136857A1 (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114201421B (zh) * 2022-02-17 2022-05-10 苏州浪潮智能科技有限公司 一种数据流处理方法、存储控制节点及可读存储介质

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2564805B2 (ja) * 1985-08-08 1996-12-18 日本電気株式会社 情報処理装置
JPS6488853A (en) * 1987-09-30 1989-04-03 Yokogawa Medical Syst Memory mechanism for high speed arithmetic unit
EP0843254A3 (fr) * 1990-01-18 1999-08-18 National Semiconductor Corporation Processeur de traitement de signaux numériques et processeur universal intégré avec mémoire interne partagée
JPH0460744A (ja) * 1990-06-29 1992-02-26 Casio Comput Co Ltd デジタルマイクロコンピュータ
GB2317468B (en) * 1996-09-23 2001-01-24 Advanced Risc Mach Ltd Digital signal processing integrated circuit architecture
DE69919059T2 (de) * 1998-02-04 2005-01-27 Texas Instruments Inc., Dallas Datenverarbeitungssytem mit einem digitalen Signalprozessor und einem Koprozessor und Datenverarbeitungsverfahren
JP5117383B2 (ja) * 2005-06-30 2013-01-16 アイメック マルチプロセッサシステムのためのメモリ配列

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Publication number Publication date
JPWO2013136857A1 (ja) 2015-08-03
WO2013136857A1 (fr) 2013-09-19

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