JP6097744B2 - シェーダプロセッサを用いたリアルタイムオンチップテクスチャ展開 - Google Patents

シェーダプロセッサを用いたリアルタイムオンチップテクスチャ展開 Download PDF

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JP6097744B2
JP6097744B2 JP2014515991A JP2014515991A JP6097744B2 JP 6097744 B2 JP6097744 B2 JP 6097744B2 JP 2014515991 A JP2014515991 A JP 2014515991A JP 2014515991 A JP2014515991 A JP 2014515991A JP 6097744 B2 JP6097744 B2 JP 6097744B2
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block
texture
shader
compressed
version
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JP2014520328A (ja
JP2014520328A5 (enExample
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アイオールチャ コンスタンチン
アイオールチャ コンスタンチン
ダブリュ． ブラザーズ ジョン
ダブリュ． ブラザーズ ジョン
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Advanced Micro Devices Inc
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Advanced Micro Devices Inc
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T11/00—2D [Two Dimensional] image generation
    • G06T11/40—Filling a planar surface by adding surface attributes, e.g. colour or texture
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T9/00—Image coding
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00—General purpose image data processing
    • G06T1/20—Processor architectures; Processor configuration, e.g. pipelining
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T15/00—3D [Three Dimensional] image rendering
    • G06T15/005—General purpose rendering architectures
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0875—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with dedicated cache, e.g. instruction or stack
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/109—Address translation for multiple virtual address spaces, e.g. segmentation
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/40—Specific encoding of data in memory or cache
    • G06F2212/401—Compressed data
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/45—Caching of specific data in cache memory
    • G06F2212/455—Image or video data
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/65—Details of virtual memory and virtual address translation
    • G06F2212/657—Virtual address space management

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Multimedia (AREA)
  • Computer Graphics (AREA)
  • Image Generation (AREA)
JP2014515991A 2011-06-17 2012-06-14 シェーダプロセッサを用いたリアルタイムオンチップテクスチャ展開 Active JP6097744B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US13/163,071 2011-06-17
US13/163,071 US9378560B2 (en) 2011-06-17 2011-06-17 Real time on-chip texture decompression using shader processors
PCT/US2012/042442 WO2012174231A1 (en) 2011-06-17 2012-06-14 Real time on-chip texture decompression using shader processors

Publications (3)

Publication Number Publication Date
JP2014520328A JP2014520328A (ja) 2014-08-21
JP2014520328A5 JP2014520328A5 (enExample) 2015-07-30
JP6097744B2 true JP6097744B2 (ja) 2017-03-15

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Country Link
US (4) US9378560B2 (enExample)
EP (1) EP2721584B1 (enExample)
JP (1) JP6097744B2 (enExample)
KR (1) KR101994986B1 (enExample)
CN (1) CN103608848B (enExample)
WO (1) WO2012174231A1 (enExample)

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