JP6097582B2 - Constant voltage source - Google Patents

Description

  The present invention relates to a constant voltage source (reference voltage source).

  Examples of conventional techniques related to the constant voltage source include Patent Documents 1 to 13 and Non-Patent Documents 1 to 7.

JP 2008-262603 A Japanese Patent Laid-Open No. 11-353045 JP 2003-78366 A JP 2008-204148 A JP 2010-152510 A JP 2002-55724 A JP 2010-231774 A International Publication No. 2009/014042 JP 2010-176258 A JP 2010-176270 A U.S. Pat. No. 6,441,680 JP 2008-134687 A JP 2011-204164 A

By Behzad Razavi, directed by Tadahiro Kuroda, "Analog CMOS Integrated Circuit Design" Application, Maruzen, 2003 Eric Vittoz, Jean Fellrath, "CMOS Analog Integrated Circuits Based on Weak Inversion Operation", IEEE Journal of Solid-State Circuits, VOL. SC-12, NO. 3, JUNE 1977 R. Jacob Baker, "CMOS Circuit Design, Layout, and Simulation" Revised Second Edition, Wiley-Interscience, 2008 Henri J. Oguey and Daniel Aebischer, "CMOS Current Reference Without Resistance", IEEE Journal of Solid-State Circuits, VOL. 32, NO. 7, JULY 1997 Eric A. Vittoz, Olivir Neyroud, "A Low-Voltage CMOS Bandgap Reference", IEEE Journal of Solid-State Circuits, VOL. SC-14, NO. 3, JUNE 1979 Ken Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya, "A 300 nW, 15 ppm / C, 20 ppm / V CMOS Voltage Reference Circuit Consisting of Subthreshold MOSFETs", IEEE Journal of Solid-State Circuits, VOL. 44, NO. 7, JULY 2009 Phillip E. Allen, Douglas R. Holberg, "CMOS Analog Circuit Design", Second Edition, Oxford University Press, 2002

<BGR [band-gap reference] circuit>
As a constant voltage source, a BGR circuit using a bipolar transistor has been widely used. FIG. 21 is a circuit diagram (corresponding to p.471 of Non-Patent Document 1, FIG. 11.11) showing an example of the BGR circuit.

  The output voltage Vout of the BGR circuit is generally 1.2 V, and a power supply voltage higher than this is required, so that low voltage operation is difficult. Further, in order to reduce power consumption, when the amount of current flowing through the transistors Q1 and Q2 in FIG. 21 is set to several nA, the resistors R1 to R3 are several hundred MΩ, and the sheet can be used in the integrated circuit manufacturing process. Mounting is difficult when the resistance value of the resistor is several kΩ / □. On the other hand, when the resistors R1 to R3 of several hundred kΩ that can be mounted are used, the current consumption of the BGR circuit is several μA (for example, Patent Document 12).

  The conventional techniques of Patent Document 1 to Patent Document 13 use a depletion type MOS [metal oxide semiconductor] transistor, and therefore can be applied only to a process having a manufacturing process of a depletion type MOS transistor. The process having only the manufacturing process of the enhancement type MOS transistor used in the manufacturing method cannot be applied.

<Subthreshold constant current source>
In order to save power, it is necessary to study a circuit that operates in a subthreshold region (weak inversion region) where the output current value of the current mirror is on the order of several nA. Constant current as shown in FIG. 22 (corresponding to FIG. 8 of Non-Patent Document 2) since the discovery of the sub-threshold characteristic (weak inversion characteristic) of the CMOS [complementary MOS] transistor represented by the following equation (1) A source has been created.

  In equation (1), ID: drain current, VT: thermal voltage (26 mV at room temperature), ID0: drain current at VGS = VTH, VTH: threshold voltage (about 0.7 V, depending on process and temperature), VGS: gate voltage, n: weak inversion slope coefficient (1 <n <3).

  The constant current source of FIG. 22 is also called a beta-multiplier (see p.624 to p.635 of Non-Patent Document 3), and the W / L ratio of the resistor R and the transistors T1 and T3. Thus, the output current value IR is obtained by the following equation (2). However, it is assumed that W2 / L2 = W4 / L4 = W6 / L6 as a precondition of the formula (2).

  Here, in order to suppress the output current value IR of the current mirror to several nA, the resistance R needs to be several MΩ, and the circuit area increases when the sheet resistance is several kΩ / □ as described above. . In Patent Documents 2 to 5, a band gap constant voltage source using a subthreshold region is disclosed, and in Patent Document 6, a constant current source using a subthreshold region is disclosed. The circuit also uses resistors, increasing the area.

<Circuit area reduction of subthreshold constant current source>
In order to avoid an increase in circuit area due to the resistor, a device in which the resistor R in FIG. 22 is replaced with a MOS transistor has been devised. FIG. 23 is a circuit diagram (corresponding to FIG. 2 of Non-Patent Document 4) showing a second conventional example of a constant current source. 22 is replaced by T3 → N1, T1 → N2, R → N4, T4 → P1, T2 → P2, and T6 → Px, and further includes a transistor P3 for generating the gate voltage of the transistor N4. And a transistor N3 is added. Note that the transistor N4 provided in place of the resistor R in FIG. 22 is referred to as a “current generating transistor” (see paragraph [0044] of Patent Document 7). According to this method, mounting in an integrated circuit is possible. However, as shown in FIG. 24 (corresponding to FIG. 4 of Non-Patent Document 4), there is a problem that the power supply voltage dependency is poor.

<Improvement of power supply voltage characteristics of subthreshold constant current source>
As a method for improving the power supply voltage dependency characteristic of the constant current source, a method of inserting an operational amplifier or a cascode current mirror can be applied as in the case of the constant current source of the μA order. In the case of inserting an operational amplifier, it is preferable to configure as shown in FIG. 25 (corresponding to FIG. 20.19 of Non-Patent Document 3). In the circuit of FIG. 22, T1 → M1, T2 → M3, T3 → M2, and T4 → M4 are replaced.

  FIG. 26 is a diagram showing a result of improving the power supply voltage dependency by adding an operational amplifier to a constant current source on the order of μA (corresponding to p.630 and FIG.20.23 of Non-Patent Document 3). In this figure, it is shown that the power supply voltage dependency of the current value is improved at 0.6V to 1.2V.

  In this way, a constant current source having a low power supply voltage dependency can be created. However, the conventional circuits of FIGS. 22, 23, and 25 always have a positive temperature dependency, that is, the current value increases as the temperature rises. (See paragraph [0056] of Patent Document 7 and pages 631-635 of Non-Patent Document 3). For this reason, when these conventional circuits are used in an environment where the operating temperature varies, each output current increases with temperature, and there is a problem that a constant current cannot be supplied. Note that Patent Document 7 is a conventional technique related only to a constant current source, and does not disclose any method for generating a constant voltage.

<Subthreshold voltage source>
The constant current source shown in FIG. 25 has temperature dependency, but when generating a constant voltage without temperature dependency, a constant current source having a PTAT [proportional to absolute temperature] characteristic (positive temperature characteristic) is used. It is sufficient if a voltage source and a constant voltage source having a CTAT [complementary to absolute temperature] characteristic (negative temperature characteristic) are prepared and a mechanism capable of adjusting the temperature dependence of the constant current source to cancel each other out.

First, the CTAT constant voltage source will be described. As shown in FIG. 27, when the NMOS transistor drain and gate are short-circuited and diode-connected, the output voltage Vo becomes equal to the gate voltage Vgs. Therefore, the output voltage Vo is calculated by the following equation (3) from the above equation (1). Here, when the drain current ID is constant, the thermal voltage VT (= kT / q, where k is Boltzmann's constant 1.38 × 10 ⁻²³ [J / K], and q is the elementary charge 1.6 × 10 ^{−. 19} [C]) and the threshold voltage VTH (= VTH0−κT, where VTH0 is the threshold voltage at absolute zero, and κ is the temperature coefficient of the threshold voltage) varies with the temperature T.

  Therefore, when the equation (3) is differentiated by the temperature T, the temperature differential coefficient is obtained by the following equation (4).

  Here, in the normal CMOS process, since the following equation (5) is established, the gate voltage Vgs and drain voltage (output voltage Vo) generated by diode connection become CTAT (negative temperature characteristics).

  Next, the PTAT constant voltage source will be described. As shown in FIG. 28 (corresponding to FIG. 7 of Non-Patent Document 5), when two NMOS transistors having different W / L ratios are diode-connected (drain and gate are short-circuited), the output appearing at the connection node of both transistors The voltage Vo has PTAT characteristics as shown in FIG. 29 (corresponding to FIG. 8 of Non-Patent Document 5).

  From the above equation (3), the gate voltages VG of the two NMOS transistors are expressed by the following equation (6).

  Therefore, the output voltage Vo appearing at the connection node of both transistors can be obtained by the following equation (7).

  When the differential equation (7) is differentiated by the temperature T to obtain the temperature differential coefficient, the following equation (8) is obtained from the thermal voltage VT = kT / q.

  Here, when La = Wa = Lb = 20 μm and Wb = 200 μm, the following equation (9) is derived, and it can be seen that the output voltage Vo has PTAT characteristics.

  Next, a combination of a CTAT constant voltage source and a PTAT constant voltage source will be described. In Patent Document 8 and Non-Patent Document 6, as shown in FIG. 30 (corresponding to FIG. 1 of Patent Document 8), the above-mentioned CTAT constant voltage source (FIG. 27) and PTAT constant voltage source (FIG. 28) are provided. A constant voltage source having a constant temperature characteristic in combination is disclosed. In this circuit, current needs to flow through the three current sources 3c, 3d, and 3e in order to generate the reference voltage Vref, so that current consumption increases. In addition, it is necessary to adjust a large number of elements so as to satisfy a complicated mathematical formula as shown in [Equation 16] of Patent Document 8, and there is a problem of complicated adjustment of temperature characteristics.

  Next, a configuration in which the CTAT constant voltage source and the PTAT constant voltage source are added in the subsequent stage will be described. Although the output voltage Vo in FIG. 28 has PTAT characteristics, the gate voltage VG has CTAT characteristics. As shown in FIG. 31 (corresponding to FIG. 1 of Patent Document 9), Patent Document 9 discloses a constant voltage source in which an adder is added to the subsequent stage and the temperature dependence is reduced by utilizing this fact. Yes. However, in order to eliminate the temperature dependency in this circuit, another circuit such as an adder circuit is required in the subsequent stage, which causes an increase in circuit scale and power consumption.

  Next, a method for configuring a constant voltage source by combining the temperature characteristics of the PMOS transistor and the NMOS transistor will be described. Patent Document 11 discloses an example in which a constant voltage source is configured by combining the temperature characteristics of a PMOS transistor and the temperature characteristics of an NMOS transistor, as shown in FIG. 32 (corresponding to FIG. 3 of Patent Document 11). . This circuit includes three independent elements (PMOS transistor (MP), NMOS transistor (MN), and resistors (R1, R2)) having temperature dependency, and the temperature dependency of the reference voltage Vref is determined by each element. Since it depends on the absolute value, there is a problem that process variation is large.

<Purpose>
An object of the present invention is to provide a constant voltage source that has low temperature dependency and process dependency, low power consumption, and a small circuit area in view of the above problems found by the inventors of the present application.

  In order to achieve the above object, a constant voltage source according to the present invention includes a constant current source that generates a reference current, a first transistor and a second transistor that generate a first voltage having a positive temperature differential coefficient, and a temperature A configuration in which a third transistor that generates a second voltage having a negative differential coefficient is connected in series, and the first voltage and the second voltage are added to generate a constant output voltage (first configuration) ).

  In the constant voltage source having the first configuration, the drain of the first transistor and the source of the second transistor are both connected to the output terminal of the output voltage, and the gate of the first transistor The gate of the second transistor is connected to the drain of the second transistor, the drain of the second transistor is connected to the constant current source, and the drain and gate of the third transistor are In any case, a configuration (second configuration) connected to the source of the first transistor is preferable.

  In the constant voltage source having the second configuration, the back gates of the first to third transistors may be connected to the source of each transistor or the ground (third configuration).

  In the constant voltage source having any one of the first to third configurations, the first transistor and the second transistor may have different W / L ratios (fourth configuration).

  In the constant voltage source having any one of the first to fourth configurations, the absolute value of the temperature differential coefficient of the first voltage and the absolute value of the temperature differential coefficient of the second voltage of the reference current coincide with each other. It is preferable to adopt a configuration (fifth configuration) that is set to the current value to be used.

  In the constant voltage source having any one of the first to fifth configurations, the reference current is set to a current value at which the first to third transistors operate in a weak inversion region (sixth Configuration).

  In the constant voltage source having any one of the first to fifth configurations, the reference current is set to a current value at which the first to third transistors operate in an intermediate inversion region or a strong inversion region. (Seventh configuration) is preferable.

  In the constant voltage source having any one of the first to seventh configurations, a plurality of transistor pairs each including the first transistor and the second transistor may be stacked (eighth configuration).

  The constant voltage source having any one of the first to eighth configurations is a second constant current source for increasing or decreasing the reference current flowing through the third transistor or the first transistor and the third transistor. It is good to make it the structure which has further (9th structure).

  In the constant voltage source having any one of the first to ninth configurations, the constant current source mirrors a resistor for setting a current value of the reference current and a current flowing through the resistor. And a current mirror that generates current (a tenth configuration).

  In the constant voltage source having the tenth configuration described above, the constant current source may be configured to include an operational amplifier (an eleventh configuration) that reduces power supply voltage dependency of the amount of current flowing through the current mirror.

  In the constant voltage source having the tenth or eleventh configuration, the constant current source may be configured to use a current generation transistor or a sheet resistance (a twelfth configuration) as the resistor.

  In the constant voltage source having any one of the first to twelfth configurations, the constant current source may be formed by only a field effect transistor, only a bipolar transistor, or a combination of both transistors (a thirteenth configuration). Configuration).

  The semiconductor device according to the present invention has a configuration (fourteenth configuration) including a constant voltage source having any one of the first to thirteenth configurations.

  An electronic apparatus according to the present invention has a configuration (fifteenth configuration) including a constant voltage source having any one of the first to thirteenth configurations.

  According to the present invention, it is possible to provide a constant voltage source that has low temperature dependency and process dependency, low power consumption, and a small circuit area.

Circuit diagram showing a pair of diode-connected NMOS transistors The figure which shows the temperature characteristic of output voltage Vo and gate voltage VG The figure which shows the correlation of the reference current Id and the temperature differential coefficient dV / dT. Circuit diagram showing a first embodiment of a constant voltage source Temperature characteristics diagram of output voltage Vo A circuit diagram showing a modification of the first embodiment Circuit diagram showing a second embodiment of the constant voltage source Circuit diagram showing a third embodiment of a constant voltage source Circuit diagram showing a fourth embodiment of a constant voltage source Temperature characteristics diagram of output voltage Vo Circuit diagram showing a first configuration example of the constant current source I1 Circuit diagram showing a second configuration example of the constant current source I1 Circuit diagram showing a third configuration example of the constant current source I1 Circuit diagram showing a fourth configuration example of the constant current source I1 Circuit diagram showing a fifth configuration example of the constant current source I1 Block diagram showing a sixth configuration example of the constant current source I1 External view of mobile phone (smartphone) External view of tablet terminal External view of laptop External view of digital camera Circuit diagram showing an example of BGR circuit Circuit diagram showing a first conventional example of a constant current source Circuit diagram showing a second conventional example of a constant current source The figure which shows the power supply voltage dependence of a 2nd prior art example Circuit diagram showing third conventional example of constant current source The figure which shows the improvement result of power supply voltage dependency Circuit diagram showing an example of a CTAT constant voltage source Circuit diagram showing an example of PTAT constant voltage source The figure which shows the PTAT characteristic of the output voltage Vo Circuit diagram showing a first conventional example of a constant voltage source Circuit diagram showing a second conventional example of a constant voltage source Circuit diagram showing third conventional example of constant voltage source

<First Embodiment>
FIG. 1 is a circuit diagram showing a pair of diode-connected N-channel MOS field effect transistors Ta and Tb. The source and back gate of the transistor Ta (Wa / La = 0.5 μm / 20 μm) are both connected to the ground terminal. The drain of the transistor Ta and the source and back gate of the transistor Tb (Wb / Lb = 20 μm / 0.5 μm) are all connected to the output terminal of the output voltage Vo. The gates of the transistors Ta and Tb are both connected to the drain of the transistor Tb. The drain of the transistor Tb is connected to the power supply terminal via a constant current source I1 that generates a reference current Id.

  FIG. 2 is a diagram illustrating temperature characteristics of the output voltage Vo and the gate voltage VG. When the temperature characteristics when the reference current Id = 5 nA, 10 nA, 15 nA, and 20 nA is applied, the temperature differential coefficient (dVo / dT) of the output voltage Vo has a PTAT characteristic with excellent linearity, and the temperature of the gate voltage VG. It can be seen that the derivative (dVG / dT) has a CTAT characteristic with excellent linearity.

  From FIG. 2, it can be read that when the reference current Id increases, the slope of PTAT becomes steep and the slope of CTAT becomes gentler. That is, by adding these two characteristics and selecting an appropriate current value as the reference current Id, a constant voltage source with extremely small temperature dependence can be created.

  FIG. 3 is a diagram showing the correlation between the reference current Id and the temperature differential coefficient dV / dT. From FIG. 3, it can be seen that a constant voltage source having a small temperature dependency can be created at a point a in the drawing (ie, Id = 18 nA). Theoretically, the slope of CTAT becomes gentler as the reference current Id increases from the previous equation (4), and the slope of PTAT becomes almost constant regardless of the reference current Id from the previous equation (8). Therefore, as in point a, the absolute value of the temperature differential coefficient (dVo / dT) of the output voltage Vo having PTAT characteristics matches the absolute value of the temperature differential coefficient (dVG / dT) of the gate voltage VG having CTAT characteristics. One point is always found by sweeping the reference current Id.

  FIG. 4 is a circuit diagram showing a first embodiment of the constant voltage source. The constant voltage source 1 of the first embodiment includes a constant current source I1 that generates a reference current Id, and N-channel MOS field effect transistors Ta and Tb (PTAT constant voltage source) that generate a voltage V1 having a positive temperature differential coefficient. Equivalent) and an N-channel MOS field effect transistor Tc (corresponding to a CTAT constant voltage source) that generates a voltage V2 having a negative temperature differential coefficient, connected in series, and the voltage V1 and the voltage V2 are added. Thus, a constant output voltage Vo having a small temperature differential coefficient is generated.

  The connection relationship of each element will be described. The drain of the transistor Ta and the source of the transistor Tb are both connected to the output terminal of the output voltage Vo. Both the gate of the transistor Ta and the gate of the transistor Tb are connected to the drain of the transistor Tb. The drain of the transistor Tb is connected to the constant current source I1. The drain and gate of the transistor Tc are both connected to the source of the transistor Ta. The source of the transistor Tc is connected to the ground. The back gates of the transistors Ta to Tc are connected to the sources of the transistors Ta to Tc, respectively.

  The W / L ratio of the transistor Ta is designed to be Wa / La = 0.5 μm / 20 μm. The W / L ratio of the transistor Tb is designed to be Wb / Lb = 20 μm / 0.5 μm. That is, the transistors Ta and Tb have different W / L. The W / L ratio of the transistor Tc is designed to be Wc / Lc = 0.5 μm / 20 μm.

  In the constant voltage source 1 having the above configuration, when a reference current Id = 18 nA corresponding to the point a in FIG. 3 is passed, the temperature coefficient TC of the output voltage Vo in the temperature range from −50 ° C. to + 100 ° C. is shown in FIG. As shown in the temperature characteristic diagram of the output voltage Vo, it was 4.12 ppm / ° C. As for the temperature coefficient TC, the maximum value, minimum value, and average value of the output voltage Vo are obtained in the target temperature range, and TC [ppm / ° C.] = (Maximum value−minimum value) / (average value × target) Temperature range).

  In the above description, a method of adjusting the current value of the reference current Id so that the absolute values of the temperature differential coefficients of the voltages V1 and V2 coincide with each other after fixing the W / L ratio of the transistors Ta to Tc. Although the description has been given by way of example, the design method of the constant voltage source 1 is not limited to this, and conversely to the above, the reference current Id is fixed, and the temperature of each of the voltages V1 and V2 is small. You may employ | adopt the method of adjusting the W / L ratio of transistor Ta-Tc so that the absolute value of a coefficient may mutually correspond.

  FIG. 6 is a diagram showing a modification of the constant voltage source 1. In the case of a manufacturing process having a triple well structure (N-type well, P-type well, deep N-type well), the back gate voltages of the transistors Ta to Tc can be individually set, so that the circuit of FIG. A configuration (the same basic configuration as in FIG. 4) can be adopted. On the other hand, in the manufacturing process having no triple well structure, the circuit configuration of FIG. 6A cannot be adopted, and therefore the circuit configuration of FIG. 6B (the back gate is commonly connected to the ground (P-type substrate)). Configuration) will be adopted. Even in this case, the design method of the present invention can be applied by paying attention to the voltage difference between the source and the back gate. When the N-channel MOS field effect transistors Ta to Tc are replaced with P-channel MOS field effect transistors Ta ′ to Tc ′, the circuit configuration of FIG. 6C can be employed. In this case, it is possible to generate the output voltage Vo in which a constant voltage has dropped from the power supply voltage VDD.

Second Embodiment
FIG. 7 is a circuit diagram showing a second embodiment of the constant voltage source. When it is desired to reduce the current consumption of the constant voltage source 1 (reduction of the reference current Id), it can be seen that the slope of PTAT in FIG. Therefore, as shown in FIG. 7A, the constant voltage source 1 of the second embodiment is an output of a PTAT constant voltage source (see the broken line PTAT1) in which a CTAT constant voltage source (see the broken line CTAT) is connected in series. At least one PTAT constant voltage source (see broken line PTAT2) is stacked at the end. As described above, by stacking a plurality of transistor pairs including the transistors Ta and Tb, it is possible to increase the inclination of PTAT and reduce the reference current Id. Note that whether the back gate of each transistor is connected to the source or the ground may be appropriately selected according to the manufacturing process. Further, the number of stacks of PTAT constant voltage sources is also arbitrary.

  It should be noted that the difference between the second embodiment (FIG. 7A) and Patent Document 8 (FIG. 7B). Since both configurations include two PTAT constant voltage sources and one CTAT constant voltage source, the temperature differential coefficient adjustment capability is substantially the same. However, while Patent Document 8 requires three constant current sources (I1, I1 ′, I1 ″), the second embodiment suffices with two constant current sources I1 and I1 ′. Since the constant voltage source 1 of the second embodiment can suppress the current consumption to 2/3 as compared with Patent Document 8, when the reference currents generated in FIG. Is advantageous.

<Third Embodiment>
FIG. 8 is a circuit diagram showing a third embodiment of the constant voltage source. From the above equation (4), it is understood that the temperature differential coefficient of CTAT can be adjusted by the drain current Id. For example, when it is desired to increase only the reference current flowing through the transistor Tc forming the CTAT constant voltage source, the reference current Id2 is generated between the power supply terminal and the drain of the transistor Tc as shown in FIG. What is necessary is just to add the constant current source I2 to perform. With such a configuration, the reference current (Id1 + Id2) flows through the transistor Tc.

  The transistor Ta forms a PTAT constant voltage source together with the transistor Tb, but the transistor Ta alone functions as a CTAT constant voltage source. In view of this, when it is desired to increase the reference current flowing through the transistors Ta and Tc, as shown in FIG. 8B, a constant current source that generates a reference current Id2 between the power supply terminal and the drain of the transistor Ta. What is necessary is just to add I2. With this configuration, the reference current (Id1 + Id2) flows through the transistors Ta and Tc.

  On the other hand, when it is desired to reduce only the reference current flowing through the transistor Tc, as shown in FIG. 8C, a constant current source I2 that generates the reference current Id2 is added between the drain of the transistor Tc and the ground. That's fine. With such a configuration, the reference current (Id1-Id2) flows through the transistor Tc.

  Further, when it is desired to reduce the reference current flowing through the transistors Ta and Tc, as shown in FIG. 8D, a constant current source I2 that generates the reference current Id2 is added between the drain of the transistor Ta and the ground. do it. With this configuration, the reference current (Id1-Id2) flows through the transistors Ta and Tc.

  In FIGS. 8A to 8D, whether the back gate of each transistor is connected to the source or the ground may be appropriately selected depending on the manufacturing process.

<Fourth embodiment>
FIG. 9 is a circuit diagram showing a fourth embodiment of the constant voltage source. The constant voltage source 1 of the fourth embodiment has the same circuit configuration as that of the first embodiment (FIG. 4), but improves the temperature dependence of the output voltage Vo in a high temperature range (100 ° C. to 150 ° C.). Therefore, the W values of the transistors Ta and Tc and the current value of the reference current Id are changed.

  More specifically, the W values of the transistors Ta and Tc are changed from 0.5 μm to 3 μm. In addition, the current value of the reference current Id is changed from 18 nA to 160 nA due to the large design of the W value.

  By making such a design change, the temperature dependence of the output voltage Vo in the high temperature range (100 ° C. to 150 ° C.) is improved, and the output in the temperature range of −50 ° C. to + 150 ° C. as shown in FIG. The temperature coefficient TC of the voltage Vo can be set to 9.71 ppm / ° C.

  As the amount of the reference current Id is increased, the drain current ID of the transistors Ta to Tc becomes closer to the drain current ID0 at the time of VGS = VTH. Therefore, the operation region of the transistors Ta to Tc is a weak inversion region (subthreshold region). ) To an intermediate inversion region (Moderate inversion region: Tth <Vgs <Ton, see p.99 of Non-Patent Document 7, FIG. 3.5-2, etc.). The ID0 of the manufacturing process used this time is about 310 nA.

  Thus, the reference current Id may be set to a current value at which the transistors Ta to Tc operate in the weak inversion region (subthreshold region), or the transistors Ta to Tc may be set to the intermediate inversion region or the strong inversion region ( The current value may be set to operate in the saturation region.

<Constant current source>
FIG. 11 is a circuit diagram showing a first configuration example of the constant current source I1. As shown in FIG. 11A, the constant current source I1 of the first configuration example is a so-called beta multiplication type, and includes P-channel MOS field effect transistors P11 to P13, N-channel MOS field effect transistors N11, and N12 and a current generation transistor MR or a sheet resistance SR. In FIG. 11, the illustration of the activation circuit is omitted.

  The sources of the transistors P11 to P13 are all connected to the application terminal of the power supply voltage VDD. The gates of the transistors P11 to P13 are all connected to the drain of the transistor P12. The drain of the transistor P11 is connected to the drain of the transistor N11. The drain of the transistor P12 is connected to the drain of the transistor N12. The gates of the transistors N11 and N12 are both connected to the drain of the transistor N11. The source of the transistor N11 is connected to the ground. The source of the transistor N12 is connected to the ground via the current generation transistor MR or the sheet resistance SR. The drain of the transistor P13 is connected to the drain of the transistor Tb described above as the output terminal of the reference current Id. In addition, about the broken line part in a figure, you may employ | adopt any of 1st Embodiment-4th Embodiment.

  The transistors P11 to P13 and the transistors N11 and N12 form a current mirror that generates a reference current Id by mirroring the current flowing through the current generation transistor MR or the sheet resistance SR.

  The current generation transistor MR is an N-channel MOS field transistor whose gate is connected to the application terminal of the output voltage Vo, and its on-resistance component is used as a resistor for setting the current value of the reference current Id. .

  When designing the reference current Id to nA order, the circuit configuration of FIG. In this case, all transistors other than the current generating transistor MR operate in the weak inversion region (subthreshold region). On the other hand, when the reference current Id is designed to have a larger current value, the circuit configuration shown in FIG. 11B (= configuration using the sheet resistance SR having a resistance value smaller than that of the current generation transistor MR) may be employed. Thus, the constant voltage source 1 can use either a constant current source that operates in the weak inversion region (subthreshold region) or a constant current source that operates in the strong inversion region.

  FIG. 12 is a circuit diagram showing a second configuration example of the constant current source I1. The second configuration example is an improved type of the first configuration example, and includes an operational amplifier X1 that reduces the power supply voltage dependency of the amount of current flowing through the current mirror by matching the drain voltages of the transistors P11 and P12. Has characteristics. With such a configuration, it is possible to improve the power supply voltage dependency of the reference current Id.

  The second configuration example can be applied to both the configuration using the current generation transistor MR (FIG. 12A) and the configuration using the sheet resistance SR (FIG. 12B).

  FIG. 13 is a circuit diagram showing a third configuration example of the constant current source I1. In the third configuration example, circuit elements of the operational amplifier X1 added in the second configuration example are depicted in detail. Specifically, the operational amplifier X1 includes transistors P21 and P22, and transistors N21 to N25.

  The sources of the transistors P21 and P22 are both connected to the application terminal of the power supply voltage VDD. The gates of the transistors P21 and P22 are both connected to the drain of the transistor P21. The drain of the transistor P21 is connected to the drain of the transistor N21. The drain of the transistor P22 is connected to the drain of the transistor N22, and is also connected to the gates of the transistors P11 and P12. The gate of the transistor N21 is connected to the drain of the transistor P12. The gate of the transistor N22 is connected to the drain of the transistor P11.

  The sources of the transistors N21 and N22 are both connected to the drain of the transistor N23. The source of the transistor N23 is connected to the ground. The gate of the transistor N23 is connected to the drain of the transistor N11. The drain of the transistor N24 is connected to the drain of the transistor P11. The drain of the transistor N25 is connected to the drain of the transistor P12. The gates of the transistors N24 and N25 are both connected to the drain of the transistor N24. The source of the transistor N24 is connected to the drain of the transistor N11. The source of the transistor N25 is connected to the drain of the transistor N12.

  By adopting such a configuration, the operational amplifier X1 can be formed of only a MOS field effect transistor.

  Note that the operational amplifier X1 of the third configuration example can be applied to either a configuration using the current generation transistor MR (FIG. 13A) or a configuration using the sheet resistance SR (FIG. 13B). is there.

  FIG. 14 is a circuit diagram showing a fourth configuration example of the constant current source I1. The fourth configuration example is a modification of the third configuration example, in which the transistors N23 to N25 are removed and the connection relationship between the elements is partially changed.

  Specifically, the sources of the transistors P21 and P22 are both connected to the application terminal of the power supply voltage VDD. The gates of the transistors P21 and P22 are both connected to the drain of the transistor P21. The drain of the transistor P21 is connected to the drain of the transistor N21. The drain of the transistor P22 is connected to the drain of the transistor N22, and is also connected to the gates of the transistors P11 and P12. The gate of the transistor N21 is connected to the drain of the transistor P12. The gate of the transistor N22 is connected to the drain of the transistor P11. The sources of the transistors N21 and N22 are both connected to the ground. The gate of the transistor N11 is connected to the drain of the transistor N11. The gate of the transistor N12 is connected to the drain of the transistor N12. In this way, the gates of the transistors N11 and N12 are disconnected from each other.

  By adopting such a configuration, the operational amplifier X1 can be formed with a smaller number of elements.

  Note that the operational amplifier X1 of the fourth configuration example can be applied to both the configuration using the current generation transistor MR (FIG. 14A) and the configuration using the sheet resistance SR (FIG. 14B). is there.

  FIG. 15 is a circuit diagram showing a fifth configuration example of the constant current source I1. The constant current source I1 of the fifth configuration example includes P channel type MOS field effect transistors P11 to P13, N channel type MOS field effect transistors N11 and N12, a sheet resistance SR, and pnp type bipolar transistors Q11 and Q12 (emitter area). Ratio 1: n). Although not shown in FIG. 15, the sheet resistance SR can be replaced with a current generation transistor MR.

  The sources of the transistors P11 to P13 are all connected to the application terminal of the power supply voltage VDD. The gates of the transistors P11 to P13 are all connected to the drain of the transistor P11. The drain of the transistor P11 is connected to the drain of the transistor N11. The drain of the transistor P12 is connected to the drain of the transistor N12. The gates of the transistors N11 and N12 are both connected to the drain of the transistor N12. The source of the transistor N11 is connected to the emitter of the transistor Q11. The base and collector of the transistor Q11 are both connected to the ground. The source of the transistor N12 is connected to the emitter of the transistor Q12 via the sheet resistor SR. The base and collector of the transistor Q12 are both connected to the ground. The drain of the transistor P13 is connected to the drain of the transistor Tb described above as the output terminal of the reference current Id.

  Thus, when the BiCMOS process is used, the bipolar transistors Q11 and Q12 may be included in a part of the constant current source I1. Further, as shown in FIG. 16, the constant current source I1 may be formed of only a bipolar transistor.

<Effect>
In the conventional method of generating a constant voltage from a constant current source using a subthreshold region, it is difficult to reduce power consumption and circuit area while reducing the influence of temperature dependency and process dependency. On the other hand, according to the constant voltage source 1 of the above embodiment, it is possible to solve these problems and to provide a constant voltage source that has low temperature dependency and process dependency, low power consumption, and a small circuit area. It becomes possible.

  The temperature dependence was improved to 4.12 ppm / ° C. (not including the characteristics of the current source) in the first embodiment, compared to 15 ppm / ° C. (including the characteristics of the current source) of Non-Patent Document 6. In addition, since it can be configured using only a single process, either NMOS or PMOS, without using a resistor, it is less susceptible to process dependence than the conventional circuit of Patent Document 11. In addition, while three current sources are required in Patent Document 8 and Non-Patent Document 6, one current source is sufficient in the above-described embodiment. Therefore, simple calculation can reduce power consumption to 1/3. Also, with respect to the circuit area, in Patent Document 8, six transistors (8a to 8d, 9, 10) are required, whereas in the above embodiment, three transistors (Ta to Tc) are sufficient, so the circuit area is halved. can do. Further, in Patent Document 9, an adder is additionally required. However, in the above-described embodiment, an additional circuit is not required, so that low power consumption can be expected and the circuit area can be reduced.

<Other variations>
Various technical features disclosed in the present specification can be variously modified within the scope of the technical creation in addition to the above-described embodiment. That is, the above-described embodiment is an example in all respects and should not be considered as limiting, and the technical scope of the present invention is not the description of the above-described embodiment, but the claims. It should be understood that all modifications that come within the meaning and range of equivalents of the claims are included.

  The constant voltage source is mounted on almost all LSIs (large scale integration) with the integration of analog circuits. Therefore, the present invention can be used for LSIs in general, and by extension, can be used for electronic devices having LSIs. In particular, the present invention relates to portable devices in which low power consumption is desired (for example, mobile phone A (FIG. 17), tablet terminal B (FIG. 18), notebook computer C (FIG. 19), and digital camera (FIG. 20). Suitable for).

1 Constant voltage source (reference voltage source)
Ta, Tb, Tc N-channel MOS field effect transistors Ta ′, Tb ′, Tc ′ P-channel MOS field effect transistors I1, I1a to I1c, I2 Constant current sources P11 to P13 P-channel MOS field effect transistors N11, N12 N channel type MOS field effect transistor MR Current generation transistor SR Sheet resistance X1 Operational amplifier P21, P22 P channel type MOS field effect transistor N21-N25 N channel type MOS field effect transistor Q11, Q12 pnp type bipolar transistor A Cellular phone (smart phone)
B Tablet device C Notebook computer D Digital camera

Claims (15)

A constant current source for generating a reference current;
A first transistor having a gate connected to the constant current source, a drain connected to an output terminal of an output voltage, and generating a first voltage between the source and the drain ;
A second transistor whose gate and drain are both connected to the constant current source and whose source is connected to the output terminal of the output voltage ;
A third transistor having a gate and a drain both connected to the source of the first transistor and generating a second voltage between the source and the drain ;
Have
A constant voltage source characterized in that the output voltage is made constant by adding the first voltage having a positive temperature differential coefficient and the second voltage having a negative temperature differential coefficient . 2. The constant voltage source according to claim 1 , wherein the back gates of the first to third transistors are connected to a source of each transistor or a ground. Wherein the first transistor second transistor, a constant voltage source of claim 1 or claim 2, characterized in that the mutual W / L ratios are different. The reference current is set to a current value in which an absolute value of a temperature differential coefficient of the first voltage and an absolute value of a temperature differential coefficient of the second voltage coincide with each other. 4. The constant voltage source according to any one of 3 . The reference current is a constant voltage source as claimed in any one of claims 1 to 4, characterized in that said first to third transistors are set to a current value that operate in the weak inversion region. The reference current is according to any one of claims 1 to 4 wherein said first through third transistors, wherein it is set to the current value running in the middle inversion region or strong inversion region Constant voltage source. The constant voltage source according to any one of claims 1 to 6 , wherein a plurality of transistor pairs each including the first transistor and the second transistor are stacked. The third transistor, or any one of claims 1 to 7, characterized in that it further comprises a second constant current source for increasing or decreasing the reference current flowing through the third transistor and the first transistor The constant voltage source described in the section. The constant current source is:
A resistor for setting a current value of the reference current;
A current mirror that mirrors a current flowing through the resistor to generate the reference current;
A constant voltage source according to any one of claims 1 to 8, which comprises a. The constant voltage source according to claim 9 , wherein the constant current source further includes an operational amplifier that reduces power supply voltage dependency of an amount of current flowing through the current mirror. The constant voltage source according to claim 9 or 10 , wherein the constant current source uses a current generating transistor or a sheet resistance as the resistor. The constant current source, a field effect transistor only, bipolar transistors only, or a constant voltage source according to any one of claims 1 to 11, characterized in that it is formed by a combination of the two transistors. The semiconductor device having a constant voltage source according to any one of claims 1 to 12. Electronic apparatus provided with a constant voltage source according to any one of claims 1 to 12.   A second constant current source;
  A fourth transistor connected to the second constant current source;
  A fifth transistor for generating a third voltage having a positive temperature differential coefficient together with the fourth transistor;
  Further comprising
  The drain of the first transistor is connected to the source of the fourth transistor;
  The constant voltage source according to claim 1, wherein a constant second output voltage is generated from a drain of the fourth transistor.

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