JP6082112B2 - モノリシックマルチチャネル適合可能ｓｔｔ−ｍｒａｍ - Google Patents

モノリシックマルチチャネル適合可能ｓｔｔ−ｍｒａｍ Download PDF

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Publication number
JP6082112B2
JP6082112B2 JP2015526677A JP2015526677A JP6082112B2 JP 6082112 B2 JP6082112 B2 JP 6082112B2 JP 2015526677 A JP2015526677 A JP 2015526677A JP 2015526677 A JP2015526677 A JP 2015526677A JP 6082112 B2 JP6082112 B2 JP 6082112B2
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Prior art keywords
memory
interface
channel
bank
banks
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JP2015526677A
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Japanese (ja)
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JP2015528620A (ja
JP2015528620A5 (enExample
Inventor
スン・エイチ・カン
シャオチュン・ジュウ
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クアルコム，インコーポレイテッド
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/161—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/005—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor comprising combined but independently operative RAM-ROM, RAM-PROM, RAM-EPROM cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/165—Auxiliary circuits
    • G11C11/1653—Address circuits or decoders
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
    • G11C29/028—Detection or location of defective auxiliary circuits, e.g. defective refresh counters with adaption or trimming of parameters
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/16—Multiple access memory array, e.g. addressing one storage element via at least two independent addressing line groups
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N50/00—Galvanomagnetic devices
    • H10N50/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N50/00—Galvanomagnetic devices
    • H10N50/10—Magnetoresistive devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N50/00—Galvanomagnetic devices
    • H10N50/80—Constructional details

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Mram Or Spin Memory Techniques (AREA)
  • Hall/Mr Elements (AREA)
  • Channel Selection Circuits, Automatic Tuning Circuits (AREA)
  • Semiconductor Memories (AREA)
JP2015526677A 2012-08-10 2013-08-07 モノリシックマルチチャネル適合可能ｓｔｔ−ｍｒａｍ Expired - Fee Related JP6082112B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US13/571,576 2012-08-10
US13/571,576 US9384810B2 (en) 2012-08-10 2012-08-10 Monolithic multi-channel adaptable STT-MRAM
PCT/US2013/054002 WO2014025919A1 (en) 2012-08-10 2013-08-07 Monolithic multi-channel adaptable stt-mram

Publications (3)

Publication Number Publication Date
JP2015528620A JP2015528620A (ja) 2015-09-28
JP2015528620A5 JP2015528620A5 (enExample) 2016-09-29
JP6082112B2 true JP6082112B2 (ja) 2017-02-15

Family

ID=49035931

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2015526677A Expired - Fee Related JP6082112B2 (ja) 2012-08-10 2013-08-07 モノリシックマルチチャネル適合可能ｓｔｔ−ｍｒａｍ

Country Status (7)

Country Link
US (1) US9384810B2 (enExample)
EP (1) EP2883230A1 (enExample)
JP (1) JP6082112B2 (enExample)
KR (1) KR20150042811A (enExample)
CN (1) CN104520934B (enExample)
IN (1) IN2014MN02646A (enExample)
WO (1) WO2014025919A1 (enExample)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105527889A (zh) * 2015-12-08 2016-04-27 中电海康集团有限公司 一种采用stt-mram作为单一存储器的微控制器
KR102007068B1 (ko) 2016-01-15 2019-08-05 한양대학교 산학협력단 Stt-mram을 포함하는 메모리 시스템 및 그 구축 방법
CN107767906A (zh) * 2016-08-23 2018-03-06 中电海康集团有限公司 一种磁性随机存储器
CN108074605A (zh) * 2016-11-10 2018-05-25 上海磁宇信息科技有限公司 一种mram芯片、内容寻址纠错方法及soc芯片
US11797230B2 (en) * 2021-12-14 2023-10-24 Hewlett-Packard Development Company, L.P. Bios variables storage

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6609174B1 (en) * 1999-10-19 2003-08-19 Motorola, Inc. Embedded MRAMs including dual read ports
JP3892736B2 (ja) * 2001-03-29 2007-03-14 株式会社東芝 半導体記憶装置
JP2004023062A (ja) * 2002-06-20 2004-01-22 Nec Electronics Corp 半導体装置とその製造方法
US6873543B2 (en) * 2003-05-30 2005-03-29 Hewlett-Packard Development Company, L.P. Memory device
JP4341355B2 (ja) * 2003-09-24 2009-10-07 ソニー株式会社 磁気記憶装置、磁気記憶装置の書き込み方法および磁気記憶装置の製造方法
JP4864760B2 (ja) * 2007-02-15 2012-02-01 株式会社東芝 半導体記憶装置及びそのデータ書き込み／読み出し方法
US8203872B2 (en) 2008-02-26 2012-06-19 Ovonyx, Inc. Method and apparatus for accessing a multi-mode programmable resistance memory
US8194492B2 (en) 2008-04-08 2012-06-05 Samsung Electronics Co., Ltd. Variable resistance memory device and system
US8102700B2 (en) * 2008-09-30 2012-01-24 Micron Technology, Inc. Unidirectional spin torque transfer magnetic memory cell structure
US20100191913A1 (en) * 2009-01-26 2010-07-29 Agere Systems Inc. Reconfiguration of embedded memory having a multi-level cache
JP4846817B2 (ja) * 2009-03-23 2011-12-28 株式会社東芝 抵抗変化型メモリ
US8250312B2 (en) * 2009-04-29 2012-08-21 Micron Technology, Inc. Configurable multi-port memory devices and methods
US8341338B2 (en) 2009-05-06 2012-12-25 Samsung Electronics Co., Ltd. Data storage device and related method of operation
JP5633122B2 (ja) * 2009-06-16 2014-12-03 富士通セミコンダクター株式会社 プロセッサ及び情報処理システム
KR101606880B1 (ko) 2009-06-22 2016-03-28 삼성전자주식회사 데이터 저장 시스템 및 그것의 채널 구동 방법
JP5337010B2 (ja) 2009-11-30 2013-11-06 株式会社東芝 半導体集積回路
US8380940B2 (en) 2010-06-25 2013-02-19 Qualcomm Incorporated Multi-channel multi-port memory
JP2012014787A (ja) * 2010-06-30 2012-01-19 Sony Corp 記憶装置
US8984216B2 (en) 2010-09-09 2015-03-17 Fusion-Io, Llc Apparatus, system, and method for managing lifetime of a storage device

Also Published As

Publication number Publication date
JP2015528620A (ja) 2015-09-28
US20140043890A1 (en) 2014-02-13
EP2883230A1 (en) 2015-06-17
WO2014025919A1 (en) 2014-02-13
CN104520934B (zh) 2018-01-26
KR20150042811A (ko) 2015-04-21
CN104520934A (zh) 2015-04-15
US9384810B2 (en) 2016-07-05
IN2014MN02646A (enExample) 2015-08-21

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