JP6029062B2 - Switching power supply - Google Patents

Description

  The present invention relates to a non-linear control type switching power supply apparatus.

  28A to 28C are a circuit block diagram and an operation waveform diagram showing a conventional example of a switching power supply device adopting a non-linear control method, in which a hysteresis window method is shown in FIG. 28A and a bottom detection on time is fixed in FIG. 28B. In FIG. 28C, the switching power supply apparatus employing the upper detection off-time fixed method is depicted. Each of the switching power supply devices depicted in FIGS. 28A to 28C is a step-down DC / DC converter that steps down the input voltage Vin to generate a desired output voltage Vout.

  Nonlinear control switching power supply devices have the advantage that high load response characteristics can be obtained with a simple circuit configuration compared to switching power supply devices of linear control methods (for example, voltage mode control method and current mode control method). ing.

  On the other hand, the switching power supply device of the non-linear control method uses the output ripple voltage (= ripple component of the output voltage Vout) to drive the comparator to control the switching of the output transistor. In order to detect, an output ripple voltage having a certain large amplitude (peak value) was required. For this reason, conventionally, an output capacitor (for example, a conductive polymer type) having a relatively large equivalent series resistance (ESR [Equivalent Series Resistance]) has to be used, resulting in restrictions on component selection and cost increase.

  Conventionally, a technique (so-called ripple injection technique) for driving the comparator stably by forcibly injecting a ripple component from the outside to the reference voltage Vref input to the comparator has been proposed. If this ripple injection technique is introduced, stable switching control can be performed even if the amplitude of the output ripple voltage is not so large, so that a multilayer ceramic capacitor having a small ESR can be used as the output capacitor.

  As an example of the related art related to the above, Patent Document 1 can be cited.

JP 2010-35316 A

  However, the amplitude of the reference voltage into which the ripple component is injected (peak-to-peak value of the ripple component) varies depending on the duty of the switch voltage Vsw (pulse voltage appearing at one end of the output transistor) used for generating the reference voltage.

  For this reason, the conventional switching power supply device has a problem in that the DC level of the reference voltage into which the ripple component is injected fluctuates due to a change in the duty of the switch voltage Vsw, leading to deterioration of line regulation. .

  Further, the conventional switching power supply device has a problem that an output drop due to a circuit delay occurs particularly during the high frequency operation.

  An object of the present invention is to provide a switching power supply device with high output accuracy in view of the above-mentioned problems found by the inventors of the present application.

  In order to achieve the above object, a switching power supply according to the present invention is a non-linear control switching power supply that generates an output voltage from an input voltage, a ripple generation circuit that injects a ripple component into a reference voltage, and A main comparator that generates a comparison signal by comparing a feedback voltage corresponding to the output voltage and a reference voltage after ripple injection; and a switching control unit that performs on / off control of a switch element based on the comparison signal. The ripple generation circuit includes a correction voltage generation unit configured to generate a correction voltage corresponding to an on-duty of a pulse voltage indicating an on / off state of the switch element, and a reference voltage before ripple injection for the correction An adder that increases according to the voltage, and generates an integrated voltage according to the integrated value of the on-duty and off-duty of the pulse voltage An integrated voltage generating unit, a subtracting unit that lowers the reference voltage before ripple injection according to the integrated voltage, and generating the ripple component using the pulse voltage, and injecting the ripple component into the corrected reference voltage The correction voltage generation unit and the addition unit cancel both the fluctuation component of the ripple average value according to the on-duty of the pulse voltage and the fluctuation component of the output voltage due to circuit delay. Each circuit constant is set so that the integrated voltage generating unit and the subtracting unit cancel the fluctuation component of the ripple amplitude according to the integrated value of the on-duty and off-duty of the pulse voltage. Each circuit constant is set to a configuration (first configuration).

  In the switching power supply device having the first configuration, the ripple injection unit includes a ripple amplifier that receives the corrected reference voltage at a non-inverting input terminal and outputs the reference voltage after ripple injection from an output terminal. A first resistor connected between the inverting input terminal and the output terminal of the ripple amplifier, a second resistor connected between the inverting input terminal of the ripple amplifier and the pulse voltage application terminal, A configuration including a capacitor connected between the inverting input terminal and the output terminal of the ripple amplifier (second configuration) is preferable.

  Further, in the switching power supply device having the second configuration, the correction voltage generation unit includes a first CR filter that generates the correction voltage by smoothing the pulse voltage, and a third resistor included in the first CR filter. And a fourth resistor that forms a voltage dividing circuit (third configuration).

  Further, in the switching power supply device having the third configuration, the integrated voltage generation unit operates by receiving the supply of the correction voltage, and generates an inverted pulse voltage obtained by logically inverting the pulse voltage; A configuration (fourth configuration) including a second CR filter that smoothes an inverted pulse voltage to generate the integrated voltage, and a sixth resistor that forms a voltage dividing circuit together with a fifth resistor included in the second CR filter. Good.

  In the switching power supply device having the fourth configuration, the subtracting unit includes a buffer to which the reference voltage before the ripple injection is input, a first end connected to the output end of the buffer, and a second end Subtraction that generates a subtracting current that flows from the output terminal of the buffer toward the seventh resistor by applying the integrated voltage to the seventh resistor and the eighth resistor connected to the non-inverting input terminal of the ripple amplifier A configuration including a current generation circuit (fifth configuration) is preferable.

  Further, in the switching power supply device having the fifth configuration, the adding unit generates an adding current flowing from the seventh resistor toward the output terminal of the buffer by applying the correction voltage to the ninth resistor. It is preferable to adopt a configuration (sixth configuration) including the added current generation circuit.

  Further, the switching power supply device having the sixth configuration includes resistance values R1 to R9 of the first to ninth resistors, a capacitance value C1 of the capacitor, a high level voltage Vreg of the pulse voltage, and an on-duty Don of the pulse voltage. The circuit delay time Td from when the driving frequency F of the switching element and the reference voltage after ripple injection intersects with the feedback voltage until the reference voltage after ripple injection returns is expressed by the following equation (a1): ) And formula (a2) are satisfied (seventh configuration).

  Further, in the switching power supply device having the seventh configuration, the capacitance value and the resistance value of the capacitor and the ninth resistor are variably controlled according to a frequency switching signal for switching the driving frequency of the switch element. A configuration (eighth configuration) is preferable.

  The television according to the present invention includes a tuner unit that selects a broadcast signal of a desired channel from a received signal, a decoder unit that generates a video signal and an audio signal from the broadcast signal selected by the tuner, and the video signal. A display unit that outputs the image as a video, a speaker unit that outputs the audio signal as audio, an operation unit that receives a user operation, an interface unit that receives an external input signal, and a control that comprehensively controls the operation of each unit. And a power supply unit that supplies power to each of the above-described units, and the power supply unit includes a switching power supply device having any one of the first to eighth configurations (ninth configuration). .

  According to the present invention, it is possible to provide a switching power supply device with high output accuracy.

Circuit block diagram showing the overall configuration of the switching power supply Circuit diagram showing a first configuration example of the ripple generation circuit 20 The circuit diagram which shows the example of 1 structure of the addition part 220 Circuit diagram showing a second configuration example of the ripple generation circuit 20 Timing chart showing an example of switching operation Waveform diagram showing duty dependency of reference voltage RefA ' Waveform diagram showing the reference voltage after ripple injection with the correction voltage added Schematic diagram showing the relationship between input / output voltage and feedback voltage of the present invention Waveform diagram showing the reference voltage after ripple injection with no correction voltage added Schematic diagram showing the relationship between conventional input / output voltage and feedback voltage Circuit diagram showing a conventional ripple generator Waveform diagram showing the relationship between the conventional reference voltage and the reference voltage after ripple injection Schematic diagram showing conventional input voltage and output voltage Schematic showing the relationship between ripple voltage amplitude and duty Block diagram showing a third configuration example of the ripple generation circuit Circuit diagram showing a third configuration example of the ripple generation circuit The circuit diagram which shows one structural example of an addition part and a subtraction part Waveform diagram showing the relationship between the reference voltage of the present invention and the reference voltage after ripple injection Schematic diagram showing the input voltage and output voltage of the present invention Block diagram showing a fourth configuration example of the ripple generation circuit Schematic showing the relationship between ripple amplitude and corrected constant voltage and duty Timing chart showing how output drops occur due to circuit delay Block diagram showing a fifth configuration example of the ripple generation circuit Timing chart showing how a DC shift occurs during frequency switching Timing chart showing how DC deviation during frequency switching is suppressed Block diagram showing a configuration example of a television equipped with a switching power supply device Front view of a TV equipped with a switching power supply Side view of a TV equipped with a switching power supply Rear view of a TV with a switching power supply Circuit block diagram and operation waveform diagram showing a first conventional example (hysteresis window method) of a switching power supply employing a non-linear control method Circuit block diagram and operation waveform diagram showing second conventional example (bottom detection on-time fixed method) of the switching power supply device adopting the non-linear control method Circuit block diagram and operation waveform diagram showing a third conventional example (upper detection OFF time fixed method) of a switching power supply device adopting a non-linear control method

<Switching power supply>
In the following, a detailed description will be given by taking as an example a configuration in which the present invention is applied to a COT [constant on time] switching power supply device.

  FIG. 1 is a circuit block diagram showing the overall configuration of the switching power supply apparatus. The switching power supply device A of this configuration example includes a switching power supply IC100 and discrete components (inductors L1, diodes D1, resistors R1 to R3, and capacitors C1 to C4) attached to the switching power supply IC100. This is a step-down switching power supply that generates a desired output voltage Vout from an input voltage Vin.

  The switching power supply IC 100 includes N-channel MOS [metal oxide semiconductor] field effect transistors 1a and 1b, drivers 2a and 2b, a level shifter 3, a drive control circuit 4, a main comparator 5, a soft start control circuit 6, ON time setting circuit 7, timer 8, reference voltage generation circuit 11, resistors 12a and 12b, constant voltage generation circuit 13, diode 14, low voltage lockout circuit 15, thermal shutdown circuit 16, and input A bias current generation circuit 17, an overcurrent protection circuit 18, an overvoltage protection circuit 19, and a ripple generation circuit 20 are included.

  In addition, the switching power supply IC 100 includes an enable terminal EN, a feedback terminal FB, an on-time setting terminal RT, a soft start terminal SS, a bootstrap terminal BST, and an input terminal VIN as electrical connection means to the outside. , A switch terminal SW, and a ground terminal GND.

  Outside the switching power supply IC100, the input terminal VIN is connected to an application terminal for an input voltage Vin (for example, 12V), and is also connected to a ground terminal through a capacitor C1. The switch terminal SW is connected to the cathode of the diode D1 and the first end of the inductor L1. The anode of the diode D1 is connected to the ground terminal. The second end of the inductor L1 is connected to the application end of the output voltage Vout, and is also connected to the first end of the capacitor C3 and the first end of the resistor R1. The second end of the capacitor C3 is connected to the ground end. The second end of the resistor R1 is connected to the ground terminal via the resistor R2. A connection node between the resistor R1 and the resistor R2 is connected to the feedback terminal FB as an application terminal of the feedback voltage Vfb. A capacitor C2 is connected between the switch terminal SW and the bootstrap terminal BST. The enable terminal EN is a terminal to which an enable signal for controlling whether or not the switching power supply IC 100 can be driven is applied. The on-time setting terminal RT is connected to the ground terminal via the resistor R3. The soft start terminal SS is connected to the ground terminal via the capacitor C4.

  The inductor L1, the diode D1, and the capacitor C3 function as a rectifying / smoothing circuit that rectifies and smoothes the switch voltage Vsw drawn from the switch terminal SW to generate a desired output voltage Vout. The resistors R1 and R2 function as a feedback voltage generation circuit (resistance voltage dividing circuit) that generates a feedback voltage Vfb corresponding to the output voltage Vout. The capacitor C2 forms a bootstrap circuit together with a diode 14 described later built in the switching power supply IC100.

  Next, the internal configuration of the switching power supply IC 100 will be described.

  The transistors 1a and 1b are a pair of switch elements connected in series between an input terminal VIN (applied end of the input voltage Vin) and a ground end. By switching these complementarily, the transistors 1a and 1b are driven from the input voltage Vin. A pulsed switch voltage Vsw is generated. The connection relationship between the two elements will be described more specifically. The drain of the transistor 1a is connected to the input terminal VIN. The source and back gate of the transistor 1a are connected to the switch terminal SW. The drain of the transistor 1b is connected to the switch terminal SW. The source and back gate of the transistor 1b are connected to the ground terminal.

  As used herein, the term “complementary” means that the transistors 1a and 1b are turned on and off from the viewpoint of preventing through current, as well as when the transistors 1a and 1b are turned on / off completely. This includes the case where a predetermined delay is given to the / off transition timing.

  The driver 2a generates the gate voltage Ga of the transistor 1a based on the first opening / closing control signal (level-shifted output signal HG) input from the drive control circuit 4 via the level shifter 3. The driver 2b generates the gate voltage Gb of the transistor 1b based on the second opening / closing control signal (output signal LG) input from the drive control circuit 4. Note that the upper power supply terminal of the driver 2a is connected to the bootstrap terminal BST (application terminal of the drive voltage Vbst). The lower power supply terminal of the driver 2a is connected to the switch terminal SW (application terminal of the switch voltage Vsw). Therefore, the high level of the gate voltage Ga applied to the transistor 1a is the drive voltage Vbst, and the low level is the switch voltage Vsw. On the other hand, the upper power supply terminal of the driver 2b is connected to the application terminal of the constant voltage Vreg. The lower power supply terminal of the driver 2b is connected to the ground terminal. Therefore, the high level of the gate voltage Gb applied to the transistor 1b is the constant voltage Vreg, and the low level is the ground voltage.

  The level shifter 3 raises the voltage level of the open / close control signal (output signal HG) input from the drive control circuit 4 and supplies it to the driver 2a. Note that the upper power supply terminal of the level shifter 3 is connected to the bootstrap terminal BST (application terminal of the drive voltage Vbst). The lower power supply terminal of the level shifter 3 is connected to the switch terminal SW (application terminal of the switch voltage Vsw).

  The drive control circuit 4 is a logic circuit that generates opening / closing control signals (output signals HG and LG) of the transistors 1a and 1b based on the comparison signal CMP and the ON time setting signal ON. For example, the drive control circuit 4 sets the output signal HG of the output terminal (Q) to a high level at the rising edge of the comparison signal CMP input to the set terminal (S), and outputs the inverted output terminal (Q bar). The signal LG is set to a low level. On the other hand, the drive control circuit 4 resets the output signal HG to a low level and resets the output signal LG to a high level at the rising edge of the ON time setting signal ON input to the reset terminal (R) (upper part of FIG. 5). To 3rd to 5th stage).

  The main comparator 5 has a feedback voltage Vfb (divided voltage of the output voltage Vout) input to the inverting input terminal (−) and a ripple voltage input from the ripple generation circuit 20 to the first non-inverting input terminal (+). Of the reference voltage RefA (which will be described in detail later) and the soft start voltage Vss input from the soft start control circuit 6 to the second non-inverting input terminal (+), whichever is lower, to generate a comparison signal CMP. Output to the drive control circuit 4 and the on-time setting circuit 7.

  That is, if the feedback voltage Vfb is higher than the reference voltage RefA after ripple injection, the comparison signal CMP is at a low level. Conversely, if the feedback voltage Vfb is lower than the reference voltage RefA after ripple injection, the comparison signal CMP is high. (See the second and third steps from the top in FIG. 5).

  The soft start control circuit 6 starts charging the capacitor C4 connected to the soft start terminal SS along with the activation of the switching power supply device, and outputs the charged voltage to the main comparator 5 as the soft start voltage Vss. By such soft start control, when the switching power supply device is started, the output feedback control is performed so that the soft start voltage Vss that gradually increases and the feedback voltage Vfb coincide with each other. It is possible to prevent inrush current to the capacitor C3.

  The on-time setting circuit 7 generates a high-level trigger pulse in the on-time setting signal ON after a predetermined on-time Ton has elapsed after the output signal HG of the drive control circuit 4 has been raised to a high level ( (Refer to the fourth and fifth stages from the top of FIG. 5).

  The drivers 2 a and 2 b, the level shifter 3, the drive control circuit 4, and the on time setting unit 7 perform on / off control of the transistors 1 a and 1 b based on the comparison signal CMP output from the main comparator 5. Functions as a switching control unit.

  The timer 8 generates a timer signal for controlling the operation of the soft start control circuit 6 and sends it to the soft start control circuit 6. Specifically, the timer 8 resets the soft start control circuit 6 and sets the capacitor C4 when the overcurrent detection signal OCP and the overvoltage detection signal OVP are maintained at the abnormal logic level for a predetermined time. Discharge.

  The reference voltage generation circuit 11 generates a reference voltage Vref (for example, 4.1 V) from the input voltage Vin and supplies it as an internal drive voltage to each part of the switching power supply IC100.

  The resistors 12a and 12b divide the reference voltage Vref to generate a desired reference voltage Ref and apply it to the ripple generation circuit 20 (details will be described later). The connection relationship will be described in detail. The resistors 12a and 12b are connected in series between the output terminal (application terminal of the reference voltage Vref) of the reference voltage generation circuit 11 and the ground terminal. It is connected to the generation circuit 20.

  The constant voltage generation circuit 13 generates a predetermined constant voltage Vreg (for example, 5 V) from the input voltage Vin.

  The diode 14 is connected between the output terminal of the constant voltage generation circuit 13 (the output terminal of the constant voltage Vreg) and the bootstrap terminal BST, and constitutes a bootstrap circuit together with the capacitor C2, and from its cathode, The drive voltage Vbst of the driver 2a and the level shifter 3 is extracted.

  The undervoltage lockout circuit 15 is an abnormality protection unit that operates by receiving the supply of the reference voltage Vref and shuts down the switching power supply IC 100 when an abnormal decrease in the input voltage Vin is detected.

  The thermal shutdown circuit 16 operates in response to the supply of the reference voltage Vref, and shuts down the switching power supply IC 100 when the monitoring target temperature (junction temperature of the switching power supply IC100) reaches a predetermined threshold (for example, 175 ° C.). It is an abnormality protection measure.

  The input bias current generation circuit 17 operates in response to the supply of the reference voltage Vref, and generates an input bias current of each part of the switching power supply IC 100, for example, the ripple generation circuit 20.

  The overcurrent protection circuit 18 operates in response to the supply of the input voltage Vin, monitors the switch current Isw that flows when the output transistor 1a is turned on, and generates the overcurrent detection signal OCP. The overcurrent detection signal OCP is used for resetting the drive control circuit 4 and the soft start control circuit 6.

  The overvoltage protection circuit 19 monitors the feedback voltage Vfb applied to the feedback terminal FB and generates an overvoltage detection signal OVP. The overvoltage detection signal OVP is used for resetting the soft start control circuit 6.

  The ripple generation circuit 20 generates a ripple component using the output signal HG of the drive control circuit 4 and injects it into the reference voltage Ref, thereby generating a reference voltage RefA after ripple injection (upper part of FIG. 5). To the second row).

<Ripple generation circuit (first configuration example)>
Next, details of the ripple generation circuit 20 will be described. FIG. 2 is a circuit diagram illustrating a first configuration example of the ripple generation circuit 20. The ripple generation circuit 20 of the first configuration example includes a correction voltage generation unit 210, an addition unit 220, and a ripple injection unit 230.

  The correction voltage generation unit 210 generates a correction voltage Vduty by smoothing the output signal HG of the drive control circuit 4 with one or a plurality of stages of CR filters, and outputs this to the addition unit 220.

  The adding unit 220 generates a corrected reference voltage (Ref + Vduty) by raising the reference voltage Ref before ripple injection according to the correction voltage Vduty, and outputs this to the ripple injection unit 230.

  The ripple injection unit 230 injects a ripple component into the corrected reference voltage (Ref + Vduty) using the output signal HG.

  Next, components of each circuit and their connection forms will be described.

  The correction voltage generation unit 210 includes resistors 211 to 213, a capacitor 214, and a capacitor 215.

  A first end of the resistor 211 is connected to a first input end of the adding unit 220. A second end of the resistor 211 is connected to a first end of the resistor 212. A second end of the resistor 212 is connected to an input end of the output signal HG. A first end of the resistor 213 is connected to a connection node between the adder 220 and the resistor 211. A second end of the resistor 213 is connected to the ground end.

  A first end of the capacitor 214 is connected to a connection node between the adder 220 and the resistor 211. The second end of the capacitor 214 is connected to the ground end. A first end of the capacitor 215 is connected to a connection node between the resistor 211 and the resistor 212. The second end of the capacitor 215 is connected to the ground end.

  Next, components of the adding unit 220 and its connection form will be described with reference to FIG. FIG. 3 is a circuit diagram illustrating a configuration example of the adding unit 220. As shown in FIG. 3, the adder 220 of this configuration example includes an operational amplifier 221, a resistor 222, P-channel MOS field effect transistors 223 and 224, an operational amplifier 225, an N-channel MOS field effect transistor 226, And a resistor 227.

  The non-inverting input terminal (+) of the operational amplifier 221 is connected to the application terminal for the reference voltage Ref. The output terminal of the operational amplifier 221 is connected to the first terminal of the resistor 222. An inverting input terminal (−) of the operational amplifier 221 is connected to a connection node between the output terminal and the resistor 222. That is, the operational amplifier 221 functions as a buffer.

  A second end of the resistor 222 is connected to an output end of the adding unit 220. The drain of the transistor 223 is connected to a connection node between the second end of the resistor 222 and the output end of the adder 220. The source of the transistor 223 is connected to the application terminal of the constant voltage Vreg and the source of the transistor 224. The gate of the transistor 223 is connected to the gate and drain of the transistor 224. The source of the transistor 224 is connected to the application terminal for the constant voltage Vreg. The drain of the transistor 224 is connected to the drain of the transistor 226.

  The non-inverting input terminal (+) of the operational amplifier 225 is connected to the application terminal for the correction voltage Vduty. The output terminal of the operational amplifier 225 is connected to the gate of the transistor 226. An inverting input terminal (−) of the operational amplifier 225 is connected to a connection node between the source of the transistor 226 and the first terminal of the resistor 227. A second terminal of the resistor 227 is connected to the ground terminal.

  Next, components of the ripple injection unit 230 and the connection form thereof will be described with reference to FIG. The ripple injection unit 230 includes an operational amplifier 231 (ripple amplifier), a resistor 232, a resistor 233, and a capacitor 234.

  The non-inverting input terminal (+) of the operational amplifier 231 is connected to the output terminal of the adder 220 (corresponding to the application terminal of the corrected reference voltage Ref + Vduty). An inverting input terminal (−) of the operational amplifier 231 is connected to a connection node between the resistor 232 and the resistor 233. The output terminal of the operational amplifier 231 is connected to the non-inverting input terminal (+) of the main comparator 5.

  A first end of the resistor 232 is connected to a connection node between the operational amplifier 231 and the main comparator 5. A second end of the resistor 232 is connected to a first end of the resistor 233. The second end of the resistor 233 is connected to the input end of the output signal HG. A first end of the capacitor 234 is connected to a connection node between the operational amplifier 231 and the main comparator 5. A second end of the capacitor 234 is connected to a connection node between the resistor 232 and the resistor 233.

  Next, the operation of the ripple generation circuit 20 will be described.

  A resistor 211, a resistor 212, a capacitor 214, and a capacitor 215 included in the correction voltage generation unit 210 are two-stage CR filters, and smooth the output signal HG output from the drive control circuit 4 to perform a desired correction. It functions as a smoothing circuit that generates the voltage Vduty for use. In this configuration example, the CR filter has a two-stage configuration, but the number of stages can be changed as appropriate according to design requirements.

  The resistor 213 forms a voltage dividing circuit together with the resistor included in the CR filter. In this configuration example, as shown in FIG. 2, the voltage dividing circuit is formed by connecting the resistor 213 to the first end of the resistor 211. However, the voltage dividing circuit is formed by other connection forms. Form may be sufficient. For example, the voltage dividing circuit may be formed by connecting the first end of the resistor 213 to the connection node between the input end of the output signal HG and the resistor 212.

  The operational amplifier 225, the transistor 226, and the resistor 227 included in the adding unit 220 function as a voltage / current conversion circuit for the correction voltage Vduty. Thereby, an addition current I22 corresponding to the magnitude of the correction voltage Vduty is generated. Further, the transistor 223 and the transistor 224 function as a current mirror circuit for replicating the addition current I22. That is, an addition current generation circuit is formed by combining the voltage / current conversion circuit and the current mirror circuit. As a result, the addition current I22 flows from the transistor 223 to the output terminal of the operational amplifier 221 via the resistor 222. Therefore, a potential difference corresponding to the magnitude of the addition current I22 is generated between both ends of the resistor 222. As a result, a corrected reference voltage (Ref + Vduty) that reflects the correction voltage Vduty is generated and output to the ripple injection unit 230.

  The resistor 232, the resistor 233, and the capacitor 234 included in the ripple injection unit 230 function as a pulse driving unit that drives the negative feedback loop of the operational amplifier 231 in accordance with the output signal HG. With this configuration, the reference voltage RefA after ripple injection output from the operational amplifier 231 has a waveform in which the voltage value fluctuates with reference to the corrected reference voltage (Ref + Vduty), that is, the corrected reference voltage ( (Ref + Vduty) is a waveform in which a ripple component is injected (see the second stage from the top in FIG. 5).

  Note that the resistance value of the resistor included in the correction voltage generation unit 210 described above is determined according to the design request based on the fluctuation range of the feedback voltage Vfb to be canceled by the correction voltage Vduty. For example, it is determined by a method using mathematical expressions described below.

  In the configuration shown in FIGS. 2 and 3, the feedback voltage Vfb is expressed by the following mathematical formula. In the following, the resistance value of the resistor 232 is R1, the resistance value of the resistor 233 is R2, the combined resistance value of the resistors 211 and 212 is R3, the resistance value of the resistor 213 is R4, the resistance value of the resistor 222 is R7, and the resistor 227 This resistance value is represented as R9. The on-duty of the output signal HG is represented as Don.

  First, RefA (hereinafter referred to as “RefAon”) when the output signal HG is ON is expressed by the following equation (1).

  Further, RefA (hereinafter referred to as “RefAoff”) when the output signal HG is OFF is expressed by the following equation (2).

  The feedback voltage Vfb is obtained by adding a term obtained by multiplying RefAon by on-duty Don and a term obtained by multiplying RefAoff by off-duty Doff (= 1-Don). Is done.

  By substituting RefAon and RefAoff into the above equation (3), Vfb is expressed as the following equation (4a). Further, a deviation amount Vfb_err (= Vfb−Ref) between the feedback voltage Vfb and the reference voltage Ref is expressed by the following equation (4b).

  As shown in the equation (4b), the deviation amount Vfb_err between the feedback voltage Vfb and the reference voltage Ref includes (Vreg × Don) in the second term on the right side, and changes under the influence of Don.

  Therefore, in the present invention, the reference voltage Ref included in the first term on the right side is replaced with a corrected reference voltage (Ref + Vduty) to which the correction voltage Vduty is added. The corrected reference voltage (Ref + Vduty) is expressed by the following equation (5).

  Thus, since the corrected reference voltage (Ref + Vduty) also varies under the influence of Don, the first term on the right side can be increased or decreased according to the increase or decrease in the second term on the right side of Equation (4b). Thereby, the influence of on-duty Don can be canceled. Since the voltage value to be canceled changes according to Vreg included in the second term on the right side, the circuit constant of the correction voltage generator 210 (for example, the resistance value of the resistor 213) is set according to this Vreg. That's fine. Thereby, the peak value of RefA can be set to a desired target value.

  An example of the effects obtained by the configuration of the present invention described above will be described.

  FIG. 6 shows a reference voltage RefA ′ after ripple injection generated by performing ripple injection on a reference voltage Ref to which a correction voltage Vduty is not added in a conventional switching power supply device (particularly, its duty dependency). FIG. As shown in the figure, the DC value of the reference voltage RefA 'varies according to the duty of the switch voltage Vsw. More specifically, the DC value of the reference voltage RefA 'decreases as the duty increases, and the DC value of the reference voltage RefA' increases as the duty decreases.

  FIG. 9 is a schematic diagram comparing the DC value of the reference voltage RefA ′ after ripple injection for each duty of the switch voltage Vsw in the conventional switching power supply device. FIG. 10 is a schematic diagram showing the relationship among the input voltage Vin, the output voltage Vout, and the feedback voltage Vfb in a conventional switching power supply device. In FIG. 10, the vertical axis represents voltage and the horizontal axis represents elapsed time.

  As shown in FIG. 9 and FIG. 10, in the conventional switching power supply device, when the duty changes due to the fluctuation of the input voltage Vin, the DC value of the reference voltage RefA ′ after ripple injection fluctuates due to this influence. As a result, the feedback voltage Vfb fluctuated. For this reason, there is a problem that the feedback voltage Vfb is deviated and the line regulation is deteriorated.

  On the other hand, according to the configuration of the present invention, the above-described deviation can be corrected by adding the correction voltage Vduty corresponding to the duty to the reference voltage Ref. FIG. 7 is a schematic diagram comparing the DC value of the reference voltage RefA after ripple injection for each duty of the switch voltage Vsw in the switching power supply device of the present invention. FIG. 8 is a schematic diagram showing the relationship among the input voltage Vin, the output voltage Vout, and the feedback voltage Vfb in the switching power supply device of the present invention.

  As shown in FIG. 7, the peak value of the reference voltage RefA after ripple injection generated by the corrected reference voltage (Ref + Vduty) is almost the same value regardless of the duty. For this reason, as shown in FIG. 8, the feedback voltage Vfb does not shift and can be kept substantially constant. As a result, line regulation can be improved.

<Ripple generation circuit (second configuration example)>
FIG. 4 is a circuit block diagram illustrating a second configuration example of the ripple generation circuit 20. The second configuration example has basically the same configuration as the first configuration example, but is characterized in that the correction voltage Vduty is generated using the switch voltage Vsw instead of the output signal HG. Yes. Therefore, the same components as those in the first configuration example are denoted by the same reference numerals as those in FIG. 2, and redundant descriptions are omitted. In the following, the characteristic portions of the second configuration example are mainly described.

  The ripple generation circuit 20 of the second configuration example includes a buffer 240 in addition to the correction voltage generation unit 210, the addition unit 220, and the ripple injection unit 230 described above.

  The input end of the buffer 240 is connected to the application end of the switch voltage Vsw. The output end of the buffer 240 is connected to the second end of the resistor 212 and the second end of the resistor 233.

  The upper power supply terminal of the buffer 240 is connected to the application terminal for the constant voltage Vreg. The lower power supply terminal of the buffer 240 is connected to the ground terminal. As a result, the pulse voltage Vsw ′ output from the buffer 240 has a high level as the constant voltage Vreg and a low level as the ground voltage. As described above, the buffer 240 generates the pulse voltage Vsw ′ in which the peak value of the switch voltage Vsw is constant, and outputs it to the subsequent stage.

  By adopting such a configuration, it is possible to achieve the same operations and effects as the first configuration example described above. Further, the timing at which the waveform of the output signal HG changes and the timing at which the waveform of the switch voltage Vsw changes are closer to the actual switching timing. This is because a time lag occurs between the timing at which the waveform of the output signal HG changes and the actual switching timing due to the influence of the time required for the switching operation of the MOS field effect transistor. For this reason, according to the second configuration example, it is possible to achieve the operation and effect that the correction voltage Vduty can be generated based on the duty information with higher accuracy than the first configuration example. .

<Ripple generation circuit (third configuration example)>
By the way, in the first configuration example (FIG. 2) and the second configuration example (FIG. 4) described above, the amplitude of the ripple voltage injected into the reference voltage Ref according to the duty of the switch voltage Vsw (hereinafter referred to as “ripple amplitude”). ) Will fluctuate. More specifically, the ripple amplitude becomes maximum when the duty is 50%, and the ripple amplitude decreases as it approaches 0% or 100%. For this reason, the output voltage Vout generated according to the reference voltage RefA after ripple injection also has a problem that it fluctuates according to the duty of the switch voltage Vsw.

  The above problem will be described with reference to FIGS. FIG. 11 is a circuit diagram showing a configuration (corresponding to a conventional configuration) of the ripple generation circuit 20 using only the ripple injection unit 230. FIG. 12 is a waveform diagram showing the relationship between the reference voltage Ref and the reference voltage RefB ′ after ripple injection. FIG. 13 is a schematic diagram showing the input voltage Vin and the output voltage Vout of the switching power supply IC 100 having the ripple generation circuit 20 of FIG. FIG. 14 is a schematic diagram showing the relationship between the duty of the switch voltage Vsw and the ripple amplitude.

  The ripple generation circuit 20 in FIG. 11 has a configuration including only the ripple injection unit 230 among the components shown in the first configuration example (FIG. 2). Note that the details of the ripple injection unit 230 are the same as those in the first configuration example, and thus the description thereof is omitted here.

  The amplitude of the ripple voltage generated by the ripple generation circuit 20 having the above configuration is expressed by the following equation (6). In equation (6), the ripple amplitude is Vpp, the resistance value of the resistor 233 is R2, the high level voltage of the output signal HG is Vreg, the capacitance of the capacitor 234 is C1, the drive frequency of the output signal HG is F, and the output signal HG Is represented as Don, and the off-duty of the output signal HG as Doff.

  In the above formula (6), the portion of Vreg / (R2 × C1 × F) is a constant. When this portion is expressed as a constant α, Vpp is expressed by the following formula (7).

  As described above, the ripple amplitude Vpp varies according to the integrated value of the on-duty Don and the off-duty Doff. FIG. 12 is a schematic diagram showing three patterns of voltage waveforms of the reference voltage RefB ′ after ripple injection generated by the ripple generation circuit 20 of FIG. 11 with different duties. In FIG. 12, the solid line indicates the voltage waveform when the on-duty is 25%, the small broken line indicates the voltage waveform when the on-duty is 50%, and the large broken line indicates the voltage waveform when the on-duty is 75%. As shown in FIG. 12, the peak value of the reference voltage RefB ′ is not uniform. This non-uniformity affects the output voltage Vout.

  FIG. 13 is a schematic diagram showing the relationship between the input voltage Vin and the output voltage Vout of the switching power supply IC 100 having the ripple generation circuit 20 of FIG. Note that the horizontal axis in FIG. 13 indicates the elapsed time t. Further, Dif1 to Dif5 in the figure indicate the difference between the predetermined voltage and the output voltage Vout in a substantially steady state.

  As shown in FIG. 13, when the input voltage Vin rises with time and the duty of the output signal HG changes, the reference voltage RefB 'after ripple injection changes, and thus Dif1 to Dif5 vary.

  FIG. 14 is a diagram schematically showing the fluctuation of the ripple amplitude that is the cause of the variation. The vertical axis in FIG. 14 indicates the ripple amplitude Vpp, and the horizontal axis indicates the duty of the output signal HG.

  For example, when the duty is 50%, the integrated value of the on-duty Don and the off-duty Doff is 0.5 × 0.5 = 0.25. For example, when the duty is 10%, the integrated value of the on-duty Don and the off-duty Doff is 0.1 × 0.9 = 0.09. Therefore, in view of the equation (7), the ripple amplitude Vpp becomes maximum when the duty is 50%, and decreases as the distance from the duty is 50%.

  Therefore, in view of the above problems, the ripple generation circuit 20 of the third configuration example described below reduces the fluctuation of the output voltage Vout by canceling the fluctuation of the ripple amplitude Vpp caused by the duty change. Objective.

  In order to solve the above-described problem, the ripple generation circuit 20 of the third configuration example has a configuration illustrated in FIGS. 15 to 17.

  FIG. 15 is a block diagram illustrating a third configuration example of the ripple generation circuit 20. The ripple generation circuit 20 of the third configuration example has a configuration in which an integrated voltage generation unit 310 and a subtraction unit 320 are added to the configuration of FIG. The integrated voltage generator 310 generates an integrated voltage Vins by integrating the on-duty Don of the output signal HG, the off-duty Doff of the output signal HG, and a predetermined constant α ′, and supplies the integrated voltage Vins to the subtractor 320. . The subtraction unit 320 reduces the reference voltage Ref according to the integrated voltage Vins.

  Detailed configurations of the integrated voltage generation unit 310 and the subtraction unit 320 will be described with reference to FIGS. 16 and 17. FIG. 16 is a circuit diagram showing a configuration when the integrated voltage generation unit 310 and the subtraction unit 320 are applied to the first configuration example (FIG. 2). The ripple generation circuit 20 shown in FIG. 16 has basically the same configuration as the first configuration example described above, but is characterized in that the integrated voltage Vins is generated using the output signal HG and the correction voltage Vduty. Have. Therefore, the same components as those in the first configuration example are denoted by the same reference numerals as those in FIG. 2, and redundant descriptions are omitted. In the following, feature portions of the third configuration example are mainly described.

  As illustrated in FIG. 16, the integrated voltage generation unit 310 includes an operational amplifier 311, an inverter 312, resistors 313 to 315, and capacitors 316 and 317.

  The non-inverting input terminal (+) of the operational amplifier 311 is connected to the output terminal (application terminal for the correction voltage Vduty) of the correction voltage generator 210. The inverting input terminal (−) of the operational amplifier 311 is connected to the output terminal of the operational amplifier 311. The output terminal of the operational amplifier 311 is connected to the upper power supply terminal of the inverter 312. The lower power supply terminal of the inverter 312 is connected to the ground terminal. The input end of the inverter 312 is connected to the output end of the output signal HG. The output terminal of the inverter 312 is connected to the first terminal of the resistor 313. A second end of the resistor 313 is connected to a first end of the resistor 314. A second end of the resistor 314 is connected to the subtraction unit 320.

  A first end of the resistor 315 is connected to a connection node between the resistor 313 and the resistor 314. A second terminal of the resistor 315 is connected to the ground terminal. A first end of the capacitor 316 is connected to a connection node between the resistor 313 and the resistor 314. The second end of the capacitor 316 is connected to the ground terminal. A first end of the capacitor 317 is connected to a connection node between the resistor 314 and the subtraction unit 320. A second terminal of the capacitor 317 is connected to the ground terminal.

  Next, a detailed configuration of the subtraction unit 320 will be described with reference to FIG. FIG. 17 is a circuit diagram when the subtracting unit 320 is configured so as to share a part of the adding unit 220 (FIG. 3). As shown in FIG. 17, the subtraction unit 320 of this configuration example includes an operational amplifier 321, an N-channel MOS field effect transistor 322, and a resistor 323.

  The non-inverting input terminal (+) of the operational amplifier 321 is connected to the application terminal for the integrated voltage Vins. An inverting input terminal (−) of the operational amplifier 321 is connected to a connection node between the transistor 322 and the resistor 323. The output terminal of the operational amplifier 321 is connected to the gate of the transistor 322. The drain of the transistor 322 is connected to a connection node between the second end of the resistor 222 and the output end of the adder 220. The source of the transistor 322 is connected to the first end of the resistor 323. A second end of the resistor 323 is connected to the ground end.

  Next, the operation of the ripple generation circuit 20 of this configuration example will be described.

  The operational amplifier 311 included in the integrated voltage generation unit 310 outputs the correction voltage Vduty supplied from the correction voltage generation unit 210 as the power supply voltage of the inverter 312. Since the correction voltage Vduty changes according to the on-duty Don of the output signal HG, the output voltage of the operational amplifier 311 can be expressed as β × Don. The constant β is a constant determined by the resistance value of the resistor included in the correction voltage generation unit 210.

  The inverter 312 generates an inverted signal obtained by inverting the output signal HG using the output voltage (β × Don) as a power supply voltage. The resistor 313, the resistor 314, the capacitor 316, and the capacitor 317 are two-stage CR filters, and function as a smoothing circuit that smoothes the inverted signal output from the inverter 312 and generates a desired integrated voltage Vins. In FIG. 16, a two-stage configuration is used, but the number of stages can be changed as appropriate according to design requirements.

  The inverter 312 logically inverts the output signal HG and outputs it. Therefore, if the power supply voltage of the inverter 312 is constant, the output of the CR filter can be expressed as γ × Doff. The constant γ is a constant determined by the resistance value of the resistor included in the CR filter. On the other hand, in this configuration example, the correction voltage Vduty (= β × Don) is input as the power supply voltage of the inverter 312. Therefore, the integrated voltage Vins is (β × γ) × Don × Doff.

  As described above, the integrated voltage generator 310 integrates the on-duty Don of the output signal HG, the off-duty Doff of the output signal HG, and the predetermined constant α ′ (= β × γ), thereby integrating the integrated voltage Vins. Is generated.

  Resistor 315 forms a voltage dividing circuit together with resistor 313 included in the CR filter. In FIG. 16, the voltage dividing circuit is formed by connecting the resistor 315 to the connection node between the resistor 313 and the resistor 314, but the voltage dividing circuit may be formed by another connection form. For example, the voltage dividing circuit may be formed by connecting the first end of the resistor 315 to the second end of the resistor 314.

  The operational amplifier 321, the transistor 322, and the resistor 323 included in the subtraction unit 320 function as a subtraction current generation circuit (voltage / current conversion circuit) that generates a subtraction current I32 corresponding to the integrated voltage Vins. Thereby, the subtraction current I32 according to the voltage value of the integrated voltage Vins is generated. The subtraction current I32 flows from the output terminal of the operational amplifier 221 toward the ground terminal via the resistor 222, the transistor 322, and the resistor 323. Therefore, a potential difference corresponding to the current value of the subtraction current I32 occurs between both ends of the resistor 222.

  In addition, a potential difference corresponding to the current value of the addition current I22 generated by the addition unit 220 is also generated between both ends of the resistor 222. As a result, the corrected reference voltage (Ref + Vduty−Vins) is generated in which the reference voltage Ref is lowered according to the integrated voltage Vins and further raised according to the correction voltage Vduty. The corrected reference voltage (Ref + Vduty−Vins) is output to the ripple injection unit 230.

  The corrected reference voltage (Ref + Vduty−Vins) is applied to the non-inverting input terminal (+) of the operational amplifier 231 included in the ripple injection unit 230. Therefore, the ripple injected reference voltage RefB output from the ripple injection unit 230 has a waveform in which the voltage value fluctuates with reference to the corrected reference voltage (Ref + Vduty−Vins), that is, the corrected reference voltage (Ref + Vduty−Vins). ) In which a ripple component is injected.

  Note that the resistance value of the resistor included in the integrated voltage generation unit 310 described above is determined according to the design request based on the fluctuation range of the ripple amplitude Vpp to be canceled by the integrated voltage Vins. For example, it is determined by a method using mathematical expressions described below.

  The integrated voltage Vins generated by the integrated voltage generator 310 shown in FIGS. 16 and 17 is expressed by Expression (8). In Equation (8), the combined resistance value of the resistors 211 and 212 is R1, the resistance value of the resistor 213 is R2, the combined resistance value of the resistors 313 and 314 is R5, the resistance value of the resistor 315 is R6, and the resistance of the resistor 222 is It is assumed that the value is R7, the resistance value of the resistor 323 is R8, the high level voltage of the output signal HG is Vreg, the on duty of the output signal HG is Don, and the off duty of the output signal HG is Doff.

  In the above formula (8), the portion of (R7 / R8) × {R6 / (R5 + R6)} × {R4 / (R3 + R4)} × Vreg is a constant. Vins is expressed by the following equation (9).

  Thus, the integrated voltage Vins varies according to the integrated value of the on-duty Don and the off-duty Doff of the output signal HG.

  The ripple amplitude Vpp is expressed by the above formulas (6) and (7). Since the voltage to be corrected by the integrated voltage Vins is ½ of the ripple amplitude Vpp, each resistance value may be set so that the constant α ′ is ½ of the constant α. That is, each resistance value may be set so that the following expression (10) is satisfied. In equation (10), the left side represents 1/2 of the constant α, and the right side represents the constant α ′.

  An example of the effects obtained by the configuration of the present invention described above will be described.

  FIG. 18 is a schematic diagram showing three patterns of voltage waveforms of the reference voltage RefB after ripple injection generated by the ripple generation circuit 20 of the third configuration example with different duties. In FIG. 18, the solid line indicates the voltage waveform when the on-duty is 25%, the small broken line indicates the voltage waveform when the on-duty is 50%, and the large broken line indicates the voltage waveform when the on-duty is 75%. FIG. 19 is a schematic diagram showing the input voltage Vin and the output voltage Vout of the switching power supply IC 100 having the ripple generation circuit 20 of the third configuration example.

  As shown in FIG. 18, the peak value of the reference voltage RefB after ripple injection generated by the corrected reference voltage (Ref + Vduty−Vins) is almost uniform because the influence of the ripple amplitude Vpp is cancelled. Therefore, as shown in FIG. 19, even if the input voltage Vin increases with time and the duty of the output signal HG changes, the reference voltage RefB after ripple injection does not change. For this reason, there is no variation in Dif1 to Dif5.

  According to the third configuration example described above, since the reference voltage Ref is corrected using the integrated voltage Vins in addition to the correction voltage Vduty of the first configuration example, compared with the first configuration example. It is possible to perform an operation and effect that correction can be performed with higher accuracy and line regulation can be further improved.

<Ripple generation circuit (fourth configuration example)>
The third configuration example described above has been described as a configuration example in which the integrated voltage generation unit 310 and the subtraction unit 320 are applied to the first configuration example (FIG. 2). However, as illustrated in FIG. 20, the configuration illustrated in FIG. In addition, a buffer 240 is provided between the application terminal of the output signal HG, the resistor 233, and the correction voltage generator 210, and the corrected power supply voltage REG ′ for canceling the duty change is used as the power supply voltage of the buffer 240. By adapting and outputting the corrected output signal HG ′ from the buffer 240, it is possible to obtain the same operation and effect as described above.

  As shown in Equation (6) described above, the ripple amplitude Vpp varies according to the integrated value of Don and Doff. Further, as shown in Expression (6), the integrated value of Don and Doff is integrated with the power supply voltage Vreg (= high level voltage of the output signal HG). Therefore, if Vreg changes so as to cancel the change in the integrated values of Don and Doff, the ripple amplitude can be made constant.

  In view of the above consideration, the ripple generation circuit 20 of the fourth configuration example is assumed to have the configuration shown in FIG. The integrated voltage generation unit 310 and the correction voltage generation unit 330 generate the integrated voltage Vins by integrating the on-duty Don of the output signal HG, the off-duty Doff of the output signal HG, and a predetermined constant α ′. To the subtractor 320.

  The subtraction unit 320 reduces the power supply voltage Vreg by the integrated voltage Vins. As a result, a corrected power supply voltage REG ′ necessary for canceling the change in the integrated values of Don and Doff is generated and applied to the upper power supply terminal of the buffer 240. Note that the detailed configurations of the integrated voltage generation unit 310 and the subtraction unit 320 are the same as those in the third configuration example, and thus description thereof is omitted here. Further, the detailed configuration of the correction voltage generation unit 330 is the same as that of the correction voltage generation unit 210, and thus the description thereof is omitted here.

  An example of the corrected power supply voltage REG ′ generated by the above configuration will be described with reference to FIG. The vertical axis in FIG. 21 represents the integrated value of Don and Doff and the corrected power supply voltage REG '. The horizontal axis of FIG. 21B indicates the duty (Don) of the output signal HG.

  As shown in FIG. 21, the integrated values of Don and Doff become maximum when the duty is 50%, and decrease as the value approaches 0% or 100%. On the other hand, the corrected power supply voltage REG 'is minimized when the duty is 50%, and increases as it approaches 0% or 100%. Therefore, by setting the constant α ′ of the integrated voltage generation unit 310 according to the duty change to be canceled, REG ′ × Don × Doff can be set to a constant value that does not depend on the duty change.

  As described above, in the fourth configuration example, by changing the Vreg × Don × Doff portion shown in the equation (6) to the above-described REG ′ × Don × Doff, it is possible to keep the responsiveness of the nonlinear method constant. In addition, the influence of noise can be kept constant.

<Countermeasures against output drops due to circuit delay>
The ripple generation circuit 20 of the third configuration example (or the fourth configuration example) has two fluctuation factors that the highest value of the reference voltage RefB (the top position of the triangular wave) has, that is, (1) the fluctuation component of the ripple average value (formula (See the second term on the right side of (4b)) and (2) the fluctuation component of the ripple amplitude Vpp (see the left side of equation (10))), and the maximum value of the reference voltage RefB becomes the desired voltage value. In this way, the reference voltage Ref is corrected.

  However, as the drive frequency F (= 1 / T) of the switching power supply device A is increased, the circuit delay time Td (mainly the main comparator) from when the reference voltage RefB and the feedback voltage Vfb intersect until the reference voltage RefB turns back. 5, the sum of the circuit delay times of the operational amplifier 231 and the drivers 2a and 2b)) becomes relatively large. Therefore, as shown in FIG. 22, the feedback voltage Vfb becomes lower than the maximum value of the reference voltage RefB by the delay drop voltage Verr, and the output voltage Vout deviates from a desired value.

  Although the above problem can be solved by increasing the speed of the main comparator 5 or the like, it is necessary to increase the current consumption of the circuit. That is, the switching power supply A has a trade-off relationship between high frequency and low power consumption.

  Here, the following equation (11) is established between the circuit delay time Td and the delay drop voltage Verr.

  The ripple amplitude Vpp is expressed by the above equation (6). Accordingly, when formula (6) is substituted into formula (11) and rearranged, the delayed drop voltage Verr can be calculated by the following formula (12).

  Thus, it can be seen that the delay drop voltage Verr varies according to the on-duty Don, like the ripple average value (the DC value of the reference voltage RefB).

  Therefore, if the circuit constants (in particular, the resistance values R1 to R4, the resistance value R7, the resistance value R9, and the capacitance value C1) of the ripple generation circuit 20 are selected so as to satisfy the following expression (13), the on-duty Don It is possible to cancel not only the fluctuation component of the ripple average value depending on the frequency fluctuation component but also the fluctuation component (delayed drop voltage Verr) of the output voltage Vout due to the circuit delay. Accordingly, it is possible to achieve both high frequency and low power consumption of the switching power supply device A without depending on input / output conditions.

<Ripple generation circuit (fifth configuration example)>
FIG. 23 is a block diagram illustrating a fifth configuration example of the ripple generation circuit 20. The ripple generation circuit 20 of the fifth configuration example has substantially the same configuration as the third configuration example (FIGS. 16 and 17), and corresponds to the switching control of the drive frequency F using the frequency switching signal FCTRL. It has the characteristics. Therefore, the same components as those in the third configuration example are denoted by the same reference numerals as those in FIGS. 16 and 17, and redundant description is omitted. Do.

  The frequency switching signal FCTRL is a control signal input to the on-time setting unit 7 (see FIG. 1) and is used to change the driving frequency F by switching the on-time Ton of the output signal HG. Further, when the drive frequency F is switched, the capacitance value C1 of the capacitor 234 included in the ripple injection unit 230 needs to be variably controlled in accordance with the frequency switching signal FCTRL in order to satisfy the above equation (10). For example, when the drive frequency F is switched to twice, the capacitance value C1 of the capacitor 234 is switched to ½.

  As described above, when the capacitance value C1 is switched, at least one of the resistance values R1 to R4, the resistance value R7, and the resistance value R9 is adjusted in order to satisfy the above equation (13). Need to do. However, when the resistance values R1 to R4 or the resistance value R7 are adjusted, the relationship of the above equation (10) is broken again, and it becomes necessary to adjust another circuit constant. On the other hand, if the resistance value R9 is variably controlled with the same behavior as the capacitance value C1, the above-described equations (10) and (13) can be satisfied without adjusting other circuit constants. .

  Therefore, in the ripple generation circuit 20 of the fifth configuration example, the capacitor 234 and the resistor 227 are configured such that the capacitance value C1 and the resistance value R9 are variably controlled according to the frequency switching signal FCTRL. For example, when the capacitance value C1 is switched to 1/2, the resistance value R9 is also switched to 1/2. With such a configuration, it is possible to cope with the switching control of the driving frequency F while minimizing the adjustment of the circuit constant.

  FIG. 24 and FIG. 25 are timing charts showing how the DC deviation of the feedback voltage Vfb (and thus the output voltage Vout) occurs when the drive frequency F is switched and how the DC deviation is suppressed. .

  If the circuit constant of the ripple generation circuit 20 is set without considering the fluctuation component (delay drop voltage Verr) of the output voltage Vout due to circuit delay, the delay drop voltage Verr increases as the drive frequency F increases. A DC shift of the feedback voltage Vfb occurs before and after switching of F (see FIG. 24).

  On the other hand, in consideration of the fluctuation component of the output voltage Vout due to circuit delay, if the circuit constant of the ripple generation circuit 20 is set so as to satisfy the above expression (13), the reference voltage RefB is shifted up and down according to the drive frequency F. Therefore, it is possible to suppress the DC deviation of the feedback voltage Vfb and the accompanying over / undershoot (see FIG. 25).

<Application to TV>
FIG. 26 is a block diagram illustrating a configuration example of a television equipped with a switching power supply device. 27A to 27C are a front view, a side view, and a rear view, respectively, of a television on which a switching power supply device is mounted. The television X of this configuration example includes a tuner unit X1, a decoder unit X2, a display unit X3, a speaker unit X4, an operation unit X5, an interface unit X6, a control unit X7, and a power supply unit X8. Have.

  The tuner unit X1 selects a broadcast signal of a desired channel from a reception signal received by an antenna X0 externally connected to the television X.

  The decoder unit X2 generates a video signal and an audio signal from the broadcast signal selected by the tuner X1. The decoder unit X2 also has a function of generating a video signal and an audio signal based on an external input signal from the interface unit X6.

  The display unit X3 outputs the video signal generated by the decoder unit X2 as a video.

  The speaker unit X4 outputs the audio signal generated by the decoder unit as audio.

  The operation unit X5 is one of human interfaces that accept user operations. As the operation unit X5, a button, a switch, a remote controller, or the like can be used.

  The interface unit X6 is a front end that receives an external input signal from an external device (such as an optical disk player or a hard disk drive).

  The control unit X7 comprehensively controls the operations of the respective units X1 to X6. As the control unit X7, a CPU (central processing unit) or the like can be used.

  The power supply unit X8 supplies power to the units X1 to X7. As the power supply unit X8, the above-described switching power supply device A can be suitably used.

<Other variations>
The configuration of the present invention can be variously modified within the scope of the present invention in addition to the above embodiment. That is, the above-described embodiment is an example in all respects and should not be considered as limiting, and the technical scope of the present invention is not the description of the above-described embodiment, but the claims. It should be understood that all modifications that come within the meaning and range of equivalents of the claims are included.

  The switching power supply according to the present invention includes a personal computer (notebook / desktop type), LCD [liquid crystal display] television, PDP [plasma display panel] television, DVD [digital versatile disc] recorder, and BD [blu-ray disc]. It can be suitably used for a recorder or the like.

A Switching power supply device 100 Switching power supply IC
DESCRIPTION OF SYMBOLS 1a, 1b N channel type MOS field effect transistor 2a, 2b Driver 3 Level shifter 4 Drive control circuit 5 Main comparator 6 Soft start control circuit 7 On time setting circuit 8 Timer 11 Reference voltage generation circuit 12a, 12b Resistance 13 Constant voltage generation circuit 14 Diode 15 Undervoltage lockout circuit 16 Thermal shutdown circuit 17 Input bias current generation circuit 18 Overcurrent protection circuit 19 Overvoltage protection circuit 20 Ripple generation circuit 210 Correction voltage generation unit 211, 212, 213 Resistor 214, 215 Capacitor 220 Addition unit 221 225 Operational amplifier 222, 227 Resistance 223, 224 P-channel MOS field effect transistor 226 N-channel MOS field effect transistor 230 Ripple injection unit 2 First operational amplifier (ripple amplifier)
232, 233 Resistor 234 Capacitor 240 Buffer 310 Integrated voltage generator 311 Operational amplifier 312 Inverter 313, 314, 315 Resistor 316, 317 Capacitor 320 Subtractor 321 Operational amplifier 322 N-channel MOS field effect transistor 323 Resistor 330 Correction voltage generator L1 Inductor D1 Diode R1 to R3 Resistor C1 to C4 Capacitor EN Enable terminal FB Feedback terminal RT On-time setting terminal SS Soft start terminal BST Bootstrap terminal VIN Input terminal SW Switch terminal GND Ground terminal X Television X0 Antenna X1 Tuner part X2 Decoder part X3 Display Part X4 Speaker part X5 Operation part X6 Interface part X7 Control part X8 Power supply part

Claims (9)

A non-linear control switching power supply that generates an output voltage from an input voltage,
A ripple generation circuit that injects a ripple component into the reference voltage;
A main comparator that compares the feedback voltage according to the output voltage and a reference voltage after ripple injection to generate a comparison signal;
A switching control unit that performs on / off control of the switch element based on the comparison signal;
Have
The ripple generation circuit is
A correction voltage generation unit that generates a correction voltage according to an on-duty of a pulse voltage indicating an on / off state of the switch element;
An adder that raises the reference voltage before ripple injection according to the correction voltage;
An integrated voltage generator that generates an integrated voltage according to an integrated value of the on-duty and off-duty of the pulse voltage;
A subtractor that lowers the reference voltage before the ripple injection according to the integrated voltage;
A ripple injection unit that generates the ripple component using the pulse voltage and injects it into the corrected reference voltage;
Including
The correction voltage generation unit and the addition unit have circuit constants such that both the fluctuation component of the ripple average value corresponding to the on-duty of the pulse voltage and the fluctuation component of the output voltage due to circuit delay are canceled. Is set,
The integrated voltage generating unit and the subtracting unit are set with respective circuit constants such that a fluctuation component of a ripple amplitude corresponding to an integrated value of on-duty and off-duty of the pulse voltage is canceled. Switching power supply device. The ripple injection part is
A ripple amplifier that inputs the corrected reference voltage to the non-inverting input terminal and outputs the reference voltage after the ripple injection from the output terminal;
A first resistor connected between an inverting input terminal and an output terminal of the ripple amplifier;
A second resistor connected between an inverting input terminal of the ripple amplifier and an application terminal of the pulse voltage;
A capacitor connected between an inverting input terminal and an output terminal of the ripple amplifier;
The switching power supply device according to claim 1, comprising: The correction voltage generator is
A first CR filter that smoothes the pulse voltage to generate the correction voltage;
A fourth resistor forming a voltage dividing circuit together with a third resistor included in the first CR filter;
The switching power supply device according to claim 2, comprising: The integrated voltage generator is
An inverter that operates by receiving the supply of the correction voltage and generates an inverted pulse voltage obtained by logically inverting the pulse voltage;
A second CR filter that smoothes the inverted pulse voltage to generate the integrated voltage;
A sixth resistor forming a voltage dividing circuit together with a fifth resistor included in the second CR filter;
The switching power supply device according to claim 3, comprising: The subtraction unit
A buffer to which a reference voltage before ripple injection is input;
A seventh resistor having a first end connected to the output end of the buffer and a second end connected to a non-inverting input end of the ripple amplifier;
A subtracting current generating circuit that generates a subtracting current flowing from the output terminal of the buffer toward the seventh resistor by applying the integrated voltage to the eighth resistor;
The switching power supply device according to claim 4, comprising:   The addition unit includes an addition current generation circuit that generates an addition current that flows from the seventh resistor toward an output terminal of the buffer by applying the correction voltage to a ninth resistor. Item 6. The switching power supply device according to Item 5. Resistance values R1 to R9 of the first to ninth resistors, a capacitance value C1 of the capacitor, a high level voltage Vreg of the pulse voltage, an on-duty Don of the pulse voltage, a driving frequency F of the switch element, and the ripple The following equations (a1) and (a2) are established for the circuit delay time Td from when the reference voltage after injection intersects with the feedback voltage until the reference voltage after ripple injection returns. The switching power supply device according to claim 6.

  8. The switching power supply according to claim 7, wherein the capacitance value and the resistance value of the capacitor and the ninth resistor are variably controlled in accordance with a frequency switching signal for switching a driving frequency of the switch element. apparatus. A tuner unit that selects a broadcast signal of a desired channel from a received signal;
A decoder for generating a video signal and an audio signal from the broadcast signal selected by the tuner;
A display unit for outputting the video signal as a video;
A speaker unit for outputting the audio signal as audio;
An operation unit for accepting user operations;
An interface for receiving external input signals;
A control unit that comprehensively controls the operation of each of the above units;
A power supply unit for supplying power to each of the above-mentioned units;
Have
The said power supply part is a television characterized by including the switching power supply device as described in any one of Claims 1-8.

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