JP5963282B2 - 割り込み分配スキーム - Google Patents
割り込み分配スキーム Download PDFInfo
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- JP5963282B2 JP5963282B2 JP2015012014A JP2015012014A JP5963282B2 JP 5963282 B2 JP5963282 B2 JP 5963282B2 JP 2015012014 A JP2015012014 A JP 2015012014A JP 2015012014 A JP2015012014 A JP 2015012014A JP 5963282 B2 JP5963282 B2 JP 5963282B2
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
- G06F13/24—Handling requests for interconnection or transfer for access to input/output bus using interrupt
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/48—Program initiating; Program switching, e.g. by interrupt
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/24—Interrupt
- G06F2213/2424—Interrupt packet, e.g. event
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
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- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Software Systems (AREA)
- Bus Control (AREA)
- Power Sources (AREA)
- Microcomputers (AREA)
Description
10 集積回路(IC)
12A−12B メモリ
14 中央プロセッサユニット(CPU)ブロック
16 プロセッサ
18 レベル2(L2)キャッシュ
20 非リアルタイム(NRT)周辺デバイス
22 リアルタイム(RT)周辺デバイス
24 画像プロセッサ
26 ディスプレイパイプ
28 ポートアービタ
30 ブリッジ/ダイレクトメモリアクセス(DMA)コントローラ
32 周辺デバイス
34 周辺デバイスインターフェースコントローラ
36 グラフィックユニット
38A−38E グラフィックコントローラ
40 メモリコントローラ
42A−42B メモリ物理的インターフェース回路(PHY)
44A−44E ポート
46 翻訳ユニット
50 割り込みコントローラ
52 パワーマネジャ
54 オフラインレジスタ
56 マスクレジスタ
58 タイムアウトレジスタ
60A−60B プロセッサ
62 割り込みコントローラレジスタインターフェース
64A−64B 周辺デバイス
120 レジスタインターフェースユニット
122 マスク/ソフトウェア(SW)ORユニット
124 割り込みルータ
126A−126B プロセッサスケジューラ
130 マスクフロップ
132 ORゲート
134 ソフトウェア割り込みフロップ
136 ORゲート
138 ANDゲート
140 経路選択回路
142A−142B タイムアウトコントロールユニット
144A−144B フロップ
150 カウンタ
152、154 マルチプレクサ
156、158 立ち上がりエッジ検知回路構成
160 タイムアウトカウンタ
162 ORゲート
164、166 マルチプレクサ
168 ANDゲート
170 コンパレータ
172 カウンタ
174 ORゲート
176、178 マルチプレクサ
180 ANDゲート
182 コンパレータ
184 I/Oプロセッサ(IOP)
350 システム
354 周辺デバイス
356 電源
Claims (13)
- システム内の1以上のデバイスからの割り込みを受信するように結合されている回路構成と、
前記回路構成へ結合されていて、前記システム内の複数のプロセッサから、前記デバイスから受信された第1の割り込みについてプロセッサを選択するように構成されている割り込みルータと、を備えた割り込みコントローラであって、
前記割り込みルータは、割り込みが前記選択されたプロセッサへ合図されるよう仕向けるように構成され、
前記割り込みルータは、前記割り込みが前記選択されたプロセッサへ合図されたことに応じてタイムアウトカウンタを或るタイムアウト値で初期化し、
前記割り込みルータは、前記割り込みについて前記選択されたプロセッサからの応答無しに前記タイムアウトカウンタが満了したことの検知に応じて別のプロセッサを選択し、
前記割り込みルータは、前記選択されたプロセッサの状態に応じて、複数のタイムアウト値から前記タイムアウト値を選択するように構成され、前記状態は、前記選択されたプロセッサ内で割り込みが有効になっているか否かを含む、割り込みコントローラ。 - 前記タイムアウト値は、前記複数のプロセッサのうちの第2のプロセッサの状態に応じて更に選択される、請求項1に記載の割り込みコントローラ。
- 前記第2のプロセッサは、前記選択されたプロセッサのためのタイムアウトカウンタが満了したことに応じて選択される他のプロセッサである、請求項2に記載の割り込みコントローラ。
- 前記選択されたプロセッサからの応答は、割り込みアクノリッジメント応答である、請求項1に記載の割り込みコントローラ。
- 前記状態は、前記選択されたプロセッサが低電力状態であるか否かを含む、請求項1に記載の割り込みコントローラ。
- 前記タイムアウト値は、前記選択されたプロセッサのフル状態に対応する第2のタイムアウト値よりも高い、請求項5に記載の割り込みコントローラ。
- 前記プロセッサの状態は、ソフトウェアによってプログラムされているオフライン状態を含む、請求項1に記載の割り込みコントローラ。
- 前記プロセッサの状態は、仮想化されたゲストオペレーティングシステムが前記プロセッサ上で実行されていることの指示を含む、請求項1に記載の割り込みコントローラ。
- 複数のデバイスと、
複数のプロセッサと、
請求項1に記載の前記割り込みコントローラであって、前記複数のデバイス及び前記複数のプロセッサへ結合されている前記割り込みコントローラと、
を備えているシステム。 - 割り込みコントローラが割り込みを受信する処理と、
前記割り込みコントローラを含むシステム内の複数のプロセッサのうち、前記割り込みコントローラが2以上の適格なプロセッサを識別する処理と、
前記2以上の適格なプロセッサから1つのプロセッサを選択する処理と、
前記選択されたプロセッサへ前記割り込みを提示する処理と、
前記選択されたプロセッサの状態に応じて前記複数のタイムアウト値から或るタイムアウト値を選択する処理であって、前記状態は前記選択されたプロセッサ内で割り込みが有効になっているか否かを含む当該処理と、
タイムアウトカウンタを、前記選択されたプロセッサに関する前記タイムアウト値で初期化する処理と、
前記割り込みについて前記選択されたプロセッサから割り込みアクノリッジメントを受信すること無しに前記選択されたプロセッサに関するタイムアウトを検出する処理と、
前記タイムアウトに応じて、前記複数のプロセッサから異なるプロセッサを選択する処理と、
前記異なるプロセッサへ前記割り込みを提示する処理と、
を含む方法。 - 前記タイムアウト値は、前記2以上の適格なプロセッサのうちの第2のプロセッサの状態に応じて更に選択される、請求項10に記載の方法。
- 前記第2のプロセッサは、前記選択されたプロセッサのためのタイムアウトカウンタが満了したことに応じて選択される他のプロセッサである、請求項11に記載の方法。
- 前記2以上の適格なプロセッサは、前記割り込みを受信するために未だ選択されていない、請求項10に記載の方法。
Applications Claiming Priority (2)
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US12/962,146 | 2010-12-07 | ||
US12/962,146 US8959270B2 (en) | 2010-12-07 | 2010-12-07 | Interrupt distribution scheme |
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JP2013543183A Division JP5923838B2 (ja) | 2010-12-07 | 2011-11-17 | 割り込み分配スキーム |
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JP2015079542A JP2015079542A (ja) | 2015-04-23 |
JP5963282B2 true JP5963282B2 (ja) | 2016-08-03 |
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JP2015012014A Active JP5963282B2 (ja) | 2010-12-07 | 2015-01-26 | 割り込み分配スキーム |
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US (2) | US8959270B2 (ja) |
EP (1) | EP2463781B1 (ja) |
JP (2) | JP5923838B2 (ja) |
KR (1) | KR101320791B1 (ja) |
CN (1) | CN102567109B (ja) |
AU (1) | AU2011338863B2 (ja) |
BR (1) | BR112013013300B1 (ja) |
HK (1) | HK1171104A1 (ja) |
TW (1) | TWI447650B (ja) |
WO (1) | WO2012078334A1 (ja) |
Families Citing this family (45)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8909836B2 (en) * | 2012-10-08 | 2014-12-09 | Andes Technology Corporation | Interrupt controller, apparatus including interrupt controller, and corresponding methods for processing interrupt request event(s) in system including processor(s) |
JP2014106755A (ja) * | 2012-11-28 | 2014-06-09 | Fujitsu Mobile Communications Ltd | 情報処理装置及び制御方法 |
US9678564B2 (en) * | 2012-12-21 | 2017-06-13 | Nxp B.V. | Multiprocessor system with interrupt distributor |
US10534421B2 (en) | 2013-06-13 | 2020-01-14 | Microsoft Technology Licensing, Llc | Virtual per-processor timers for multiprocessor systems |
US9524195B2 (en) | 2014-02-27 | 2016-12-20 | International Business Machines Corporation | Adaptive process for data sharing with selection of lock elision and locking |
US9361041B2 (en) | 2014-02-27 | 2016-06-07 | International Business Machines Corporation | Hint instruction for managing transactional aborts in transactional memory computing environments |
US9430273B2 (en) | 2014-02-27 | 2016-08-30 | International Business Machines Corporation | Suppressing aborting a transaction beyond a threshold execution duration based on the predicted duration |
US9329946B2 (en) | 2014-02-27 | 2016-05-03 | International Business Machines Corporation | Salvaging hardware transactions |
US9575890B2 (en) | 2014-02-27 | 2017-02-21 | International Business Machines Corporation | Supporting atomic accumulation with an addressable accumulator |
US9645879B2 (en) | 2014-02-27 | 2017-05-09 | International Business Machines Corporation | Salvaging hardware transactions with instructions |
US9442775B2 (en) | 2014-02-27 | 2016-09-13 | International Business Machines Corporation | Salvaging hardware transactions with instructions to transfer transaction execution control |
US9311178B2 (en) | 2014-02-27 | 2016-04-12 | International Business Machines Corporation | Salvaging hardware transactions with instructions |
US9336097B2 (en) | 2014-02-27 | 2016-05-10 | International Business Machines Corporation | Salvaging hardware transactions |
US9442853B2 (en) | 2014-02-27 | 2016-09-13 | International Business Machines Corporation | Salvaging lock elision transactions with instructions to change execution type |
US9471371B2 (en) | 2014-02-27 | 2016-10-18 | International Business Machines Corporation | Dynamic prediction of concurrent hardware transactions resource requirements and allocation |
US9411729B2 (en) | 2014-02-27 | 2016-08-09 | International Business Machines Corporation | Salvaging lock elision transactions |
US9424072B2 (en) | 2014-02-27 | 2016-08-23 | International Business Machines Corporation | Alerting hardware transactions that are about to run out of space |
US9465673B2 (en) | 2014-02-27 | 2016-10-11 | International Business Machines Corporation | Deferral instruction for managing transactional aborts in transactional memory computing environments to complete transaction by deferring disruptive events handling |
US20150242216A1 (en) | 2014-02-27 | 2015-08-27 | International Business Machines Corporation | Committing hardware transactions that are about to run out of resource |
US9262206B2 (en) | 2014-02-27 | 2016-02-16 | International Business Machines Corporation | Using the transaction-begin instruction to manage transactional aborts in transactional memory computing environments |
US9524187B2 (en) | 2014-03-02 | 2016-12-20 | International Business Machines Corporation | Executing instruction with threshold indicating nearing of completion of transaction |
KR102187912B1 (ko) | 2014-09-26 | 2020-12-07 | 인텔 코포레이션 | 인터럽트들의 세트들을 구성하는 장치 및 방법 |
KR20160061726A (ko) * | 2014-11-24 | 2016-06-01 | 삼성전자주식회사 | 인터럽트 핸들링 방법 |
US10203955B2 (en) * | 2014-12-31 | 2019-02-12 | Intel Corporation | Methods, apparatus, instructions and logic to provide vector packed tuple cross-comparison functionality |
CN104572282A (zh) * | 2015-01-05 | 2015-04-29 | 浪潮电子信息产业股份有限公司 | 一种将sas控制器中断绑定到cpu的自动化方法 |
US10585826B2 (en) * | 2016-01-25 | 2020-03-10 | Advanced Micro Devices, Inc. | Using processor types for processing interrupts in a computing device |
US10802998B2 (en) * | 2016-03-29 | 2020-10-13 | Intel Corporation | Technologies for processor core soft-offlining |
US11392438B2 (en) * | 2017-02-09 | 2022-07-19 | Arm Limited | Responding to unresponsive processing circuitry |
CN109144680A (zh) | 2017-06-27 | 2019-01-04 | 阿里巴巴集团控股有限公司 | 一种时钟滴答中断设置方法及装置 |
TWI621946B (zh) * | 2017-06-28 | 2018-04-21 | 緯創資通股份有限公司 | 排程方法、PCIe控制器及其相關電子系統 |
US10747298B2 (en) * | 2017-11-29 | 2020-08-18 | Advanced Micro Devices, Inc. | Dynamic interrupt rate control in computing system |
US11144481B2 (en) * | 2018-04-11 | 2021-10-12 | Apple Inc. | Techniques for dynamically adjusting the manner in which I/O requests are transmitted between a computing device and a storage device |
US11113216B2 (en) * | 2019-03-20 | 2021-09-07 | Mediatek Inc. | Dispatching interrupts in a multi-processor system based on power and performance factors |
US11307791B2 (en) * | 2019-05-24 | 2022-04-19 | Texas Instruments Incorporated | Quick clearing of registers |
US20210107512A1 (en) * | 2020-03-27 | 2021-04-15 | Intel Corporation | Computing system for mitigating execution drift |
CN111786546B (zh) * | 2020-07-20 | 2021-10-15 | 中车青岛四方车辆研究所有限公司 | 功率模块驱动系统及控制方法 |
US11630789B2 (en) * | 2020-09-11 | 2023-04-18 | Apple Inc. | Scalable interrupts |
EP4184712A4 (en) | 2020-09-15 | 2024-01-10 | Samsung Electronics Co., Ltd. | ELECTRONIC DEVICE HAVING AN ANTENNA STRUCTURE |
KR102549360B1 (ko) | 2020-12-14 | 2023-06-28 | 재단법인대구경북과학기술원 | 인터럽트 제어 장치 및 방법 |
US11675718B2 (en) * | 2021-03-26 | 2023-06-13 | Advanced Micro Devices, Inc. | Enhanced low-priority arbitration |
KR20220161878A (ko) * | 2021-05-31 | 2022-12-07 | 삼성전자주식회사 | 전자 장치 및 전자 장치의 센서 데이터 처리 방법 |
EP4290378A4 (en) * | 2021-05-31 | 2024-03-06 | Samsung Electronics Co., Ltd. | ELECTRONIC DEVICE AND METHOD FOR PROCESSING SENSOR DATA OF THE ELECTRONIC DEVICE |
US11803471B2 (en) | 2021-08-23 | 2023-10-31 | Apple Inc. | Scalable system on a chip |
US20230342158A1 (en) * | 2022-04-21 | 2023-10-26 | Microchip Technology Incorporated | Atomic Instruction Set and Architecture with Bus Arbitration Locking |
CN117472637B (zh) * | 2023-12-27 | 2024-02-23 | 苏州元脑智能科技有限公司 | 一种中断管理方法、系统、设备及介质 |
Family Cites Families (47)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3623014A (en) * | 1969-08-25 | 1971-11-23 | Control Data Corp | Computer communications system |
US5517626A (en) | 1990-05-07 | 1996-05-14 | S3, Incorporated | Open high speed bus for microcomputer system |
US5870621A (en) | 1994-12-22 | 1999-02-09 | Texas Instruments Incorporated | Quadrilateral multichip computer systems and printed circuit boards therefor |
US5717903A (en) * | 1995-05-15 | 1998-02-10 | Compaq Computer Corporation | Method and appartus for emulating a peripheral device to allow device driver development before availability of the peripheral device |
JP3676882B2 (ja) | 1996-06-12 | 2005-07-27 | 株式会社リコー | マイクロプロセッサ及びその周辺装置 |
DE69735575T2 (de) * | 1996-08-20 | 2006-08-24 | Compaq Computer Corp., Houston | Verfahren und Vorrichtung zur Unterbrechungsverteilung in einem skalierbaren symmetrischen Mehrprozessorsystem ohne die Busbreite oder das Busprotokoll zu verändern |
US5918057A (en) | 1997-03-20 | 1999-06-29 | Industrial Technology Research Institute | Method and apparatus for dispatching multiple interrupt requests simultaneously |
JP3699806B2 (ja) | 1997-06-20 | 2005-09-28 | 株式会社東芝 | 割込みコントローラ及び制御システム |
US6170025B1 (en) * | 1997-08-29 | 2001-01-02 | Intel Corporation | Distributed computer system supporting remote interrupts and lock mechanism |
US6105102A (en) | 1998-10-16 | 2000-08-15 | Advanced Micro Devices, Inc. | Mechanism for minimizing overhead usage of a host system by polling for subsequent interrupts after service of a prior interrupt |
US6701429B1 (en) | 1998-12-03 | 2004-03-02 | Telefonaktiebolaget Lm Ericsson(Publ) | System and method of start-up in efficient way for multi-processor systems based on returned identification information read from pre-determined memory location |
US6418497B1 (en) * | 1998-12-21 | 2002-07-09 | International Business Machines Corporation | Method and system for interrupt handling using system pipelined packet transfers |
JP2000242616A (ja) * | 1999-02-19 | 2000-09-08 | Nec Eng Ltd | 障害処理装置,障害処理方法および記録媒体 |
US6772257B1 (en) | 1999-12-23 | 2004-08-03 | Intel Corporation | Method and apparatus for processing interrupts |
JP2001229147A (ja) * | 2000-02-17 | 2001-08-24 | Nec Shizuoka Ltd | Cpu間通信制御方法および携帯情報端末 |
US20020116563A1 (en) | 2000-12-12 | 2002-08-22 | Lever Paul D. | Apparatus and method to reduce interrupt latency in shared interrupt systems |
US6792492B1 (en) | 2001-04-11 | 2004-09-14 | Novell, Inc. | System and method of lowering overhead and latency needed to service operating system interrupts |
US6813665B2 (en) | 2001-09-21 | 2004-11-02 | Intel Corporation | Interrupt method, system and medium |
US20030065497A1 (en) * | 2001-09-28 | 2003-04-03 | Rhoads Monte J. | Power management system to select a power state for a network computer system based on load |
US7328294B2 (en) * | 2001-12-03 | 2008-02-05 | Sun Microsystems, Inc. | Methods and apparatus for distributing interrupts |
JP2003281112A (ja) | 2002-03-25 | 2003-10-03 | Fujitsu Ltd | マルチプロセッサシステム |
US20040117532A1 (en) | 2002-12-11 | 2004-06-17 | Bennett Steven M. | Mechanism for controlling external interrupts in a virtual machine system |
GB2396445B (en) | 2002-12-19 | 2005-12-21 | Advanced Risc Mach Ltd | An interrupt controller and interrupt controlling method for prioritizing interrupt requests generated by a plurality of interrupt sources |
US7191349B2 (en) * | 2002-12-26 | 2007-03-13 | Intel Corporation | Mechanism for processor power state aware distribution of lowest priority interrupt |
GB2403822B (en) * | 2003-07-07 | 2006-05-10 | Advanced Risc Mach Ltd | Data processing apparatus and method for handling interrupts |
US7222203B2 (en) | 2003-12-08 | 2007-05-22 | Intel Corporation | Interrupt redirection for virtual partitioning |
GB2409543B (en) | 2003-12-23 | 2006-11-01 | Advanced Risc Mach Ltd | Interrupt masking control |
US7353301B2 (en) | 2004-10-29 | 2008-04-01 | Intel Corporation | Methodology and apparatus for implementing write combining |
US7398343B1 (en) | 2006-01-03 | 2008-07-08 | Emc Corporation | Interrupt processing system |
JP4971676B2 (ja) | 2006-04-28 | 2012-07-11 | ルネサスエレクトロニクス株式会社 | 割り込み制御回路及び割り込み制御方法 |
JP2008015593A (ja) * | 2006-07-03 | 2008-01-24 | Hitachi Ltd | 中継装置、プログラム、中継方法及び通信システム |
US7721034B2 (en) | 2006-09-29 | 2010-05-18 | Dell Products L.P. | System and method for managing system management interrupts in a multiprocessor computer system |
US8032681B2 (en) * | 2007-09-06 | 2011-10-04 | Intel Corporation | Processor selection for an interrupt based on willingness to accept the interrupt and on priority |
US8661167B2 (en) * | 2007-09-17 | 2014-02-25 | Intel Corporation | DMA (direct memory access) coalescing |
US8453143B2 (en) * | 2007-09-19 | 2013-05-28 | Vmware, Inc. | Reducing the latency of virtual interrupt delivery in virtual machines |
US7962679B2 (en) | 2007-09-28 | 2011-06-14 | Intel Corporation | Interrupt balancing for multi-core and power |
US7730248B2 (en) | 2007-12-13 | 2010-06-01 | Texas Instruments Incorporated | Interrupt morphing and configuration, circuits, systems and processes |
US7962771B2 (en) | 2007-12-31 | 2011-06-14 | Intel Corporation | Method, system, and apparatus for rerouting interrupts in a multi-core processor |
JP2009193525A (ja) | 2008-02-18 | 2009-08-27 | Mitsubishi Electric Corp | 割込制御装置 |
US8190826B2 (en) | 2008-05-28 | 2012-05-29 | Advanced Micro Devices, Inc. | Write combining cache with pipelined synchronization |
JP2010055296A (ja) * | 2008-08-27 | 2010-03-11 | Fujitsu Ltd | 負荷分散プログラム及び負荷分散装置 |
EP2166457B1 (en) | 2008-09-12 | 2014-04-23 | TELEFONAKTIEBOLAGET LM ERICSSON (publ) | Interrupt controller and methods of operation |
US7849247B2 (en) | 2008-10-14 | 2010-12-07 | Freescale Semiconductor, Inc. | Interrupt controller for accelerated interrupt handling in a data processing system and method thereof |
US8015337B2 (en) | 2009-03-23 | 2011-09-06 | Arm Limited | Power efficient interrupt detection |
US7996595B2 (en) | 2009-04-14 | 2011-08-09 | Lstar Technologies Llc | Interrupt arbitration for multiprocessors |
US8260996B2 (en) * | 2009-04-24 | 2012-09-04 | Empire Technology Development Llc | Interrupt optimization for multiprocessors |
US8458386B2 (en) | 2010-12-07 | 2013-06-04 | Apple Inc. | Atomic interrupt masking in an interrupt controller to prevent delivery of same interrupt vector for consecutive interrupt acknowledgements |
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CN102567109A (zh) | 2012-07-11 |
KR20120063436A (ko) | 2012-06-15 |
WO2012078334A1 (en) | 2012-06-14 |
EP2463781B1 (en) | 2015-01-21 |
BR112013013300A2 (pt) | 2016-09-13 |
BR112013013300B1 (pt) | 2021-01-05 |
US20120144172A1 (en) | 2012-06-07 |
US9262353B2 (en) | 2016-02-16 |
TW201229911A (en) | 2012-07-16 |
JP2013545205A (ja) | 2013-12-19 |
JP5923838B2 (ja) | 2016-05-25 |
US8959270B2 (en) | 2015-02-17 |
EP2463781A2 (en) | 2012-06-13 |
JP2015079542A (ja) | 2015-04-23 |
AU2011338863A1 (en) | 2013-05-09 |
US20150113193A1 (en) | 2015-04-23 |
CN102567109B (zh) | 2015-04-08 |
EP2463781A3 (en) | 2012-11-21 |
TWI447650B (zh) | 2014-08-01 |
AU2011338863B2 (en) | 2015-01-22 |
HK1171104A1 (en) | 2013-03-15 |
KR101320791B1 (ko) | 2013-10-23 |
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