JP5960087B2 - Self-ionized and inductively coupled plasmas for sputtering and resputtering - Google Patents

Description

  [001] This application is a continuation-in-part of pending application 09 / 685,978, filed October 10, 2000, published as US Pat. No. 6,398,929, 1999. Which is a divisional application of application 09 / 414,614 filed on October 8, 2001, and (provisional application 60 / 316,137, filed August 30, 2001, and 2001-12). No. 60 / 342,608 filed on May 21st, claiming priority) Partial continuation of pending application 10 / 202,778 filed July 25, 2002 And is a continuation-in-part of pending application 09 / 993,543 filed on November 14, 2001, which is incorporated herein in its entirety.

  [002] The present invention relates generally to sputtering and resputtering. Specifically, the present invention relates to sputter deposition of material material and resputtering of deposited material material in the formation of semiconductor integrated circuits.

  [003] Semiconductor integrated circuits typically include multiple layers of metallization to form electrical connections between multiple active semiconductor devices. Advanced integrated circuits, particularly microprocessor integrated circuits, include five or more metallization layers. In the past, aluminum has been an advantageous metallization, but copper has newly been used as a metallization for advanced integrated circuits.

  [004] A typical metallization layer is shown in the cross-sectional view of FIG. The lower layer 110 includes a conductive feature 112. If the lower layer 110 is a lower insulating layer, such as silica or other insulating material, the conductive feature 112 may be a lower copper metallization and the vertical portion of the upper metallization is It is called a via to interconnect the two layers of metallization. If the lower layer 110 is a silicon layer, the conductive feature 112 may be a doped silicon region and the vertical portion of the upper metallization formed in the hole is electrically connected to the silicon. It is called a contact because it touches. An upper insulating layer 114 is deposited over the lower insulating layer 110 and the lower metallization 112. There are other shapes for the holes including lines and trenches. In the dual damascene and similar wiring structure, the hole has a complicated shape as described below. In some applications, the holes may not extend through the insulating layer. In the following description, only via holes are described, but in most situations, the description is equally well applicable to other types of holes with minor modifications as is well known in the art.

  [005] Conventionally, the insulating layer is a silicon oxide film formed by plasma CVD (plasma-enhanced chemical vapor deposition; PECVD) using tetraethoxysilane (TEOS) as a precursor. However, other compositions of low dielectric constant (low-k) materials and deposition techniques are also contemplated. Some of the low-k insulators that have been developed can be characterized as silicates such as fluorinated silicate glass. Hereinafter, only the silicate insulator will be described directly, but it is also contemplated that other insulator configurations can be used.

  [006] Via holes, in the case of silicate insulators, are typically etched into the upper insulating layer 114 using a plasma etching process based on fluorine. In advanced integrated circuits, the via hole has a width on the order of 0.18 μm or less. The thickness of the insulating layer 114 is typically at least 0.7 μm, or twice that, so that the aspect ratio of the holes is 4: 1 or more. An aspect ratio of 6: 1 or higher has been proposed. Furthermore, in most situations, the via hole has a vertical cross section.

  [007] A liner layer 116 may be deposited on the bottom and sides of the hole and on the insulating layer 114. The liner 116 can perform several functions. The liner can act as an adhesive layer between the insulator and the metal because the metal film tends to peel from the oxide. The liner can also act as a barrier against interdiffusion between the oxide-based insulator and the metal. The liner is a seed and nucleus for promoting uniform adhesion, growth and reflow at the lowest possible temperature for the deposition of the metal filling the holes, and also for nucleation of the growth of individual seed layers. It may act as a forming layer. One or more liner layers may be deposited, one layer serving primarily as a barrier layer, and the other layer serving primarily as an adhesion layer, seed layer or nucleation layer. .

  [008] Thereafter, a wiring layer 118 made of a conductive metal such as copper is deposited, for example, to cover the liner layer 116 to fill the holes and to cover the top of the insulating layer 114. Conventional aluminum metallization is patterned in the horizontal wiring portion by selective etching of the flat portion of the metal layer 118. However, a method for copper metallization called dual damascene forms the hole in the insulating layer 114 in two connecting portions, and the first connecting portion is a narrow via that penetrates the bottom of the insulating layer. The second connection portion is a wide trench in the surface portion that interconnects the vias. After metal deposition, a chemical mechanical polishing (CMP) is performed that removes the relatively soft copper exposed on the insulator oxide but stops on the harder oxide. As a result, the upper copper filled trenches, similar to the adjacent lower layer conductive features 112, are isolated from each other. The copper filled trench functions as a horizontal wiring between vias filled with the copper. The combination of dual damascene and CMP eliminates the need to etch copper. Multi-layer structures and etch sequences have progressed for dual damascene, and other metallization structures have similar manufacturing requirements.

  [009] Backing and filling via holes and similar high aspect ratio structures that occur in dual damascenes pose ongoing challenges as their aspect ratios continue to increase. An aspect ratio of 4: 1 is common and the value will increase further. The aspect ratio used herein is defined as the ratio of the depth of the hole to the narrowest width of the hole, usually close to the top surface. A via width of 0.18 μm is also common and the value will be further reduced. In the case of advanced copper wiring formed in an oxide insulator, the formation of the barrier layer tends to be clearly insulated from the nucleation layer and seed layer. The diffusion barrier may be formed of a double layer consisting of Ta / TaN, W / WN or Ti / TiN or other structures. A barrier thickness of 10-50 nm is common. In the case of copper interconnects, it has been found practical to deposit one or more copper layers to satisfy the nucleation and seed functions.

[0010] The deposition of the liner layer or metallization by conventional physical vapor deposition (PVD), also called sputtering, is relatively fast. The DC magnetron sputtering reactor has a target made of metal to be sputter deposited and driven by a DC power source. The magnetron scans around the back of the target and projects its magnetic field into a portion of the reactor to increase the plasma density and thereby increase the sputtering rate. However, conventional DC sputtering (which will be referred to as PVD as opposed to other types of sputtering to be introduced) mainly sputters neutral atoms. The general ion density in PVD is 10 ⁹ cm ⁻³ or less. PVD also tends to sputter atoms with a wide angle distribution, and generally has cosine dependence around the target normal. Such a high distribution can be disadvantageous for filling deep and narrow via holes 122 as shown in FIG. 2 where a barrier layer 124 has already been deposited. Multiple off-angle sputtered particles can preferentially deposit layer 126 around the upper corner of hole 122 and form overhang 128. Large overhangs may further limit entry into the hole 122 and result in poor coverage of the sidewalls 130 and bottom 132 of the hole 122. The overhang 128 may also bridge the hole 122 before it is filled and before the void 134 is formed in the metallization in the hole 122. Once void 134 is formed, it is difficult to reflow the metallization by heating the metallization to near its melting point. Even small voids can cause reliability problems. For example, if a second metallization deposition step, such as electroplating, is planned, the bridged overhang makes continuous deposition more difficult.

  [0011] One approach to improving the above overhang problem is long throw sputtering, where the sputtering target is relatively remote from the wafer or other substrate that is sputter coated. For example, the distance from the target to the wafer can be at least 50%, preferably 90% or more, more preferably 140% or more of the wafer diameter. As a result, the off-angle portion of the sputtering distribution is preferentially directed to the chamber wall, while the central angle portion remains substantially directed to the wafer. The cut angular distribution can cause most of the sputtered particles to be directed deep into the hole 122 and reduce the size of the overhang 128. Similar effects can be implemented by placing a collimator between the target and the wafer. Since the collimator has a large number of holes with a high aspect ratio, sputtered particles out of the angle tend to collide with the side wall of the collimator, and particles with a central angle tend to pass through. Both long throw targets and collimators generally attempt to reduce the sputtered particle bundle reaching the wafer and thus reduce the sputter deposition rate. This reduction becomes more pronounced when the throw becomes longer or the collimation becomes tight to adapt the via hole for an increase in aspect ratio.

  [0012] Also, the length by which long throw sputtering can be increased may be limited. At argon pressures of a few millitorr commonly used in PVD sputtering, the distance from the target to the wafer increases, so there is a very large potential for argon to scatter the sputtered particles. That is, the geometric selection of the front particles may be reduced. Yet another problem with long throw and collimation is that reduced metal bundles result in longer deposition periods that not only reduce throughput, but also tend to increase the maximum temperature to which the wafer is exposed during sputtering. There is a possibility. Furthermore, long throw sputtering can reduce overhangs and can achieve good coverage at the middle and upper side of the side wall, but the bottom side and bottom coverage is never satisfactory. is not.

[0013] Another technique for deep hole lining and filling is sputtering using high-density plasma (HDP) in a sputtering process, called ionized metal plating (IMP). is there. A typical high density plasma is a plasma having an average plasma density throughout the plasma of at least 10 ¹¹ cm ⁻³ , preferably at least 10 ¹² cm ⁻³ , except for the plasma sheath. In IMP deposition, separate plasma source regions are formed in regions away from the wafer, for example, by inductively coupling RF power to the plasma from an electrical coil that covers the plasma source region between the target and the wafer. The The plasma generated in this way is called inductively coupled plasma (ICP). An HDP chamber having this configuration is available as an HDP PVD reactor from Applied Materials, Inc., Santa Clara, California. Other HDP sputter reactors can also be used. The higher power not only ionizes the argon working gas, but also significantly increases the ionization of the sputtered atoms, ie, generates metal ions. The wafer is self-charged to a negative potential or RF biased to control its DC potential. As the metal ions approach the negatively biased wafer, they are accelerated across the plasma sheath. As a result, the angular distribution of the ions peaks in the forward direction so that the ions are deeply drawn into the via hole. Overhang is not a significant problem in IMP sputtering, and the bottom coverage and bottom sidewall coverage is relatively high.

  [0014] IMP sputtering using a remote plasma source is typically performed at a high pressure of 30 millitorr or higher. Higher pressure and high density plasma can generate a great deal of argon ions, which are also accelerated across the plasma sheath against the surface to be sputter deposited. The argon ion energy is often dissipated as heat directed to the film being formed. Copper can be dewetted from tantalum nitride and other barrier materials at the high temperatures exposed in IMP and even at 50-70 degrees. Furthermore, argon tends to be embedded in the film being produced. The IMP can deposit a copper film as shown at 136 in the cross-sectional view of FIG. 3, having a rough or discontinuous surface morphology. In such a case, such a film may not promote hole filling, especially when the liner is used as an electrode for electroplating.

  [0015] Another method for depositing material material is described in Fu et al. In US patent application Ser. No. 08 / 854,008 filed May 8, 1997, and also filed August 12, 1999. Sustained self-sputtering (SSS), as described by Fu in US Pat. No. 6,183,614 B1, which is incorporated herein in its entirety. For example, sufficiently high density copper ions are generated at a sufficiently high plasma density near the copper target, and the copper ions resputter the copper target with a yield that exceeds uniformity. Thus, the supply of argon working gas can be eliminated or at least reduced to a very low pressure and the copper plasma is sustained. Aluminum is believed not to be sensitive to SSS. Other material substances such as Pd, Pt, Ag and Au can withstand SSS.

  [0016] Depositing copper or other metals by sustained self-sputtering of copper has many advantages. The sputtering rate in SSS tends to be high. There are a few copper ions that can be accelerated across the plasma sheath and against the biased wafer, which increases the directivity of the sputter flow. The chamber pressure, which can be limited by backside cooling gas leakage, can be very low, thereby reducing wafer heating from argon ions and reducing metal particle scattering by argon.

  [0017] Techniques and reactor structures have been improved to promote sustained self-sputtering. Despite the benefits from those same techniques and structures, due to the semi-uniform resputtering yield, perhaps due to partial self-sputtering that produces a partial self-ionized plasma (SIP), It has been recognized that some sputter materials do not subject SSS. In addition, even if SSS without the need for any argon working gas is feasible, it may be advantageous to sputter copper at a low but limited argon pressure. That is, SIP sputtering is a preferred term for a more comprehensive sputtering process that includes a reduced or zero pressure working gas such that SSS is a type of SIP. SIP sputtering has already been described by Fu et al. In US Pat. No. 6,290,825, and by Chiang et al. In US patent application Ser. No. 09 / 414,614 filed Oct. 8, 1999. Both of which are incorporated herein in their entirety.

  [0018] SIP sputtering utilizes various modifications to a conventional capacitively coupled magnetron sputter reactor that generates a high density plasma (HDP) adjacent to the target and expands the plasma to guide metal ions toward the wafer. . In the case of a chamber designed for a 200 mm wafer, a relatively high DC power, for example 20-40 kW, is applied to the target. In addition, the magnetron has a relatively small area so that the target power is concentrated in a smaller area of the magnetron, which increases the power density applied to the HDP area adjacent to the magnetron. To do. This small area magnetron is located near the center of the target and is rotated around the center to allow more uniform sputtering and deposition.

  [0019] In certain types of SIP sputtering, the magnetron has unbalanced poles, and in general, one strong polar pole with one polarity and a weak inner pole with the other. Surrounding. Magnetic field lines emanating from strong poles can be broken down into a vertical magnetic field extending towards the wafer as well as a conventional horizontal magnetic field adjacent to the target surface. The perpendicular magnetic field lines extend the plasma towards the wafer and guide the metal ions towards the wafer. In addition, vertical magnetic field lines proximate to the chamber walls act to prevent diffusion of electrons from the plasma to the grounded shield. Reduced electron loss is particularly effective in increasing the plasma density and in spreading the plasma across the processing space.

  [0020] SIP sputtering may be performed without using an RF induction coil. The small HDP region is sufficient to ionize some of the metal ions estimated to be 10-25%, which effectively sputter coats deep holes. Particularly in the highly ionized portion, the ionized and sputtered metal atoms are attracted to the target and sputter another metal atom. As a result, the argon working pressure can be reduced without plasma decay. Therefore, argon heating of the wafer is not a problem, and the possibility of metal ions colliding with argon atoms is reduced, thereby reducing the ion density and making the metal ion sputtering pattern optional.

  [0021] Another advantage of the unbalanced magnetron used for SIP sputtering is that the magnetic field from the strong outer annular pole projects deep into the plasma processing region toward the wafer. This protruding magnetic field has the advantage of maintaining a strong plasma in the majority of the plasma processing region and guiding ionized sputtered particles towards the wafer. Wei Wang covered most of the plasma processing region in order to generate a magnetic field component extending from the target to the wafer in US patent application Ser. No. 09 / 612,861 filed Jul. 10, 2000. The use of a coaxial electromagnetic coil is disclosed. The magnetic coil combines SIP sputtering with a long throw sputter reactor, ie a reactor with a larger space between the target and the wafer, so that the auxiliary magnetic field maintains the plasma and guides the ionized sputtered particles. It is especially effective when. Lai, in US Pat. No. 5,593,551, discloses a smaller coil near the target.

  [0022] However, SIP sputtering can be further improved. One of the fundamental problems is the limited number of variables that can be used in optimizing the magnetic field configuration. The magnetron should be small in order to maximize the power density of the target, but the target needs to be sputtered uniformly. The magnetic field should have a strong horizontal component adjacent to the target in order to maximize the electrons trapped therein. Certain components of the magnetic field should protrude from the target towards the wafer to guide the ionized sputtered particles. The Wang coaxial magnetic coil addresses only some of these problems. The horizontally arranged permanent magnet disclosed by Lai in US Pat. No. 5,593,551 deals with this effect poorly.

  [0023] The metal is a chemical compound using an organometallic precursor such as Cu-HFAC-VTMS, available from Schumacker, in a mixture with an exclusive additive, under the trade name CupraSelect. It can also be deposited by chemical vapor deposition (CVD). A thermal CVD process can be used with this precursor, as is well known in the art, but plasma enhanced CVD (PECVD) is also possible. The CVD process can deposit a nearly equiangular film even in high aspect ratio holes. For example, the film can be deposited as a thin seed layer by CVD, after which PVD or other methods may be utilized for final hole filling. However, CVD copper seed layers are known to be rough. This roughness can impair its use as a seed layer, and more specifically as a reflow layer that promotes low temperature reflow after copper deposition in the deep hole. The roughness also indicates that a relatively thick CVD copper layer on the order of 50 nm needs to reliably cover a continuous seed layer. For the narrow via hole considered here, a constant thickness of the CVD copper seed layer may substantially fill the hole. However, complete filling performed by CVD has the disadvantage of center seams that can adversely affect device reliability.

  [0024] Another combinatorial technique uses IMP sputtering, sometimes referred to as flash deposition, to deposit a thin copper nucleation layer, and a thick CVD copper seed layer is deposited over the IMP layer. However, as shown in FIG. 3, the IMP layer 136 can be rough, and the CVD layer tends to conform to the rough substrate in an equiangular manner. That is, the CVD layer covering the IMP layer also tends to be rough.

  [0025] Electrochemical plating (ECP) is yet another copper deposition technology under development. In this method, the wafer is immersed in a copper electrolyte bath. The wafer is electrically biased with respect to the bath and copper is electrochemically deposited on the wafer in a common conformal process. An electroless plating method can also be used. Electroplating and related processes are advantageous because they can be performed at atmospheric pressure with simple equipment, their deposition rates are fast, and liquid processing is consistent with subsequent chemical mechanical polishing.

  [0026] However, electroplating imposes its own requirements. The seed and adhesion layer is typically formed on the top surface of a barrier layer made of Ta / TaN, for example, to form electroplated copper nuclei and adhere to the barrier material. Furthermore, the generally insulating structure surrounding the via hole 122 requires that an electroplated electrode be formed between the insulating layer 114 and the via hole 122. Tantalum and other barrier materials are generally relatively weak electrical conductors, and the normal nitride sublayer of the barrier layer 124 opposite the via hole 122 (including the copper electrolyte) is required in electroplating. Conductivity is small for long lateral current paths that are generated. That is, a good conductive seed and adhesion layer may be deposited to facilitate electroplating that effectively fills the bottom of the via hole.

  [0027] A copper seed layer deposited over the barrier layer 124 is typically used as an electroplating electrode. However, a continuous, smooth and uniform film is preferred. Otherwise, the electroplating current will be directed only to the copper coated area or will be preferentially directed to the thick copper coated area. Depositing the copper seed layer presents its own difficulties. The seed layer deposited by IMP can achieve good bottom coverage in high aspect ratio holes, but its sidewall coverage can be small, resulting in a rough or poor thin film. May be continuous. Thin CVD deposition seeds can also become too rough. A thick CVD seed layer, or CVD copper over IMP copper, may require an excessively thick seed layer to achieve the desired continuity. The electroplating electrode mainly acts on the entire hole sidewall so that high sidewall coverage is desired. Long throws provide adequate sidewall coverage, but the bottom coverage may not be sufficient.

  [0028] One embodiment of the present invention provides a combination of long throw sputtering, self-ionized plasma (SIP) sputtering, inductively coupled plasma (ICP) resputtering, and coil sputtering in a single chamber, such as tantalum or tantalum nitride. The liner material is focused on sputter deposition. Long throw sputtering is characterized by a relatively high ratio between the target-substrate distance and the diameter of the substrate. Long throw SIP sputtering promotes deep hole coverage of both ionized and neutral deposition material components. ICP resputtering can reduce the contact resistance by reducing the thickness of the bottom of the layer covering deep holes. During ICP resputtering, ICP coil sputtering can deposit a protective layer, particularly on areas that are adjacent to hole openings where thinning by resputtering is undesirable.

  [0029] Another embodiment of the present invention focuses on sputter depositing interconnect materials such as copper by combining long throw sputtering, self-ionized plasma (SIP) sputtering and SIP resputtering in one chamber. doing. Long throw SIP sputtering also promotes deep hole coverage of both ionized and neutral copper components. SIP resputtering can redistribute deposition to provide good bottom corner coverage of deep holes.

  [0030] SIP tends to be promoted by low pressures of 5 millitorr or less, preferably 2 millitorr or less, more preferably 1 millitorr or less. In particular, SIP at those low pressures is facilitated by a magnetron having a relatively small area, thereby increasing the power density of the target, and by a magnetron having an asymmetric magnet that penetrates the magnetic field to a distant substrate. There is a tendency to be promoted. Such a process can be used to deposit a seed layer to promote subsequent nucleation or seeding of the deposited layer, which is particularly useful for forming narrow and deep vias or contacts through the insulating layer. Can do. Another layer may be deposited by electrochemical plating (ECP). In other embodiments, the other layer is deposited by chemical vapor deposition (CVD).

  [0031] One embodiment includes an auxiliary magnet array in a magnetron sputter reactor disposed around the chamber proximate to the wafer and having a first vertical magnet polarity. The magnet may be either a permanent magnet or an array of electromagnets having a coil axis along the central axis of the chamber.

  [0032] In one embodiment, a rotatable magnetron having a strong outer pole of a first magnetic polarity surrounds a weak pole of opposite polarity. The auxiliary magnet is preferably arranged in half of the processing space near the wafer in order to pull the unbalanced portion of the magnetic field from the outer pole towards the wafer.

  [0033] Resputtering in a SIP chamber can be facilitated in multiple steps, and in one embodiment, the wafer bias is increased during deposition. Alternatively, power to the target can be reduced during deposition to redistribute deposition to the bottom corners of vias and other holes.

  [0034] There are additional aspects to the present invention, as described below. Thus, it should be understood that the foregoing is only a summary of some embodiments and aspects of the present invention. Additional embodiments and aspects of the invention are described below. Further, it should be understood that many variations on the disclosed embodiments are possible without departing from the spirit or scope of the invention. Accordingly, the above summary is not meant to limit the scope of the invention. The scope of the invention should be determined only by the appended claims and their equivalents.

1 is a cross-sectional view of a via filled with metallization that also covers the top surface of an insulator, implemented in the prior art. FIG. 6 is a cross-sectional view of a via during filling with metallization that overhangs and seals over the via hole. FIG. 6 is a cross-sectional view of a via having a coarse seed layer deposited by ionized metal plating. 1 is a schematic view of a sputtering chamber that can be used with embodiments of the present invention. FIG. FIG. 5 is a schematic diagram of electrical wiring of various components of the sputtering chamber of FIG. 4. 1 is a cross-sectional view of a via liner and metallization and a process of forming a via liner and metallization according to an embodiment of the present invention. 1 is a cross-sectional view of a via liner and metallization and a process of forming a via liner and metallization according to an embodiment of the present invention. 1 is a cross-sectional view of a via liner and metallization and a process of forming a via liner and metallization according to an embodiment of the present invention. 1 is a cross-sectional view of a via liner and metallization and a process of forming a via liner and metallization according to an embodiment of the present invention. 1 is a cross-sectional view of a via liner and metallization and a process of forming a via liner and metallization according to an embodiment of the present invention. 1 is a schematic cross-sectional view of a sputtering reactor including an auxiliary magnet array according to the present invention. It is a bottom view of the upper magnetron in the sputtering reactor of FIG. FIG. 6 is an orthographic view of an embodiment of an assembly supporting an auxiliary magnet array. It is a schematic sectional drawing of the sputter | spatter reactor in which an auxiliary magnet array contains the array which consists of an electromagnet. It is sectional drawing of the via seed layer which concerns on one Embodiment of this invention, and a via seed layer formation process. It is sectional drawing of the via seed layer which concerns on one Embodiment of this invention, and a via seed layer formation process. FIG. 3 is a schematic diagram of another sputtering chamber that can be used with the present invention. FIG. 16 is an exploded view of a portion of FIG. 15 showing the target, shield, insulator and target O-ring in detail. It is a graph which shows the relationship between the length of a floating shield, and the minimum pressure which maintains a plasma. It is sectional drawing of the via metallization which concerns on another embodiment of this invention. FIG. 6 is a graph plotting ion current flowing through a wafer for two different magnetrons and different operating conditions. FIG. 6 is a graph plotting ion current flowing through a wafer for two different magnetrons and different operating conditions. It is sectional drawing of the via metallization which concerns on other embodiment of this invention. It is sectional drawing of the via metallization which concerns on other embodiment of this invention. FIG. 5 is a flow diagram of a plasma ignition sequence for reducing wafer heating. FIG. 6 is a cross-sectional view of via metallization formed according to a process according to another embodiment of the invention. FIG. 3 is a schematic view of a sputtering chamber according to another embodiment of the present invention. FIG. 26 is a schematic representation of the electrical wiring of various components of the sputtering chamber of FIG. 25. On the other hand, it is the schematic of the integrated processing apparatus which can implement this invention.

  [0036] The distribution between sidewall coverage and bottom coverage in a DC magnetron sputtering reactor can be adjusted to form a metal layer, such as a liner layer, having a desired cross-section in holes or vias in the insulating layer. it can. SIP films sputter deposited in high aspect ratio vias can have advantageous upper sidewall coverage and are not prone to overhang. If desired, the bottom coating may be thinned or eliminated by ICP resputtering of the bottom of the via. According to one aspect of the present invention, the advantages of both sputterings can be obtained in a reactor that combines selected aspects of both SIP and ICP plasma generation methods that may be separate steps. An example of such a reactor is shown at 150 in FIG. Also, the upper portion of the liner layer sidewall may be protected from resputtering by sputtering ICP coil 151 disposed in the chamber to place the coil material on the substrate.

  [0037] The reactor 150 can also be used to sputter deposit a metal layer, such as a barrier or liner layer, preferably alternatively using a combination of SIP and ICP generated plasma. The distribution between the ionized atom flow and the neutral atom flow in the DC magnetron sputtering reactor can be adjusted to form a coating in the holes or vias in the insulating layer. As described above, a SIP film sputter deposited in a high aspect ratio hole can have advantageous upper sidewall coverage and is not prone to overhang. On the other hand, the plasma generated by ICP can increase metal ionization such that films sputter deposited in such holes have good bottom coverage and bottom corner coverage. In accordance with yet another aspect of the present invention, the advantages of both types of sputtering can be obtained in a reactor, such as reactor 150, that combines selected aspects of both deposition techniques. Further, the coil material can be sputtered so as to contribute to the deposited layer as required.

  [0038] Reactor 150 and various processes for forming liners, barriers and other layers are described in pending US patent application Ser. No. 10 / 202,778, filed Jul. 25, 2002 (Attorney Directory). No. 4044), which is incorporated herein in its entirety. As described in that application, the reactor 150 in the illustrated embodiment is a DC magnetron reactor based on a modification of the Endura PVD reactor available from Applied Materials, Inc., Santa Clara, California. The reactor is typically a vacuum chamber 152 that is electrically grounded and sealed by a target isolator 154 against a PVD target 156 made of metal and having at least a surface portion of material material to be sputter deposited on a wafer 158. including. Although the sputtering surface of the target is shown as flat in the figure, it will be appreciated that the sputtering surface of the target may have a variety of shapes including arched and cylindrical. The wafer may be of various sizes including 150, 200, 300 and 450 mm. The illustrated reactor 150 is capable of self-ionized sputtering (SIP) in a long throw mode. This SIP mode can be used in one embodiment where the coating is primarily directed to the sidewall of the hole. The SIP mode can also be used to achieve good bottom coverage.

  [0039] The reactor 150 also has an RF coil 151 that inductively couples RF energy into the interior of the reactor. The RF energy generated by the coil 151 ionizes a precursor gas such as argon and uses the ionized argon on the thin bottom coating to maintain the plasma to resputter the deposited layer, or The sputtered deposited material is ionized to improve bottom coverage. In one embodiment, for a high density IMP process, the plasma should be maintained at a relatively high pressure, such as 20-60 mTorr, which is preferably at a sufficiently low pressure, eg, tantalum nitride. 1 mTorr for deposition, or 2.5 mTorr for tantalum deposition. However, depending on the application, a pressure in the range of 0.1 to 40 mTorr is appropriate. Accordingly, the ionization rate in reactor 150 is generally considered to be significantly lower than the ionization rate of high density IMP processes. This plasma can be used to resputter the deposited layer, or to ionize the sputtered deposited material, or both. In addition, the coil 151 itself may be used to form a protective coating on the wafer during resputtering of the material deposited on the wafer, or for areas where deposition material thinning is not desired. Can be sputtered to provide a typical deposition material.

  [0040] In one embodiment, good top sidewall coverage and bottom corner coverage is such that little RF power is applied to the coil or no RF power is applied to the coil in one step. It can be realized in a multi-step process. That is, in one step, ionization of the sputtered target deposition material occurs primarily as a result of self-ionization. As a result, it is considered that good upper side wall coverage can be realized. In the second step, and preferably in the same chamber, RF power is applied to the coil 151, low power is applied to the target, or no power is applied to the target. In this embodiment, little material is sputtered from the target 156, or no material is sputtered from the target, and ionization of the precursor gas is primarily as a result of RF energy inductively coupled by the coil 151. Get up. ICP plasma is poured to thin or eliminate the bottom coating by etching or resputtering to reduce the resistance of the barrier layer at the bottom of the hole. The coil 151 may be sputtered to deposit a protective material when thinning is not desired. In one embodiment, the pressure may be kept relatively low so that the plasma density is relatively low to reduce ionization of the sputtered deposited material from the coil. As a result, the sputtered coil material can remain sufficiently neutral so that it is deposited primarily on the upper sidewall and protects that portion from thinning.

  [0041] Because the illustrated reactor 150 is capable of self-ionized sputtering, the deposited material can be ionized not only as a result of the plasma sustained by the RF coil 151, but also by sputtering of the target 156 itself. If it is desired to deposit a layer with good bottom coverage, a combined ionization process with SIP and ICP will provide sufficient ionization material for good bottom coverage and bottom corner coverage. Conceivable. However, it is also believed that the low ionization rate of the low pressure plasma generated by the RF coil 151 can leave enough neutral sputter material unionized to be deposited on the upper sidewall. That is, it is believed that a combination of ionized deposition material sources can achieve good top sidewall coverage and good bottom and bottom corner coverage, as will be described in more detail below.

  [0042] In an alternative embodiment, good top sidewall coverage, and good bottom coverage and bottom corner coverage are such that little RF power is applied to the coil in one step, or the It can be realized in a multi-step process where no RF power is applied to the coil. That is, in one step, the ionization of the deposited material will occur primarily as a result of self-ionization. As a result, it is considered that good upper side wall coverage can be realized. RF power may be applied to the coil 151 in the second step, and preferably in the same chamber. Also, in one embodiment, the pressure can be increased sufficiently to maintain a high density plasma. As a result, it is considered that good bottom coverage and bottom corner coverage can be realized in the second step.

  [0043] The wafer clamp 160 holds the wafer 158 on the pedestal electrode 162. Resistive heaters, coolant channels and heat transfer gas cavities in the pedestal 162 allow the temperature of the pedestal to be controlled to a temperature below -40 ° C., thereby allowing the temperature of the wafer to be similarly controlled. Can be provided.

  [0044] In order to achieve deeper hole coverage using partially neutral flow, the distance between the target 156 and the wafer 158 can be increased to operate in the long throw mode. In use, the spacing between the target and the substrate is usually greater than half the aperture of the substrate. In an exemplary embodiment, the spacing is preferably 90% or more of the wafer diameter (eg, 190 mm for a 200 mm wafer, 290 mm for a 300 mm wafer), but more than 100% and 140% or more of the substrate diameter. Including an interval of 80% or more is considered appropriate. For most applications, a target-wafer spacing of 50-1000 mm is considered appropriate. Long throws in conventional sputtering reduce the sputtering deposition rate, but ionized sputtered particles do not have such a significant reduction.

  [0045] A dark space shield 164 and a chamber shield 166 insulated by the second insulation shield isolator 168 are retained in the chamber 152 to protect the chamber wall 152 from sputtered material. In the illustrated embodiment, dark space shield 164 and chamber shield 166 are both grounded. However, in some embodiments, it may float or be biased to a non-ground level. The chamber shield 166 also acts as an anode ground plane opposite the cathode target 156, thereby capacitively supporting the plasma. If the dark portion can be electrically floated, several electrodes can be deposited on the dark portion shield 164 so that negative charges accumulate there. The negative potential not only prevents further electrons from accumulating, but can also confine the electrons in the main plasma region, thereby reducing electron loss and low pressure sputtering, if necessary. It is thought that the plasma density can be increased while maintaining the temperature.

  [0046] The coil 151 is mounted on the shield 164 by a plurality of coil standoffs 180 that electrically insulate the coil 151 from the support shield 164. The standoff 180 also allows repeated deposition of conductive material from the target 110 to the coil standoff 180 and may short the coil 151 to the (generally grounded) shield 164. It has a labyrinth path that prevents the formation of a complete conductive path from the coil 151 of deposited material to the shield 164.

  [0047] In order to allow the coil to be used as a circuit path, RF power is passed through the vacuum chamber wall and through the shield 164 to the end of the coil 151. A vacuum feedthrough (not shown) preferably extends through the vacuum chamber to supply RF current from a generator disposed outside the vacuum pressure chamber. RF power passes through the shield 164 and, like the coil standoff 180, a maze that prevents the formation of a path of deposited material from the coil 151 to the shield 164 that can short the coil 151 to the shield 164. It is applied to the coil 151 by a feedthrough standoff 182 (FIG. 5) having a shaped path.

  [0048] The plasma dark space shield 164 is generally cylindrical in shape. The plasma chamber shield 166 is generally cup-shaped and includes a generally cylindrical shaped, vertically oriented wall 190 to which standoffs 180 and 182 are attached to insulate and support the coil 151.

  [0049] FIG. 5 is a schematic diagram illustrating the electrical connections of the plasma generator of the illustrative embodiment. In order to attract ions generated by the plasma, the target 156 is preferably biased to a negative potential by a variable DC power source 200, for example, with a DC power of 1-40 kW. The power supply 200 biases the target 156 to a negative potential about −400 to −600 VDC relative to the chamber shield 166 to ignite and sustain the plasma. A target power of 1-5 kW is typically used to ignite the plasma, and a power of 10 kW or higher is preferred for SIP sputtering as described herein. For example, a target power of 24 kW can be used to deposit tantalum nitride by SIP sputtering, and a target power of 20 kW can be used to deposit tantalum by SIP sputtering. During ICP resputtering, the target power may be reduced to 100-200 watts, for example, to maintain plasma uniformity. Alternatively, the target power may be maintained at a high level if sputtering of the target during ICP resputtering is desired, or may be turned off as needed.

  [0050] The pedestal 162 and the wafer 158 may remain electrically floating, but a negative DC self-bias may be applied. Alternatively, the pedestal 162 may be biased to a negative potential at −30 vDC by the power source 202 to bias the substrate 158 to a negative potential to attract ionized deposition material to the substrate. Another embodiment may add an RF bias to the pedestal 162 to further control the negative DC bias generated for the pedestal. For example, the bias power source 202 may be an RF power source that operates at 13.56 MHz. In the case of a 200 mm wafer in the SIP deposition, for example, RF power of 10 W to 5 kW, more preferably 150 to 300 W can be supplied.

  [0051] One end of the coil 151 is insulatively coupled to an RF power source, such as the output of an amplifier and matching network 204, through a shield 166 by a feedthrough standoff 182. The input of the matching network 204 is coupled to an RF generator 206 that supplies RF power on the order of 1 or 1.5 kW for ICP plasma generation in this embodiment. For example, a power of 1.5 kW is preferred for tantalum nitride deposition and a power of 1 kW for tantalum deposition. A preferred range is 50 W to 10 kW. During SIP deposition, the RF power to the coil may be turned off as needed. Alternatively, RF power may be supplied during SIP deposition as needed.

  [0052] The other end of the coil 151 is also grounded through a shield 166 with a similar feedthrough standoff 182 and preferably through a blocking capacitor 208 which may be a variable capacitor that supports DC bias for the coil 151. Insulatively coupled. The DC bias and coil sputtering rate for the coil 151 can be controlled by a DC power supply 209 coupled to the coil 151 as described in US Pat. No. 6,375,810. Suitable DC power ranges for ICP plasma generation and coil sputtering include 50 W to 10 kW. A preferred value during coil sputtering is 500W. The DC power to coil 151 may be turned off during SIP deposition, if desired.

  [0053] The power levels described above may naturally vary depending on the particular application. The computer-based controller 224 can be programmed to control the power levels, voltages, currents and frequencies of various sources according to the particular application.

  [0054] The RF coil 151 may be placed relatively low in the chamber so that the material material sputtered from the coil has a low angle of incidence when it strikes the wafer. Therefore, the coil material can be preferentially deposited on the upper corners of the holes so as to protect the upper corners of the holes when the bottom of the holes are resputtered by ICP plasma. In the illustrated embodiment, if the primary function of the coil is to generate plasma for resputtering the wafer and to form a protective coating during resputtering, the coil is It is preferable to arrange the wafer closer to the wafer than the target. For most applications, an appropriate distance between the coil and the wafer is considered to be 0-500 mm. However, it is recognized that the actual position will vary depending on the particular application. In applications where the main function of the coil is to generate plasma for ionizing the deposited material, the coil may be placed close to the target. Also filed July 10, 1996 (Attorney Registration Number 1390-CIP / PVD / DV) and assigned to the assignee of the present application and entitled “Sputtering Coil for Generating Plasma”. As described in detail in US Pat. No. 6,368,469, the RF coil can also be arranged to improve the uniformity of the deposited layer by the sputtered coil material. In addition, the coil may have a plurality of windings formed in a helix or spiral, or a single winding or number to reduce complexity and cost and facilitate cleaning. You may have windings of turns.

  [0055] Various coil support standoffs and feedthrough standoffs can be used to insulatively support the coil. In particular, since the sputtering at high power levels associated with SSS, SIP, and ICP involves high voltages, insulating isolators typically insulate members of different biases. As a result, it is desirable to protect such isolators from metal deposition.

  [0056] The internal structure of the standoff is preferably entitled “Coil and Coil Support for Generating Plasma” filed on Feb. 29, 2000 and assigned to the assignee of the present application. , As described in detail in co-pending application 09 / 515,880. The coil 151 directly exposed to the plasma and such part of the standoff are preferably formed of the same material that is deposited. That is, when the material material to be deposited is made of tantalum, the outer portion of the standoff is preferably made of tantalum. In order to facilitate deposition material deposition, the exposed surface of the metal may be treated with bead blasting to reduce the divergence of the particles from the deposition material. In addition to tantalum, the coil and target can be formed from a variety of deposition materials including copper, aluminum, and tungsten. The labyrinth path should be formed so as to prevent the formation of a complete conductive path from the coil to the shield. Such a conductive path may be formed when a conductive deposition material is deposited on the coil and standoff. It should be appreciated that other sizes, shapes and numbers of maze-like passages are possible depending on the particular application. Factors affecting the design of the maze include the type of material material to be deposited and the desired number of deposits before the standoff requires cleaning or replacement. A suitable feedthrough standoff can be similarly configured except that RF power is applied to a bolt or other conductive member extending through the standoff.

  [0057] The coil 151 may have overlapping but spaced ends. In this configuration, the feedthrough standoff 182 for each end may overlap in a direction parallel to the central axis of the plasma chamber between the vacuum chamber target 156 and the substrate holder 162, as shown in FIG. Good. As a result, the RF path from one end of the coil to the other end of the coil can be overlapped to avoid gaps on the wafer. Such an overlap configuration may be used to generate plasma as described in co-pending application 09 / 039,695 filed March 16, 1998 and assigned to the assignee of the present application, It is believed that ionization and deposition uniformity can be improved.

  [0058] A support standoff 180 may be disposed around the remainder of the coil to allow proper support. In the illustrated embodiment, each of the coils has three hub members 504 disposed on the outer surface of each coil at intervals of 90 degrees. It should be appreciated that the number and spacing of the standoffs may vary depending on the particular application.

  [0059] The coils 151 of the illustrated embodiment are each formed from a 2 inch x 1/4 inch high durability bead blasted tantalum or copper ribbon formed in a single turn coil. However, other highly conductive materials and shapes may be used. For example, the thickness of the coil may be reduced to 1/16 inch and the width may be increased to 2 inches. A hollow tube can also be used, particularly when water cooling is desired.

  [0060] Suitable RF generators and matching circuits are components well known to those skilled in the art. For example, an RF generator such as the ENI Genesis series that has the ability to look for a frequency for the best frequency matching with the matching circuit and antenna is suitable. The frequency of the generator that generates the RF power to the coil is preferably 2 MHz, but the range can be A.E. C. It is anticipated that there may be changes in frequency and non-RF frequencies. These components can be controlled by a programmable controller 224.

  [0061] Returning to FIG. 4, the bottom cylindrical portion 296 of the chamber shield 166 continues to a recessed portion on the top back of the pedestal 162 that supports the wafer 158. The chamber shield 166 then approaches the height of the wafer 158, radially inward in the cup-shaped portion 302 and vertically upward in the innermost cylindrical portion 151, but radially outward of the pedestal 162. Are separated.

  [0062] The shields 164, 166 are generally constructed of stainless steel, and their inner sides are bead blasted, or otherwise, to promote adhesion of the material sputter deposited on the inner side. You may roughen. However, at some point during long sputtering, the deposited material is deposited to a thickness that is easy to peel off, producing harmful particles. Before reaching this point, the shield should be cleaned or replaced with a new one. However, the more expensive isolators 154, 168 need not be replaced during most maintenance periods. Furthermore, the maintenance period is determined by the peeling of the shield, not the electrical short of the isolator.

[0063] The gas source 314 supplies a sputtering working gas, typically a chemically inert argon gas, to the chamber 152 via the mass flow controller 316. The working gas passes through the bottom of the shielded chamber shield 166 or through the opening through the spacing 318 between the chamber shield 166, wafer clamp 160 and pedestal 162, by one or more inlet pipes at the top of the chamber. Alternatively, as shown, the bottom can be entered. A vacuum pump device 320 connected to the chamber 152 via a wide pumping port 322 maintains the chamber at a low pressure. The base pressure can be maintained at or below about ^10-7 Torr, but the working gas pressure is typically about 1-1000 millitorr in conventional sputtering and about 5 millitorr in SIP sputtering. Maintained below. A computer-based controller 224 controls the reactor including the DC target power source 200, the bias power source 202, and the mass flow controller 316.

  [0064] A magnetron 330 is placed behind the target 156 to enable effective sputtering. The magnetron is connected to a magnetic yoke 336 and has opposing magnetic pole magnets 332 and 334 supported by the yoke. The magnet creates a magnetic field near the magnetron 330 in the chamber 152. The magnetic field traps electrons and when the charge is neutral, the ion density also increases to form a dense plasma region 338. The magnetron 330 is typically rotated around the center 340 of the target 156 by a motor driven shaft 342 to achieve complete coverage of the target 156 during sputtering. In order to achieve a high density plasma 338 with sufficient ionization density that allows sustained self-sputtering, the power density supplied to the region near the magnetron 330 can be increased. This is done by increasing the power level supplied from the DC power source 200, as described by Fu and Chiang in the above cited patents, and for example, making the region of the magnetron 330 into a triangle or racetrack shape. It can be realized by reducing. A 60 degree triangular magnetron rotated with its tip approximately aligned with the center 340 of the target always covers only about 1/6 of the target. For commercially available reactors capable of SIP sputtering, 1/4 coverage is the preferred maximum.

  [0065] In order to reduce the loss of electrons, the inner pole and pole face represented by the inner magnet 332 should not have a substantial number of apertures, and by the continuous outer pole and pole face represented by the outer magnet 334. Should surround. Further, in order to guide the ionized sputtered particles to the wafer 158, the outer pole should generate a much higher magnetic flux than the inner pole. The spreading magnetic field lines trap electrons and thus extend the plasma close to the wafer 158. The ratio of magnetic flux should be at least 150%, preferably 200% or more. The two embodiments of the Fu triangular magnetron have 25 outer magnets and 6 or 10 inner magnets of the same strength but opposite polarity. Although shown with a flat target surface, it will be appreciated that a variety of unbalanced magnetrons can be used with a variety of target shapes that produce a self-ionized plasma. The magnet may have a shape other than a triangle including a circle and other shapes.

  [0066] As argon enters the chamber, a DC voltage difference between the target 156 and the chamber shield 166 turns the argon into a plasma, and positively charged argon ions are attracted to the negatively charged target 156. The ions strike the target 156 with significant energy and cause target atoms or groups of atoms to sputter from the target 156. Some of the target particles strike the wafer 158 and are thereby deposited on the wafer to form a film of target material. In metal nitride reactive sputtering, nitrogen is additionally introduced into the chamber from a source 343 that reacts with the sputtered metal atoms to form metal nitride on the wafer 158.

  [0067] FIGS. 6-9b show sequential cross-sectional views relating to the formation of a liner layer according to one embodiment of the present invention. Referring to FIG. 6, an interlayer insulator 345 (eg, silicon dioxide) is deposited over the first metal layer (eg, first copper layer 347a) of the interconnect 348 (FIG. 9b). A via 349 is then etched in the interlayer insulator 345 to expose the first copper layer 347a. The first metal layer can be deposited using CVD, PVD, electroplating, or a known metal deposition technique, and the metal layer can be deposited via a contact, an insulating layer, and below. It is connected to a device formed on a certain semiconductor wafer. When the first copper layer 347a is exposed to oxygen, for example, the wafer is formed to form an opening for forming a via between the first copper layer and a second metal layer. When the oxide overlying one copper layer is moved from the etching chamber where it is etched, an insulating / high resistance copper oxide layer 347a ′ can be easily formed on the first copper layer. . Accordingly, any copper oxide layer 347a 'and processing residue in via 349 may be removed to reduce the resistance of copper interconnect 348.

  [0068] The barrier layer 351 covers the interlayer insulator 345 (eg, in the sputtering chamber 152 of FIG. 4) and the first copper layer 347a before removing the copper oxide layer 347a ′. Can be deposited. Preferably, the barrier layer 351 made of tantalum, tantalum nitride, titanium nitride, tungsten or tungsten nitride has a copper layer deposited later (as described above) mixed with the interlayer insulator 345 to form the insulator. Prevent deterioration.

  [0069] For example, if the sputtering chamber 152 is configured for deposition of a tantalum nitride layer, a tantalum target 156 is used. In general, both argon and nitrogen gases flow into the sputtering chamber 152 via gas inlets 360 (each of which can be used for each gas) and the power signal is DC It is applied to the target 156 via the power source 200. Depending on the situation, the power signal may be applied to the coil 151 via the first RF power source 206. During steady state processing, nitrogen reacts with tantalum target 156 to form a nitride film on tantalum target 156 from which tantalum nitride is sputtered. Non-nitride tantalum atoms are also sputtered from the target, and the atoms combine with nitrogen to form flying tantalum nitride or tantalum nitride on a wafer (not shown) supported by pedestal 162. Form a ride.

[0070] In operation, a throttle valve operably coupled to the exhaust port 362 causes the deposition chamber 152 to have a desired low vacuum of about 1 × 10 ⁻⁸ Torr prior to introduction of process gas into the chamber 152. To maintain the level, it is located in the middle position. To begin processing in the sputtering chamber 152, a mixture of argon gas and nitrogen gas is flowed into the sputtering chamber 152 via the gas inlet 360. DC power is applied to the tantalum target 156 via the DC power source 200 (and the gas mixture continues to flow into the sputtering chamber 152 via the gas inlet 360 and is supplied via the pump 37). . The DC power applied to the target 156 is attracted to the target 156 that causes the argon / nitrogen gas mixture to generate SIP plasma and inject the target material (eg, tantalum or tantalum nitride) from the target. Argon ions and nitrogen ions are generated that collide with each other. The injected target material travels to the wafer 158 supported by the pedestal 162 and is deposited on the wafer. According to the SIP process, the plasma generated by the unbalanced magnetron ionizes a portion of the sputtered tantalum and tantalum nitride. By adjusting the RF power signal applied to the substrate support pedestal 162, a negative bias can be formed between the substrate support pedestal 162 and the plasma. The negative bias between the substrate support pedestal 162 and the plasma accelerates tantalum ions, tantalum nitride ions, and argon ions toward the pedestal 162 and the wafer supported on the pedestal. Accordingly, neutral and ionized tantalum nitride can be deposited on the wafer, and good sidewall coverage and upper sidewall coverage can be achieved according to SIP sputtering. In addition, particularly when RF power is optionally applied to the ICP coil, the wafer can be sputter etched with argon ions while tantalum nitride material from the target 156 is deposited on the wafer (eg, co-deposition). / Sputter etching).

  [0071] Following deposition of the barrier layer 351, if it is desired to thin or remove the bottom of the via, a portion of the barrier layer 351 at the bottom of the via 349 and a copper oxide layer under the barrier layer 347a ′ (and processing residue) may be sputter etched or resputtered with an argon plasma as shown in FIG. The argon plasma is preferably generated in this step mainly by applying RF power to the ICP coil. During sputter etching in the sputtering chamber 152 (FIG. 4) in this embodiment, the power applied to the target 156 is preferably removed to prevent or suppress significant deposition from the target 156, Note that alternatively, it is reduced to a low level (eg, 100 or 200 W). A low target power level rather than zero target power is preferred because it can produce a more uniform plasma.

  [0072] ICP argon ions are via an electric field (eg, an RF signal applied to the substrate support pedestal 162 via the second RF power supply 41 of FIG. 4 that creates a negative self-bias on the pedestal). The barrier layer 351 is accelerated toward the barrier layer 351 and collides with the barrier layer 351. By transmitting momentum, the barrier layer material from the bottom of the via opening is sputtered, and this material is applied to the side wall of the via 349. Redistribute along the part. The argon ions are attracted to the substrate in a direction substantially perpendicular to the substrate. The result is a slight sputtering of the via sidewall, but a substantial sputtering of the bottom of the via. In order to facilitate resputtering, the bias applied to the pedestal and wafer may be 400 W, for example.

  [0073] The particular values of the resputtering process parameters may vary depending on the particular application. Co-pending or published applications 08 / 768,058, 09 / 126,890, 09 / 449,202, 09 / 846,581, 09 / 490,026 No. 09 / 704,161 describe resputtering processes, the entire application of which is incorporated herein.

  [0074] According to another aspect of the invention, ICP coil 151 may be formed of a liner material such as tantalum, similar to target 156, and while the bottom of the via is resputtered. Sputtering may be used to deposit tantalum nitride on the wafer. Due to the relatively low pressure during the resputtering process, the ionization rate of the deposited material sputtered from the coil 151 is relatively low. That is, the sputtered material material deposited on the wafer is mainly a neutral material. The coil 151 is disposed at a relatively low position in the chamber and surrounds the wafer and is adjacent to the wafer.

  [0075] Accordingly, the trajectory of the material material sputtered from the coil 151 tends to have a relatively small incident angle. That is, the sputtered material material from the coil 151 tends to deposit on the top layer 364 of the wafer and around the hole or via opening of the wafer rather than deep within the hole of the wafer. The deposited material material from the coil 151 is regenerated mainly at the bottom of the hole rather than on the sidewall and around the opening of the hole when thinning of the barrier layer is not desired. It can be used to allow certain protection from resputtering, such as being thinned by sputtering.

  [0076] Once the barrier layer 351 is sputter etched from the bottom of the via, the argon ions impinge on the copper oxide layer 347a 'and the oxide layer becomes copper oxide from the bottom of the via. Sputtered to redistribute the layer material, some or all of the sputtered material material is deposited along the portion of the barrier layer 351 that covers the sidewalls of the via 349. The copper atoms 347a "also cover the barrier layers 351 and 364 deposited on the sidewalls of the via 349. However, the first deposited barrier layer 351 and the layer redistributed from the bottom of the via to the via sidewalls. Is a diffusion barrier to copper atoms 347a ", copper atoms 347a" are substantially stationary within the barrier layer 351 and are prevented from reaching the interlayer insulator 345. The “copper atoms 347a” that are applied will generally not generate via-leakage current when redistributed to uncoated sidewalls.

  [0077] Thereafter, a second liner layer 371 made of a second material material such as tantalum is placed in the same chamber 152 or in a similar chamber having both SIP and ICP capabilities in the immediately preceding barrier layer 351. Can be deposited on top (FIG. 8). The tantalum liner layer can realize good adhesion between the underlying tantalum nitride barrier layer and a metal wiring layer deposited later, which is made of a conductor such as copper. However, in some applications it is preferred to deposit a barrier layer or liner layer before the seed layer or before filling the holes.

  [0078] The second liner layer 371 can be deposited in the same manner as the first liner layer 351. That is, the tantalum liner 371 can be deposited mainly in the first SIP process in which plasma is generated by the target magnetron 330. However, nitrogen does not enter so that tantalum is deposited rather than tantalum nitride. According to SIP sputtering, good side wall coverage and upper side wall coverage can be obtained. The RF power to the ICP coil 151 can be reduced or eliminated as needed.

  [0079] If deposition of the bottom portion is desired following deposition of the tantalum liner layer 371, a portion of the liner layer 371 at the bottom (and processing residue) of the via 349 below the liner layer. May be sputter-etched or re-sputtered with argon plasma in the same manner as the bottom of the liner layer 351, as shown in FIG. 9a. The argon plasma is preferably generated in this step mainly by applying RF power to the ICP coil. Again, during sputter etching in the sputtering chamber 152 (FIG. 4), the power applied to the target 156 is removed from the target 156 during thinning or removal of the bottom coating of the second liner layer 371. Note that it is preferably removed or reduced to a low level (eg, 500 W) to prevent or inhibit significant deposition. Also, the coil 151 is preferably sputtered to deposit the liner material 374 and the argon plasma protects the liner sidewalls and top from being substantially thinned during bottom resputtering. For this purpose, the bottom of the liner layer is resputtered.

  [0080] In the embodiment described above, SIP deposition of target material on the via sidewalls is performed primarily in one step, and ICP resputtering of the via bottom and ICP deposition of coil 151 material are primarily performed. This is done in a later step. It should be appreciated that the deposition of target material and coil material on the sidewalls of via 349 can be performed simultaneously, if desired. It should also be appreciated that ICP sputter etching of the deposited material at the bottom of the via 349 can be performed simultaneously with deposition of the target material and coil material on the sidewalls, if desired. Co-deposition / sputter etching can be performed by chamber 152 of FIG. 4 by adjusting the power signal applied to coil 151, target 156 and pedestal 162. Since the coil 151 can be used to sustain the plasma, the plasma can sputter the wafer at a relatively low bias relative to the wafer (less than the bias required to sustain the plasma). it can. Once the sputtering threshold is reached, the RF power applied to the wire coil 151 ("RF coil power") compared to the DC power applied to the target 156 ("DC target power") for a particular wafer bias. The ratio of “) affects the relationship between sputter etching and deposition. For example, the higher the ratio of RF power to DC power, the more sputter etching will be performed due to increased ionization and increased ion bombardment flow to the wafer. Increasing the wafer bias (eg, increasing the RF power supplied to the support pedestal 162) will increase the energy of the resulting ions, increasing the sputtering capability and increasing the etch rate. For example, increasing the voltage level of the RF signal applied to the pedestal 162 increases the energy of ions incident on the wafer, and increasing the duty cycle of the RF signal applied to the pedestal 162 increases the number of incident ions. Will increase.

  [0081] Accordingly, the voltage level and duty cycle of the wafer bias can be adjusted to control the sputtering rate. Also, keeping the DC target power low will reduce the amount of barrier material available for deposition. Zero DC target power will result in sputter etching only. Low DC target power combined with high RF coil power and wafer bias can result in simultaneous via sidewall deposition and via bottom sputtering. Thus, the process can be tailored for the material material and the structure. For a typical 3: 1 aspect ratio of a 200 mm wafer, tantalum or tantalum nitride is used as a barrier material and is applied continuously (eg, 100% duty cycle) 500 W to 1 kW DC target power, 2 With RF coil power of ˜3 kW or more and wafer bias of 250 W to 400 W or more, barrier deposition on the wafer side wall and removal of material from the bottom of the via are possible. The lower the DC target power, the less material material is deposited on the sidewalls. The higher the DC target power, the more RF coil power and / or wafer bias power required to sputter the bottom of the via. For example, a 2 kW RF coil power level for coil 151 and a 250 W RF wafer power level for 100% duty cycle for pedestal 162 can be used for co-deposition / sputter etching. During co-deposition / sputter etching, the bottom of the via is initially enabled to allow sufficient via sidewall coverage without applying a wafer bias (eg, depending on the particular structure / material for a few seconds or more). It is preferable to prevent contamination of the side wall by the material substance sputter-etched from.

  [0082] For example, during simultaneous deposition / sputter etching of vias 349, by not initially applying a wafer bias, sputtered copper atoms contaminate interlayer insulator 345 during the remainder of the deposition / sputter etching process. The formation of the first barrier layer on the sidewall of the interlayer insulator 345 can be facilitated. Alternatively, the deposition / sputter etching may be performed “continuously” in the same chamber, or after depositing the barrier layer 351 in the first processing chamber, a different second processing chamber (eg, , Sputter etching of the barrier layer 351 and the copper oxide layer 347a ′ in a Sputter Etch chamber such as Applied Materials' Preclean II chamber.

  [0083] Following deposition of the second liner layer 371 and thinning of the bottom coating, a second metal layer 347b is deposited to form a copper interconnect 348 (FIG. 9b). As shown in FIG. 9b, the second copper layer 347b covers the second liner layer 371 and as a coating covering a portion of the first copper layer 347a exposed at the bottom of each via, or a copper plug 347b. 'Can be deposited as. The copper layer 347b may include a copper seed layer. Since the first and second copper layers 347a and 347b are not in contact via the barrier layer 351 or the second liner layer 371, but are in direct contact, the resistance of the copper wiring 348 is between vias. It can be lowered as well as the leakage current. However, it will be appreciated that in some applications it may be desirable to leave a coating of the liner layer and / or barrier layer at the bottom of the via.

  [0084] When the wiring is formed of a conductive metal different from the liner layer, the wiring layer can be deposited in a sputter chamber having a target made of the different conductive metal. The sputter chamber may be SIP type or ICP type. However, current copper seed layer deposition is preferably performed in a chamber of the type described below in conjunction with FIG. The metal wiring may be deposited by other methods in other types of chambers and equipment including CVD and electrochemical plating.

  [0085] The copper seed layer may be deposited by another plasma sputtering reactor 410 as shown in the schematic cross-sectional view of FIG. Various processes for forming the reactor 410 and seeds and other layers are described in co-pending application 09 / 993,543 filed November 14, 2001 (Attorney Registration Number 6265). Which is incorporated herein in its entirety. As described therein, the vacuum chamber 412 includes a generally cylindrical sidewall 414 that is electrically grounded. In general, a grounded replaceable shield (not shown) is provided inside the side wall 414 to protect the side wall from sputter coating, but the shield holds a vacuum. Except, it functions as a chamber side wall. A sputtering target 416 made of sputtered metal is sealed in the chamber 412 via an electrical isolator 418. The pedestal electrode 422 supports a wafer 424 that is sputter coated parallel to the target 416. A processing space is formed between the target 416 and the wafer 424 inside the shield.

[0086] A sputtering working gas, preferably argon, is metered into the chamber from a gas supply 426 via a mass flow controller 428. A vacuum pumping device (not shown) maintains the interior of the chamber 412 at a very low base pressure, typically below ^10-8 torr. During plasma ignition, the argon pressure is supplied in an amount that produces a chamber pressure on the order of 5 millitorr, which will subsequently decrease, as will be described later. The DC power supply 434 applies a negative potential bias of about −600 VDC to the target 416 to excite the argon working gas into a plasma containing electrons and positive argon ions. The positive argon ions are attracted to the negatively biased target 416 and sputter metal atoms from the target.

  [0087] The present invention is particularly useful for SIP sputtering in which a small nested magnetron 436 is supported on a back plate (not shown) behind the target 416. Chamber 412 and target 416 are generally cylindrical and symmetric about a central axis 438. The SIP magnetron 436 includes a first vertical magnetic inner pole 440 and a magnetic pole 442 surrounding the opposing second vertical magnetic pole. Both poles are supported by a magnetic yoke 444 and are magnetically coupled via the yoke. The yoke 444 is fixed to a rotating arm 446 supported by a rotating shaft 448 extending along the central axis 4438. A motor 450 coupled to shaft 448 rotates magnetron 436 about central axis 438.

  [0088] In an unbalanced magnetron, the outer pole 442 preferably has a total magnetic flux integrated in a larger area than that formed by the inner pole 440 with a magnetic force ratio of at least 150%. Opposing magnetic poles 440, 442 form a generally semi-toroidal magnetic field within the chamber 412 having a strong component parallel to and in close proximity to the surface of the target 416 to create a high density plasma thereby sputtering. Increase speed and increase ionization of sputtered metal atoms. Because the outer pole 442 is magnetically stronger than the inner pole 440, a portion of the magnetic field from the outer pole 442 returns to the back of the outer pole 442 before forming a loop to complete the magnetic circuit. Projects toward the pedestal 422.

  [0089] For example, an RF power supply 454 having a frequency of 13.56 MHz is connected to the pedestal electrode 422 to negatively bias the wafer 424. The bias attracts positively charged metal atoms across the adjacent plasma sheath, thereby covering the sides and bottom of the high aspect ratio holes in the wafer, such as interlayer vias.

[0090] In SIP sputtering, the magnetron is small and has high magnetic strength, and a large amount of DC power is applied to the target so that the plasma density rises to about 10 ⁻¹⁰ cm ^{−3 in the} vicinity of the target 416. To be applied. In the presence of this plasma density, a large amount of sputtered atoms are ionized into positively charged metal ions. Since the metal ion density is sufficiently high, a large amount of ions are attracted back to the target, and more metal ions are sputtered. As a result, the metal ions at least partially replace argon ions as an effective species in the sputtering process. That is, the argon pressure can be reduced. The reduced pressure has the effect of reducing metal ion scattering and deionization. In the case of copper sputtering, under certain conditions, the argon working gas can be completely removed once the plasma is ignited in a process called sustained self-sputtering (SSS). In the case of aluminum or tungsten sputtering, SSS is not possible, but the argon pressure can be much lower than that used in conventional sputtering, for example, less than 1 millitorr.

  [0091] In one embodiment of the present invention, an auxiliary array 460 of permanent magnets 462 is disposed around the chamber sidewall 414, and the array is generally disposed in the half of the processing space toward the wafer 424. ing. In this embodiment, the auxiliary magnet 462 has the same first vertical magnetic polarity as the outer pole 442 of the nested magnetron 436 to pull the unbalanced portion of the magnetic field from the outer pole 442. In the embodiment described in detail below, there are eight permanent magnets, but any number of four or more arranged about the central axis 438 will give similar good results. An auxiliary magnet 462 can be placed inside the chamber sidewall 414, preferably outside the thin sidewall shield, to increase the effective strength in the processing area. However, for the overall processing result, an arrangement outside the side wall 414 is preferred.

  [0092] The auxiliary magnet array is generally symmetrically disposed about the central axis 438 to form a circular symmetric magnetic field. On the other hand, the nested magnetron 436 has a magnetic field arrangement that is asymmetrically arranged around the central axis 438, but the magnetic field arrangement becomes symmetrical when the magnetic field arrangement is averaged over time. . There are many forms of the nested magnetron 436. The simplest but less preferred form is a circular shape in which the magnetic field is symmetric about an axis that is offset from the chamber axis 438 and the axis of the nested magnetron is rotated about the chamber axis 438. It has a button center pole 440 surrounded by an annular outer pole 442. A preferred nested magnetron has the triangular shape shown in the bottom view of FIG. 11 with a vertex near the central axis 438 and a base near the periphery of the target 416. This shape is particularly advantageous because the time average of the magnetic field is more uniform than in the case of a circular nested magnetron.

[0093] The effective magnetic field at a particular moment during the rotation cycle is shown by the dotted line in FIG. The semi-toroidal magnetic field B _M produces a strong horizontal component that is parallel and close to the plane of the target 416, thereby increasing the plasma density, sputtering rate and ionization of the sputtered particles. The auxiliary magnetic fields B _A1 and B _A2 are the sum of the unbalanced portions of the magnetic field from the auxiliary magnet array 460 and the magnetic field of the nested magnetron 436. On the side of the chamber away from the nested magnetron 436, the component B _A1 from the unbalanced portion of the magnetic field of the nested magnetron 436 is dominant and does not extend to the wafer 424. However, in the vicinity of the chamber side wall 414 on the side of the nested magnetron 436, the auxiliary magnet 462 is strongly coupled to the outer magnetic pole 442 and generates a magnetic field component B _A2 that protrudes toward the wafer 424. Outside the plane of the figure, the magnetic field component is a combination of two components B _A1 and B _A2 .

  [0094] This structure is due to the alignment of the auxiliary magnet 442 and the strong outer pole 442, so that a strong vertical magnetic field is substantially extended by the length of the chamber sidewall 414 in the region under the nested magnetron 436 that moves around it. As a result, it is formed along the vicinity of the thickness. As a result, there is a strong vertical magnetic field outside the chamber 412 adjacent to the region of the target 416 that is most strongly sputtered. This protruding magnetic field is effective for both expanding the plasma region and guiding ionized particles to the wafer 424.

  [0095] The auxiliary magnet array 460 can be implemented by the use of two semicircular magnet carriers 470, one of which is shown in orthographic projection in FIG. Each carrier 470 includes four recesses 472 that face the interior and are sized to accommodate each magnet assembly 474 that includes one magnet 462. The magnet assembly 474 includes an arcuate upper clamp member 476 and a lower clamp member 478 that are cylindrical when the two screws 480 tighten the two clamp members 476, 478. In the recess. The carrier 470 and the clamp members 476 and 478 may be formed of a nonmagnetic material such as aluminum. The lower clamp member 478 has a length that fits into the recess 472, while the upper clamp member 476 has an end beyond the recess 472 and through which two through holes 482 are drilled. . Two screws 484 pass through each through hole, allowing the screw 484 to be secured in the screw hole 486 of the magnet carrier 470, thereby securing the magnet 462 in place on the magnet carrier 470. The two semicircular magnet carriers 470 assembled in this way are arranged in a ring around the chamber wall 414 and are fixed by conventional fixing means. This structure places the magnet 462 directly adjacent to the exterior of the chamber wall 414.

  [0096] The solenoid field formed inside the Wei Wang electromagnet coil is more uniform across the diameter of the reactor chamber than the surrounding dipole field formed by the annular array of permanent magnets. However, by replacing the permanent magnet 462 with an annular array of electromagnetic coils 490 arranged around the chamber wall, as shown in the cross-sectional view of FIG. 13, a similarly shaped dipole magnetic field can be formed. Is possible. The coil 490 is typically wound as a helix around each axis parallel to the central axis 438 and is electrically actuated to form substantially the same magnetic dipole field inside the chamber. Such a design has the advantage of allowing quick adjustment of the strength of the auxiliary magnetic field and the polarity of the magnetic field.

  [0097] The present invention has been applied to copper SIP sputtering. While conventional SIP reactors sputter copper films with 9% non-uniformity determined by sheet resistance measurements, the auxiliary magnetron in one embodiment is optimized to produce 1% non-uniformity. It is considered possible. Improved uniformity is preferred for improved process control in certain applications, and in some applications with a thin copper seed layer deposition in deep holes, may be accompanied by a reduced deposition rate. .

  [0098] Although the present invention has been described for use in a SIP sputter reactor, the auxiliary permanent magnet array is disclosed in US Pat. No. 6,251,242, an annular arched target for a SIP reactor, US Patent No. 6,179,973 or July / August 2000; Vac. Hollow cathode target of “Ionized Physical Vapor Deposition Using Hollow Cathode Magnetron Source for Advanced Metallization” by Klauwn et al., Sci Technology, Inductively Coupled IMP Reactor of US Pat. No. 6,045,547 Or an ion reflector as described in, for example, “Cu dual damascene process for 0.13 μm technology generation using self-ion sputtering (SIS) with ion reflector” by 2000 Wada et al. Can be advantageously applied to other target and power configurations, such as a self-ion sputtering (SIS) system that controls ion flow to the substrate. Other magnetron configurations such as balanced magnetrons and stationary types can also be used. Further, the polarity of the auxiliary magnet may be parallel or non-parallel to the magnetic polarity of the outer pole of the upper magnetron. Other material materials including nitrides made of Al, Ta, Ti, Co, W, etc. and heat-resistant metals may be sputtered.

  [0099] Thus, the auxiliary magnet array can provide additional control of the magnetic field useful for magnetron sputtering. However, to achieve deeper hole coverage with a partially neutral ion flow, it is preferable to increase the distance between the target 416 and the wafer 424, i.e., operate in the long throw mode. As described above in conjunction with the chamber of FIG. 4, in long throw, the target-substrate spacing is typically greater than half the substrate aperture. When used in SIP copper seed deposition, it is preferably larger than 140% wafer diameter (for example, 290 mm spacing) for 200 mm wafers and 130% or more (for example, 400 mm spacing) for 300 mm wafers. An interval of 80% or more including 90% or more and 100% or more is considered appropriate. For most applications, a target wafer spacing of 50 to 1000 mm is considered appropriate. Long throws in conventional sputtering reduce the sputtering deposition rate, but ionized sputtered particles do not suffer from such a large reduction.

  [00100] One embodiment of a structure that can be formed by the chamber of FIG. 4 and the chamber of FIG. 10 is a via shown in cross section in FIG. 14a. The seed copper layer 492 may be applied to one or more barriers such as the TaN barriers 351 and 364 and the Ta liner layers 371 and 374 described above under conditions that promote SIP and ICP within the via hole 494 by the chamber of FIG. And deposited over the liner layer formed in the chamber of FIG. 4, which may include a liner layer. The SIP copper layer 492 may be deposited to cover a thickness of, for example, 50-300 nm, or more preferably 80-200 nm. The SIP copper seed layer 492 preferably has a thickness in the range of 2-20 nm, more preferably 7-15 nm on the via sidewall. Due to the narrow holes, the sidewall thickness above 50 nm may not be optimal for certain applications. The quality of the membrane can be improved in certain applications by reducing the temperature of the pedestal to 0 ° C. or lower, preferably -40 ° C. or lower. In such applications, rapid SIP deposition is advantageous.

[00101] For example, if the sputtering chamber 410 is configured for copper layer deposition, a copper target 416 is used. In operation, a throttle valve operably coupled to the chamber exhaust maintains the deposition chamber 410 at a desired low vacuum level of about 1 × 10 ⁻⁸ Torr prior to introduction of process gas into the chamber. In order to do so. In order to start processing in the sputtering chamber 410, argon gas is flowed into the sputtering chamber 410 via the gas inlet 428. For copper seed deposition in a long throw SIP chamber, a very low pressure such as 0-2 mTorr is preferred. In the illustrated embodiment, a pressure of 0.2 mTorr is appropriate. DC power is applied to the copper target 416 via the DC power source 434 (at the same time the gas mixture continues to flow into the sputtering chamber 410 via the gas inlet 360 and is supplied from the chamber via a suitable pump. ) In the case of a copper target, the power applied to the target 416 may be in the range of 20-60 kW for a 200 mm wafer. In one embodiment, the power source 434 can apply 38 kW to the copper target 416 at -600 VDC. For large wafers such as 300 mm wafers, larger values such as 56 kW are expected to be appropriate. Other values may be used depending on the particular application.

  [00102] The DC power applied to the target 416 causes argon to form a SIP plasma and generate argon ions that are attracted to and collide with the target 416 from which the target material (eg, copper) is ejected. The injected target material moves and deposits on the wafer 424 supported by the pedestal 422. According to the SIP process, the plasma generated by the unbalanced magnetron ionizes a portion of the sputtered copper. By adjusting the RF power signal applied to the substrate support pedestal 422, a negative bias can be formed between the substrate support pedestal 422 and the plasma.

  [00103] The power applied to the pedestal 422 may range from 0 to 1200 W for copper seed deposition. In one embodiment, the RF power source 454 can apply 300 W to the pedestal 422 for a 200 mm wafer. For larger wafers, such as 300 mm wafers, larger values are expected to be appropriate. Other values can be used depending on the particular application.

  [00104] The negative bias between the substrate support pedestal 422 and the plasma accelerates copper ions and argon ions toward the pedestal 422 and the wafer supported on the pedestal. Thus, neutral and ionized copper can be deposited on the wafer and good bottom, sidewall and upper sidewall coverage can be achieved according to SIP sputtering. Further, the copper material from the wafer and target 416 may be sputter-etched by the argon ions simultaneously with the deposition on the wafer (for example, simultaneous deposition / sputter etching).

  [00105] After or during the deposition of the seed layer 492, a portion of the seed layer 492 at the bottom 496 of the via 494 may be sputter etched or re-applied by argon plasma as shown in FIG. 14B if redistribution of the bottom is preferred. Sputtering may be performed. The bottom 496 may be redistributed to increase the coating thickness of the bottom corner region 498 of the copper seed layer, as shown in FIG. 14B. In most applications, it is preferred that the bottom 496 of the copper seed layer is not completely removed to form a suitable seed layer coating across the via.

  [00106] The argon plasma is preferably generated as SIP plasma in this resputtering step by applying power to the target and pedestal. SIP argon ions are accelerated toward the seed layer 492 by an electric field (eg, applied to the substrate support pedestal 422 via the second RF power supply 454 of FIG. 10 forming a negative self-bias on the pedestal. RF signal), hits the seed layer 492, and by momentum transfer, sputters the seed layer material from the bottom of the via opening and places the material along the portion 498 of the seed layer 492 that covers the bottom corner of the via 349. Redistribute.

  [00107] The argon ions are attracted to the substrate in a direction substantially perpendicular to the substrate. As a result, there is little sputtering of the via sidewalls but substantial sputtering of the bottom of the via. During re-sputtering of the copper seed layer in the sputtering chamber 410 (FIG. 10) in this embodiment, the power applied to the pedestal 422 is, for example, to facilitate redistribution of the bottom of the copper seed layer. For example, it can be increased to a high value of 600 to 1200 W or 900 W. That is, in this embodiment, the pedestal power increases from a level of 600 W or less (for example, 300 W) to a level of 600 W or more (for example, 900 W) in order to enhance the redistribution effect of the resputtering.

  [00108] In other embodiments, the power applied to the target 416 can be, for example, 30 kW or 28 kW to prevent adhesion from the target 416 to facilitate redistribution of the bottom of the copper seed layer. Etc., can be reduced to a low value. A low target power level, rather than zero target power, is preferred in embodiments where a more uniform plasma can be produced and the current target power is reduced due to the redistribution of the bottom of the seed layer. Thus, in this embodiment, the target power is reduced from a level above 30000 (eg, 38 kW) to a level below 30000 W (eg, 28 kW) to enhance resputtering.

  [00109] In yet another embodiment, resputtering of the bottom of the copper seed layer allows the power level of the target and pedestal to remain relatively constant during the deposition of the seed layer (eg, 38 kW and 300 kW, respectively), may be performed simultaneously throughout the copper seed layer deposition. In other embodiments, the target power reduction may alternate with or increase the pedestal power increase to facilitate redistribution of the bottom of the seed layer.

  [00110] The particular values of the resputtering process parameters may vary depending on the particular application. Co-pending or issued applications 08 / 768,058, 09 / 126,890, 09 / 449,202, 09 / 846,581, 09 / 490,026 And 09 / 704,161 describe resputtering processes, the entire applications of which are incorporated herein.

  [00111] The SIP copper seed layer 492 has good bottom and sidewall coverage and enhanced bottom corner coverage. After the copper seed layer 492 is deposited, the holes are filled with the copper layer 18, as shown in FIG. 1, preferably by electrochemical plating using the seed layer 492 as one of the electroplating electrodes. . Alternatively, the smooth structure of the SIP seed layer 492 facilitates high temperature deposition of copper by reflow or standard sputtering or physical vapor deposition (PVD).

  [00112] The chambers of FIGS. 4 and 10 use both ionized and neutral atomic flows. As described in US Pat. No. 6,398,929 (Attorney Registration No. 3920), which is incorporated herein in its entirety, ionized and neutral atomic flow in a DC magnetron sputtering reactor. The distribution can be adjusted to form an advantageous layer in the holes in the insulating layer. Such a layer can be used with a copper seed layer deposited over the sputtered copper nucleation layer by itself or by chemical vapor deposition (CVD). The copper liner layer is particularly useful as a thin seed layer for electroplated copper.

  [00113] Conventional DC magnetron sputtering reactors have focused on conventional working gas sputtering, or sustained self-sputtering. These two approaches emphasize different types of sputtering. On the other hand, the reactor for the copper liner preferably combines various aspects of the prior art to control the distribution between ionized copper atoms and neutral particles. An example of such a reactor 550 is shown in the schematic cross-sectional view of FIG. The reactor of FIGS. 4, 10 and 13 may use the reactor embodiment of FIG. 15, based on a modification of the Endura PVD reactor available from Applied Materials, Inc., Santa Clara, California. Reactor 550 is a target for PVD target 556, which is typically made of metal and is electrically grounded and sputter-deposited on wafer 558, having at least a surface portion made of a material material, in this case copper or a copper alloy. A vacuum chamber 552 sealed by an isolator 554 is included. The alloying elements are typically less than 5% by weight, and essentially pure copper may be used if a suitable barrier is otherwise formed. Wafer clamp 560 holds wafer 558 on pedestal electrode 562. Resistive heaters, cooling channels and heat transfer gas cavities (not shown) in the pedestal 562 allow the temperature of the pedestal to be controlled to a temperature below -40 ° C., thereby allowing the temperature of the wafer to be controlled as well. To do.

  [00114] Floating shield 564 and ground shield 566 insulated by second insulation shield isolator 568 are retained in chamber 552 to protect chamber wall 552 from sputtered material material. The ground shield 566 also acts as an anode ground plane facing the cathode target 556, thereby capacitively supporting the plasma. Some electrons accumulate on the floating shield 564 and accumulate a negative charge there. The negative potential not only prevents further electrons from being deposited, but also traps them in the main plasma region, reducing electron loss, sustaining low pressure sputtering, and increasing plasma density. .

  [00115] Details of the target and shield are shown in the enlarged cross-sectional view of FIG. Target 556 includes an aluminum or titanium support plate 570 to which copper target portion 572 is soldered or diffusion bonded. The flange 573 of the support plate 570 is preferably placed on a target isolator 554 made of ceramic such as alumina, and is vacuum-sealed to the target isolator 554 via a polymerization target O-ring 574. The target isolator 554 is actually mounted on a chamber 552 which may be an aluminum adapter sealed to the main chamber body and is vacuum sealed to the chamber 552 via an adapter O-ring 575. ing. The metal clamp ring 576 has an annular rim 577 extending upward on the inner radial side thereof. A bolt (not shown) secures the metal clamp ring 576 to a shelf 578 extending inside the chamber 552 and captures the flange 579 of the ground shield 566. Thereby, the ground shield 566 is mechanically and electrically connected to the grounded chamber 552.

  [00116] The shield isolator 568 can be freely mounted on the clamp ring 576 and machined with a ceramic material such as alumina. The isolator is compact but has a relatively large height on the order of 165 mm compared to a small width that provides strength during the temperature cycle of the reactor. The lower part of the shield isolator 568 has an inner annular recess that fits outside the rim 577 of the clamp ring 576. The rim 577 not only acts to center the inner diameter of the shield isolator 568 relative to the clamp ring 576, but also reaches the main processing area and then slides between the ceramic shield isolator 568 and the metal ring clamp 576. Acts as a barrier to any particles generated at 580.

  [00117] The flange 581 of the floating shield 564 is free to rest on the shield isolator 568 and extends outwardly to a tab or rim 582 extending outwardly into an annular recess formed in the upper outer corner of the shield isolator 568. Have Thereby, tab 582 centers floating shield 564 relative to target 556 at the outer diameter of shield isolator 568. The shield tab 582 is small enough to align the plasma dark, but is separated from the shield isolator 568 by a narrow gap large enough to prevent jamming of the shield isolator 568. The floating shield 581 is separated from the tab 582. It is placed on the shield isolator 568 in the slide contact region 583 at the upper inner side.

  [00118] A narrow channel 584 is formed between the head 585 of the floating shield 564 and the target 556. The channel has a width of about 2 mm which acts as a plasma dark. The narrow channel 584 passes through a ridge 586 projecting below the support plate flange 574 and into an upper back gap 584a between the shield head 585 and the target isolator 554 in a path extending radially inward from the illustration. in the process of. The structure of these components and their properties are similar to those disclosed by Tang et al. In US patent application Ser. No. 09 / 191,253 filed Oct. 30, 1998. The upper back gap 584a has a width of about 1.5 mm at room temperature. As the shield element is subjected to temperature cycling, it tends to deform. An upper back gap 584 a having a smaller width than the narrow channel 584 adjacent to the target 556 is sufficient to maintain a plasma darkness within the narrow channel 584. The back gap 584a continues downward into the lower back gap 584b between the inner shield isolator 568 and ring clamp 576 and the outer chamber body 552. The lower back gap 584b functions as a cavity for collecting ceramic particles generated on the sliding surfaces 580 and 583 between the ceramic shield isolator 568, the clamp ring 576, and the floating shield 564. The shield isolator 568 includes a hollow recess 583a that collects ceramic particles from the radially inner slide surface 583 at the upper inner corner.

  [00119] The floating shield 564 extends downward from the flange 581 and has a lower end that is connected to a narrow lower cylindrical portion 590 via a connection 592 and has a wide upper cylindrical shape extending downward. Part 588 is included. Similarly, the ground shield 566 has an upper cylindrical portion 594 that is outside the upper cylindrical portion 588 of the floating shield 564, ie, wider than the upper cylindrical portion. The grounded upper cylindrical portion 594 is connected at its upper end to a ground shield flange 580 and at its lower end to a narrow lower cylindrical portion 596 via a connection 598 extending radially in the chamber. ing. A grounded lower cylindrical portion 596 fits outside the floating lower cylindrical portion 590 and is accordingly wider than the floating lower cylindrical portion 590, but the floating upper cylindrical portion 564. Less by a radial spacing of about 3 mm. The two connecting portions 592 and 598 are offset in the vertical direction and the horizontal direction. Thereby, the gap between the floating lower cylindrical part 596 and the floating upper cylindrical part 564 does not guarantee a line of sight between the two vertical channel parts between the floating shield 564 and the ground shield 566. A maze-like narrow channel 600 is formed. The purpose of the channel 600 is to electrically isolate the two shields 564, 566 and to protect the clamp ring 576 and shield isolator 568 from copper deposition.

  [00120] The lower portion of the channel 600 between the lower cylindrical portions 590, 596 of the shields 564, 566 has an aspect ratio of 4: 1 or higher, preferably 8: 1 or higher. The lower portion of channel 600 has an exemplary width of 0.25 cm and a length of 2.5 cm, with preferred ranges being 0.25-0.3 cm and 2-3 cm. Thereby, any copper ions and scattered copper atoms that pass through the channel 600 will bounce off the shield several times before further paths to the clamp ring 576 and shield isolator 568 are found, and the upper ground cylindrical shape The portion 594 will stop at least. Any single rebound tends to produce ions that are absorbed by the shield. Two adjacent 90 degree bends or curves in the channel 600 between the two connections 592, 598 further insulate the shield isolator 568 from the copper plasma. Similar but limited effects can be achieved with a 60 degree bend or 45 degree bend, but a more effective 90 degree bend is easy to form in the shield material. The 90 degree bend can cause copper particles coming from all directions to have at least one degree of high angle impact, thereby losing most of the energy stopped by the upper grounded cylindrical portion 594. Is quite effective. The 90 degree bend also protects the clamp ring 576 and shield isolator 568 from being directly applied to the copper particles. It has been found that copper preferentially deposits at one end of the 90 degree bend, both on the horizontal plane at the bottom of the floating connection 592 and on the vertical upper ground cylindrical portion 594. Intricate channel 600 also collects ceramic particles generated from shield isolator 568 during processing on horizontal connection 598 of ground shield 566. The particles collected in this way tend to stick to the copper collected there.

  [00121] Returning to FIG. 15, the lower cylindrical portion 596 of the ground shield 566 continues down toward the wells behind the top of the pedestal 562 that supports the wafer 558. The ground shield 566 then continues radially inward within the cup-shaped portion 602 and then continues vertically upward in the innermost cylindrical portion 604 for generally lifting spaced radially outward of the pedestal 562 of the wafer 558. ing.

  [00122] The shields 564, 566 are generally constructed of stainless steel and their inner surfaces are roughened by bead blasting or other methods to promote adhesion of copper sputter deposited on the surfaces. May be used. However, at some point during long sputtering, copper deposits to a thickness that is easy to peel off, creating harmful particles. Before reaching this point, the shield should be cleaned or replaced with a new shield. However, the more expensive isolators 554, 568 need not be replaced during most maintenance periods. Furthermore, the maintenance period is determined not by an electrical short circuit of the isolator but by the peeling of the shield.

  [00123] As described above, the floating shield 564 accumulates electronic charge and accumulates a negative potential. Thereby, further electron loss to the floating shield 564 is prevented and the plasma is confined closer to the target 556. Ding et al. Discloses a similar effect using a somewhat similar structure in US Pat. No. 5,736,021. However, the floating shield 564 of FIG. 16 has its lower cylindrical portion 590 extending farther away from the target 556 than the corresponding portion such as Ding, thereby allowing the plasma to pass through more space. Confine over. However, the floating shield 564 electrically shields the ground shield 566 from the target 556 so that it does not extend too far from the target 556. If it is too long, it will be difficult to hit the plasma, but if it is too short, the loss of electrons will increase, making it impossible to sustain the plasma at a low pressure and lowering the plasma density. The optimum length is such that when the total axial length of the floating shield 566 is 7.6 cm, the tip 606 at the bottom of the floating shield 566 is 6 cm away from the surface of the target 556 as shown in FIG. It has been found that Three different floating shields were tested against the minimum pressure at which copper sputtering was sustained. The results for 1 kW and 18 kW target power are shown in FIG. The abscissa indicates the total shield length, and the distance between the shield tip 606 and the target 556 is less than 1.6 cm. A preferable range of the interval is 5 to 7 cm, and a preferable range of the length is 6.6 to 8.6 cm. Increasing the shield length to 10 cm significantly reduces the minimum pressure, but increases the difficulty of hitting the plasma.

  [00124] Returning again to FIG. 15, the selectable DC power source 610 biases the target 556 negatively about -400 to -600 VDC relative to the ground shield 566 to ignite and maintain the plasma. . A target power of 1-5 kW is typically used to ignite the plasma, and a power of 10 kW or higher is preferred for the SIP sputtering described herein. Conventionally, the pedestal 562 and the wafer 558 are electrically floating, but the pedestal is negatively DC self-biased. On the other hand, in some designs, a controllable power supply 612 that applies a DC or RF bias to the pedestal 562 is used to further control the negative DC bias that occurs in the pedestal. In the tested configuration, the bias power source 612 is an RF power source operating at 13.56 MHz. RF power up to 600 W may be supplied, and a preferred range for a 200 mm wafer is 350-550 W.

[00125] The gas source 614 supplies a sputtering working gas, typically a chemically inert argon gas, to the chamber 552 via the mass flow controller 616. The working gas passes through the bottom of the shield ground shield 566 or through the gap 618 between the ground shield 566, the wafer clamp 560 and the pedestal 562, by one or more inlet pipes through the opening. It can enter the top of the chamber, or it can enter the bottom as shown. A vacuum pump device 620 connected to the chamber 552 via a wide pumping port 622 maintains the chamber at a low pressure. The base pressure can be maintained at or below about ^10-7 Torr, but the working gas pressure is typically about 1-1000 millitorr for conventional sputtering and about 5 millitorr for SIP sputtering. Maintained below. A computer-based controller 624 controls a reactor including a DC target power source 610, a bias power source 612, and a mass flow controller 616.

  [00126] A magnetron 630 is disposed behind the target 556 to allow effective sputtering. The magnetron has opposing magnets 632, 634 connected to and supported by a magnetic yoke 636. The magnet creates a magnetic field near the magnetron 630 in the chamber 552. This magnetic field captures electrons, and when the charge is neutral, the ion density also increases to form a high density plasma region 638. The magnetron 630 is typically rotated around the center 640 of the target 556 by the motor drive shaft 642 to achieve complete coverage in sputtering of the target 556. To achieve a high density plasma 638 with sufficient ionization density to enable sustained self-sputtering of copper, the power density supplied to the region adjacent to the magnetron 630 must be high. This reduces the area of magnetron 630 to, for example, the shape of a triangle or a racetrack, by increasing the power level supplied from DC power supply 610, as Fu describes in the above cited patent. This can be realized. The 601 triangular magnetron whose tip is rotated substantially coincident with the target center 640 always covers only about 1/6 of the target. For industrial reactors capable of SIP sputtering, 1/4 coverage is the preferred maximum.

  [00127] In order to reduce the loss of electrons, the inner magnet 632 and the inner pole represented by the pole face (not shown) should not have a substantial number of apertures, and the continuity represented by the outer magnet 634 and the pole face (not shown). Should be surrounded by an outer magnetic pole. Further, in order to guide the ionized sputtered particles to the wafer 558, the outer pole should generate a much higher magnetic flux than the inner pole. The elongating magnetic field lines capture the electrons, thereby spreading the plasma close to the wafer 558. The ratio of magnetic flux should be at least 150%, preferably above 200%. The two embodiments of the Fu triangular magnetron have 25 outer magnets and 6 or 10 inner magnets of the same strength but opposite polarity.

  [00128] When argon enters the chamber, a DC voltage difference between the target 556 and the ground shield 566 ignites the argon into a plasma and positively charged argon ions are applied to the negatively charged target 556. Be attracted. The ions strike the target 556 with significant energy and cause target atoms or groups of atoms to sputter from the target 556. Some of the target particles strike the wafer 558 and are thereby deposited on the wafer to form a film of the target material. In reactive sputtering of metal nitride, nitrogen is additionally placed in the chamber and reacts with the sputtered metal atoms to form metal nitride on the wafer 558.

  [00129] The illustrated chamber is capable of self-ionized sputtering of copper, including sustained self-sputtering. In this case, after the plasma is ignited, the supply of argon may be interrupted in the case of SSS, and the copper ions have a high enough density to resputter the copper target with two or more yields. Alternatively, for a significant but reduced amount of self-sputtering at a reduced flow rate and chamber pressure or with insufficient target power density to maintain pure sustained self-sputtering. You may continue supplying a certain amount of argon. As the argon pressure increases significantly above 5 millitorr, the argon removes energy from the copper ions and concomitantly reduces self-sputtering. Wafer bias attracts ionized copper particles deep into the hole.

  [00130] However, in order to achieve deeper hole coverage with partial neutral flow, it is preferable to increase the distance between target 556 and wafer 558, ie, operate in long throw mode. In long throw, the distance between the target and the substrate is usually larger than half the diameter of the substrate. In use, it is preferable to exceed 90% of the wafer diameter, but an interval of more than 80% including 100% and 140% of the substrate diameter is considered appropriate. The throw described in the example of this embodiment is for a 200 mm wafer. Long throws in conventional sputtering reduce the sputtering deposition rate, but ionized sputtered particles do not suffer from such a large reduction.

  [00131] Controlled distribution between conventional (argon-based) sputtering and sustained self-sputtering (SSS) allows for control of the distribution between neutral and ionized sputtered particles To do. Such control is particularly advantageous for sputter deposition of copper seed layers into high aspect ratio via holes. Control of the ionization of sputtered atoms is called self-ionized plasma (SIP) sputtering.

  [00132] One embodiment of the structure formed by the present invention is the via shown in the cross-sectional view of FIG. The seed copper layer 650 is deposited in the via hole 22 over the barrier layer 24 under conditions that promote SIP, for example using the long throw sputter reactor of FIG. The SIP copper layer 650 is deposited to a coating thickness of, for example, 50 to 300 nm, more preferably 80 to 200 nm. The SID copper seed layer 650 preferably has a thickness in the range of 2-20 nm, more preferably 7-15 nm, on the via sidewalls. Due to the narrow holes, the thickness of the side wall should not exceed 50 nm. The quality of the film is improved by lowering the temperature of the pedestal below 0 ° C., preferably below −40 ° C., because the coolness provided by rapid SIP deposition becomes important.

  [00133] The SIP copper seed layer 650 has good bottom coverage and enhanced sidewall coverage. It has been experimentally found to be much smoother than IMP or CVD copper deposited directly over the barrier layer 24. After the copper seed layer 650 is deposited, the holes are filled with a copper layer 118, as shown in FIG. 1, preferably by electrochemical plating using the seed layer 650 as one of the electroplating electrodes. . However, the smooth structure of the SIP copper seed layer 650 facilitates reflow or high temperature copper deposition by conventional sputtering or physical vapor deposition (PVD).

  [00134] Several experiments were conducted in SIP to deposit such a seed layer with a 1.2 μm thick oxide film in a 0.20 μm wide via hole. When the distance between the target and the substrate is 290 mm, the chamber pressure is 0.1 millitorr or less (representing the SSS mode), and the DC power applied to the target by the 601 triangular magnetron is 14 kW, 0 is applied to the upper surface of the oxide film. The deposition to form a .2 μm coating thickness of copper is 18 nm on the bottom of the via and about 12 nm on the via sidewall. Deposition times of 30 seconds or less are common. As the target power is increased to 18 kW, the bottom coverage increases to 37 nm without significant changes in sidewall thickness. High bottom coverage at high power indicates high ionization. In both cases, the deposited copper film is observed to be much smoother than IMP or CVD copper.

  [00135] Compared to the IMP deposition rate of 0.2 μm / min, SIP deposition is relatively fast, 0.5-1.0 μm / min. The fast deposition rate results in a short deposition period and significantly reduces the amount of heat in the absence of argon ion heating. Low temperature SIP deposition is believed to result in a very smooth copper seed layer.

[00136] A 290 mm throw was used with Fu's standard triangular magnetron using 10 inner magnets and 25 outer magnets. The ionic current was measured as a function of the radius from the center of the target under various conditions. The results are plotted on the graph of FIG. Curve 660 was measured for a target power of 16 kW and a chamber pressure of 0 millitorr. Curves 662, 664, and 664 were measured with a target power of 18 kW and chamber pressures of 0, 0.2, and 1 millitorr, respectively. These currents correspond to an ion density of 10 ⁻¹¹ to 10 ⁻¹² cm ⁻³ compared to 10 ⁻⁹ cm ⁻³ in conventional magnetrons and sputter reactors. Zero pressure conditions were also used to measure the amount of copper ionization. Spatial dependence is approximately equivalent to the amount of ionization that varies by about 10-20% due to direct dependence on DC target power. The relatively low ionization amount indicates that a SIP without long throw may have a large amount of neutral copper flow that may have the unfavorable deep filling properties of conventional PVD. The results show that high power operation is favorable for good step coverage due to increased ionization.

  [00137] The above test was repeated with the number of inner magnets in the Fu magnetron reduced to six. That is, the second magnetron has improved magnetic flux uniformity, thereby promoting a uniform sputter ion flow toward the wafer. The results are plotted in FIG. Curve 668 shows the ionic current for a target power of 12 kW and a pressure of 0 millitorr, and curve 670 shows the ionic current for 18 kW. The curves for 14 kW and 16 kW are intermediate. That is, the modified magnetron generates a more uniform ion current across the wafer, which also depends on the target power having a preferred high power.

  [00138] The relatively low ionization of 10% to 20% indicates a significant flow of neutral copper when compared to 90% to 100% IMP. Wafer bias can guide copper ions deep into the hole, while long throw does the same for neutral copper.

  [00139] A series of tests were used to determine the combined effect of throw and chamber pressure during sputter particle distribution. At zero chamber pressure, a 140 mm throw forms a distribution of about 45 degrees, a 190 mm throw forms a distribution of about 35 degrees, and a 290 mm throw forms a distribution of about 25 degrees. The pressure changed with a 190 mm throw. The central distribution remains approximately the same for 0, 0.5 and 1 millitorr. However, the low level end bulges to almost 101, showing some particle scattering at the highest pressure. These results are obtained with acceptable results less than 5 millitorr, but the preferred range is less than 2 millitorr, the more preferred range is less than 1 millitorr, and the most preferred range is 0.2 millitorr or less. It shows that there is. Also, as expected, the distribution is best for long throws.

  [00140] SIP films deposited in high aspect ratio holes have favorable upper sidewall coverage and are less likely to overhang. On the other hand, IMP films deposited in such holes have good bottom coverage and bottom corner coverage, but sidewall films tend to have insufficient coverage and tend to be rough. is there. The advantages of both types of sputtering can be combined by using two-step copper seed sputter deposition. In the first step, copper is deposited in an IMP reactor that produces a high density plasma, for example, by using an RF induction power source. Exemplary deposition conditions are 20-60 millitorr pressure, 1-3 kW RF coil power, 1-2 kW DC target power, and 150 W bias power. The first step provides good but rough bottom coverage and bottom sidewall coverage. In the second and preferably the next step, copper is deposited in a SIP reactor of the type described above that produces less copper ionization. Exemplary deposition conditions are 1 Torr pressure, 18-24 kW DC target power and 500 W bias power. The second step provides good and smooth upper sidewall coverage, and also smoothes the already deposited IMP layer. The covering film thickness in the two steps is preferably in the range of 50 to 100 nm for IMP deposition and 100 to 200 nm for the SIP layer. The coating thickness may be a ratio of 30:70 to 70:30. Alternatively, the SIP layer can be deposited before the IMP layer. After the copper seed layer is sputter deposited by the two-step process, the remaining portion of the hole is filled, for example, by electroplating.

  [00141] The SIP sidewall coverage can be a problem for very narrow high aspect ratio vias. A technology for vias of 0.13 μm or less is being developed. Below a coating thickness of about 100 nm, the sidewall coating can be discontinuous. As shown in the cross-sectional view of FIG. 21, undesired structures may form the SIP copper film 680 as a discontinuous film on the via sidewall 30 that includes voids or other defects 682. Defect 682 can be a lack of copper or a thin layer of copper that cannot act locally as an electroplating cathode. Nevertheless, the SIP copper film 680 is flat except for the defects 682 and well nucleates. In these challenging structures, it is advantageous to deposit a copper CVD seed layer 684 over the SIP copper kernel deposition 680. Since the film is deposited by chemical vapor deposition, the film is generally conformal and well nucleated by the SIP copper film 680. The CVD seed layer 684 repairs the defect 682 to complete the filling of the holes 22 and provides a continuous, non-rough seed layer for subsequent copper electroplating. The CVD layer can be deposited using the thermal process described above in a CVD chamber designed for copper deposition, such as the CuxZ chamber available from Applied Materials.

  [00142] An experiment was performed in which 20 nm CVD copper was alternately deposited on a SIP copper nucleation layer and an IMP nucleation layer. The combination with SIP formed a relatively smooth CVD seed layer, and the combination with IMP formed a fairly rough surface in the CVD layer that could be called discontinuous.

  [00143] The CVD layer 684 can be deposited, for example, to a thickness in the range of 5-20 nm. The remaining portion of the hole may be filled with copper by other methods. A very flat seed layer formed by CVD copper on top of the SIP copper nucleation layer enables efficient hole filling of copper by electroplating in the narrow vias formed or by conventional PVD techniques it can. Especially in the case of electroplating, the smooth copper nucleation layer and seed layer form a continuous, substantially uniform electrode that facilitates the electroplating process.

  [00144] In filling vias or other holes with very high aspect ratios, omit electroplating, and instead use a sufficiently thick CVD copper layer 688 as shown in the cross-sectional view of FIG. It is advantageous to deposit over the SIP copper nucleation layer 680 to completely fill the via. The advantage of CVD filling is that the need for a separate electroplating process can be eliminated. Electroplating also requires a fluid flow that is difficult to control in holes less than 0.13 μm wide.

  [00145] An advantage of the copper bilayer of this embodiment of the present invention is that it allows copper deposition to be performed with a relatively low amount of heat. Tantalum tends to dewet from the oxide film with a high amount of heat. IMP has many of the same coating advantages over deep hole filling, but IMP tends to work at fairly high temperatures because it produces a strong stream of argon ions that dissipates energy within the deposited layer. is there. In addition, IMP always embeds some argon in the deposited film. On the other hand, a relatively thin SIP layer is deposited at a relatively high rate, and the SIP process is essentially not hot because there is no argon. Also, the SIP deposition rate is much faster than with IMP because any hot deposition is about half as short.

  [00146] The amount of heat is also reduced by cold ignition of SIP plasma. The cold plasma ignition and processing sequence is shown in the flow diagram of FIG. After the wafer is inserted into the sputter reactor via a load lock valve, the load lock valve is closed and in step 690 the gas pressure is balanced. The argon chamber pressure is typically increased between 2 millitorr and about 5-10 millitorr to the pressure used for ignition, and an argon backside cooling gas is supplied to the backside of the wafer at a backside pressure of about 5-10 torr. The In step 692, the argon is ignited with a low level target power, typically in the range of 1-5 kW. After detecting that the plasma has ignited, in step 694, the chamber pressure is rapidly reduced, for example, in 3 seconds, with the target power held at a low level. When performing sustained self-sputtering, the argon supply to the chamber is stopped, but the plasma continues in SSS mode. In the case of self-ionized plasma sputtering, the supply of argon is reduced. The back surface cooling gas is continuously supplied. Once the argon pressure is reduced, in step 696, the target power is rapidly increased to the intended sputtering level, eg, 10-24 kW or higher for a 200 mm wafer selected for SIP or SSS sputtering. Will be increased. It is possible to combine steps 694 and 696 by increasing the power while reducing the pressure. In step 698, the target continues to operate at the selected level for the time required to sputter deposit the material material of the selected thickness. This ignition sequence is cooler than using the intended sputtering power level for ignition. A higher argon pressure facilitates ignition but has a detrimental effect on the sputtered neutral particles if continued at the high power level desired for sputter deposition. At low ignition power, very little copper is deposited at low power with reduced power. Pedestal cooling also keeps the wafer cool during the ignition process.

  [00147] Most features of the apparatus and process of the present invention can also be applied to sputtering without long throw.

  [00148] Although the present invention is currently particularly useful for copper interlayer metallization and barrier and liner deposition, different aspects of the present invention may be used for sputtering other materials and for other purposes. Can be applied.

  [00149] As described in co-pending application No. 10 / 202,778 (attorney registration number 4044) filed July 25, 2002, which is incorporated herein in its entirety. Can also be deposited in a sputter chamber similar to chamber 152 (FIG. 4) that produces both SIP and ICP plasma. When depositing in a chamber such as chamber 152, target 156 is formed of a deposition material such as, for example, copper. Further, the ICP coil 151 may be formed of the same deposition material, particularly when coil sputtering is desired for a part or all of the wiring metal deposition.

  [00150] As described above, the illustrated chamber 152 is capable of self-ionized sputtering of copper, including sustained self-sputtering. In this case, after the plasma is ignited, the supply of argon may be interrupted in the case of SSS, and the copper ions have a high enough density to resputter the copper target at two or more yields. Alternatively, provide some argon at a target power density that is insufficient to sustain pure sustained self-sputtering with a reduced flow rate and chamber pressure, or a substantial but reduced amount of self-sputtering. You may keep doing. As the argon pressure increases above about 5 millitorr, the argon removes energy from the copper ions and reduces self-sputtering. The wafer bias attracts ionized copper particles to the deep hole.

  [00151] However, to achieve deep hole coverage with some neutral flow, increasing the distance between the target 156 and the wafer 158, ie, operating in the long throw mode as described above. preferable. Controlled allocation between self-ionized plasma (SIP) sputtering, inductively coupled plasma (ICP) sputtering and sustained self-sputtering (SSS) controls the distribution between neutral and ionized sputtered particles Enable. Such control is particularly advantageous for sputter deposition of copper seed layers in high aspect ratio via holes. Control of the ionization amount of sputtered particles is realized by mixing self-ionized plasma (SIP) sputtering and inductively coupled plasma (ICP) sputtering.

  [00152] One embodiment of the structure according to the invention is the via shown in the cross-sectional view of FIG. The copper seed layer 700 can be formed using, for example, a long throw sputter reactor of the type shown in FIG. 4 under conditions that promote a combination of SIP and ICP and / or alternating SIP and ICP (the TaN barrier layer and One or more barrier layers such as a Ta liner layer and a liner layer (which may include a liner layer) are deposited in the via hole 702 over the liner layer 704. Here, the reactor has a target comprising copper or other seed layer deposition material. The SIP-ICP copper layer 700 may be deposited to a coating thickness of, for example, 50-300 nm, or more preferably 80-200 nm. The SIP-ICP copper seed layer 700 preferably has a thickness in the range of 2-20 nm, more preferably 7-15 nm, on the via sidewalls. Due to the narrow holes, the thickness of the side wall should not exceed 50 nm. The quality of the film is improved by reducing the temperature of the pedestal below 0 ° C., preferably below −40 ° C., because the coolness provided by fast SIP deposition becomes important.

  [00153] The SIP-ICP copper seed layer 700 is believed to have good bottom coverage and improved sidewall coverage. As will be described in detail below, the copper seed layer 700 redistributes the copper deposition material to increase the coverage at the inner bottom corners of the via, while leaving the central portion of the via bottom at a thin coating. As such, it can be re-sputtered either in a separate process or during the initial deposition. After the copper seed layer 700 has been deposited (redistributed as needed), the holes are preferably formed by electrochemical plating using the seed layer 700 as one of the electroplating electrodes, as shown in FIG. It can be filled with a copper layer similar to layer 347b '. However, the smooth structure of the SIP-ICP copper seed layer 700 also facilitates copper reflow or high temperature deposition by conventional sputtering or physical vapor deposition (PVD).

  [00154] In one embodiment, the SIP-ICP layer can be formed in a process that combines selected aspects of both SIP and ICP deposition methods into one step. In addition, the reactor 715 according to the alternative embodiment includes a second coil 716 and a coil 151 as shown in FIG. In a manner similar to coil 151, one end of coil 716 is insulatively coupled to the output of amplifier and matching network 717 via feedthrough standoff 182 and dark shield 164 '(FIG. 26). The input of matching network 717 is coupled to RF generator 718. The other end of coil 716 is insulatively coupled to ground via shield 164 ′ via feedthrough standoff 182 via blocking capacitor 719 to apply a DC bias to coil 716. The DC bias can be controlled by an independent DC power source 721.

  [00155] In an ICP process or a combined SIP-ICP process, RF energy is applied to one or both of the RF coils 151 and 716, for example at a frequency of 1-3 kW and 2 Mhz. Coils 151 and 716, when activated, inductively couple RF energy into the interior of the reactor. The RF energy generated by the coil ionizes a precursor gas, such as argon, to maintain the plasma and ionize the sputtered deposition material. However, rather than maintaining the plasma at a relatively high pressure, eg, 20-60 mTorr, typically for high density IMP processes, the pressure is preferably maintained at a much lower pressure, eg, 2 mTorr. The Thus, the ionization rate in reactor 150 is believed to be significantly lower than the ionization rate of a typical high density IMP process.

  [00156] Furthermore, as described above, the illustrated reactor 150 is also capable of self-ionized sputtering in long throw mode. Thus, the deposited material can be ionized not only by ionization as a result of the low pressure plasma maintained by the RF coil, but also by plasma self-generated by DC magnetron sputtering of the target. The combination of SIP and ICP ionization processes is believed to provide good bottom and bottom corner coverage for fully ionized material. However, the low ionization rate of the low-pressure plasma generated by the RF coils 151 and 716 can leave enough neutral sputter material unionized to deposit on the upper sidewall due to the long throw capability of the reactor. It can be considered to be. That is, it is believed that a combination of ionized deposition material SIP and ICP sources can achieve good upper sidewall coverage and good bottom and bottom corner coverage. In another embodiment, the power to the coils 151 and 716 is such that in one step, the power to the upper coil 726 is removed or reduced relative to the power applied to the lower coil 151. Applied alternately. In this step, the center of the inductively coupled plasma is shifted away from the target and close to the substrate. Such a configuration can reduce the interaction between self-ionized plasma generated near the target and inductively coupled plasma maintained by one or more of the coils. Thus, a high proportion of neutral sputtered material material can be maintained.

  [00157] In the second step, the power may be reversed so that the power to the lower coil 151 is removed or reduced relative to the power applied to the upper coil 716. In this step, the center of the inductively coupled plasma is moved away from the substrate toward the target. Such a configuration increases the proportion of ionized sputter material.

  [00158] In other embodiments, the layers are formed in a single process, referred to herein as a SIP process, with little or no RF power applied to either coil. Or you may form by the process beyond it. Also, the pressure is maintained at a relatively low level, preferably less than 5 mTorr, more preferably less than 2 mTorr, such as 1 mTorr. Furthermore, the power applied to the target is relatively high, for example in the range of 18-24 kWDC. For example, the substrate support may be biased at a power level of 500W. Under these conditions, it is believed that ionization of the deposited material occurs primarily as a result of self-ionized plasma (SIP). When combined with the long-throw mode configuration of the reactor, it is believed that good sidewall coverage can be achieved with low overhang. A portion of the layer deposited in this first step may be in the range of 1000-2000 mm, for example.

  [00159] In a second step, referred to herein as an ICP step, and preferably in the same chamber, RF power may be applied to one or both of coils 151 and 716. In one embodiment, the pressure may be substantially increased so that a high density plasma can be maintained. For example, the pressure may be increased to 20-60 mTorr, the RF power to the coil may be increased to a range of 1-3 kW, and the DC power to the target may be increased to 1-2 kW The bias to the support may be reduced to 150W. Under these conditions, ionization of the deposited material is believed to occur as a result of high density ICP. As a result, good bottom and bottom corner coverage can be achieved in the second step. As mentioned above, power can be applied to both coils simultaneously or alternately.

  [00160] After the copper seed layer is sputter deposited by a combined SIP and ICP process, the remaining portions of the holes can be filled by the same or another process. For example, the remaining portion of the hole can be filled by electroplating or CVD.

  [00161] The order of the SIP and ICP steps may be reversed, and in the SIP step, a constant RF power may be applied to one or more coils, and a constant self It should be appreciated that ionization may be included in the ICP process. Sustained self-sputtering (SSS) may also be included in one or more steps. That is, process parameters including pressure, power, and target wafer distance may vary depending on the particular application to achieve the desired result.

  [00162] As described above, the coils 151 and 516 can be operated independently or together. In one embodiment, the coils can be operated together, in which case the RF signal applied to one coil is another RF applied to the other coil so as to generate a helicon wave. The signal is out of phase. For example, the RF signal may be out of phase by a fraction of a wavelength as described in US Pat. No. 6,264,812.

  [00163] One embodiment of the present invention includes an integration process that is preferably implemented for an integrated multi-chamber tool, such as the Endura 5500 platform schematically illustrated in the plan view of FIG. The platform is functionally described in US Pat. No. 5,186,718 by Tepman et al.

[00164] Wafers that are already etched by via holes or other structures in the insulating layer are two independently configured to move wafers into and out of the system from wafer cassettes loaded into each load lock chamber. Intake and removal from the system via activated load lock chambers 732, 734. After the wafer cassette is loaded into the load lock chambers 732, 734, the chamber is pressurized to a moderately low pressure, for example, 10 ⁻³ to 10 ⁻⁴ torr, the load lock chamber and the first wafer. A slit valve between the transfer chamber 736 is opened. The pressure in the first wafer transfer chamber 736 is then maintained at the low pressure.

  [00165] The first robot 738 disposed in the first transfer chamber 736 transfers the wafer from the cassette to one of the two degassing / directing chambers 740, 742, and then hydrogen Alternatively, argon plasma is transferred to a first plasma preclean chamber 744 that cleans the surface of the wafer. If a CVD barrier layer is deposited, the first robot 738 passes the wafer to the CVD barrier chamber 746. After the CVD barrier layer is deposited, the robot 738 moves the wafer into the passage chamber 748, from which the second robot 750 transfers the wafer to the second transfer chamber 752. The slit valve separates the chambers 744, 746, 748 from the first transfer chamber 736 so as to separate the processing level and the pressure level.

  [00166] The second robot 750 selectively transfers wafers to and from the reaction chamber located around. The first IMP sputter chamber 754 is dedicated to copper deposition. A SIP sputter chamber 756, similar to chamber 410 described above, is dedicated to the deposition of a SIP copper seed layer or nucleation layer. This chamber combines SIP for bottom and sidewall coating and resputtering to improve bottom corner coverage in one step or in a multi-step process as described above. Further, for example, at least a part of the barrier layer made of Ta / TaN is deposited by SIP sputtering, coil sputtering, and ICP resputtering. Therefore, the SIP-ICP sputtering chamber 760 is formed in a reactive nitrogen plasma as much as possible. Specially designed for sputtering of heat-resistant metal. A similar SIP-ICP chamber 760 can be used to deposit refractory metals and their nitrides. The CVD chamber 758 is dedicated for copper nucleation, seed or liner layer deposition, or to complete the hole filling, or both. Each of the chambers 754, 756, 758, 760 is selectively opened relative to the second transfer chamber 752 by a slit valve. Different configurations can also be used. For example, the IMP chamber 754 may be replaced with a second CVD copper chamber, particularly if CVD is used to complete the hole filling.

  [00167] After low pressure processing, the second robot 750 may be a cooling chamber if the previous processing was hot, or an instantaneous thermal process (RTP) if metallization annealing is required. The wafer may be transferred to a thermal chamber 762 located in the middle. After heat treatment, the first robot 738 removes the wafer and returns the wafer to the cassette in one of the load lock chambers 732, 734. Of course other configurations are possible with which the invention can be implemented by means of an integrated process.

  [00168] The entire system is controlled by a computer-based controller 770 that operates through a control bus 772 that is connected to sub-controllers associated with each of the chambers. The process method is read into the controller 770 by a readable medium 774 such as a magnetic floppy disk or CD-ROM that can be inserted into the controller 770 or communicated with the communication link 776.

  [00169] Most features of the apparatus and process of the present invention can also be applied to sputtering without long throw. While the present invention is currently particularly useful for deposition of tantalum and tantalum nitride liner layers and copper intermetallization, different aspects of the present invention can be used for sputtering other materials and for other purposes. It can also be applied to. Provisional application 60 / 316,137, filed August 30, 2001, is focused on sputtering and resputtering techniques, which are incorporated herein.

  [00170] Modifications of the present invention, in its various aspects, will be apparent to those skilled in the art, some will become apparent after research, and others are ordinary mechanical and process designs, Naturally it will be understood. Other embodiments are possible and their specific design will depend on the specific application. Accordingly, the scope of the invention should not be limited by the specific embodiments described herein, but should be defined only by the appended claims and their equivalents.

410 ... plasma sputtering reactor, 412 ... vacuum chamber, 414 ... side wall, 416 ... sputtering target, 418 ... electrical isolator, 422 ... pedestal electrode, 424 ... wafer, 426 ... gas supply unit, 428 ... mass flow controller, 434 ... DC power supply 436 ... Magnetron, 438 ... Center axis, 440 ... Inner magnetic pole, 442 ... Outer pole, 444 ... Magnetic yoke, 446 ... Rotating arm, 448 ... Rotating shaft, 450 ... Motor, 454 ... RF power supply, 460 ... Auxiliary array, 462 ... Auxiliary magnet, BA1, BA2 ... Auxiliary magnetic field, BM ... Semi-toroidal magnetic field

Claims (22)

A method of depositing a metal in a hole having an aspect ratio of at least 4: 1 and formed in an insulating layer of a substrate,
Sputter depositing a deposition material comprising a metal into the hole in an inductively coupled plasma in a chamber;
Sputter depositing a deposition material comprising a metal into the hole in a self-ionized plasma in a chamber;
At least one of the sputter depositions includes resputtering the deposited material in the holes to remove deposited material deposited at the bottom of the holes, wherein at least one of the sputter depositions is disposed behind the target. Sputtering the target using a magnetron in a vacuum chamber having a sidewall disposed about a central axis, the method further comprising:
Directing ions through a processing space toward a substrate supported by a pedestal opposite the target along the central axis;
The target is separated from the pedestal by a throw distance that exceeds 50% of the diameter of the substrate,
Directing the ions toward the substrate uses an auxiliary magnet having a first magnetic pole along the central axis and at least partially disposed around the processing space;
The method wherein the auxiliary magnet does not extend into a region around the chamber wall surrounding half of the processing space towards the target .   The method of claim 1, further comprising filling the hole with a metal.   The method of claim 2, wherein the filling comprises electroplating.   The method of claim 1, wherein sputter deposition in the self-ionized plasma precedes sputter deposition in the inductively coupled plasma.   The method of claim 1, wherein sputter deposition in the self-ionized plasma and sputter deposition in the inductively coupled plasma are performed in the same chamber.   The method of claim 4, wherein sputter deposition in the inductively coupled plasma further comprises resputtering deposited material deposited in the self-ionized plasma in the inductively coupled plasma.   The method of claim 6, wherein the resputtering includes removing deposited material deposited at the bottom of the hole while depositing material on a sidewall of the hole.   The method of claim 1, wherein the sputter deposition in the self-ionized plasma deposits a deposition material comprising at least one of tantalum and tantalum nitride.   The method of claim 1, wherein the sputter deposition in the self-ionized plasma deposits a deposition material comprising copper.   The method of claim 1, wherein sputter deposition in the inductively coupled plasma deposits a deposition material comprising at least one of tantalum and tantalum nitride.   The method of claim 1, wherein the sputter deposition in the inductively coupled plasma deposits a deposition material comprising copper.   The method of claim 1, wherein sputter deposition in the inductively coupled plasma at least partially uses RF inductive coupling with a coil inside the chamber containing the inductively coupled plasma to form the inductively coupled plasma. . A tool for depositing metal in a hole having an aspect ratio of at least 4: 1 and formed in an insulating layer of a substrate,
A transfer chamber;
A deposition material coupled to the transfer chamber and adapted to form an inductively coupled plasma in the IMP chamber and comprising a metal is adapted to sputter deposit in the holes in the inductively coupled plasma. An IMP sputter chamber having an internal RF coil adapted to inductively couple RF energy to the inductively coupled plasma;
Coupled to the transfer chamber and adapted to form a self-ionized plasma in the SIP chamber and adapted to sputter deposit a metal-containing deposition material in the holes in the self-ionized plasma. A SIP chamber,
At least one of the IMP chamber and the SIP chamber includes a pedestal adapted to support the substrate and bias the substrate, a sidewall is disposed about a central axis, and a sputtering target is coupled to the pedestal. Oppositely disposed along the central axis, the sputtering target is separated from the pedestal by a throw distance that is greater than 50% of the aperture of the substrate, between the pedestal, the target, and the sidewall. A processing space is formed in the region, a magnetron is disposed on the opposite side of the processing space with respect to the target, an auxiliary magnet has a first magnetic pole property along the central axis, being at least partially disposed about the auxiliary magnet is half of the processing space toward the target It does not extend to the area around the chamber wall surrounding the,
Adapted to bias the substrate to control the pedestal to attract plasma ions and resputter the deposited material in the hole to remove deposited material deposited at the bottom of the hole. A tool further comprising a controller. The SIP chamber is
Side walls arranged around the central axis;
A pedestal that supports the substrate in the SIP chamber;
A sputtering target disposed opposite to the pedestal along the central axis, wherein a processing space is formed in a region between the pedestal, the target, and the sidewall; ,
A magnetron disposed on the side of the target facing the processing space;
14. A tool according to claim 13, comprising an auxiliary magnet having a first magnetic pole along the central axis and disposed at least partially around the processing space.   The IMP chamber has a pedestal adapted to support and bias the substrate, and the tool controls the pedestal to attract ions of the inductively coupled plasma to deposit material. 14. A tool according to claim 13, comprising a controller adapted to bias the substrate to resputter.   The tool of claim 15, wherein the resputtering includes removing deposited material deposited at the bottom of the hole while depositing material on a sidewall of the hole.   The tool of claim 13, wherein the SIP chamber has a sputter target comprising tantalum.   The tool of claim 13, wherein the SIP chamber has a sputter target comprising copper.   The tool of claim 13, wherein the IMP chamber has a sputter target comprising tantalum.   The tool of claim 13, wherein the IMP chamber has a sputter target comprising copper.   The method of claim 1, wherein the throw distance is greater than 140% of the substrate aperture.   The tool of claim 13, wherein the throw distance exceeds 140% of the diameter of the substrate.

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