JP5790029B2 - 復号装置、復号方法、およびプログラム - Google Patents

復号装置、復号方法、およびプログラム Download PDF

Info

Publication number
JP5790029B2
JP5790029B2 JP2011043720A JP2011043720A JP5790029B2 JP 5790029 B2 JP5790029 B2 JP 5790029B2 JP 2011043720 A JP2011043720 A JP 2011043720A JP 2011043720 A JP2011043720 A JP 2011043720A JP 5790029 B2 JP5790029 B2 JP 5790029B2
Authority
JP
Japan
Prior art keywords
decoding
circuit
bit
parity check
ldpc
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2011043720A
Other languages
English (en)
Japanese (ja)
Other versions
JP2012182623A (ja
JP2012182623A5 (enExample
Inventor
山岸　弘幸
弘幸 山岸
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP2011043720A priority Critical patent/JP5790029B2/ja
Priority to US13/357,840 priority patent/US8762812B2/en
Priority to CN2012100431018A priority patent/CN102655413A/zh
Publication of JP2012182623A publication Critical patent/JP2012182623A/ja
Publication of JP2012182623A5 publication Critical patent/JP2012182623A5/ja
Application granted granted Critical
Publication of JP5790029B2 publication Critical patent/JP5790029B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1105—Decoding
    • H03M13/1128—Judging correct decoding and iterative stopping criteria other than syndrome check and upper limit for decoding iterations
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/3746—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35 with iterative decoding
    • H03M13/3753—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35 with iterative decoding using iteration stopping criteria
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1105—Decoding
    • H03M13/1131—Scheduling of bit node or check node processing
    • H03M13/1137—Partly parallel processing, i.e. sub-blocks or sub-groups of nodes being processed in parallel
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1105—Decoding
    • H03M13/1131—Scheduling of bit node or check node processing
    • H03M13/114—Shuffled, staggered, layered or turbo decoding schedules
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H03M13/134—Non-binary linear block codes not provided for otherwise
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2948—Iterative decoding
    • H03M13/2951—Iterative decoding using iteration stopping criteria
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2957—Turbo codes and decoding
    • H03M13/296—Particular turbo code structure
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2957—Turbo codes and decoding
    • H03M13/2975—Judging correct decoding, e.g. iteration stopping criteria
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/35—Unequal or adaptive error protection, e.g. by providing a different level of protection according to significance of source information or by adapting the coding according to the change of transmission channel characteristics
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/3738—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35 with judging correct decoding
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/3746—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35 with iterative decoding
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045—Arrangements at the receiver end
    • H04L1/0047—Decoding adapted to other signal detection operation
    • H04L1/005—Iterative decoding, including iteration between signal detection and decoding operation
    • H04L1/0051—Stopping criteria
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0061—Error detection codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0064—Concatenated codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/02—Arrangements for detecting or preventing errors in the information received by diversity reception
    • H04L1/06—Arrangements for detecting or preventing errors in the information received by diversity reception using space diversity
    • H04L1/0618—Space-time coding
    • H04L1/0625—Transmitter arrangements
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/02—Arrangements for detecting or preventing errors in the information received by diversity reception
    • H04L1/06—Arrangements for detecting or preventing errors in the information received by diversity reception using space diversity
    • H04L1/0618—Space-time coding
    • H04L1/0631—Receiver arrangements

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Error Detection And Correction (AREA)
JP2011043720A 2011-01-03 2011-03-01 復号装置、復号方法、およびプログラム Active JP5790029B2 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2011043720A JP5790029B2 (ja) 2011-03-01 2011-03-01 復号装置、復号方法、およびプログラム
US13/357,840 US8762812B2 (en) 2011-01-03 2012-01-25 Decoding device, decoding method, and program
CN2012100431018A CN102655413A (zh) 2011-03-01 2012-02-23 解码装置、解码方法和程序

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2011043720A JP5790029B2 (ja) 2011-03-01 2011-03-01 復号装置、復号方法、およびプログラム

Publications (3)

Publication Number Publication Date
JP2012182623A JP2012182623A (ja) 2012-09-20
JP2012182623A5 JP2012182623A5 (enExample) 2014-04-17
JP5790029B2 true JP5790029B2 (ja) 2015-10-07

Family

ID=46381902

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2011043720A Active JP5790029B2 (ja) 2011-01-03 2011-03-01 復号装置、復号方法、およびプログラム

Country Status (3)

Country Link
US (1) US8762812B2 (enExample)
JP (1) JP5790029B2 (enExample)
CN (1) CN102655413A (enExample)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8640013B2 (en) * 2011-09-22 2014-01-28 Kabushiki Kaisha Toshiba Storage device
US9612903B2 (en) * 2012-10-11 2017-04-04 Micron Technology, Inc. Updating reliability data with a variable node and check nodes
US9116822B2 (en) 2012-12-07 2015-08-25 Micron Technology, Inc. Stopping criteria for layered iterative error correction
US11206042B2 (en) 2017-03-09 2021-12-21 Lg Electronics Inc. Layered decoding method for LDPC code and device therefor
KR102247164B1 (ko) * 2020-06-23 2021-05-03 한국과학기술원 채널 복호기의 동작과 결합한 플래시 메모리 읽기 방법 및 그 장치

Family Cites Families (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6944803B2 (en) * 2000-07-06 2005-09-13 Her Majesty The Queen In Right Of Canada, As Represented By The Minister Of Industry Through The Communications Research Centre Canada Code structure, encoder, encoding method, and associated decoder and decoding method and iteratively decodable code structure, encoder, encoding method, and associated iterative decoder and iterative decoding method
US20040109507A1 (en) * 2002-12-06 2004-06-10 Ido Kanter Sequential decoding of parity check codes
US7103825B2 (en) * 2003-08-19 2006-09-05 Mitsubishi Electric Research Laboratories, Inc. Decoding error-correcting codes based on finite geometries
JP4296949B2 (ja) * 2004-02-03 2009-07-15 ソニー株式会社 復号装置及び方法、並びに情報処理装置及び方法
KR100630177B1 (ko) * 2004-02-06 2006-09-29 삼성전자주식회사 최대 다이버시티 이득을 가지는 시공간 저밀도 패리티검사 부호 부호화/복호화 장치 및 방법
KR100924189B1 (ko) * 2004-12-02 2009-10-29 미쓰비시덴키 가부시키가이샤 복호 장치 및 통신 장치
US7373585B2 (en) * 2005-01-14 2008-05-13 Mitsubishi Electric Research Laboratories, Inc. Combined-replica group-shuffled iterative decoding for error-correcting codes
EP1717959A1 (en) * 2005-04-29 2006-11-02 STMicroelectronics N.V. Method and device for controlling the decoding of a LDPC encoded codeword, in particular for DVB-S2 LDPC encoded codewords
US7810014B2 (en) * 2005-11-07 2010-10-05 Samsung Electronics Co., Ltd. Apparatus and method for stopping iterative decoding in a mobile communication system
JP4229948B2 (ja) * 2006-01-17 2009-02-25 Ｎｅｃエレクトロニクス株式会社 復号装置、復号方法、及び受信装置
EP1841073A1 (en) * 2006-03-29 2007-10-03 STMicroelectronics N.V. Fast convergence LDPC decoding using BCJR algorithm at the check nodes
US8184712B2 (en) * 2006-04-30 2012-05-22 Hewlett-Packard Development Company, L.P. Robust and efficient compression/decompression providing for adjustable division of computational complexity between encoding/compression and decoding/decompression
JP4253332B2 (ja) 2006-07-03 2009-04-08 株式会社東芝 復号装置、方法およびプログラム
US20080052594A1 (en) * 2006-07-28 2008-02-28 Yedidia Jonathan S Method and system for replica group-shuffled iterative decoding of quasi-cyclic low-density parity check codes
JP4208017B2 (ja) * 2007-02-16 2009-01-14 ソニー株式会社 復号方法および復号装置
US8261170B2 (en) * 2007-06-19 2012-09-04 Mitsubishi Electric Research Laboratories, Inc. Multi-stage decoder for error-correcting codes
US7958429B2 (en) * 2007-07-02 2011-06-07 Broadcom Corporation Distributed processing LDPC (low density parity check) decoder
US20090113256A1 (en) * 2007-10-24 2009-04-30 Nokia Corporation Method, computer program product, apparatus and device providing scalable structured high throughput LDPC decoding
JP4462342B2 (ja) * 2007-12-18 2010-05-12 ソニー株式会社 復号装置および復号方法
JP2009225164A (ja) * 2008-03-17 2009-10-01 Toshiba Corp 復号装置および復号装置を有するテレビジョン受信機
JP2009290657A (ja) * 2008-05-30 2009-12-10 Fujitsu Ltd 誤り訂正装置
JP4881355B2 (ja) * 2008-08-19 2012-02-22 日本放送協会 Ｌｄｐｃ符号の符号化器及び復号器、並びにプログラム、送信装置及び受信装置
FR2944660B1 (fr) * 2009-04-16 2011-09-09 St Microelectronics Sa Decodeur ldpc
US20110138255A1 (en) * 2009-12-09 2011-06-09 Lee Daniel Chonghwan Probabilistic Learning-Based Decoding of Communication Signals
US8656249B2 (en) * 2011-09-07 2014-02-18 Lsi Corporation Multi-level LDPC layer decoder

Also Published As

Publication number Publication date
JP2012182623A (ja) 2012-09-20
US20120173954A1 (en) 2012-07-05
US8762812B2 (en) 2014-06-24
CN102655413A (zh) 2012-09-05

Similar Documents

Publication Publication Date Title
US9075738B2 (en) Efficient LDPC codes
EP1829223B1 (en) Parallel, layered decoding for Low-Density Parity-Check (LDPC) codes
US8549375B2 (en) Decoder and decoding method for low-density parity check codes constructed based on reed-solomon codes
JP4062435B2 (ja) 誤り訂正符号復号装置
JP3727938B2 (ja) Ｌｄｐｃ復号化装置及びその方法
US8205130B2 (en) Decoding apparatus
KR101718543B1 (ko) 개선된 비트 반전 알고리즘 기반의 저밀도 패리티 검사 부호를 위한 복호 방법, 장치 및 이를 위한 기록 매체
JP2019517209A (ja) 構造的ｌｄｐｃの符号化、復号化方法および装置
JP5790029B2 (ja) 復号装置、復号方法、およびプログラム
CN103069720A (zh) 纠错解码装置及纠错解码方法
CN110830050A (zh) 一种ldpc译码方法、系统、电子设备及存储介质
JP4572937B2 (ja) 復号装置および方法、プログラム、並びに記録媒体
JP4651600B2 (ja) 低密度パリティ検査復号器における検査ノード更新方法
KR20080035585A (ko) Ｌｄｐｃ 코드용 디코더 및 ｌｄｐｃ 디코딩 방법
US8572462B2 (en) Decoding apparatus and decoding method
JP4832447B2 (ja) チャネルコードを用いた復号化装置及び方法
Ghaffari et al. Probabilistic gradient descent bit-flipping decoders for flash memory channels
JP5385944B2 (ja) 復号器
CN106130565A (zh) 一种由rc‑ldpc分组码获得rc‑ldpc卷积码的方法
CN117220689B (zh) 一种基于模型驱动深度学习的非二进制ldpc译码方法
Imani et al. An iterative bit flipping based decoding algorithm for LDPC codes
CN111181570A (zh) 基于fpga的编译码方法和装置
Porcello Implementing High data rate, low density parity check (LDPC) decoders for large codes using FPGAs
JP2008167357A (ja) 低密度パリティ検査符号データを復号する復号方法、装置及びプログラム
JP2010130342A (ja) 復号器

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20140303

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20140303

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20141126

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20150108

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20150226

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20150707

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20150720

R151 Written notification of patent or utility model registration

Ref document number: 5790029

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R151

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250