JP5733039B2 - Circuit board manufacturing method - Google Patents

Description

The present invention relates to a manufacturing method of the circuit board, and more particularly to a process for the preparation of that will be mounted circuits board by chip components wire bonding.

  As a conventional circuit board, for example, a circuit board used in a passive component built-in interposer described in Patent Document 1 is known. FIG. 13 is a cross-sectional structure diagram of the passive component built-in interposer described in Patent Document 1.

  The passive component built-in interposer includes a circuit board 500 and a semiconductor element 502. A plurality of connection conductor layers 504 are provided on the main surface of the circuit board 500. The semiconductor element 502 is mounted on the main surface of the circuit board 500. A land (not shown) on the circuit board 500 and the connection conductor layer 504 are connected by a wire 506.

  By the way, in the circuit board 500, there is a possibility that a connection failure between the connection conductor layer 504 and the wire 506 occurs as described below. FIG. 14 is a diagram illustrating a state in which the wire 506 is connected to the connection conductor layer 504. FIG. 15 is an enlarged view of the connection conductor layer 504 when the wire 506 is connected.

  As shown in FIG. 14A, the capillary 600 holds the tip of the wire 602 and thermocompresses the tip of the wire 602 to the land of the semiconductor element 502. Next, as shown in FIG. 14B, the capillary 600 moves to the upper surface of the connection conductor layer 504 while feeding the wire 602, and the tip of the wire 602 is thermocompression bonded to the connection conductor layer 504. Finally, the capillary 600 is moved upward while holding the tip of the wire 602 as shown in FIG. At this time, the wire 602 is detached from the wire 506.

  Here, the upper surface of the connection conductor layer 504 is formed so as to face vertically upward. However, the upper surface of the connection conductor layer 504 may be slightly inclined due to manufacturing variations. As shown in FIG. 15, when the upper surface of the connection conductor layer 504 is inclined so as to face the semiconductor element 502, when the wire 506 is pressed, the tip of the capillary 600 holding the wire 506 and the connection conductor layer 504 are pressed. A slight gap is formed between the upper surface of the substrate. As a result, the wire 506 is not sufficiently crimped to the connection conductor layer 504. That is, connection failure between the connection conductor layer 504 and the wire 506 may occur.

International Publication No. 2008/066028 Pamphlet

An object of the present invention is to provide a method for producing a Ru can be suppressed circuitry substrate that the connection defect occurs in the wire bonding.

A circuit board manufacturing method according to an embodiment of the present invention is a circuit board manufacturing method in which chip components are mounted by wire bonding, and a plurality of first insulator layers and cavities are formed at predetermined positions. A first step of preparing a second insulator layer; a second step of forming a connection conductor to which a wire used for connection to the chip component is connected to the first insulator layer; and the connection A third step of obtaining a substrate body by laminating and pressure-bonding the plurality of first insulator layers and the second insulator layer so that a conductor is covered with the second insulator layer; A fourth step of removing the insulating layer, and a main surface of the first insulating layer on which the connection conductor is formed is provided with a mounting region on which the chip component is mounted. A mounting surface, and the connection conductor is a plan view from a normal direction of the mounting surface. The first region and the second region that is further away from the mounting region than the first region, and in the third step, the first region and the cavity are The plurality of first insulator layers and the second insulator layer are stacked so as to overlap each other.

  ADVANTAGE OF THE INVENTION According to this invention, it can suppress that a connection defect generate | occur | produces in wire bonding.

1 is a cross-sectional structure diagram of a circuit module according to a first embodiment. It is the figure which planarly viewed the circuit module. It is an enlarged view of the area | region B of FIG. It is process sectional drawing at the time of manufacture of a circuit board. It is process sectional drawing at the time of manufacture of a circuit board. It is a sectional structure figure of a circuit module concerning a 2nd embodiment. It is an enlarged view of the area | region B of FIG. It is a sectional structure figure of a ceramic green sheet. It is the figure which planarly viewed the ceramic green sheet. It is process sectional drawing at the time of manufacture of a circuit board. It is a cross-section figure of the ceramic green sheet concerning the 1st modification. It is a cross-section figure of the ceramic green sheet concerning the 2nd modification. It is a cross-section figure of the passive component built-in interposer of patent documents 1. It is the figure which showed a mode that a wire was connected to a connection conductor layer. It is an enlarged view of the connection conductor layer when a wire is connected.

Hereinafter, a method for manufacturing of the circuit board according to an embodiment of the present invention.

(First embodiment)
(Configuration of circuit board and circuit module)
The configurations of the circuit board and the circuit module according to the first embodiment will be described below with reference to the drawings. FIG. 1 is a cross-sectional structure diagram of a circuit module 10 according to the first embodiment. FIG. 2 is a plan view of the circuit module 10. FIG. 3 is an enlarged view of region B in FIG.

  As illustrated in FIG. 1, the circuit module 10 includes a circuit board 12, a semiconductor element (chip component) 14, and wires W. In the circuit module 10, the semiconductor element 14 is mounted on the circuit board 12 by wire bonding.

  The circuit board 12 includes a board body 13, land electrodes 16, internal conductor layers 18 and 20, and via-hole conductors V. The substrate body 13 is a rectangular laminated body formed by laminating a plurality of insulator layers 30 (30a to 30e), and is a so-called LTCC (Low Temperature Co-fired Ceramics) substrate. Hereinafter, the stacking direction of the substrate bodies 13 is defined as the z-axis direction. Further, as shown in FIG. 2, when the substrate body 13 is viewed in plan from the z-axis direction, the direction in which the long side extends is defined as the x-axis direction, and the direction in which the short side extends is defined. It is defined as the y-axis direction.

  As shown in FIGS. 1 and 2, the substrate body 13 has a mounting surface S1. The mounting surface S1 is a main surface on the positive side in the z-axis direction of the substrate body 13 and has a mounting region A0. As shown in FIG. 2, the mounting area A0 is defined by the mounting surface S1, and is a rectangular area on which the semiconductor element 14 is mounted.

  The inner conductor layers 18 and 20 are laminated together with the insulator layer 30 and are built in the substrate body 13. The internal conductor layers 18 and 20 function as wirings, capacitor conductors, ground conductors, inductors and the like in the substrate body 13.

  The land electrode 16 is a conductor layer provided on the mounting surface S <b> 1 and to which a wire W used for connection with the semiconductor element 14 is connected. More specifically, as shown in FIG. 2, the land electrode 16 has a rectangular shape when viewed from the positive side in the z-axis direction, and a plurality of land electrodes 16 are provided so as to surround the mounting region A0. . In addition to land electrodes 16, land electrodes and wirings are provided on the mounting surface S1, but these are omitted in FIGS.

  The via-hole conductor V is an interlayer connection conductor that penetrates the insulator layer 30a in the z-axis direction. The end of the via-hole conductor V on the positive side in the z-axis direction is connected to the land electrode 16. The end of the via-hole conductor V on the negative direction side in the z-axis direction is connected to the internal conductor layer 20 provided on the most positive side in the z-axis direction of the internal conductor layer 20. In addition to the via hole conductor V, a via hole conductor is provided in the substrate body 13, but is omitted in FIGS. 1 to 3.

  The semiconductor element 14 is mounted on the mounting area A0 of the mounting surface S1, and is a chip component having a rectangular plate shape. The semiconductor element 14 is fixed to the mounting area A0 with a conductive adhesive or the like. A plurality of external electrodes 15 are provided on the main surface of the semiconductor element 14 on the positive side in the z-axis direction so as to be arranged along the outer edge of the main surface.

  The wire W is a wiring that connects the circuit board 12 and the semiconductor element 14. More specifically, one end of the wire W is connected to the land electrode 16 of the circuit board 12. The other end of the wire W is connected to the external electrode 15 of the semiconductor element 14.

  By the way, the circuit module 10 has a configuration for reducing the occurrence of poor connection in wire bonding. The configuration will be described below.

  As shown in FIGS. 2 and 3, the land electrode 16 has regions A1 and A2. The region A1 is a straight line passing through the center of the land electrode 16 (intersection of diagonal lines), and is a region closer to the mounting region A0 than a straight line parallel to the side of the mounting region A0 closest to the land electrode 16. The region A2 is a straight line passing through the center of the land electrode 16 (intersection of diagonal lines), and is a region farther from the mounting region A0 than a straight line parallel to the side of the mounting region A0 closest to the land electrode 16. Therefore, the area A2 is farther from the mounting area A0 than the area A1. The boundary between the region A1 and the region A2 (a straight line passing through the center of the land electrode 16 (intersection of diagonal lines) and parallel to the side of the mounting region A0 closest to the land electrode 16) is an example. . Therefore, even if the boundary is a straight line passing through the center of the land electrode 16 (intersection of diagonal lines) and closer to the mounting area A0 than a straight line parallel to the side of the mounting area A0 closest to the land electrode 16. It may be behind the mounting area A0.

  Further, as shown in FIG. 1, the inner conductor layer 20 is arranged in a line in the z-axis direction on the negative side of the land electrode 16 in the z-axis direction. As shown in FIGS. 1 and 3, when viewed in plan from the z-axis direction, the number of internal conductor layers 20 with which the region A1 overlaps is greater than the number of internal conductor layers 20 with which the region A2 overlaps. Many.

  The via-hole conductor V is connected to the land electrode 16 and arranged so that the end on the positive side in the z-axis direction is covered with the land electrode 16. Therefore, the end of the via-hole conductor V on the positive side in the z-axis direction extends over the region A1 and the region A2. Therefore, as shown in FIG. 1, the number of the inner conductor layers 20 where the portions located in the region A1 of the via-hole conductor V overlap each other is the number of the inner conductor layers 20 overlapped in the region A2 of the via-hole conductor V. More than the number of inner conductor layers 20.

  As described above, the internal conductor layer 20 has a larger number of internal conductor layers 20 with which the region A1 overlaps than the number of internal conductor layers 20 with which the region A2 overlaps. The conductor V and the land electrode 16 are inclined. More specifically, the thickness of the substrate main body 13 in the region A1 in the z-axis direction is larger than the thickness of the substrate main body 13 in the region A2 in the z-axis direction by the difference in thickness of the number of internal conductor layers 20. Therefore, as will be described later, when the circuit board 12 is pressure-bonded, the upper surface of the via-hole conductor V on the positive side in the z-axis direction and the land electrode 16 are changed from the region A1 to the region A2 (that is, from the positive direction side in the x-axis direction). ) As it advances, it inclines to advance toward the negative direction side in the z-axis direction. That is, the normal line L2 at the boundary between the area A1 and the area A2 is inclined to the opposite side of the mounting area A0 from the normal line L1 of the mounting surface S1, as shown in FIG. And the wire W is connected to the boundary vicinity of area | region A1 and area | region A2, as shown in FIG.

(Circuit board manufacturing method)
Next, a method for manufacturing the circuit board 12 will be described with reference to the drawings. 4 and 5 are process cross-sectional views when the circuit board 12 is manufactured. 4 and 5, the drawings are described focusing on one circuit board 12, but actually, a mother circuit board is created by laminating large ceramic green sheets, and the mother circuit board is Cut into individual circuit boards 12.

  First, as shown to Fig.4 (a), the ceramic green sheets 130a-130e which should become the insulator layers 30a-30e are prepared. The ceramic green sheets 130a to 130e are materials containing Ba, Al, and Si. The firing temperature of the ceramic green sheets 130a to 130e is, for example, about 950 ° C. Films 134a to 134e are provided on the surfaces (hereinafter referred to as surfaces) on the positive side in the z-axis direction of the ceramic green sheets 130a to 130e. Moreover, the surface on the negative direction side in the z-axis direction of the ceramic green sheets 130a to 130e is referred to as a back surface.

  Next, the via-hole conductor V and the inner conductor layers 18 and 20 are formed on the ceramic green sheet 130. Since these forming steps are common to the ceramic green sheets 130a to 130e, the following description will be given by taking the forming steps in the ceramic green sheet 130a as an example.

  Next, as shown in FIG. 4B, a via hole H is formed by irradiating the film 134 a and the ceramic green sheet 130 a with a beam from the positive direction side in the z-axis direction. The via hole H is formed at a position where the via hole conductor V is to be formed. Therefore, a plurality of via holes H are formed so as to surround the mounting region A0. Here, since the beam is irradiated from the surface side of the ceramic green sheet 130, the via hole H has a truncated cone shape whose diameter decreases toward the negative direction side in the z-axis direction.

  Next, as shown in FIG. 4C, the via hole H is filled with a conductive paste containing Ag, Cu, or an alloy thereof to form the via hole conductor V. Thereby, a plurality of via-hole conductors V are formed so as to surround the mounting area A0.

  Next, as shown in FIG. 4D, a conductive paste containing Ag, Cu, or an alloy thereof is applied by screen printing, and the inner conductor layers 18, 20 are formed on the back surface of the ceramic green sheet 130a. Form.

  Next, as shown in FIG. 5, the ceramic green sheets 132a, 130a to 130e, 132b are stacked and pressure-bonded so as to be arranged in this order from the positive side in the z-axis direction to the negative side, thereby obtaining the mother substrate body 113. . The ceramic green sheets 132a and 132b are alumina sheets called constrained layers. Note that the base electrode 116 on the surface side in contact with the constraining layer 132a of the ceramic green sheet 130a is formed by film transfer or transfer via the constraining layer 132a in lamination and pressure bonding. The firing temperature of the ceramic green sheets 130a to 130e is, for example, 1200 ° C.

  Here, when the mother substrate body 113 is formed, lamination is performed so as to satisfy the following two conditions. The first condition is that the ceramic green sheets 130 and 132 are laminated so that the ceramic green sheet 130a on which the base electrode 116 is formed is positioned at the end on the positive side in the z-axis direction of the plurality of ceramic green sheets 130a to 130e. And crimping. The second condition is that the ceramic green sheets 130a to 130e are laminated so that the number of the internal conductor layers 20 where the region A1 overlaps is larger than the number of the internal conductor layers 20 where the region A2 overlaps. It is.

  By laminating the ceramic green sheets 130 and 132 so as to satisfy the above two conditions, the thickness in the z-axis direction of the mother substrate body 113 in the region A1 during compression bonding is such that the z of the mother substrate body 113 in the region A2 is z. It becomes larger than the thickness in the axial direction by the thickness of the inner conductor layer 20. Thereby, the upper surface of the via-hole conductor V on the positive side in the z-axis direction and the land electrode 16 are inclined so as to advance toward the negative direction side in the z-axis direction as it proceeds toward the positive direction side in the x-axis direction. That is, the normal line L2 at the boundary between the area A1 and the area A2 is inclined to the opposite side of the mounting area A0 from the normal line L1 of the mounting surface S1, as shown in FIG.

  Next, the unfired mother substrate body 113 is fired. For example, baking is performed for 1000 minutes at a baking temperature of 970 ° C. in a nitrogen atmosphere. At this time, the ceramic green sheets 132a and 132b are not fired. Therefore, shrinkage in the main surface direction during firing of the ceramic green sheet 130 is suppressed.

  Next, the insulator layer on which the ceramic green sheet 132 is fired is removed by sandblasting.

  Next, a plurality of circuit boards 12 are obtained by cutting the mother board body 113 with a dicer or the like.

  Finally, the land electrode 16 is formed by performing Ni plating and Sn plating on the base electrode 116. Through the above steps, the circuit board 12 shown in FIG. 1 is completed.

(effect)
According to the manufacturing method of the circuit board 12, the circuit module 10, and the circuit board 12 as described above, it is possible to suppress the occurrence of connection failure in wire bonding. More specifically, in the circuit board 500 described in Patent Document 1, the upper surface of the connection conductor layer 504 may be slightly inclined due to manufacturing variations. As shown in FIG. 15, when the upper surface of the connection conductor layer 504 is inclined so as to face the semiconductor element 502, when the wire 506 is pressed, the tip of the capillary 600 holding the wire 506 and the connection conductor layer 504 are pressed. A slight gap is formed between the upper surface of the substrate. As a result, the wire 506 is not sufficiently crimped to the connection conductor layer 504. That is, connection failure between the connection conductor layer 504 and the wire 506 may occur.

  Therefore, in the method of manufacturing the circuit board 12, the circuit module 10, and the circuit board 12, the number of the inner conductor layers 20 where the area A1 of the land electrode 16 overlaps is the number of the inner conductor layers 20 where the area A2 of the land electrode 16 overlaps. More than the number of Thereby, at the time of pressure bonding, the thickness of the substrate body 13 in the region A1 in the z-axis direction is larger than the thickness of the substrate body 13 in the region A2 in the z-axis direction by the thickness of the internal conductor layer 20. Thereby, the upper surface of the via-hole conductor V on the positive side in the z-axis direction and the land electrode 16 are inclined so as to advance toward the negative direction side in the z-axis direction as it proceeds toward the positive direction side in the x-axis direction. That is, the normal line L2 at the boundary between the area A1 and the area A2 is inclined to the opposite side of the mounting area A0 from the normal line L1 of the mounting surface S1, as shown in FIG. When the normal line L2 is inclined to the opposite side of the mounting area A0 from the normal line L1, when the wire W is pressed on the land electrode 16, the tip of the capillary holding the wire W (particularly in the mounting area A0). The formation of a gap between the tip of the near capillary) and the land electrode 16 is suppressed. As a result, the wire W is sufficiently crimped to the land electrode 16. As described above, in the circuit module 10, the occurrence of poor connection between the land electrode 16 and the wire W is suppressed.

  Moreover, in the manufacturing method of the circuit board 12, the circuit module 10, and the circuit board 12, it can suppress that a connection defect generate | occur | produces in wire bonding also for the following reasons. More specifically, the via-hole conductor V straddles the regions A1 and A2. Therefore, the proportion of the insulating layer 30 in the substrate body 13 is less in the region A1 than the region A2 by the length of the via-hole conductor V. Here, the via-hole conductor V is less likely to be deformed than the insulator layer 30. Therefore, in the circuit board 12 and the circuit module 10, the difference between the thickness in the z-axis direction of the substrate body 13 in the region A1 and the thickness in the z-axis direction of the substrate body 13 in the region A2 is that the via-hole conductor V is provided. Only, it is difficult to be absorbed by the insulator layer 30. Thereby, the upper surface of the via-hole conductor V on the positive side in the z-axis direction and the land electrode 16 are more easily inclined. As a result, the occurrence of connection failure in wire bonding is suppressed.

  Note that the range of the angle θ formed by the normal line L1 and the normal line L2 that suppresses the occurrence of poor connection between the land electrode 16 and the wire W is as follows. Experiments have found that 4 ° is optimal. Thus, even if the angle θ varies due to manufacturing variations, the normal line L2 can be inclined to the opposite side of the mounting area A0 with respect to the normal line L1 in most circuit boards 12.

(Second Embodiment)
(Configuration of circuit board and circuit module)
The configurations of the circuit board and the circuit module according to the second embodiment will be described below with reference to the drawings. FIG. 6 is a cross-sectional structure diagram of a circuit module 10a according to the second embodiment. FIG. 7 is an enlarged view of region B in FIG. Below, it demonstrates focusing on the difference between the circuit module 10 and the circuit module 10a.

  In the circuit module 10, the number of the internal conductor layers 20 where the area A <b> 1 of the land electrode 16 overlaps is larger than the number of the internal conductor layers 20 where the area A <b> 2 of the land electrode 16 overlaps. On the other hand, in the circuit module 10a, the number of the internal conductor layers 18 where the area A1 of the land electrode 16 overlaps may be larger or smaller than the number of the internal conductor layers 18 where the area A2 of the land electrode 16 overlaps. . However, also in the circuit module 10a, as in the circuit module 10, the normal line L2 at the boundary between the area A1 and the area A2 is opposite to the mounting area A0 rather than the normal line L1 of the mounting surface S1, as shown in FIG. Tilt to the side. And the wire W is connected to the boundary vicinity of area | region A1 and area | region A2, as shown in FIG. The circuit module 10a as described above is different from the circuit module 10 in its manufacturing method. Below, the manufacturing method of the circuit module 10a is demonstrated.

(Circuit board manufacturing method)
Next, a method for manufacturing the circuit board 12a will be described with reference to the drawings. FIG. 8 is a cross-sectional structure diagram of the ceramic green sheet 132a. FIG. 9 is a plan view of the ceramic green sheet 132a. FIG. 10 is a process cross-sectional view at the time of manufacturing the circuit board 12a. FIG. 4 is used as a process cross-sectional view of the circuit board 12a. Below, it demonstrates centering around the difference between the manufacturing method of the circuit board 12, and the manufacturing method of the circuit board 12a.

  The steps shown in FIGS. 4A to 4D in the circuit board 12a are the same as those steps in the circuit board 12, and thus the description thereof is omitted.

  Next, as shown in FIG. 8, the film 136a and the ceramic green sheet 132a are irradiated with a beam from the positive side in the z-axis direction to form a plurality of holes (cavities) Ha. As a result, as shown in FIG. 9, a ceramic green sheet 132a having a plurality of holes Ha formed at predetermined positions surrounding the mounting region A0 is prepared.

  Next, as shown in FIG. 10, the ceramic green sheets 132 c, 132 a, 130 a to 130 e, 132 b are stacked and pressure-bonded so as to be arranged in this order from the positive direction side to the negative direction side in the z-axis direction. Get. The ceramic green sheets 132a to 132c are alumina sheets called constrained layers. The firing temperature of the ceramic green sheets 132a to 132c is, for example, 1200 ° C.

  Here, lamination is performed so as to satisfy the following two conditions. The first condition is that the ceramic green sheets 130 and 132 are laminated and pressure-bonded so that the base electrode 116 is covered with the ceramic green sheet 132a. The second condition is that the ceramic green sheets 130 and 132 are laminated so that the region A1 and the hole Ha overlap as shown in FIG. At this time, most of the hole Ha overlaps the region A1, and hardly overlaps the region A2.

  By laminating the ceramic green sheets 130 and 132 so as to satisfy the above two conditions, the pressure applied to the region A1 of the mother substrate body 113 during the compression is greater than the pressure applied to the region A2 of the mother substrate body 113. Get smaller. Therefore, the region A1 of the land electrode 16 protrudes toward the positive direction side in the z-axis direction. Thereby, the upper surface of the via-hole conductor V on the positive side in the z-axis direction and the land electrode 16 are inclined so as to advance toward the negative direction side in the z-axis direction as it proceeds toward the positive direction side in the x-axis direction. That is, the normal line L2 at the boundary between the area A1 and the area A2 is inclined to the opposite side of the mounting area A0 from the normal line L1 of the mounting surface S1, as shown in FIG.

  Next, the unfired mother substrate body 113 is fired. For example, baking is performed for 1000 minutes at a baking temperature of 970 ° C. in a nitrogen atmosphere.

  Next, the insulator layer on which the ceramic green sheet 132 is fired is removed by sandblasting.

  Next, the circuit board 12a is obtained by cutting the mother board body 113 with a dicer or the like.

  Finally, the land electrode 16 is formed by performing Ni plating and Sn plating on the base electrode 116. Through the above steps, the circuit board 12a shown in FIG. 6 is completed.

  In the present embodiment, the internal conductor layer 18 that overlaps the regions A1 and A2 of the land electrode 16 may not exist.

(effect)
According to the manufacturing method of the circuit board 12a, the circuit module 10a, and the circuit board 12a as described above, a connection failure occurs in wire bonding as in the manufacturing method of the circuit board 12, the circuit module 10, and the circuit board 12. Can be suppressed.

(Modification)
Below, the ceramic green sheet 132a concerning a modification is demonstrated, referring drawings. FIG. 11 is a cross-sectional structure diagram of a ceramic green sheet 132a according to a first modification. FIG. 12 is a cross-sectional structure diagram of a ceramic green sheet 132a according to a second modification.

  As shown in FIG. 11, the hole Ha may be formed by the cutting blade C, or the hole Ha may be formed by the mold puncher P as shown in FIG.

(Other embodiments)
The circuit board, the circuit module, and the method for manufacturing the circuit board according to the present invention are the circuit boards 12, 12a, the circuit modules 10, 10a, and the circuit boards 12, 12a according to the first and second embodiments. However, the present invention can be changed within the scope of the gist.

  In the circuit modules 10 and 10a, the wire W is connected to the land electrode 16, but the wire W may be connected to the upper surface of the via-hole conductor V on the positive direction side in the z-axis direction. Specifically, the land electrode 16 is not provided, and the upper surface (one end) of the via-hole conductor V on the positive side in the z-axis direction is exposed from the mounting surface. The end portion of the wire W is directly connected to the upper surface of the via-hole conductor V on the positive side in the z-axis direction. However, it is preferable that the upper surface of the via-hole conductor V on the positive side in the z-axis direction is subjected to Ni plating and Sn plating.

As described above, the present invention is useful in the production method of the circuit board, in particular, is excellent in that it can prevent the connection failure occurs in the wire bonding.

A0 Mounting area A1, A2 area Ha hole V Via hole conductor W Wire 10, 10a Circuit module 12, 12a Circuit board 13 Substrate body 14 Semiconductor element 15 External electrode 16 Land electrode 18, 20 Internal conductor layers 30a-30e Insulator layer 113 Mother Substrate body 116 Base electrodes 130a to 130e, 132a to 132c Ceramic green sheets 134a to 134e Film

Claims (6)

A circuit board manufacturing method in which chip components are mounted by wire bonding,
A first step of preparing a plurality of first insulator layers and a second insulator layer having a cavity formed at a predetermined position;
A second step of forming, in the first insulator layer, a connection conductor to which a wire used for connection to the chip component is connected;
A third step of obtaining a substrate body by laminating and pressure-bonding the plurality of first insulator layers and the second insulator layer so that the connection conductor is covered with the second insulator layer;
A fourth step of removing the second insulator layer;
With
The main surface of the first insulator layer on which the connection conductor is formed is a mounting surface provided with a mounting region on which the chip component is mounted,
The connection conductor has a first region and a second region that is farther from the mounting region than the first region when viewed in plan from the normal direction of the mounting surface;
In the third step, the plurality of first insulator layers and the second insulator layer are laminated so that the first region and the cavity overlap.
A method of manufacturing a circuit board characterized by the above. After the third step, the normal line at the boundary between the first region and the second region is inclined to the opposite side of the mounting region from the normal line of the mounting surface;
The method of manufacturing a circuit board according to claim 1 . In the second step, a plurality of the connection conductors are formed so as to surround the mounting region,
Method of manufacturing a circuit board according to claim 1 or claim 2, characterized in. The connection conductor formed in the second step is a conductor layer provided on the mounting surface;
Method of manufacturing a circuit board according to any one of claims 1 to 3, characterized in. The circuit board manufacturing method includes:
Forming a via-hole conductor connected to the connection conductor in the insulator layer provided with the connection conductor;
In addition,
The via-hole conductor spans the first region and the second region when viewed in plan from the stacking direction;
The method of manufacturing a circuit board according to claim 4 . The connection conductor formed in the second step is a via-hole conductor having one end exposed from the mounting surface;
Method of manufacturing a circuit board according to any one of claims 1 to 3, characterized in.

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