JP5698687B2 - Signal generating apparatus and sequence control information changing method thereof - Google Patents

Description

  The present invention cyclically generates a modulation signal in which a plurality of slots in which a series of modulation signal waveform data are inserted are arranged in time series to form one frame, and is orthogonally modulated by the modulation signal. In a signal generator for controlling and outputting a high frequency modulation signal to a frequency and level designated for each slot, control information relating to the frequency and level for each slot of the output high frequency modulation signal is stored in a time series for one frame. A technology that has a sequence memory, reads out the control information of each slot from the sequence memory in accordance with the transmission timing of the slot, and controls the frequency and level of the high-frequency modulation signal corresponding to the slot according to the list. Stop transmission of high-frequency modulation signal while ensuring continuity of signal waveform data for modulation Ku, a technique that allows a change in the control information for any slot.

  In recent years, in mobile terminals represented by mobile phones and smartphones, in addition to conventional communication methods such as CDMA, GSM (registered trademark), and PHS that realize a telephone function and a mail transmission / reception function in order to enhance the convenience, GPS satellites In addition, it has a function to perform communication using a number of different communication methods, including a radio wave reception function of Bluetooth, Bluetooth, and the like. There is a need for a function that constructs the number of frames, orthogonally modulates them, converts them into high-frequency signals in the frequency band assigned to the communication method, and outputs them.

  However, in a configuration in which a modulation signal for a plurality of frames is constructed in real time according to a protocol dedicated to the communication method, and is converted into a high-frequency signal and output in sequence, high-speed modulation signal construction processing is possible for each communication method. A system is required, and the apparatus configuration is expensive and large.

  As a technique for solving this, focusing on the fact that it has a frame structure in which a plurality of slots into which a series of signal waveform data for modulation are inserted are arranged in a time series, each slot constituting a frame of each communication system The waveform data of the modulation signal that can be inserted into the slot is generated in advance and stored in the memory, and is designated in advance for the slot in accordance with the transmission timing of the slot used for the frame of the designated communication method. There is a technique for reading out and inserting a series of waveform data from a memory, outputting a modulation signal comprising one frame with a plurality of slots, and outputting a high-frequency modulation signal orthogonally modulated with the modulation signal.

  For example, as shown in FIG. 7, in the case of the GSM (registered trademark) system in which one frame is composed of eight slots and each slot is assigned to one user, signal waveform data S1 to S8 generated in advance for each slot. Are sequentially inserted into the slots, and frequency conversion processing including a quadrature modulator is performed to generate a high-frequency modulated signal. However, since each slot is assigned a different communication frequency (channel), the actual environment In order to perform a regular test, it is necessary to arbitrarily switch the frequency and output level of the high frequency modulation signal for each slot.

  As a technology for realizing this, frequency and level control information corresponding to each slot is previously listed in a time series and stored in a sequence memory, and the control information for each slot is transmitted from the sequence memory to the corresponding slot. There is a technique of reading in accordance with timing and controlling at least one of the frequency or level of a high-frequency modulation signal corresponding to the slot according to a list.

  A technique for performing a test using a signal controlled according to a sequence list as described above is disclosed in the following Patent Document 1.

JP 2003-196580 A

  However, in the conventional sequence control technique described above, for example, when a test is performed by changing the frequency or level corresponding to a certain slot to another value, reading of control information to the sequence memory is temporarily stopped (the test mode is stopped). ), It is necessary to rewrite the control information of the target slot of the sequence memory, then shift to the test mode, and read the control information of each slot from the sequence memory again in accordance with the transmission timing of the relevant slot. There was a problem that the test with the controlled information could not be executed promptly. There is also a problem that the continuity of the signal cannot be maintained before and after the control information is changed.

  The present invention solves the above-described problem, and can change the control information for the desired slot without stopping the transmission of the high-frequency modulation signal, and can quickly perform the test using the changed control information while maintaining the continuity of the signal. It is an object of the present invention to provide a signal generator and a sequence control information changing method that can be transferred.

In order to achieve the above object, a signal generator according to claim 1 of the present invention comprises:
A modulation signal generator (21) that cyclically repeatedly generates and outputs a modulation signal in which a plurality of slots into which a series of modulation signal waveform data are inserted are arranged in time series to form one frame;
A frequency converter (22) for generating and outputting a high-frequency modulated signal orthogonally modulated with the modulation signal output from the modulation signal generator;
Control means (23) for variably controlling at least one of the frequency or the level of the high-frequency modulation signal output from the frequency converter in accordance with designated control information;
A plurality of sets of sequence memories (25A, 25B) for storing control information relating to at least one of the frequency or level of each slot of the high-frequency modulation signal in a time series for one frame;
Use memory designating means (26) for designating which of the plurality of sets of sequence memories is used as the control information supply means ;
The control information of each slot stored in the sequence memory designated by the use memory designating means at the frame switching timing or the slot switching timing of the modulation signal output from the modulation signal generation unit Control information reading means (27) for reading in accordance with the transmission timing of the signal and giving it to the control means, and controlling at least one of the frequency or level of the high-frequency modulation signal output from the frequency converter in slot units;
Control information related to at least one of the frequency and the level for each slot of the high-frequency modulation signal for one set of the sequence memories not specified by the use memory specifying means among the plurality of sets of sequence memories. Control information writing means (28) for writing in time series and causing the used memory designating means to designate the sequence memory as a new used memory.

Moreover, the sequence control information changing method of the signal generator according to claim 2 of the present invention includes:
A modulation signal generator (21) that cyclically repeatedly generates and outputs a modulation signal in which a plurality of slots into which a series of modulation signal waveform data are inserted are arranged in time series to form one frame;
A frequency converter (22) for generating and outputting a high-frequency modulated signal orthogonally modulated with the modulation signal output from the modulation signal generator;
Control means (23) for variably controlling at least one of the frequency or the level of the high-frequency modulation signal output from the frequency converter in accordance with designated control information;
A sequence control information changing method for a signal generator, comprising a plurality of sets of sequence memories (25A, 25B) for storing control information related to at least one of frequency and level for each slot of the high frequency modulation signal in a time series for one frame Because
Designating which of the plurality of sets of sequence memories to use as the means for supplying the control information ;
The control information of each slot stored in the sequence memory designated by the use memory designating means at the frame switching timing or the slot switching timing of the modulation signal output from the modulation signal generation unit Reading in accordance with the transmission timing of the signal, giving it to the control means, and controlling at least one of the frequency or the level of the high-frequency modulation signal output from the frequency converter in slot units,
Control information related to at least one of the frequency and the level for each slot of the high-frequency modulation signal for one set of sequence memories not designated as the use memory among the plurality of sets of sequence memories is time-series for one frame. And designating the sequence memory as a new memory to be used.

  Thus, in the present invention, while outputting a high frequency modulation signal in which the frequency and level of each slot are variably controlled according to control information read from a set of sequence memories, Since the control information can be written to the sequence memory and the switching to the sequence memory where the writing was performed is performed at the switching timing of the frame or slot, the signal waveform data for modulation inserted in each slot Thus, it is possible to change control information for an arbitrary slot without stopping the transmission of the high-frequency modulation signal while ensuring the continuity.

Configuration diagram of an embodiment of the present invention The figure which shows an example of the information written in the sequence memory of embodiment The figure which shows an example of the information written in the sequence memory of embodiment The figure which shows an example of the information written in the sequence memory of embodiment The figure which shows an example of the information written in the sequence memory of embodiment The figure which shows an example of the information written in the sequence memory of embodiment The figure which shows the frame structure of GSM (registered trademark) system

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
FIG. 1 shows the overall configuration of a signal generator 20 to which the present invention is applied.

  The signal generator 20 includes a plurality of slots in which a baseband series of modulation signal waveform data is inserted in time series, as used in communication systems such as GSM (registered trademark), PHS, and LTE-TDD. And a modulation signal generator 21 that cyclically repeatedly generates and outputs the modulation signal S constituting one frame. The actual modulation signal S is composed of I and Q phase signal components orthogonal to each other.

  The modulation signal generator 21 stores in advance in the internal memory test waveform data that can be inserted into each slot of each communication method, and inserts the designated waveform data into the designated slot to generate one frame. For example, a plurality of frames of the modulation signal S configured as shown in FIG.

  For example, in the GSM (registered trademark) system, an example of which is shown in FIG. 7, a plurality of frames of modulation signals S each composed of one frame with 8 slots are generated and output repeatedly.

  The modulation signal S output from the modulation signal generation unit 21 is input to the frequency conversion unit 22. The frequency conversion unit 22 generates and outputs a high-frequency modulation signal RF that is orthogonally modulated with the modulation signal S.

  The frequency converter 22 converts, for example, the I component and the Q component of the modulation signal S into analog signals by the D / A converters 22a and 22b, and inputs the analog signals to the analog quadrature modulator 22c. The carrier signal (local signal) output from the signal generator 22d is quadrature modulated with the I component and the Q component, and the modulated output is amplified by the variable gain amplifier 22e to obtain a high frequency modulation signal RF.

  The configuration of the frequency conversion unit 22 is not limited to the above example. For example, an intermediate frequency band modulation signal may be generated once by a digital quadrature modulator, converted to an analog signal, and converted to a high frequency band assigned to a communication system by a frequency converter.

  The frequency and level of the high-frequency modulation signal RF can be varied by controlling the carrier signal generator 22d and the amplifier 22e, and the control unit 23 performs hardware control thereof. The control unit 23 controls the high frequency modulation signal RF according to the control information read from the sequence memories 25A and 25B by a plurality of sets (two sets are shown in the embodiment, but may be three or more sets) by a control information reading unit 27 described later. The frequency and level are variably controlled on a slot basis.

  The first sequence memory 25A and the second sequence memory 25B are for storing control information related to the frequency and level of each slot of the high frequency modulation signal RF in a time series for one frame. It is assumed that a series of control information is written in the memory for one frame.

  The use memory designating means 26 designates which of the plural sets (two sets in this case) of the sequence memories 25A and 25B is to be used, for example, by a binary flag F of 0 or 1.

  The control information reading means 27 is designated by the use memory designating means 26 with the flag F at the frame switching timing of the modulation signal S output from the modulation signal generating section 21 (may be each slot switching timing as will be described later). The control information of each slot stored in the sequence memory is read in accordance with the transmission timing of the slot and given to the control unit 23, and the frequency and level of the high frequency modulation signal RF output from the frequency conversion unit 22 are set to the slot. Control in units.

  Further, the control information writing means 28 performs high frequency modulation on an arbitrary set of sequence memories not flagged by the use memory designating means 26 among a plurality of sets (two sets in this case) of the sequence memories 25A and 25B. Control information relating to the frequency and level of each slot of the signal RF is written in a time series for one frame, and the use memory designating unit 26 is made to designate the sequence memory as a new use memory. The control information writing means 28 is composed of a personal computer (PC) capable of newly creating and editing a sequence list and a processor (CPU) that performs writing processing to the sequence memory via a communication interface. Can be configured.

  In the signal generator 20 configured as described above, before starting the test of the portable terminal and the integrated circuit used therein, for example, the first sequence memory 25A is adapted to each slot as shown in FIG. The control information including the frequency setting information (freq = ...) and the level setting information (Level = ...) is written and set as a use memory, and frame synchronization with the modulation signal generator 21 is performed. The control information of each slot is read and the frequency and level of each slot of the high frequency modulation signal RF output from the frequency converter 22 are controlled.

  Note that the control information for each slot includes a command (wait Trg) for waiting for the input of a trigger signal indicating the transmission timing of the next slot to be controlled, and the control information for the last slot includes frame switching. A conditional branch command (if F = 0 then A1, if F) that checks the value of the flag F at the timing, that is, the timing at which the trigger is input after the control of the last slot, and selects the reading from the memory used for the control of the next frame = 1 then B1).

In this way, when the test is started in a state where the control information is written in the first sequence memory 25A, the control information reading unit 27 is synchronized with the modulation signal generation unit 21 as shown in FIG. In addition, the control information in the first sequence memory 25A is read sequentially from the start address A1 in accordance with the transmission timing of the first slot, and the frequency and level for each slot are controlled according to the control information in the first sequence memory 25A. The modulation signal RF is output.

  Then, as shown in FIG. 3, when the control information of the last slot is read, the value of the flag F is confirmed, and the memory designated by the used memory designating unit 26 remains the first sequence memory 25A. For example, the process returns to the head address A1 and shifts to the control information reading process of the first slot. Thereafter, the high frequency modulation signal RF in which the frequency and level of each slot are controlled according to the control information of the first sequence memory 25A is continuously output.

  For example, when it is desired to change the frequency and level of a certain slot during the signal output, the tester uses the control information writing means 28 to select a desired slot from the control information list written in the first sequence memory 25A. A control information list in which only the frequency setting information and the level setting information are changed is generated and written in the second sequence memory 25B as shown in FIG.

  Along with this writing process, the memory specified by the used memory specifying means 26 is changed to the second sequence memory 25B and the value of the flag F becomes 1, but the control for the first sequence memory 25A as shown in FIG. At the stage where the information is being read out in the middle of the frame, the control information is continuously read out from the first sequence memory 25A, the continuity of a series of signal waveform data inserted in the slot, and the high-frequency modulation signal for one frame. The output of the high frequency modulation signal continues in a state where continuity is ensured.

  Then, as shown in FIG. 5, when the control information is read from the first sequence memory 25A up to the last slot of the frame, the memory designated by the used memory designating means 26 is changed from the value of the flag F to the second sequence memory 25B. The next read address becomes the start address B1 of the second sequence memory 25B, and the control information written in the second sequence memory 25B is read in synchronization with the modulation signal S in the same manner as described above. The test with the new control information changed by the tester is started from the start of the frame.

  If the contents of the first sequence memory 25A are rewritten while the high frequency modulation signal RF whose frequency and level are variably controlled according to the control information written in the second sequence memory 25B is output, When the control information is read from the second sequence memory 25B up to the last slot of the frame, it is confirmed that the memory designated by the used memory designating unit 26 is changed from the value of the flag F to the first sequence memory 25A. Thus, the reading of the control information in the first sequence memory 25A is started in synchronization with the modulation signal S, and the test with the new control information changed by the tester is started from the start of the frame.

  Thus, in the present invention, at any timing during the output of the high frequency modulation signal RF in which the frequency and level of each slot are variably controlled in accordance with the control information read from the set of sequence memory 25A, Since the control information can be written to the other sequence memory 25B, and the switching to the sequence memory in which the writing has been performed is performed at the switching timing of the frames, the signal waveform data for modulation inserted in each slot is continuous. Therefore, it is possible to change control information for an arbitrary slot without stopping transmission of a high-frequency modulation signal, while ensuring the performance and continuity within the frame.

  In the above example, switching to the newly written sequence memory is performed at the frame switching timing, but can be performed at the switching timing of each slot. However, in this case, the condition is that the read start address for each slot of the control information written in each sequence memory is fixed and known.

  That is, as shown in FIG. 6, the read start addresses A1 to A8 of the control information in the first sequence memory 25A and the read start addresses B1 to B8 of the control information in the second sequence memory 25B for each slot are set to known fixed values. In addition, a command for selecting whether to shift to the read address of the next slot of the same memory or the read address of the next slot of another memory is written in the control information for each slot in accordance with the value of the flag F. .

  In this way, for example, as shown in FIG. 6, when the flag F is changed to 1 during reading of control information for slot # 1 of the first sequence memory 25A, slot # 1 to slot # 2 It is possible to start reading the control information at the start address B2 of the slot # 2 of the second sequence memory 25B at the switching timing to the sequence memory, and to switch the sequence memory more quickly without waiting for the frame switching timing. .

In the above embodiment, both the frequency and the level for each slot can be varied for the GSM (registered trademark) system test, but even when only one of them is variably controlled according to the communication system. The present invention can be applied .

  DESCRIPTION OF SYMBOLS 20 ... Signal generator, 21 ... Modulation signal generation part, 22 ... Frequency conversion part, 23 ... Control part, 25A, 25B ... Sequence memory, 26 ... Use memory designation means, 27 ... Control information Reading means, 28... Control information writing means

Claims (2)

A modulation signal generator (21) that cyclically repeatedly generates and outputs a modulation signal in which a plurality of slots into which a series of modulation signal waveform data are inserted are arranged in time series to form one frame;
A frequency converter (22) for generating and outputting a high-frequency modulated signal orthogonally modulated with the modulation signal output from the modulation signal generator;
Control means (23) for variably controlling at least one of the frequency or the level of the high-frequency modulation signal output from the frequency converter in accordance with designated control information;
A plurality of sets of sequence memories (25A, 25B) for storing control information relating to at least one of the frequency or level of each slot of the high-frequency modulation signal in a time series for one frame;
Use memory designating means (26) for designating which of the plurality of sets of sequence memories is used as the control information supply means ;
The control information of each slot stored in the sequence memory designated by the use memory designating means at the frame switching timing or the slot switching timing of the modulation signal output from the modulation signal generation unit Control information reading means (27) for reading in accordance with the transmission timing of the signal and giving it to the control means, and controlling at least one of the frequency or level of the high-frequency modulation signal output from the frequency converter in slot units;
Control information related to at least one of the frequency and the level for each slot of the high-frequency modulation signal for one set of the sequence memories not specified by the use memory specifying means among the plurality of sets of sequence memories. A signal generator comprising: control information writing means (28) for writing in time series and causing the used memory designating means to designate the sequence memory as a new used memory. A modulation signal generator (21) that cyclically repeatedly generates and outputs a modulation signal in which a plurality of slots into which a series of modulation signal waveform data are inserted are arranged in time series to form one frame;
A frequency converter (22) for generating and outputting a high-frequency modulated signal orthogonally modulated with the modulation signal output from the modulation signal generator;
Control means (23) for variably controlling at least one of the frequency or the level of the high-frequency modulation signal output from the frequency converter in accordance with designated control information;
A sequence control information changing method for a signal generator, comprising a plurality of sets of sequence memories (25A, 25B) for storing control information related to at least one of frequency and level for each slot of the high frequency modulation signal in a time series for one frame Because
Designating which of the plurality of sets of sequence memories to use as the means for supplying the control information ;
The control information of each slot stored in the sequence memory designated by the use memory designating means at the frame switching timing or the slot switching timing of the modulation signal output from the modulation signal generation unit Reading in accordance with the transmission timing of the signal, giving it to the control means, and controlling at least one of the frequency or the level of the high-frequency modulation signal output from the frequency converter in slot units,
Control information related to at least one of the frequency and the level for each slot of the high-frequency modulation signal for one set of sequence memories not designated as the use memory among the plurality of sets of sequence memories is time-series for one frame. And a step of designating the sequence memory as a new memory to be used.

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