JP5694241B2 - Structure of surface treatment layer of multilayer substrate and manufacturing method thereof - Google Patents
Structure of surface treatment layer of multilayer substrate and manufacturing method thereof Download PDFInfo
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- 239000000758 substrate Substances 0.000 title claims description 50
- 239000002335 surface treatment layer Substances 0.000 title claims description 31
- 238000004519 manufacturing process Methods 0.000 title claims description 27
- 239000010410 layer Substances 0.000 claims description 333
- 239000002184 metal Substances 0.000 claims description 83
- 229910052751 metal Inorganic materials 0.000 claims description 83
- 229910000679 solder Inorganic materials 0.000 claims description 82
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 38
- 238000000034 method Methods 0.000 description 29
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 27
- 239000010931 gold Substances 0.000 description 27
- 229910052737 gold Inorganic materials 0.000 description 27
- 229910052759 nickel Inorganic materials 0.000 description 19
- 239000011248 coating agent Substances 0.000 description 15
- 238000000576 coating method Methods 0.000 description 15
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 11
- 239000000463 material Substances 0.000 description 11
- 238000000926 separation method Methods 0.000 description 5
- 238000005728 strengthening Methods 0.000 description 5
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 4
- 238000007796 conventional method Methods 0.000 description 4
- 230000032798 delamination Effects 0.000 description 4
- 239000011229 interlayer Substances 0.000 description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 3
- 229910052802 copper Inorganic materials 0.000 description 3
- 239000010949 copper Substances 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 238000011282 treatment Methods 0.000 description 3
- 229910052786 argon Inorganic materials 0.000 description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 229910000765 intermetallic Inorganic materials 0.000 description 2
- 238000002844 melting Methods 0.000 description 2
- 230000008018 melting Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 239000001301 oxygen Substances 0.000 description 2
- 229910052760 oxygen Inorganic materials 0.000 description 2
- 238000004806 packaging method and process Methods 0.000 description 2
- 239000004642 Polyimide Substances 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
Description
本発明は、多層基板の表面処理層の構造及びその製造方法に関し、特にフレキシブル多層基板の表面処理層の構造及びその製造方法に関する。 The present invention relates to a structure of a surface treatment layer of a multilayer substrate and a manufacturing method thereof, and more particularly to a structure of a surface treatment layer of a flexible multilayer substrate and a method of manufacturing the same.
従来の多層基板の表面処理(surface finish)は、パッド層定義(Pad Definition)方式及びはんだマスク層定義(Solder Mask Definition)方式の二つの種類に分けることができる。 The conventional surface finish of a multilayer board can be divided into two types, a pad layer definition (Pad Definition) method and a solder mask layer definition (Solder Mask Definition) method.
図１に示す従来の技術は、パッド層定義方式によって表面処理した表面処理層の構造(Surface Finish Structure)である。その従来の技術は、誘電層にパッド層(Pad)１０１を形成した後、はんだマスク層１０４ (Solder Mask) を塗布する。その後、パッド層１０１の位置で開孔し、パッド層１０１に残ったゴムくずを取り除くために、デスカム(Descum)のステップを有する。最後に、パッド層１０１にニッケル材の金属層１０２及び金材の金属層１０３を形成する。 The conventional technique shown in FIG. 1 is a surface finish structure (surface finish structure) surface-treated by a pad layer definition method. In the conventional technique, after a pad layer (Pad) 101 is formed on a dielectric layer, a solder mask layer 104 (Solder Mask) is applied. Thereafter, a hole is formed at the position of the pad layer 101, and a descum step is provided to remove the rubber scraps remaining on the pad layer 101. Finally, a nickel metal layer 102 and a gold metal layer 103 are formed on the pad layer 101.
図２に示す従来の技術は、はんだマスク層定義方式によって表面処理した表面処理層の構造である。誘電層にパッド層１０１を形成した後、はんだマスク層１０４を塗布する。その後、パッド層１０１の位置で開孔し、パッド層１０１に残ったゴムくずを取り除くために、デスカム(Descum)のステップを有する。最後に、またパッド層１０１にニッケル材の金属層１０２及び金材の金属層１０３を形成する。パッド層定義方式と違いところは、パッド層定義方式の開孔の面積はパッド層１０１が占める全体面積を含むが、はんだマスク層定義方式ははんだマスク層１０４がパッド層１０１の一部を覆うようにする。 The conventional technique shown in FIG. 2 is a structure of a surface treatment layer surface-treated by a solder mask layer definition method. After the pad layer 101 is formed on the dielectric layer, the solder mask layer 104 is applied. Thereafter, a hole is formed at the position of the pad layer 101, and a descum step is provided to remove the rubber scraps remaining on the pad layer 101. Finally, a nickel metal layer 102 and a gold metal layer 103 are formed on the pad layer 101 again. Unlike the pad layer definition method, the opening area of the pad layer definition method includes the entire area occupied by the pad layer 101, but the solder mask layer definition method is such that the solder mask layer 104 covers a part of the pad layer 101. To.
前記パッド層定義でもはんだマスク層定義の方式でも、必ずはんだマスク層１０４の塗布及び開孔の後で、また複数の被覆金属層を形成するステップを行う。後から続く、素子に対して銅を材料とする一般的なパッド層１０１にパッケージする時、スズ材または他の半田等を用いて、この素子とパッド層１０１とを接着してパッケージする。しかしながら、スズ材または他の半田と銅の接触には溶融の現像が発生するため、金属層を被覆する目的はスズ材または他の半田と銅との接触を避けることである。しかしながら、上記パッド層定義またははんだマスク層定義の方式は、環境に存在する湿気のため、又は被覆金属層と誘電層、はんだマスク層がお互いに違う材料であって生成する応力のためで、図１または図２の中で１２１の矢印が指し示す所は層間剥離の可能性があり、スズ材または他の半田をパッド層１０１と接触させると、溶融が発生して金属間化合物(IMC)が生成して、接点の構造が脆弱になり、製品の信頼度が低下する。 In both the pad layer definition method and the solder mask layer definition method, a step of forming a plurality of coated metal layers is always performed after the application and opening of the solder mask layer 104. When the subsequent element is packaged in a general pad layer 101 made of copper as a material, the element and the pad layer 101 are bonded and packaged using a tin material or other solder. However, the contact of the tin material or other solder with copper causes melting development, so the purpose of coating the metal layer is to avoid contact of the tin material or other solder with copper. However, the above-described pad layer definition or solder mask layer definition method is based on the moisture generated in the environment or the stress generated by the coating metal layer, the dielectric layer, and the solder mask layer being different from each other. 1 or 2 indicates that there is a possibility of delamination, and when tin or other solder is brought into contact with the pad layer 101, melting occurs and an intermetallic compound (IMC) is generated. As a result, the contact structure becomes fragile and the reliability of the product decreases.
その上、パッド層またははんだマスク層定義の方式に関わらず、パッド層１０１のすべてが誘電層の表面に形成するため、パッド層１０１の剥離又は層間分離の可能性があって、パッケージの信頼度が低下する。 In addition, since all of the pad layer 101 is formed on the surface of the dielectric layer regardless of the definition method of the pad layer or the solder mask layer, there is a possibility that the pad layer 101 is peeled off or separated, and the reliability of the package Decreases.
そのために、たとえパッケージする時、スズ材または他の半田とパッド層との接触を避け、パッド層が下側の誘電層に対する付着を強めたら、パッケージの信頼度及びパッケージ製品の産出良率を向上することができる。 Therefore, even when packaging, avoid contact between the tin material or other solder and the pad layer, and if the pad layer strengthens the adhesion to the lower dielectric layer, the reliability of the package and the yield rate of the package product are improved. can do.
本発明の一つの目的は、パッド層を誘電層に埋め込んで、パッド層の剥離又は層間分離を避けて、パッケージの信頼度を向上する多層基板の表面処理層の構造及びその製造方法を提供することを課題とする。 SUMMARY OF THE INVENTION An object of the present invention is to provide a structure of a surface treatment layer of a multi-layer substrate and a method of manufacturing the same, in which a pad layer is embedded in a dielectric layer to avoid peeling of the pad layer or interlayer separation and to improve package reliability. This is the issue.
本発明のまた一つの目的は、はんだマスク層を形成する前に、まず被覆金属層を製造して、パッケージする時は、スズ材または他の半田とパッド層との接触を避けて、パッケージの信頼度を向上する多層基板の表面処理層の構造及びその製造方法を提供することを課題とする。 Another object of the present invention is to manufacture the coated metal layer first before forming the solder mask layer, and when packaging, avoid contact between the tin material or other solder and the pad layer. It is an object of the present invention to provide a structure of a surface treatment layer of a multilayer substrate that improves reliability and a manufacturing method thereof.
上記目的を達成するために、本発明の多層基板の表面処理層の構造は、パッド層と、少なくとも一つの被覆金属層と、はんだマスク層とを含む。本発明のパッド層は多層基板の誘電層に埋め込まれ、被覆金属層はパッド層を被覆する。はんだマスク層は被覆金属層を露出する開孔を有する。本発明は、パッド層の表面に被覆金属層を形成した後、またはんだマスク層を形成する。その後、被覆金属層の位置に対してはんだマスク層を開孔して、被覆金属層を露出する。 In order to achieve the above object, the structure of the surface treatment layer of the multilayer substrate of the present invention includes a pad layer, at least one covering metal layer, and a solder mask layer. The pad layer of the present invention is embedded in the dielectric layer of the multilayer substrate, and the covering metal layer covers the pad layer. The solder mask layer has an opening that exposes the coating metal layer. In the present invention, the mask layer is formed after forming the covering metal layer on the surface of the pad layer. Thereafter, a solder mask layer is opened with respect to the position of the covering metal layer to expose the covering metal layer.
本発明のパッド層は誘電層の表面に形成することもできるが、相変わらずまずパッド層の表面に被覆金属層を形成した後、またはんだマスク層を形成する。その後、また被覆金属層の位置に対してはんだマスク層を開孔して、被覆金属層を露出する。 Although the pad layer of the present invention can be formed on the surface of the dielectric layer, the covering metal layer is first formed on the surface of the pad layer, and then the mask layer is formed. Thereafter, a solder mask layer is opened to the position of the covering metal layer to expose the covering metal layer.
本発明は多層基板の表面処理層の構造の製造方法も提供する。本発明の製造方法は、パッド層の表面にパッド層全体を覆う被覆金属層を形成するステップと、パッド層を備えた多層基板の表面にはんだマスク層を形成するステップと、被覆金属層の位置に対してはんだマスク層を開孔して、被覆金属層を露出するステップとを含む。本発明のパッド層は多層基板の誘電層の表面に埋め込まれ、又は多層基板の一つ誘電層の表面に形成する。 The present invention also provides a method for manufacturing the structure of the surface treatment layer of a multilayer substrate. The manufacturing method of the present invention includes a step of forming a covering metal layer covering the entire pad layer on the surface of the pad layer, a step of forming a solder mask layer on the surface of the multilayer substrate including the pad layer, and a position of the covering metal layer. Opening a solder mask layer to expose the covering metal layer. The pad layer of the present invention is embedded in the surface of the dielectric layer of the multilayer substrate or formed on the surface of one dielectric layer of the multilayer substrate.
従来の技術に比べ、本発明の多層基板の表面処理層の構造は、誘電層にパッド層を埋め込むため、パッド層と誘電層との間の付着力が増加することができ、パッド層と誘電層とが易しく層間剥離(Delamination) しないようになって、信頼度を強める。且つはんだマスク層を形成する前に、まず被覆金属層を製造してスズ材または他の半田とパッド層との間の阻障層(Barrier Layer)として、環境に存在する湿気のためで、又は被覆金属層と誘電層、はんだマスク層との間の応力のためで、被覆金属層と誘電層、又は被覆金属層とはんだマスク層との間に層間剥離を引き起す時にも、スズ材または他の半田とパッド層との間の接触を避けることを確保して、パッケージの信頼度を向上することができる。 Compared with the prior art, the structure of the surface treatment layer of the multilayer substrate of the present invention embeds the pad layer in the dielectric layer, so that the adhesion between the pad layer and the dielectric layer can be increased, and the pad layer and the dielectric layer can be increased. The layer is easily peeled off and not delaminated, increasing the reliability. And before forming the solder mask layer, firstly, a coated metal layer is manufactured and used as a barrier layer between the tin material or other solder and the pad layer, for moisture present in the environment, or Also due to the stress between the coated metal layer and the dielectric layer and the solder mask layer, even when causing delamination between the coated metal layer and the dielectric layer, or between the coated metal layer and the solder mask layer, tin or other The reliability of the package can be improved by ensuring that the contact between the solder and the pad layer is avoided.
以下、本発明の上記目的と特徴と効果が更に明らかに理解できるように、添付図面を参照して詳しく説明する。 The above and other objects, features, and advantages of the present invention will be described in detail with reference to the accompanying drawings so that the present invention can be understood more clearly.
図３は、本発明における多層基板の表面処理層の構造の第一実施例の概略図を示す。本発明のパッド層３０１(Pad)は誘電層に埋め込まれる。この誘電層の材料はポリイミドであることができる。且つ本発明の第一実施例は、まずパッド層３０１に複数の被覆金属層、即ちニッケル材の被覆金属層３０２及び金材の被覆金属層３０３を形成する。その後、はんだマスク層３０４を形成し、また金材の被覆金属層３０３の位置に対してはんだマスク層３０４を開孔して、金材の被覆金属層３０３を露出し、且つはんだマスク層３０４がニッケル材の被覆金属層３０２及び金材の被覆金属層３０３の一部を覆うようにする。 FIG. 3 shows a schematic diagram of the first embodiment of the structure of the surface treatment layer of the multilayer substrate in the present invention. The pad layer 301 (Pad) of the present invention is embedded in a dielectric layer. The dielectric layer material can be polyimide. In the first embodiment of the present invention, first, a plurality of coating metal layers, that is, a nickel coating metal layer 302 and a gold coating metal layer 303 are formed on the pad layer 301. Thereafter, the solder mask layer 304 is formed, and the solder mask layer 304 is opened at the position of the gold-coated metal layer 303 to expose the gold-coated metal layer 303. A portion of the nickel-coated metal layer 302 and the gold-coated metal layer 303 is covered.
パッド層３０１が誘電層に埋め込まれるため、パッド層３０１と誘電層との間の付着力が増加することができ、パッド層３０１と誘電層とが易しく層間剥離(Delamination)しないようになって、信頼度を強める。且つ、はんだマスク層定義(Solder Mask Definintion)の方式によって、はんだマスク層３０４をニッケル材の被覆金属層３０２、金材の被覆金属層３０３の一部を覆うようにして、ニッケル材の被覆金属層３０２、金材の被覆金属層３０３が湿気または応力のためで、はんだマスク層３０４との間又は誘電層との間に層間分離が発生する時にも、スズ材または他の半田とパッド層３０１との間の接触を隔てるのを確保して、パッケージの信頼度を向上する。 Since the pad layer 301 is embedded in the dielectric layer, the adhesion between the pad layer 301 and the dielectric layer can be increased, and the pad layer 301 and the dielectric layer are not easily delaminated. Increase confidence. The solder mask layer 304 is covered with a nickel-coated metal layer 302 and a gold-coated metal layer 303 by a solder mask layer definition (Solder Mask Definintion) method so that the nickel-coated metal layer is covered. 302, even when the metal covering metal layer 303 is wet or stressed and the interlayer separation occurs between the solder mask layer 304 or the dielectric layer, the tin material or other solder and the pad layer 301 Ensuring separation of contact between the two improves the reliability of the package.
図４は、本発明における多層基板の表面処理層の構造の第二実施例の概略図を示す。第一実施例と同じ、本発明のパッド層４０１は誘電層に埋め込まれる。この第二実施例は、はんだマスク層定義の方式であるので、はんだマスク層４０４を形成した後、パッド層４０１の位置に対してはんだマスク層４０４を開孔して、パッド層４０１を露出し、且つはんだマスク層４０４はパッド層４０１の一部を覆う。またパッド層４０１に複数の被覆金属層、即ちニッケル材の被覆金属層４０２及び金材の被覆金属層４０３を形成する。 FIG. 4 shows a schematic diagram of the second embodiment of the structure of the surface treatment layer of the multilayer substrate in the present invention. As in the first embodiment, the pad layer 401 of the present invention is embedded in a dielectric layer. Since this second embodiment is a method of defining a solder mask layer, after the solder mask layer 404 is formed, the solder mask layer 404 is opened to the position of the pad layer 401 to expose the pad layer 401. The solder mask layer 404 covers a part of the pad layer 401. A plurality of coating metal layers, that is, a nickel coating metal layer 402 and a gold coating metal layer 403 are formed on the pad layer 401.
図２に示す従来の技術と違い所は、パッド層４０１が誘電層に埋め込まれるため、パッド層４０１と誘電層との付着力が増加することができ、パッド層４０１と誘電層とが易しく層間分離しないようになって、信頼度を強める。 The difference from the conventional technique shown in FIG. 2 is that the pad layer 401 is embedded in the dielectric layer, so that the adhesive force between the pad layer 401 and the dielectric layer can be increased. Increases reliability by not separating.
図５は、本発明における多層基板の表面処理層の構造の第三実施例の概略図を示す。第一実施例と同じ、本発明の多層基板の表面処理層の構造のパッド層５０１は誘電層に埋め込まれる。この第三実施例はパッド層定義(Pad Definition)の方式であるので、本実施例はまずパッド層５０１に複数の被覆金属層、即ちニッケル材の被覆金属層５０２及び金材の被覆金属層５０３を形成する。続いて、はんだマスク層５０４を形成し、またパッド層５０１の位置に対してはんだマスク層５０４を開孔して、金材の被覆金属層５０３を露出する。前記開孔の面積は、パッド層５０１が占める面積を含んで且つパッド層５０１が占める面積より大きい。または、本実施例において、まずはんだマスク層５０４を形成して、パッド層５０１の位置に対してはんだマスク層５０４を開孔する後、またニッケル材の被覆金属層３０２及び金材の被覆金属層３０３を形成してもよい。 FIG. 5 is a schematic view of a third embodiment of the structure of the surface treatment layer of the multilayer substrate in the present invention. As in the first embodiment, the pad layer 501 having the structure of the surface treatment layer of the multilayer substrate of the present invention is embedded in the dielectric layer. Since this third embodiment is based on the pad layer definition (Pad Definition) method, this embodiment first includes a plurality of coating metal layers on the pad layer 501, that is, a nickel coating metal layer 502 and a gold coating metal layer 503. Form. Subsequently, a solder mask layer 504 is formed, and the solder mask layer 504 is opened at the position of the pad layer 501 to expose the gold-coated metal layer 503. The area of the opening includes the area occupied by the pad layer 501 and is larger than the area occupied by the pad layer 501. Alternatively, in this embodiment, the solder mask layer 504 is first formed, the solder mask layer 504 is opened at the position of the pad layer 501, and then the nickel-coated metal layer 302 and the gold-coated metal layer. 303 may be formed.
図１に示す従来の技術と違い所は、パッド層３０１が誘電層に埋め込まれるため、パッド層と誘電層との間の付着力が増加できて、パッド層と誘電層が易く層間分離しないようになって、信頼度が向上する。 1 differs from the prior art shown in FIG. 1 because the pad layer 301 is embedded in the dielectric layer, the adhesion between the pad layer and the dielectric layer can be increased, and the pad layer and the dielectric layer can be easily separated from each other. As a result, reliability is improved.
図６は、本発明における多層基板の表面処理層の構造の第四実施例の概略図を示す。パッド層６０１は誘電層の表面に形成される。第四実施例において、本発明はまずパッド層６０１に複数の被覆金属層、即ちニッケル材の被覆金属層６０２及び金材の被覆金属層６０３を形成する。またはんだマスク層６０４を形成した後、金材の被覆金属層６０３の位置に対してはんだマスク層６０４を開孔して、金材の被覆金属層６０３を露出して、且つはんだマスク層６０４はニッケル材の被覆金属層６０２及び金材の被覆金属層６０３の一部を覆う。 FIG. 6 shows a schematic diagram of the fourth embodiment of the structure of the surface treatment layer of the multilayer substrate in the present invention. The pad layer 601 is formed on the surface of the dielectric layer. In the fourth embodiment, the present invention first forms a plurality of coating metal layers on the pad layer 601, that is, a nickel coating metal layer 602 and a gold coating metal layer 603. Further, after forming the solder mask layer 604, the solder mask layer 604 is opened at the position of the gold-coated metal layer 603 to expose the gold-coated metal layer 603, and the solder mask layer 604 is Part of the nickel-coated metal layer 602 and the gold-coated metal layer 603 is covered.
本発明のはんだマスク層６０４は、ニッケル材の被覆金属層６０２と金材の被覆金属層６０３の一部とを覆うため、ニッケル材の被覆金属層６０２、金材の被覆金属層６０３とはんだマスク層６０４または誘電層との間に層間分離が発生する時にも、スズ材または他の半田とパッド層６０１との間の接触を避けることを確保して、パッケージの信頼度を向上することができる。 Since the solder mask layer 604 of the present invention covers the nickel-coated metal layer 602 and a part of the gold-coated metal layer 603, the nickel-coated metal layer 602, the gold-coated metal layer 603, and the solder mask Even when interlayer separation occurs between the layer 604 or the dielectric layer, it is possible to ensure that contact between the tin material or other solder and the pad layer 601 is avoided, thereby improving the reliability of the package. .
図７Ａから７Ｅは、本発明によって図３に示す第一実施例の多層基板の表面処理層の構造を製造する方法フローチャートを示す。図７Ａは、一時の基板７００の表面にまずパッド層３０１を形成して、界面接着強化処理３０５をすることを示す。界面接着強化処理３０５は例えば、酸素又はアルゴンプラズマ・プロセスの処理である。図７Ｂは、基板７００全体を覆う誘電層７０２の形成を示す。図７Ｃは、誘電層７０２とパッド層３０１を基板の表面７００から分離して且つ上下に反転した後、パッド層３０１の表面にニッケル材の被覆金属層３０２及び金材の被覆金属層３０３を形成して、パッド層３０１を被覆することを示す。図７Ｄは、金材の被覆金属層３０３及び誘電層７０２全体を覆うはんだマスク層３０４を形成することを示す。図７Ｅは、ニッケル材の被覆金属層３０２及び金材の被覆金属層３０３の位置に対してはんだマスク層３０４を開孔して、金材の被覆金属層３０３を露出して、はんだマスク層３０４が金材の被覆金属層３０３の一部を覆うようにし、即ち、パッド層３０１が誘電層７０２の表面処理層に埋め込まれる構造と、且つはんだマスク層３０４が金材の被覆金属層３０３の一部を覆う構造とを実現する。しかし、本発明の図５に示す第三実施例においても、同じ方法によってパッド層５０１を形成することができ、図７Ｅで開孔する時、開孔の面積はパッド層３０１が占める面積を含んで、且つパッド層３０１が占める面積より大きくなることがよい。例え、本発明の図４に示す第二実施例におけるパッド層４０１を形成しようとすると、図７Ｃと図７Ｄとのステップの順番を変えれば、即ち、まずはんだマスク層３０４を形成して開孔して、はんだマスク層３０４がパッド層３０１の一部を覆うようにしてから、またニッケル材の被覆金属層３０２及び金材の被覆金属層３０３を形成してもよい。 7A to 7E show a method flowchart for manufacturing the structure of the surface treatment layer of the multilayer substrate of the first embodiment shown in FIG. 3 according to the present invention. FIG. 7A shows that the pad layer 301 is first formed on the surface of the temporary substrate 700 and the interfacial adhesion strengthening process 305 is performed. The interfacial adhesion strengthening process 305 is, for example, an oxygen or argon plasma process. FIG. 7B shows the formation of a dielectric layer 702 that covers the entire substrate 700. In FIG. 7C, after the dielectric layer 702 and the pad layer 301 are separated from the surface 700 of the substrate and turned upside down, a nickel-coated metal layer 302 and a gold-coated metal layer 303 are formed on the surface of the pad layer 301. The pad layer 301 is covered. FIG. 7D shows the formation of a solder mask layer 304 that covers the entire gold coated metal layer 303 and dielectric layer 702. In FIG. 7E, the solder mask layer 304 is opened at the positions of the nickel-coated metal layer 302 and the gold-coated metal layer 303 to expose the gold-coated metal layer 303, and the solder mask layer 304 is exposed. Covers a part of the gold-coated metal layer 303, that is, the pad layer 301 is embedded in the surface treatment layer of the dielectric layer 702, and the solder mask layer 304 is a part of the gold-coated metal layer 303. The structure which covers a part is realized. However, also in the third embodiment shown in FIG. 5 of the present invention, the pad layer 501 can be formed by the same method, and the area of the opening includes the area occupied by the pad layer 301 when opening in FIG. 7E. And the area occupied by the pad layer 301 is preferably larger. For example, if the pad layer 401 in the second embodiment shown in FIG. 4 of the present invention is to be formed, the order of steps in FIGS. 7C and 7D is changed, that is, the solder mask layer 304 is first formed to open the holes. Then, after the solder mask layer 304 covers a part of the pad layer 301, the nickel-coated metal layer 302 and the gold-coated metal layer 303 may be formed.
図８Ａから図８Ｅは、本発明によって図５に示す第三実施例の多層基板の表面処理層の構造を製造する方法フローチャートを示す。図８Ａは、基板８００の表面にまずはんだマスク層５０４を形成することを示す。図８Ｂは、はんだマスク層５０４の表面に、まずパッド層５０１を形成して、また誘電層８０２を形成し、パッド層５０１と誘電層８０２との間に界面接着強化処理５０５、例えば、酸素又はアルゴンのプラズマ・プロセス処理をすることを示す。図８Ｃは、はんだマスク層５０４を基板８００の表面から分離して且つ上下に反転して、はんだマスク層５０４を開孔するように、はんだマスク層５０４が上に向けるようにすることを示す。図８Ｄは、パッド層５０１を埋め込まれた位置に対してはんだマスク層５０４を開孔して、パッド層５０１を露出し、図８Ｄの開孔の面積がパッド層５０１が占める面積を含むとともにパッド層５０１が占める面積より大きいようにすることを示す。図８Ｅは、パッド層５０１の表面にニッケル材の被覆金属層５０２及び金材の被覆金属層５０３を形成して、パッド層５０１を被覆することを示す。即ち、パッド層５０１が誘電層８０２の表面処理層に埋め込まれる構造が実現できる。しかし、本発明の図４に示す第二実施例においても、同じ方法でパッド層４０１を形成することができ、図８Ｄで開孔する時は、はんだマスク層５０４がパッド層５０１の一部を覆うようにしてもよい。 8A to 8E show a flowchart of a method for manufacturing the structure of the surface treatment layer of the multilayer substrate of the third embodiment shown in FIG. 5 according to the present invention. FIG. 8A shows that a solder mask layer 504 is first formed on the surface of the substrate 800. FIG. 8B shows that a pad layer 501 is first formed on the surface of the solder mask layer 504, and a dielectric layer 802 is formed, and an interfacial adhesion strengthening treatment 505 between the pad layer 501 and the dielectric layer 802, for example, oxygen or Indicates that the argon plasma process will be performed. FIG. 8C shows that the solder mask layer 504 is separated from the surface of the substrate 800 and flipped up and down so that the solder mask layer 504 faces up so as to open the solder mask layer 504. 8D, the solder mask layer 504 is opened at the position where the pad layer 501 is embedded to expose the pad layer 501, and the area of the opening in FIG. 8D includes the area occupied by the pad layer 501 and the pad. It indicates that the area is larger than the area occupied by the layer 501. FIG. 8E shows that the pad layer 501 is coated by forming a nickel-coated metal layer 502 and a gold-coated metal layer 503 on the surface of the pad layer 501. That is, a structure in which the pad layer 501 is embedded in the surface treatment layer of the dielectric layer 802 can be realized. However, also in the second embodiment shown in FIG. 4 of the present invention, the pad layer 401 can be formed by the same method. When the hole is opened in FIG. 8D, the solder mask layer 504 forms a part of the pad layer 501. You may make it cover.
且つ、上記の本発明の第一実施例から第四実施例において、パッド層３０１、４０１、５０１及び６０１と誘電層との間に界面接着強化処理３０５、４０５、５０５及び６０５をして、パッド層３０１、４０１、５０１及び６０１と誘電層との間の付着強度を増加する。更にパッド層３０１、４０１、５０１及び６０１の剥離又は層間分離を避けることができる。 In the first to fourth embodiments of the present invention, the interfacial adhesion strengthening treatments 305, 405, 505 and 605 are performed between the pad layers 301, 401, 501 and 601 and the dielectric layer, and the pad is formed. Increase the adhesion strength between the layers 301, 401, 501, and 601 and the dielectric layer. Furthermore, peeling or delamination of the pad layers 301, 401, 501, and 601 can be avoided.
最後に、本発明は基板を利用して誘電層に埋め込まれるパッド層を製造するため、パッド層と誘電層との間の付着力を増加することができ、パッド層の剥離又は層間分離を避け、信頼度を強める。同時に、はんだマスク層を形成する前に、まず被覆金属層を製造して、はんだマスク層が被覆金属層の一部を覆うようにして、湿気又は応力のためで、被覆金属層とはんだマスク層又は誘電層との間に層間分離が発生する時にも、スズ材または他の半田とパッド層との間の接触を避けることを確保して、パッケージの信頼度を向上することができる。従って、多層基板パッケージの信頼度及びパッケージ製品の産出良率を向上することができる。 Finally, since the present invention uses a substrate to manufacture a pad layer embedded in a dielectric layer, the adhesion between the pad layer and the dielectric layer can be increased, avoiding peeling or delamination of the pad layer. , Strengthen the reliability. At the same time, before forming the solder mask layer, the coated metal layer is first manufactured, so that the solder mask layer covers a part of the coated metal layer, due to moisture or stress, the coated metal layer and the solder mask layer Alternatively, even when interlayer separation occurs between the dielectric layers, it is possible to ensure avoidance of contact between the tin material or other solder and the pad layer, thereby improving the reliability of the package. Therefore, the reliability of the multilayer substrate package and the yield rate of the package product can be improved.
当該分野の技術を熟知するものが理解できるように、本発明の好適な実施形態を上記の通り開示したが、これらは決して本発明を限定するものではない。本発明の主旨と範囲を脱しない範囲内で各種の変更や修正を加えることができる。従って、本発明の特許請求の範囲は、このような変更や修正を含めて広く解釈されるべきである。 Although preferred embodiments of the present invention have been disclosed above, as those skilled in the art can appreciate, they are not intended to limit the invention in any way. Various changes and modifications can be made without departing from the spirit and scope of the present invention. Accordingly, the scope of the claims of the present invention should be construed broadly including such changes and modifications.
１０１、３０１、４０１、５０１、６０１： パッド層
１０４、３０４、４０４、５０４、６０４： はんだマスク層
１０２： ニッケル材の金属層
１０３： 金材の金属層
３０２、５０２、６０２： ニッケル材の被覆金属層
３０３、５０３、６０３： 金材の被覆金属層
３０５、４０５、５０５、６０５：界面接着強化処理
７００、８００： 基板
７０２、８０２： 誘電層
101, 301, 401, 501, 601: Pad layer 104, 304, 404, 504, 604: Solder mask layer 102: Nickel metal layer 103: Gold metal layer 302, 502, 602: Nickel coated metal Layers 303, 503, 603: Gold coated metal layers 305, 405, 505, 605: Interfacial adhesion strengthening treatment 700, 800: Substrate 702, 802: Dielectric layer
Claims (11)
b)パッド層の表面にパッド層全体を覆う少なくとも一つの被覆金属層を形成するステップと、
c)前記パッド層を備えた前記フレキシブル多層基板の表面にはんだマスク層を形成するステップと、
ｄ)前記被覆金属層の位置に対して前記はんだマスク層を開孔して、前記被覆金属層を露出するステップと、
を含むことを特徴とするフレキシブル多層基板の表面処理層の構造の製造方法。 a) A method for producing a structure of a surface treatment layer of a flexible multilayer substrate ,
b) forming at least one covering metal layer covering the entire pad layer on the surface of the pad layer;
c) forming a solder mask layer on the surface of the flexible multilayer substrate having the pad layer;
d) opening the solder mask layer with respect to the position of the covering metal layer to expose the covering metal layer;
A method for producing a structure of a surface treatment layer of a flexible multilayer substrate , comprising:
b)基板の表面に、はんだマスク層を形成するステップと、
c)前記はんだマスク層の表面に、パッド層を形成するステップと、
d)前記はんだマスク層と前記パッド層を覆うように、誘電層を形成するステップと、
e)前記はんだマスク層を基板の表面から分離して且つ上下に反転して、前記多層基板の誘電層の表面に埋め込まれるパッド層の位置に対して、前記はんだマスク層を開孔して、前記パッド層を露出するステップと、
f)前記パッド層の表面に前記パッド層を被覆する少なくとも一つの被覆金属層を形成するステップとを含むことを特徴とする多層基板の表面処理層の構造の製造方法。 a) A method for producing a structure of a surface treatment layer of a multilayer substrate,
b) forming a solder mask layer on the surface of the substrate ;
c) forming a pad layer on the surface of the solder mask layer;
d) forming a dielectric layer so as to cover the solder mask layer and the pad layer;
e) separating the solder mask layer from the surface of the substrate and turning it upside down to open the solder mask layer to the position of the pad layer embedded in the surface of the dielectric layer of the multilayer substrate; Exposing the pad layer;
and f) forming at least one covering metal layer for covering the pad layer on the surface of the pad layer.
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