JP5680188B2 - キャッシュメモリ管理を最適化する方法、およびそれに対応する装置 - Google Patents

キャッシュメモリ管理を最適化する方法、およびそれに対応する装置 Download PDF

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JP5680188B2
JP5680188B2 JP2013510585A JP2013510585A JP5680188B2 JP 5680188 B2 JP5680188 B2 JP 5680188B2 JP 2013510585 A JP2013510585 A JP 2013510585A JP 2013510585 A JP2013510585 A JP 2013510585A JP 5680188 B2 JP5680188 B2 JP 5680188B2
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cache memory
data
fill level
list
service
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JP2013526743A5 (https=
JP2013526743A (ja
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クル，テイエリー
リガル，ルノー
フリネイ，フローレン
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Thomson Licensing SAS
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0813—Multiuser, multiprocessor or multiprocessing cache systems with a network or matrix configuration
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0888—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches using selective caching, e.g. bypass

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Information Transfer Between Computers (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Circuits Of Receivers In General (AREA)
JP2013510585A 2010-05-17 2011-05-16 キャッシュメモリ管理を最適化する方法、およびそれに対応する装置 Active JP5680188B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
EP10305518A EP2388704A1 (en) 2010-05-17 2010-05-17 Method of optimization of cache memory management and corresponding apparatus
EP10305518.2 2010-05-17
PCT/EP2011/057899 WO2011144576A1 (en) 2010-05-17 2011-05-16 Method of optimization of cache memory management and corresponding apparatus

Publications (3)

Publication Number Publication Date
JP2013526743A JP2013526743A (ja) 2013-06-24
JP2013526743A5 JP2013526743A5 (https=) 2014-06-26
JP5680188B2 true JP5680188B2 (ja) 2015-03-04

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JP2013510585A Active JP5680188B2 (ja) 2010-05-17 2011-05-16 キャッシュメモリ管理を最適化する方法、およびそれに対応する装置

Country Status (11)

Country Link
US (1) US10691598B2 (https=)
EP (2) EP2388704A1 (https=)
JP (1) JP5680188B2 (https=)
KR (1) KR101859239B1 (https=)
CN (1) CN102906715B (https=)
CA (1) CA2797435C (https=)
MX (1) MX2012013168A (https=)
MY (1) MY156708A (https=)
PT (1) PT2572284E (https=)
RU (1) RU2599537C2 (https=)
WO (1) WO2011144576A1 (https=)

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JP6327959B2 (ja) * 2014-06-04 2018-05-23 キヤノン株式会社 情報処理端末、キャッシュ制御方法及びウェブシステム
KR102017284B1 (ko) 2015-05-26 2019-09-02 삼성전자주식회사 부팅 디바이스 및 그 동작 방법
CN106997351B (zh) * 2016-01-22 2021-03-02 斑马智行网络(香港)有限公司 一种资源缓存管理方法及系统和装置
US10129360B2 (en) * 2016-03-28 2018-11-13 The Boeing Company Unified data networking across heterogeneous networks
US10031834B2 (en) 2016-08-31 2018-07-24 Microsoft Technology Licensing, Llc Cache-based tracing for time travel debugging and analysis
US11907091B2 (en) 2018-02-16 2024-02-20 Microsoft Technology Licensing, Llc Trace recording by logging influxes to an upper-layer shared cache, plus cache coherence protocol transitions among lower-layer caches
CN115061654B (zh) * 2022-08-11 2022-11-22 歌尔股份有限公司 穿戴产品消息显示方法、装置、设备及可读存储介质

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JP2003196144A (ja) 2001-12-27 2003-07-11 Fuji Electric Co Ltd キャッシュサーバのキャッシュ制御方法
RU2238584C2 (ru) 2002-07-31 2004-10-20 Муратшин Борис Фрилевич Способ организации персистентной кэш памяти для многозадачных, в том числе симметричных многопроцессорных компьютерных систем и устройство для его осуществления
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US20060085519A1 (en) 2004-10-14 2006-04-20 Brian Goode Method and apparatus providing domain-based cache storage for a mobile internet browser
KR100609211B1 (ko) 2005-02-01 2006-08-02 주식회사 팬택 이동통신 단말기 및 이의 인터넷 페이지 관리방법
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Also Published As

Publication number Publication date
PT2572284E (pt) 2015-03-04
US10691598B2 (en) 2020-06-23
US20130198314A1 (en) 2013-08-01
MY156708A (en) 2016-03-15
KR20130093506A (ko) 2013-08-22
EP2572284A1 (en) 2013-03-27
KR101859239B1 (ko) 2018-05-18
CA2797435C (en) 2018-06-05
EP2388704A1 (en) 2011-11-23
RU2012154297A (ru) 2014-06-27
CN102906715A (zh) 2013-01-30
WO2011144576A1 (en) 2011-11-24
CA2797435A1 (en) 2011-11-24
RU2599537C2 (ru) 2016-10-10
CN102906715B (zh) 2016-05-25
EP2572284B1 (en) 2015-01-28
MX2012013168A (es) 2013-01-17
JP2013526743A (ja) 2013-06-24

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