JP5664400B2 - Light emitting thyristor, light source head, and image forming apparatus - Google Patents

Description

  The present invention relates to a light emitting thyristor, a light source head, and an image forming apparatus.

  Patent Document 1 describes a light-emitting thyristor in which a gate layer is formed of layers having different band gaps.

  Patent Document 2 discloses a pnpn light-emitting thyristor having a double hetero structure, wherein the concentration of impurities at least in the anode layer portion near the n-gate layer is lower than the concentration of impurities in the n-gate layer. Is described.

  In Patent Document 3, a first n-type semiconductor layer, a first p-type semiconductor layer, a second n-type semiconductor layer, a third n-type semiconductor layer, a second p-type are formed on an n-type semiconductor substrate. The semiconductor layer, the third p-type semiconductor layer, the fourth p-type semiconductor layer, and the fifth p-type semiconductor layer are sequentially stacked so that light emission inside these stacked semiconductor layers is extracted to the outside. The third n-type semiconductor layer has an energy gap larger than that of the second n-type semiconductor layer, and the third n-type semiconductor layer and the third p-type semiconductor layer have an energy gap. A light-emitting thyristor is described which is larger than the second p-type semiconductor layer, and the second p-type semiconductor layer has an energy gap larger than that of the first p-type semiconductor layer.

JP 08-153890 A Japanese Patent No. 2001-068726 Japanese Patent No. 2005-340471

  An object of the present invention is to provide a light-emitting thyristor, a light source head, and an image forming apparatus in which the probability of light emission recombination of carriers is improved as compared with the case without this configuration.

In order to achieve the above object, a light-emitting thyristor according to claim 1 includes an anode layer provided on a substrate, an n-type gate layer provided on the anode layer, and the n-type gate layer. A p-type gate layer having a gate terminal and a cathode layer provided on the p-type gate layer , wherein the n-type gate layer has a band gap greater than that of the anode layer. A small single semiconductor layer functioning as a confinement layer for confining carriers moving to the anode layer, and the p-type gate layer is provided on the n-type gate layer, and the n-type gate layer A first p-type gate layer that has a larger band gap than the layer and does not function as a light-emitting layer; and a light-emitting layer that is provided on the first p-type gate layer and has a smaller band gap than the first p-type gate layer Act as the second Of p-type having a gate layer, wherein the cathode layer has a larger band gap than the second p-type gate layer.

The light-emitting thyristor according to claim 2 functions as a light-emitting layer provided on an anode layer provided on a substrate, an n-type gate layer provided on the anode layer, and the n-type gate layer. A non-conductive semiconductor layer, a p-type gate layer having a gate terminal provided on the non-conductive semiconductor layer, and a cathode layer provided on the p-type gate layer. The n-type gate layer is a semiconductor layer having a band gap smaller than that of the anode layer in order from the anode layer side, and functions as a first confinement layer for confining carriers. And a second n-type gate layer having a band gap larger than that of the first n-type gate layer, and the non-conductive semiconductor layer has a band gap larger than that of the second n-type gate layer. The p-type gate layer is small A first p-type gate layer having a band gap larger than that of the non-conductive semiconductor layer and a semiconductor layer having a band gap smaller than that of the first p-type gate layer in order from the non-conductive semiconductor layer side. And a second p-type gate layer functioning as a second confinement layer for confining carriers, and the cathode layer has a larger band gap than the second p-type gate layer.

A light source head according to a third aspect includes a plurality of light emitting thyristors according to the first aspect or the second aspect as light sources.

The image forming apparatus according to claim 4 , comprising: a photoconductor; a charging unit that charges the surface of the photoconductor; and the light source head according to claim 3 , wherein the surface of the photoconductor is charged by the charging unit. An exposure means for exposing with light emitted from the light source head in order to form an electrostatic latent image, a developing means for developing the electrostatic latent image formed by the exposure means, and the developing means developed by the developing means Fixing means for fixing the electrostatic latent image.

According to the first, third , and fourth aspects of the invention, the probability of carrier light emission recombination is improved and electrons move to the anode layer side as compared with the case without this configuration. To be suppressed.

According to the second aspect of the present invention, compared to the case where the semiconductor light emitting layer is of a conductive type, both carriers are confined in the semiconductor light emitting layer and recombined to emit light, and the semiconductor is formed only on one side of the semiconductor light emitting layer. Compared with the case where a non-light emitting layer and a semiconductor confinement layer are provided, the probability of light emission recombination of carriers is improved.

1 is a schematic configuration diagram showing an outline of an example of an image forming apparatus according to the present embodiment. 1 is a schematic cross-sectional view showing an internal configuration of an example of a printer head according to the present embodiment, and is an enlarged cross-sectional view schematically showing an example of a display medium. It is a perspective view which shows the external appearance of an example of the light emitting thyristor array which concerns on this Embodiment. It is a schematic sectional drawing which shows an example of the light emitting thyristor which concerns on this Embodiment. It is the schematic diagram which showed typically about the main structure of an example of the light emitting thyristor which concerns on Example 1 of this Embodiment. It is explanatory drawing which shows a specific example of Al composition and film thickness of each layer of an example of the light emitting thyristor according to Example 1 of the present embodiment. It is the schematic diagram which showed typically about the main structure of an example of the light emitting thyristor which concerns on Example 2 of this Embodiment. It is explanatory drawing which shows a specific example of Al composition of each layer and film thickness of an example of the light emitting thyristor which concerns on Example 2 of this Embodiment. It is the schematic diagram which showed typically about the main structure of the conventional light emitting thyristor.

  Hereinafter, an example of an embodiment of the present invention will be described in detail with reference to the drawings.

  FIG. 1 is a schematic configuration diagram showing an outline of an example of an image forming apparatus according to the present embodiment. FIG. 2 is a schematic cross-sectional view showing the internal configuration of an example of the light source head of the present embodiment. FIG. 3 is a perspective view showing the appearance of an example of the light-emitting thyristor array according to the present embodiment. FIG. 4 is a schematic cross-sectional view showing an example of the light-emitting thyristor of the present embodiment.

  As shown in FIG. 1, the image forming apparatus 10 according to the present exemplary embodiment includes a photoconductor 12 that rotates at a constant speed in an arrow A direction.

  In order to form an electrostatic latent image on the surface of the photoconductor 12 around the photoconductor 12 along the rotation direction of the photoconductor 12, the charger 14 that charges the surface of the photoconductor 12 and the surface of the photoconductor 12 charged by the charger 14. A light source head 16 (exposure means) for exposing the toner image, a developing device 18 (developing means) for developing the electrostatic latent image with a developer to form a toner image, and transferring the toner image to a paper 28 (recording medium). A transfer body 20 (transfer means), a cleaner 22 for removing residual toner remaining on the photoconductor 12 after transfer, and an erase lamp 24 for discharging the photoconductor 12 to make the potential uniform are arranged in this order.

  That is, the surface of the photoconductor 12 is charged by the charger 14, and then a light beam is irradiated by the light source head 16 to form a latent image on the photoconductor 12. The light source head 16 is connected to a driving unit (not shown), and the lighting of the light emitting thyristor 100 is controlled by the driving unit to emit a light beam based on the image data.

  To the formed latent image, toner is supplied by the developing unit 18 to form a toner image on the photoreceptor 12. The toner image on the photoconductor 12 is transferred onto the conveyed paper 28 by the transfer body 20. The toner remaining on the photoconductor 12 after the transfer is removed by the cleaner 22, neutralized by the erase lamp 24, charged by the charger 14 again, and the same processing is repeated.

  On the other hand, the paper 28 onto which the toner image has been transferred is conveyed to a fixing device 30 (fixing means) composed of a pressure roller 30A and a heating roller 30B and subjected to a fixing process. As a result, the toner image is fixed and a desired image is formed on the paper 28. The paper 28 on which the image is formed is discharged out of the apparatus.

  Next, the configuration of the light source head 16 of the present embodiment will be described in detail. The light source head 16 of the present embodiment uses an SLED (Self-scanning LED). The SLED is obtained by integrating an LED array and a driving portion thereof, and includes a light emitting unit (light emitting thyristor 100, which will be described later in detail) having a plurality of thyristor structures. As shown in FIG. 2, a mounting board on which a light emitting thyristor array 50 and a circuit (not shown) for supporting the light emitting thyristor array 50 and supplying various signals for controlling the driving of the light emitting thyristor array 50 are mounted. 52 and a rod lens array 54 (Selfoc is a registered trademark of Nippon Sheet Glass Co., Ltd.) such as a Selfox lens array.

  The mounting substrate 52 is disposed in the housing 56 with the mounting surface of the light emitting thyristor array 50 facing the photoconductor 12 and is supported by a plate spring 58.

  As shown in FIG. 3, the light-emitting thyristor array 50 includes, for example, a chip 62 configured by arranging a plurality of light-emitting thyristors 100 along the axial direction of the photoconductor 12 according to the resolution in the axial direction. A plurality of light beams are arranged in series, and light beams are irradiated in the axial direction of the photosensitive member 12 with a predetermined resolution.

  In the present embodiment, an example in which a plurality of chips 62 are arranged in a one-dimensional manner in series is shown. However, the present invention is not limited to this, and the chips 62 may be arranged in a plurality of rows and arranged in a two-dimensional manner. For example, when arranged in a zigzag pattern, the plurality of chips 62 are arranged in a row so as to be aligned along the axial direction of the photoconductor 12 and are arranged in two rows with a certain interval in the direction intersecting the axial direction. Is done. Even if the light emitting thyristors 100 are divided into a plurality of chips 62, each of the light emitting thyristors 100 is arranged so that the distance between the two light emitting thyristors 100 adjacent to each other in the axial direction of the photoconductor 12 is substantially constant. ing.

  As shown in FIG. 2, the rod lens array 54 is supported by a holder 64 and forms an image of the light beam emitted from each light emitting thyristor 100 on the photoconductor 12.

  Next, the light emitting thyristor 100 of the present embodiment will be described.

  A schematic configuration of the light-emitting thyristor 100 according to the present embodiment will be described with reference to FIG. The light-emitting thyristor 100 according to the present embodiment includes a p-type GaAs substrate 104, a p-type AlGaAs anode layer 106 stacked on the p-type GaAs substrate 104, an n-type AlGaAs gate layer 108A, and a p-type AlGaAs. A gate layer 108 composed of a system gate layer 108B, an n-type AlGaAs-based cathode layer 112, and an n-type GaAs-based contact layer 114 are provided.

  The light emitting thyristor 100 includes an anode electrode 102, a gate electrode 116, and a cathode electrode 118. The anode electrode 102 is provided on the back surface (surface on which no resonator is formed) of the p-type GaAs substrate 104. The gate electrode 116 is provided in a region where a partial end region of the p-type AlGaAs-based gate layer 108B is formed in a thinner film than other portions. On the other hand, the cathode electrode 118 is formed on the n-type AlGaAs cathode layer 112 and the n-type GaAs contact layer 114 which are sequentially stacked in a region excluding the region formed in the thin film of the p-type AlGaAs gate layer 108B. Is provided.

  As materials for the anode electrode 102, the gate electrode 116, and the cathode electrode 118, materials suitable for maintaining good ohmic contact with the semiconductor layer or the p-type GaAs substrate 104 that are in contact with each other are used. Specific examples include gold (Au), an alloy of gold and germanium (AuGe), an alloy of gold and zinc (AuZn), nickel (Ni), and the like.

  In the light-emitting thyristor 100 according to the present embodiment, the n-type AlGaAs-based cathode layer 112 and the p-type AlGaAs-based anode layer 106 have large band gaps, and a signal (voltage) is applied to the gate electrode 116. By flowing a gate current to the electrode 118, the anode electrode 102 and the cathode electrode 118 are made conductive. As a result, carriers (electrons and holes) are regenerated in the light emitting layer (a part of the gate layer 108, which will be described in detail later) having a smaller band gap than the n-type AlGaAs-based cathode layer 112 and the p-type AlGaAs-based anode layer 106. The light emitted by the combination and recombination is emitted through the uppermost layer (n-type GaAs contact layer 114). The wavelength of the emitted light is determined by the value of the band gap of the light emitting layer. In the case where the light-emitting thyristor 100 of this embodiment is formed of an AlGaAs system, the band gap is increased as the Al composition is increased, and the Al composition is 0.12 to 0.2. Light having a wavelength of about 13 and having a peak in the vicinity of 780 nm is obtained.

  Next, the main structure of the light emitting thyristor 100 will be described in detail with reference to the drawings. First, the main structure of the conventional light emitting thyristor 1000 will be described for comparison with the light emitting thyristor 100 of the present embodiment. FIG. 9 schematically shows the main structure of a conventional light-emitting thyristor 1000.

  A conventional light-emitting thyristor 1000 includes a p-type GaAs substrate 1104, a p-type AlGaAs anode layer 1106, an n-type AlGaAs gate layer 1108A, a p-type AlGaAs gate layer 1108B, and an n-type AlGaAs cathode. A layer 1112 and an n-type GaAs contact layer 1114 are sequentially stacked.

  In the conventional light-emitting thyristor 1000, the p-type AlGaAs-based anode layer 1106 and the n-type AlGaAs-based cathode layer 1112 have a larger band gap than the gate layer 1108, and the AlGaAs-based layer has a larger Al composition.

  The n-type AlGaAs gate layer 1108A and the p-type AlGaAs gate layer 1108B have an Al composition of 0.12, so that they are adjacent to the n-type AlGaAs gate layer 1108A and the p-type AlGaAs gate layer 1108B. Minority carriers are injected from the p-type AlGaAs-based anode layer 1106 and the n-type AlGaAs-based cathode layer 1112. Specifically, holes are injected into the n-type AlGaAs-based gate layer 1108A from the p-type AlGaAs-based anode layer 1106 and the p-type AlGaAs-based gate layer 1108B, and the n-type AlGaAs-based gate layer 1108A includes Recombines light with electrons. Electrons are injected into the p-type AlGaAs-based gate layer 1108B from the n-type AlGaAs-based cathode layer 1112 and the n-type AlGaAs-based gate layer 1108A to emit light and holes in the p-type AlGaAs-based gate layer 1108B. Rejoin. Thus, the n-type AlGaAs-based gate layer 1108A and the p-type AlGaAs-based gate layer 1108B (the entire gate layer 1108) function as a light emitting layer, and light having a peak wavelength in the vicinity of 780 nm is emitted.

  In general, in a light-emitting thyristor, it is desirable that the gate layer be thick from the viewpoint of withstand voltage in order to perform a stable thyristor operation as a thyristor element. On the other hand, in the conventional light-emitting thyristor 1000, since the entire gate layer 108 is a light-emitting layer, carriers are diffused in a wide range and the carrier density in the light-emitting layer is lowered, so that the recombination probability is lowered, and thus the light emission efficiency is improved. The problem of degradation occurs.

  In the conventional light-emitting thyristor 1000, carriers move from the n-type AlGaAs gate layer 1108A and the p-type AlGaAs gate layer 1108B to the adjacent p-type AlGaAs anode layer 1106 and n-type AlGaAs cathode layer 1112. (Overflow) is likely to occur, and there is a problem that light emission recombination occurs in the p-type AlGaAs-based anode layer 1106 and the n-type AlGaAs-based cathode layer 1112. In particular, electrons easily move from the n-type AlGaAs-based gate layer 1108A to the p-type AlGaAs-based anode layer 1106, and light emission is recombined at the p-type AlGaAs-based anode layer 1106. In this way, light generated by light emission recombination in the p-type AlGaAs anode layer 1106 and the n-type AlGaAs cathode layer 1112 is generated in the n-type AlGaAs gate layer 1108A and the p-type AlGaAs gate layer 1108B. Since it is absorbed, it hardly contributes to the amount of light emitted to the outside of the light emitting thyristor 1000.

  Example 1

  Next, the main structure of the light-emitting thyristor 100 of this embodiment will be described. FIG. 5 schematically shows the main structure of the light-emitting thyristor 100 in Example 1 of the present embodiment.

  The light-emitting thyristor 100 of this embodiment includes a p-type GaAs substrate 104, a p-type AlGaAs anode layer 106, a gate layer 108, an n-type AlGaAs cathode layer 112, an n-type GaAs contact layer 114, and the like. , Are stacked.

  Further, the gate layer 108 of the light-emitting thyristor 100 of this embodiment includes an n-type AlGaAs trap layer 108A having an Al composition of 0.12 as an n-type AlGaAs gate layer 108A. Further, the gate layer 108 is a p-type AlGaAs-based gate layer 108B, and the composition of Al that does not function as a light-emitting layer is 0.24 and the composition of Al that functions as a light-emitting layer is 0.2. Twelve p-type AlGaAs light emitting layers 108B0 are provided.

  In the light emitting thyristor 100 of this embodiment, carriers (holes) move from the p-type AlGaAs-based anode layer 106 side to the p-type AlGaAs-based gate layer 108B1. The carriers (holes) are injected into the p-type AlGaAs-based light emitting layer 108 </ b> B <b> 0 and recombine with carriers (electrons) injected as fractional carriers from the n-type AlGaAs-based cathode layer 112 side.

  FIG. 6 shows a specific example of the Al composition and film thickness of each layer of the light emitting thyristor 100. In the light emitting thyristor 100 of this embodiment, as an example, Zn is used as a dopant in the case of p-type, and Si is used as a dopant in the case of n-type.

  A p-type AlGaAs anode layer 106 is laminated on a p-type GaAs substrate 104 via a p-type GaAs buffer layer. Although not shown in FIGS. 4 and 5, in the light-emitting thyristor 100 of this embodiment, as shown in FIG. 6, crystals of the p-type GaAs substrate 104 and the p-type AlGaAs-based anode layer 106 are used. In order to improve the performance, a p-type GaAs buffer layer is provided.

  The p-type AlGaAs anode layer 106 is an AlGaAs layer having a thickness of 410 nm and an Al composition of 0.33.

  The n-type AlGaAs trap layer 108A is an AlGaAs layer having a thickness of 260 nm and an Al composition of 0.12. Note that the light emitting thyristor 100 of this embodiment also has a function as a light emitting layer because carriers emit light recombination also in the n-type AlGaAs trap layer 108A2.

  The p-type AlGaAs gate layer 108B1 is an AlGaAs layer having a thickness of 360 nm and an Al composition of 0.24. The p-type AlGaAs light emitting layer 108B0 is an AlGaAs layer having a thickness of 100 nm and an Al composition of 0.12.

  The n-type AlGaAs-based cathode layer 112 is an AlGaAs layer having a thickness of 510 nm and an Al composition of 0.33. The n-type GaAs-based contact layer 114 has a thickness of 25 nm.

  In addition, the Al composition and the film thickness of each of these layers are specific examples, and are not limited to these as long as they are within the following ranges.

  For example, the thickness of the entire gate layer is such that no current flows between the gate electrode 116 and the anode electrode 102 even if there is a potential difference (for example, 3 to 5 V) between the gate electrode 116 and the anode electrode 102. If there is, The combined thickness of the p-type AlGaAs-based light emitting layer 108B0 and the p-type AlGaAs-based gate layer 108B1 needs to be partially exposed in the light-emitting thyristor 100 of this embodiment as shown in FIG. Therefore, it is preferable that the thickness is about 0.1 μm or more from the viewpoint of accuracy in manufacturing (film formation).

  Further, for example, the Al composition of each layer is such that the p-type AlGaAs light emitting layer 108B0 <p-type AlGaAs gate layer 108B1 <n-type AlGaAs cathode layer 112. The anode layer 106 is in the proper range.

  For crystal growth of each layer of the light-emitting thyristor 100, for example, a MOCVD (Metal Organic Chemical Vapor Deposition) method is applied.

  As described above, in the light-emitting thyristor 100 of this embodiment, the gate layer 108 laminated between the p-type AlGaAs-based anode layer 106 and the n-type AlGaAs-based cathode layer 112 is used as the p-type AlGaAs-based anode. In order from the layer 106 side, an n-type AlGaAs trap layer 108A2 having a small band gap, a p-type AlGaAs DBR gate layer 108B1 having a large band gap, and a p-type AlGaAs light emitting layer 108B0 having a small band gap are stacked. It is configured as follows.

  In the light-emitting thyristor 100 of this embodiment, the p-type AlGaAs-based light-emitting layer 108B0, which is a part of the gate layer 108, is used as the light-emitting layer. As compared with the case where the n-type AlGaAs gate layer 1108 and the p-type AlGaAs gate layer 1110) function as the light emitting layer, the light emitting layer is made thinner. As a result, carriers are confined within a narrow range, and are prevented from diffusing over a wide range, and the light emission recombination probability of the carriers is increased. On the other hand, since the entire thickness of the gate layer 108 is maintained, the breakdown voltage is maintained.

  Further, since the Al composition of the p-type AlGaAs-based gate layer 108B1 adjacent to the p-type AlGaAs-based light-emitting layer 108B0 is increased (the band gap is larger than that of the p-type AlGaAs-based light-emitting layer 108B0), the carrier is p It is confined in the light emitting layer 108B0 of the type AlGaAs system, and the light emission recombination probability becomes higher.

  In the light-emitting thyristor 100 of this embodiment, an n-type AlGaAs trap layer 108A2 is provided between the p-type AlGaAs gate layer 108B1 and the p-type AlGaAs anode layer 106. As a result, carriers (electrons) are injected into the n-type AlGaAs trap layer 108A2 from the n-type AlGaAs cathode layer 112 side, and from the p-type AlGaAs gate layer 108B1 or the p-type AlGaAs anode layer 106. Recombines light emission with carriers (holes) injected as minority carriers. Therefore, the carrier (electrons) is prevented from moving to the p-type AlGaAs anode layer 106, and the light emission recombination of carriers in the p-type AlGaAs anode layer 106 is suppressed. Further, reactive current to the p-type AlGaAs anode layer 106 is suppressed.

  Further, since the n-type AlGaAs trap layer 108A2 has a function of being regarded as a light emitting layer by emitting light, the amount of emitted light can be increased.

  (Example 2)

  In the first embodiment, a trap layer (n-type AlGaAs-based gate layer 108A1) and a gate layer (p-type AlGaAs-based) are disposed between a p-type AlGaAs-based anode layer 106 and a light-emitting layer (p-type AlGaAs-based light-emitting layer 108B0). However, the present invention is not limited to this, and a gate layer and a trap layer may be similarly provided between the n-type AlGaAs cathode layer 112. An example of such a light emitting thyristor 100 is shown as Example 2.

  FIG. 7 schematically shows the main structure of the light-emitting thyristor 100 in Example 2 of the embodiment. FIG. 8 shows a specific example of the Al composition and film thickness of each layer of the light emitting thyristor 100 in the second embodiment.

  In the light-emitting thyristor 100 having the structure shown in FIGS. 7 and 8, the gate layers are arranged in order from the p-type AlGaAs anode layer 106 side, the n-type AlGaAs trap layer 108A2 having an Al composition of 0.12, and the Al An n-type AlGaAs gate layer 108A1 having a composition of 0.24, a non-doped AlGaAs light-emitting layer 108C0 having an Al composition of 0.12, a p-type AlGaAs gate layer 108B1 having an Al composition of 0.24, and A p-type AlGaAs trap layer 108B2 having an Al composition of 0.12 is stacked.

  As described above, the light-emitting thyristor 100 according to the second embodiment includes the n-type AlGaAs trap layer 108A2 on the p-type AlGaAs anode layer 106 side, and the p-type AlGaAs-type cathode layer 112 on the n-type AlGaAs cathode layer 112 side. Since the trap layer 108B2 is provided, both the minority carriers (electrons and holes) are confined in the non-doped AlGaAs light-emitting layer 108C0, so that the light emission recombination probability is increased.

  Carriers (electrons) are injected and confined in the n-type AlGaAs trap layer 108A2 from the n-type AlGaAs cathode layer 112 side. The trapped carriers (electrons) recombine with carriers (holes) injected as minority carriers from the p-type AlGaAs gate layer 108B1 or the p-type AlGaAs anode layer 106.

  On the other hand, carriers (holes) are injected and confined in the p-type AlGaAs trap layer 108B2 from the p-type AlGaAs anode layer 106 side. The trapped carriers (holes) recombine with the carriers (electrons) injected as minority carriers from the n-type AlGaAs gate layer 108A1 or the n-type AlGaAs cathode layer 112.

  Accordingly, the reactive current is suppressed and the n-type AlGaAs trap layer 108A2 and the p-type AlGaAs trap layer 108B2 also function as the light emitting layer, so that the amount of emitted light can be increased.

  Note that the light-emitting thyristor 100 of this embodiment is not limited to the above-described configurations and compositions described in Example 1 and Example 2, and the gate layer 108 has a light-emitting layer and a band gap larger than that of the light-emitting layer ( A gate layer that does not function as a light-emitting layer, and the gate layer and the p-type AlGaAs-based anode layer 106 or the n-type AlGaAs-based cathode layer 112. And a trap layer that has a smaller band gap than any of the n-type AlGaAs-based cathode layers 112 and functions as a light-emitting layer by confining carriers and emitting light. For example, the trap layer may be provided only on either the p-type AlGaAs-type anode layer 106 side or the n-type AlGaAs-type cathode layer 112 side, or may be provided on both sides as shown in the second embodiment. Good. Since electrons move more easily regardless of the band gap than holes, it is preferable to provide a trap layer at least on the p-type AlGaAs-based anode layer 106 side as shown in the first embodiment. In Example 1, although the trap layer is an n-type layer (n-type AlGaAs trap layer 108A2), it is intended to suppress the movement of electrons to the p-type AlGaAs anode layer 106. Thus, it is preferable to use an n-type layer in which electrons easily spread spatially.

  Further, the gate layer 108 functioning as the light emitting layer may be non-doped, p-type, or n-type as shown in the second embodiment. Note that holes are less p-type or non-doped because they have a lower mobility than electrons and thus have a small spatial expansion (expansion in the thickness direction and in-plane direction of the layer) and high luminous efficiency. In particular, by using a non-doped light emitting layer as shown in Example 2 above, both the minority carriers (electrons and holes) are confined in the light emitting layer and recombined for light emission, so that the light emission efficiency is higher. Therefore, it is preferable.

  In the present embodiment, as a specific example, the light-emitting thyristor 100 having the p-type first conductivity type and the n-type second conductivity type on the p-type GaAs substrate 70 has been described. The light-emitting thyristor of the NPNP structure may be an n-type first conductivity type and a p-type second conductivity type.

  In this embodiment, the light-emitting thyristor 100 using an AlGaAs-based material has been described as a specific example. However, the present invention is not limited to this, and the light-emitting thyristor using an InGaAsP-based, AlGaInP-based, InGaN / GaN-based material, or the like. You may apply to.

  Further, in the present embodiment, the case where it is applied to the light source head 16 of the self-scanning electrophotographic image forming apparatus 10 has been described. However, the present invention is not limited to this, and the light emitting thyristor 100 of the present embodiment is used as another light source head. And may be applied to other image forming apparatuses. Further, the light emitting thyristor 100 may be applied to a light source of another device such as a scanner.

DESCRIPTION OF SYMBOLS 10 Image forming apparatus 16 Light source head 100 Light emitting thyristor 102 Anode electrode 104 P-type GaAs substrate 106 P-type AlGaAs type anode layer 108 Gate layer (A: n-type, B: p-type, 0: light-emitting layer, 1, gate layer, 2: Trap layer)
112 n-type AlGaAs cathode layer 114 n-type GaAs contact layer 116 gate electrode 118 cathode electrode

Claims (4)

An anode layer provided on the substrate;
An n-type gate layer provided on the anode layer;
A p-type gate layer having a gate terminal provided on the n-type gate layer;
A cathode layer provided on the p-type gate layer ,
The n-type gate layer is a single semiconductor layer having a smaller band gap than the anode layer, and functions as a confinement layer for confining carriers moving to the anode layer,
The p-type gate layer is provided on the n-type gate layer, has a band gap larger than that of the n-type gate layer and does not function as a light emitting layer, and the first p-type gate layer A second p-type gate layer provided on the type gate layer and having a band gap smaller than that of the first p-type gate layer and functioning as a light-emitting layer,
The cathode layer is a light-emitting thyristor having a band gap larger than that of the second p-type gate layer . An anode layer provided on the substrate;
An n-type gate layer provided on the anode layer;
A non-conductive semiconductor layer provided on the n-type gate layer and functioning as a light-emitting layer;
A p-type gate layer having a gate terminal provided on the non-conductive semiconductor layer;
A cathode layer provided on the p-type gate layer,
The n-type gate layer is a semiconductor layer having a band gap smaller than that of the anode layer in order from the anode layer side, and serves as a first n-type gate layer that functions as a first confinement layer for confining carriers. A second n-type gate layer having a band gap larger than that of the first n-type gate layer,
The non-conductive semiconductor layer has a smaller band gap than the second n-type gate layer,
The p-type gate layer includes, in order from the non-conductive semiconductor layer side, a first p-type gate layer having a larger band gap than the non-conductive semiconductor layer, and the first p-type gate layer. And a second p-type gate layer that functions as a second confinement layer for confining carriers, which is a semiconductor layer having a small band gap,
The cathode layer is a light-emitting thyristor having a band gap larger than that of the second p-type gate layer. A light source head comprising a plurality of light-emitting thyristors according to claim 1 as light sources. A photoreceptor,
Charging means for charging the surface of the photoreceptor;
An exposure unit comprising the light source head according to claim 3 and exposing with light emitted from the light source head to form an electrostatic latent image on the surface of the photoreceptor charged by the charging unit;
Developing means for developing the electrostatic latent image formed by the exposure means;
Fixing means for fixing the electrostatic latent image developed by the developing means;
An image forming apparatus.

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