JP5651936B2 - Capacitor element-equipped wiring board and method for manufacturing capacitor element-equipped wiring board - Google Patents

Description

  The present invention relates to a capacitive element-equipped wiring board in which a capacitive element is formed in an insulating plate and a method for manufacturing the same, and more particularly to a capacitive element-equipped wiring board having a configuration aiming for a thin plate and a method for manufacturing the same.

  An example of a wiring board having a capacitive element component in an insulating plate is described in Japanese Patent Application Laid-Open No. 2003-197849. In the wiring board disclosed in this document, a chip capacitor (chip capacitor) is embedded as a capacitive element component and mounted in an insulating plate.

  The size of the chip capacitor is generally standardized. For example, in the case of relatively small 0603 size and 0402 size, the width 0.6 mm × length 0.3 mm × thickness 0.3 mm, width 0.4 mm × length 0 .2 mm x thickness 0.2 mm. Therefore, in a wiring board incorporating a chip capacitor, it is essential to prepare at least a built-in region in the thickness direction corresponding to this thickness. Compared with the case where the semiconductor chip is embedded, the semiconductor chip can be thinned to about 50 μm by back grinding, so that it is rather necessary to secure a thicker region if the chip capacitor is embedded. That is, the wiring board in which the chip capacitor is embedded in the insulating plate is limited to be thinner than the case where the semiconductor chip is incorporated.

JP 2003-197849 A

  The present invention has been made in consideration of the above circumstances, and in the capacitive element-equipped wiring board in which the capacitive element is formed in the insulating plate and the manufacturing method thereof, the capacitive element-equipped wiring board that can be thinned and It aims at providing the manufacturing method.

In order to solve the above problems, a capacitive element-equipped wiring board according to one aspect of the present invention includes a first surface and a second surface facing the first surface that extend in a direction orthogonal to the thickness direction. A first electrode having a linear shape in a cross section of the first insulating layer formed through the first insulating layer, and the first electrode A dielectric having a relative dielectric constant greater than that of the first insulating layer, embedded in the first insulating layer so as to face the first electrode, and facing the first electrode of the dielectric A shape in a cross section of the first insulating layer, which is formed of the same material as that of the first electrode so as to penetrate the first insulating layer so as to face the side opposite to the side. a second electrode which is but linear, the first of said first insulating layer so as to be electrically conductive on the side of the first electrode A first metal foil pattern provided on the surface on a solid, the first and the second so as to be surrounded by the metal foil pattern side to said first so as to be electrically conductive in the electrode insulating layer A first wiring pattern having a second metal foil pattern provided on the first surface ; a second wiring pattern provided on the second surface of the first insulating layer; The first wiring pattern and the second wiring pattern, which are formed of the same material as the first and second electrodes on the inner wall surface of the hole penetrating the first insulating layer, are electrically connected. An electrically conductive layer, a hole filling resin portion provided so as to fill an inside of the hole penetrating the first insulating layer and surrounded by the conductor layer, and the first insulating layer A second insulating layer laminated on the first surface, and the first insulating layer of the second insulating layer A third wiring pattern provided on a surface opposite to the surface on the opposite side, a surface of the first wiring pattern and a surface of the third pattern penetrating the second insulating layer; A first interlayer connector sandwiched between the first insulating layer, a third insulating layer stacked on the second surface of the first insulating layer, and the first insulating layer. A fourth wiring pattern provided on a surface opposite to the surface facing the insulating layer, and the surface of the second wiring pattern and the fourth wiring pattern through the third insulating layer. And a second interlayer connector sandwiched between the surfaces of the pattern.

  That is, this wiring board has a configuration in which a capacitive element is built in the thickness of one insulating layer. Here, the main structure as the capacitive element is a first electrode formed through the insulating layer and having a linear shape in a cross section of the insulating layer, and is opposed to the first electrode. A dielectric embedded in the insulating layer and having a relative dielectric constant larger than that of the insulating layer, and opposite to the side opposite to the first electrode of the dielectric The second electrode is formed through the insulating layer and has a linear shape in the cross section of the insulating layer.

  A capacitor element is configured by the first electrode, the dielectric, and the second electrode, and the size in the thickness direction can be made equal to the thickness of the insulating layer. Therefore, a capacitor element can be provided using an insulating layer normally used as a wiring board, and a capacitor element-equipped wiring board capable of being thinned is obtained. Although this capacitor element has a reduced thickness, it is also advantageous in that it can be configured so that it is close to a linear shape in the planar direction (= elongate shape) and does not take up an area in the planar direction. That is, a dead space can be utilized as a wiring board.

Moreover, the manufacturing method of the capacitive element-equipped wiring board according to another aspect of the present invention includes a first insulating layer, and copper foils on the first and second surfaces, which are both surfaces of the first insulating layer, respectively. A step of forming a through hole and a through opening having an elongated cross-sectional shape in the stretched laminate, a first conductor layer on the inner wall surface of the through hole, and an inner wall surface of the through opening. Forming a second conductor layer on the inner wall surface so as to face each other with the same material, patterning the copper foil on the first surface of the first insulating layer, and The first copper foil pattern is solid on the first surface of the second conductor layer so as to be connected to one side facing each other, and the second conductor is surrounded by the first copper foil pattern. A second copper foil pattern is formed on the first surface so as to be connected to the opposite side of the layer, and the first conductor layer is electrically connected. A third copper foil pattern is formed as a part of each of the first wiring patterns on the first surface so as to be electrically conductive, and the second surface of the first insulating layer Patterning the upper copper foil to form a second wiring pattern on the second surface so as to be electrically connected to the first conductor layer; A step of processing the first insulating layer and the second conductor layer so that the second conductor layer formed on the wall surface becomes two electrically independent conductor layers facing each other ; And after the processing, a relative permittivity larger than a relative permittivity of the first insulating layer inside the through hole passing through the first insulating layer through the first conductor layer. And the second conductive material of the through-opening is filled. A step of filling a paste-like dielectric composition having the same composition as the paste-like dielectric composition inside a body layer; a step of curing both of the paste-like dielectric composition; and the paste-like dielectric After curing both of the body compositions, a second insulating layer in which a first interlayer connection body is formed on the first insulating layer on the side where the first wiring pattern is formed, After the step of laminating the first interlayer connector so as to abut against the first wiring pattern and curing both of the paste-like dielectric composition, the side on which the second wiring pattern is formed Laminating a third insulating layer in which a second interlayer connection is formed on the first insulating layer so that the second interlayer connection hits the second wiring pattern; It is characterized by comprising.

Moreover, the manufacturing method of the capacitive element-equipped wiring board according to still another aspect of the present invention includes a first insulating layer and copper foil on the first and second surfaces which are both surfaces of the first insulating layer. A step of forming a through hole and a through opening having an elongated cross-sectional shape in each of the stacked laminates, and a first conductor layer on the inner wall surface of the through hole. A step of forming the second conductor layer on the inner wall surface from the same material so as to face each other on the wall surface, and the second conductor layer formed on the inner wall surface of the through opening are mutually connected. The second conductor layer is etched so as to be two electrically independent conductor layers facing each other, and the copper foil on the first and second surfaces of the first insulating layer is It is patterned by etching simultaneously with the etching of the second conductive layer, the second conductive layer Wherein so as to be electrically conductive to one side of which facing the first the first copper foil pattern on the first surface on the solid insulating layer, surrounded by the first copper foil pattern and the second A second copper foil pattern on the first surface to conduct to the opposite side of the first conductor layer, and the first copper layer to conduct electrically to the first conductor layer. A third copper foil pattern is formed on the surface as a part of each of the first wiring patterns , and the first insulating layer is electrically connected to the first conductor layer. A step of forming a second wiring pattern on the second surface; and after the etching, inside the through-hole penetrating the first insulating layer via the first conductor layer. A paste-like dielectric composition having a relative dielectric constant greater than that of the first insulating layer; Filling the paste-like dielectric composition having the same composition as the paste-like dielectric composition into the through-opening through the second conductor layer; and pasting the paste-like dielectric composition; A step of curing both of the dielectric compositions, and after curing both of the paste-like dielectric compositions, on the first insulating layer on the side where the first wiring pattern is formed, The step of laminating the second insulating layer through which the interlayer connection body penetrates so that the first interlayer connection body hits the first wiring pattern and curing the paste-like dielectric composition Then, a third insulating layer in which a second interlayer connector is formed through the second insulating layer is formed on the first insulating layer on the side where the second wiring pattern is formed. Laminating so as to abut against the second wiring pattern It is characterized by that.

  These manufacturing methods are each one methods for manufacturing a wiring board having at least the same main part as the main part of the wiring board. According to these manufacturing methods, a capacitive element-equipped wiring board that can be thinned can be manufactured. In particular, there is an advantage that a capacitive element can be formed at the same time in almost the same process as the formation of the interlayer connection body by the conductor layer formed on the through hole and the inner wall of the through hole, which is necessary as a wiring board.

  According to the present invention, it is possible to provide a capacitive element-equipped wiring board capable of being thinned and a manufacturing method thereof in a capacitive element-equipped wiring board in which a capacitive element is formed in an insulating plate and the manufacturing method thereof.

Sectional drawing and the top view which show typically the structure of the capacitive element equipped wiring board which concerns on one Embodiment of this invention. Process drawing which shows a part of manufacturing process of the capacitive element equipped wiring board shown in FIG. FIG. 2B is a continuation diagram of FIG. 2A, and is a process diagram schematically showing a part of a manufacturing process of the capacitor element-equipped wiring board shown in FIG. 1. It is a continuation figure of Drawing 2B, and is a process figure showing a part of manufacturing process of capacitor element-equipped wiring board shown in Drawing 1 with a typical section. FIG. 2D is a continuation diagram of FIG. 2C, and is a process diagram schematically showing a part of a manufacturing process of the capacitor element-equipped wiring board shown in FIG. 1. Sectional drawing and a top view which show typically the structure of the capacitive element-equipped wiring board which concerns on another embodiment of this invention. Process drawing which shows a part of manufacturing process of the wiring board with a capacitive element shown in FIG. 3 with a typical cross section. Sectional drawing which shows typically the structure of the capacitive element equipped wiring board which concerns on another embodiment of this invention. Process drawing which shows a part of manufacturing process of the capacitive element equipped wiring board shown in FIG. 5 with a typical cross section.

Capacitive element possession wiring board which is one embodiment of the present invention, the one surface of the insulating layer as a first surface, a first wiring pattern provided on the first face, wherein the insulating layer The surface facing the first surface is a second surface, the second wiring pattern provided on the second surface, and the first wiring surface provided on the inner wall surface of the hole penetrating the insulating layer, A hole provided so as to fill a conductor layer electrically connecting the first wiring pattern and the second wiring pattern, and an inside of the hole penetrating the insulating layer surrounded by the conductor layer. It further comprising a resin portion filling.

Thus, it has a wiring pattern on both surfaces as a wiring board, their wiring patterns that give electrically conductive by so-called through-hole conductors. The inside of the through hole serves as a hole-filling resin portion. Therefore, when this wiring board is used as a member and multilayered as a wiring board, gaps are inevitably formed and reliability deterioration can be prevented.

Here, with the first electrode, the second electrode, and the conductor layer, Ru same material der. This ensures that in the manufacturing process, it is possible to form these conductors in the same step, preferably in improving the manufacturing efficiency.

  Here, the dielectric and the hole filling resin portion can be made of the same material. In this case, in the manufacturing process, these parts can be formed in the same process, which is preferable in improving manufacturing efficiency.

Also, here, the second insulating layer laminated on the first surface of the insulating layer and the surface of the second insulating layer on the side opposite to the side facing the insulating layer A third wiring pattern provided, and a first interlayer connection interposed between the surface of the first wiring pattern and the surface of the third pattern through the second insulating layer Body, a third insulating layer laminated on the second surface of the insulating layer, and a surface of the third insulating layer on a side opposite to the side facing the insulating layer. A fourth wiring pattern, and a second interlayer connector that passes through the third insulating layer and is sandwiched between the surface of the second wiring pattern and the surface of the fourth pattern, In addition it includes a. This is a multi-layered structure as a wiring board. In this way, it is possible to deal with multilayering.

  Here, the first interlayer connection body and the second interlayer connection body are made of a conductive composition and have a shape that has an axis that coincides with the stacking direction, and the diameter changes in the direction of the axis. There can be. Such an interlayer connector is derived from, for example, conductive bumps obtained by screen printing a conductive composition, and is formed with high efficiency and can be formed with high density, so that it is refined as a wiring board. Suitable for the case.

  Based on the above, embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a cross-sectional view (FIG. 1 (a)) and a plan view (FIG. 1 (b)) schematically showing the structure of a wiring board with a capacitor element according to an embodiment of the present invention. Fig.1 (a) is sectional drawing of the arrow direction in the A-Aa position in FIG.1 (b).

  As shown in FIG. 1, this capacitive element-equipped wiring board 10 includes an insulating layer 11, a wiring layer (wiring pattern) 21, a wiring layer (metal foil pattern, wiring pattern) 22, and an inner wall conductor layer (through-hole conductor). 31, electrodes 32 a and 32 b, a hole filling resin portion 41, and a dielectric 42.

  The insulating layer 11 is, for example, a glass epoxy resin plate, has a thickness in the first direction, and extends in the second and third directions orthogonal to the first direction and orthogonal to each other. Not only a rigid material such as a glass epoxy resin but also a flexible material such as a polyimide resin can be used. The wiring layers 21 and 22 are conductive patterns obtained by predetermined patterning of metal foils provided on the upper and lower surfaces of the insulating layer 11, respectively. The inner wall conductor layer 31 is a conductor layer (through hole conductor) formed by plating on the inner wall surface of a through hole (round hole) that penetrates the insulating layer 11. The inner wall conductor layer 31 can be electrically connected to the wiring layers 21 and 22.

  The electrodes 32a and 32b are conductor layers that function as both electrodes of the capacitive element, and are derived from the conductor layer formed by plating on the inner wall surface of the through opening having an elongated transverse cross section that penetrates the insulating layer 11. And The electrodes 32a and 32b are electrically connected to the pattern 22 provided on the insulating layer 11, respectively. The hole-filling resin portion 41 is a resin portion provided so as to fill the interior surrounded by the inner wall conductor layer 31. The dielectric 42 is a dielectric material having a shape extending linearly in the plane of the insulating layer 11 sandwiched between the electrodes 32a and 32b. Specifically, as the material of the dielectric 42, for example, a material in which a fine powder of barium titanate is dispersed in an epoxy resin can be used. The hole filling resin portion 41 can be made of the same material as the dielectric 42.

  This wiring board has a configuration in which a capacitive element is built in the thickness of one insulating layer 11. That is, the main structure as a capacitive element is an electrode 32a formed through the insulating layer 11 and having a linear shape in the cross section of the insulating layer 11, and the insulating layer 11 so as to face the electrode 32a. The dielectric 42 embedded in the insulating layer 11 having a relative dielectric constant larger than that of the insulating layer 11 is insulated from the opposite side of the dielectric 42 opposite to the electrode 32a. The electrode 32b is formed through the layer 11 and has a linear shape in the cross section of the insulating layer 11.

  A capacitive element is constituted by the electrode 32a, the dielectric 42, and the electrode 32b, and the size in the thickness direction can be made equal to the thickness of the insulating layer 11. Therefore, a capacitor element can be provided using the insulating layer 11 that is normally used as a wiring board, and the capacitor element-equipped wiring board can be thinned. Although this capacitive element has a reduced thickness, it can be configured so that it is close to a linear shape (= elongate shape) in the planar direction and does not take up an area in the planar direction. That is, where dead space is utilized as a wiring board, where there are no other elements as a wiring board, such as L-shaped, U-shaped, zigzag shape, slalom shape, etc. You can make it relatively freely on the layout.

  Next, a manufacturing process of the capacitor element-equipped wiring board shown in FIG. 1 will be described with reference to FIGS. 2A to 2D. 2A to 2D are a series of process diagrams showing, in a schematic cross section, a manufacturing process of the wiring board with a capacitive element shown in FIG. (A) is a cross-sectional view, and (b) is a plan view, and the relationship between the cross-sectional view and the plan view conforms to FIG. 2A to 2D, the same or equivalent parts as those shown in FIG. 1 are denoted by the same reference numerals.

  First, as shown in FIG. 2A, through-holes (through holes) are formed in a laminate in which metal foils (copper foil; thickness is 18 μm, for example) 21A and 22A are stretched on both sides of an insulating layer 11 (thickness is, for example, 100 μm). A round hole (diameter: 100 μm, for example) 310 and a through opening 320 (width: eg, 100 μm) 320 having an elongated cross-sectional shape are formed. For example, drilling or laser processing can be used to form the through hole 310. In forming the through opening 320, for example, a router can be used in addition to drilling.

  Next, as shown in FIG. 2B, an inner wall conductor layer 31 and an inner wall conductor layer 32 are formed on the inner wall surface of the through hole 310 and the inner wall surface of the through opening 320, respectively (thickness, for example, 15 μm). ). For the formation of the inner wall conductor layers 31 and 32, for example, first, a copper seed layer is formed on these inner wall surfaces by electroless plating, and then the metal foils 21A and 22A are used as power supply paths in the plating bath. Then, electrolytic plating is performed on the seed layer. Thereby, the inner wall conductor layers 31 and 32 can be efficiently formed at a time.

  Subsequently, as shown in FIG. 2C, the metal foils 21 </ b> A and 22 </ b> A on both surfaces of the insulating layer 11 are respectively patterned in a predetermined manner and processed into wiring layers 21 and 22. Well-known photolithography can be used for this patterning process. When the patterning is completed, all the inner wall conductor layers 31 and 32 formed on both inner wall surfaces of the through hole 310 and the through opening 320 remain as they are. The metal foil (wiring) pattern 22 is patterned so that the inner wall conductor layers 31 and 32 are at least electrically connected to the pattern 22 provided on the insulating layer 11.

  Subsequently, as illustrated in FIG. 2D, additional processing holes 321 are formed at positions on both ends of the through opening 320 using, for example, a drill. By this additional processing hole 321, the conductor layer 32 formed on the inner wall surface of the through opening 320 is separated into two electrically independent conductor layers (electrodes 32a and 32b) facing each other. Then, after this processing, the paste-like dielectric composition to be the hole-filling resin portion 41 is filled into the through-hole 310 that penetrates the insulating layer 11 via the conductor layer 31 and the through-hole 310 penetrates the through-hole 310. A paste-like dielectric composition to be the dielectric 42 is filled in the opening 320 through the electrodes 32a and 32b. By curing these filled paste-like dielectric compositions, a capacitive element-equipped wiring board as shown in FIG. 1 can be obtained.

  More specifically, for example, the hole filling resin portion 41 and the dielectric 42 can be formed as follows. First, for example, screen printing can be used for filling the paste-like dielectric composition. Thereby, efficient filling is possible. The screen mask used at this time is provided with pits corresponding to the positions of the holes and grooves to be filled, and the insulating layer 11 side to be printed corresponds to, for example, the positions of the holes and grooves. It mounts on the support plate provided with the recessed part. By this recess, the paste-like dielectric composition passes through the hole or groove of the insulating layer 11 and is sufficiently filled. After filling, for example, it is heated to be cured. And the hardened part which protruded on both surfaces of the insulating layer 11 is removed, and it levels.

  As a modification, the hole filling resin portion 41 may be left hollow without being provided. Even if the hole-filling resin portion 41 is provided, the inner wall conductor layer 31 exists so as to surround the hole-filling resin portion 41. Therefore, the hole-filling resin portion 41 has no electrical function except that it is an insulator. However, as will be described later, when it is used as a core board of a multilayer wiring board, providing a hole-filling resin portion 41 makes it difficult to generate voids, which is preferable for improving reliability.

  Next, a capacitive element-equipped wiring board according to another embodiment of the present invention will be described with reference to FIG. FIG. 3 is a cross-sectional view (FIG. 3 (a)) and a plan view (FIG. 3 (b)) schematically showing the structure of a capacitive element-equipped wiring board according to another embodiment. The relationship between the cross-sectional view and the plan view conforms to FIG. Also, in FIG. 3, the same or equivalent parts as those shown in FIG. The description is omitted unless there is a matter to be described in addition to that part.

  The capacitive element-equipped wiring board 10A of this embodiment is derived from the fact that the method for obtaining the metal foil (wiring) pattern 22 by processing is slightly different from that shown in FIG. The configuration is different from that shown in FIG. That is, in order to electrically separate and make the electrodes 32a and 32b electrically independent, the inner wall conductor layer 32 (see FIG. 2B) connecting them is connected to the inner wall surfaces at both ends of the through opening 320 (see FIG. 2A). The configuration is removed from above. In this configuration, the additional processing hole 321 (see FIG. 2D) is not formed.

  FIG. 4 is a process diagram schematically showing a part of the manufacturing process of the capacitive element-equipped wiring board shown in FIG. 3 in a cross-sectional view, showing the process corresponding to the stage of FIG. 2C in the previous embodiment described above. Yes. The steps shown in FIGS. 2A and 2B are not changed. In this embodiment, in the etching process for forming the metal foil (wiring) pattern 22, the inner wall conductor layers 32 on the inner wall surfaces at both ends of the through opening 320 are simultaneously etched, and the inner wall conductor layer 32 is removed from the electrode 32a. And 32b are separated and independent.

  Thus, in order to etch a part of the inner wall conductor layer 32 on the inner wall surface of the through opening 320 simultaneously with the etching of the metal foil 22A, the inner wall surface of the hole or groove is used as a resist for photolithography. It is possible to use a covering type and to perform exposure by adopting an exposure method in which light is scattered and the light reaches obliquely. According to this, it is not necessary to form the additional processing hole 321 and the manufacturing efficiency can be improved.

  Next, still another embodiment of the present invention will be described with reference to FIG. FIG. 5 is a cross-sectional view schematically showing a configuration of a capacitive element-equipped wiring board according to still another embodiment. This embodiment is a configuration example of a wiring board that is multilayered by using the wiring board 10 shown in FIG. 1 as a core board. Thus, the capacitive element-equipped wiring board 10 shown in FIG. 1 is useful as a material for a multilayer wiring board having a more complicated configuration.

  As shown in FIG. 5, in addition to the wiring board 10 which is a core board, this multilayer wiring board includes insulating layers 51, 52, 54, 55, wiring layers (wiring patterns) 61, 62, 65, 66, interlayer connection bodies 71, 72, 74, 75, and solder resists 81, 82. Since the wiring board 10 which is a core board has already been described, the configuration will be described below excluding this part.

  The wiring layers 61 and 66 are wiring layers on both main surfaces as a multilayer wiring board, and various components (not shown) can be mounted thereon. Solder resist 81 that retains the solder melted at the time of solder connection on the land portions, except for the land portions of the wiring layers 61 and 66 on which solder (not shown) is to be mounted in mounting, and functions as a protective layer thereafter. , 82 are formed (the thickness is about 20 μm, for example). An Ni / Au plating layer (not shown) with high corrosion resistance may be formed on the surface layer of the land portion.

  Each of the wiring layers 62 and 65 is an inner wiring layer together with the wiring layers on both main surfaces of the wiring board 10, and the insulating layer 51 is arranged between the wiring layer 61 and the wiring layer 62 in this order. An insulating layer 52 is located between the boards 10, an insulating layer 54 is located between the wiring board 10 and the wiring layer 65, and an insulating layer 55 is located between the wiring layer 65 and the wiring layer 66. , 62, 65, 66, or the wiring board 10. Each wiring layer 61, 62, 65, 66 is made of, for example, a metal (copper) foil having a thickness of 18 μm.

  Each of the insulating layers 51, 52, 54, and 55 is, for example, a rigid material made of, for example, a glass epoxy resin having a thickness of 100 μm.

  The wiring layer 61 and the wiring layer 62 can be conducted by an interlayer connector 71 that is sandwiched between the surfaces of these patterns and penetrates the insulating layer 51. Similarly, the wiring layer 62 and the wiring board 10 can be conducted by an interlayer connector 72 that is sandwiched between the surfaces of the wiring patterns and penetrates the insulating layer 52. The wiring board 10 and the wiring layer 54 can be conducted by an interlayer insulator 74 that is sandwiched between the surfaces of the wiring patterns and penetrates the insulating layer 54. The wiring layer 65 and the wiring layer 66 can be conducted by an interlayer connector 75 that is sandwiched between the surfaces of these patterns and penetrates the insulating layer 55.

  The interlayer connectors 71, 72, 74, and 75 are derived from conductive bumps formed by screen printing of a conductive composition, and depend on the manufacturing process in the axial direction (shown in FIG. 1). The diameter changes in the upper and lower stacking directions). The diameter is, for example, 200 μm on the thick side.

  FIG. 6 is a process diagram schematically showing a part of the manufacturing process of the capacitor element-equipped wiring board shown in FIG. 5 in a cross-sectional view, and the final lamination process performed using the wiring board 10 shown in FIG. 1 as a material. Show. In FIG. 6, the same reference numerals are given to the same or equivalent components as those shown in the already described drawings.

  The material located on the lower side of the wiring board 10 and the material located on the upper side in FIG. 6 are formed by the same process. In the following, first, the formation process will be schematically described for the lower one.

  First, on a metal foil (electrolytic copper foil) to be the wiring layer 62 having a thickness of 18 μm, for example, by screen printing, a paste-like conductive composition that becomes the interlayer connection 71 is formed into a substantially conical bump shape (bottom surface). The diameter is, for example, 200 μm, and the height is, for example, 160 μm. By forming the conductive bumps of the conductive composition by screen printing, the conductive bumps that fit in a very small region can be efficiently formed with high productivity. Conductive bumps that fit in such a small area are suitable for increasing the density of patterns as wiring boards. This conductive composition is obtained by dispersing fine metal particles such as silver, gold and copper or fine carbon particles in a paste-like resin.

  Next, a prepreg to be used as the insulating layer 51 of FR-4 having a nominal thickness of 100 μm, for example, is laminated on the metal foil to penetrate the interlayer connector 71 so that its head is exposed. The tip may be crushed by plastic deformation during or after exposure. Subsequently, a metal foil (electrolytic copper foil) 61A is laminated on the prepreg and pressed and heated to integrate the whole. At this time, the metal foil 61A is in electrical continuity with the interlayer connector 71, and the prepreg is completely cured to become the insulating layer 51.

  Next, patterning by, for example, well-known photolithography is performed on the metal foil on one side, and this is processed into the wiring layer 62. Then, conductive bumps (bottom diameter, for example, 200 μm, height, for example, 160 μm) to be the interlayer connection body 72 are formed at predetermined positions on the wiring layer 62 by screen printing of a paste-like conductive composition. Subsequently, an FR-4 prepreg 52A (nominal thickness, for example, 100 μm) to be the insulating layer 52 is laminated on the wiring layer 62 side using a press machine. In this laminating step, the head of the interlayer connector 72 is passed through the prepreg 52A. Note that the broken line at the head of the interlayer connector 72 in FIG. 6 indicates that there are both cases where the head is plastically deformed and crushed at this stage, and when it is not plastically deformed.

  By the above, the raw material located under the wiring board 10 shown in FIG. 6 can be formed. For the upper material, the metal foil (electrolytic copper foil) 66A, the insulating layer 55, the interlayer connector 75, the wiring layer 65, the prepreg 54A, and the interlayer connector 74 are respectively the lower material, the metal foil 61A and the insulating material. It corresponds to the layer 51, the interlayer connector 71, the wiring layer 62, the prepreg 52A, and the interlayer connector 72, and the formation method is as described above.

  And the raw material of each wiring board is laminated | stacked by arrangement | positioning as shown in FIG. 6, and it pressurizes and heats with a press. Thereby, the prepregs 52A and 54A are completely cured, and the whole is laminated and integrated. At this time, the wiring layers on both main surfaces of the wiring board 10 are electrically connected to the interlayer connectors 72 and 74, respectively. Here, the presence of the hole filling resin portion 41 (see FIG. 1) in the wiring board 10 makes it difficult for voids to occur during lamination, and can prevent deterioration in reliability. After the lamination step shown in FIG. 6, the metal foils 61A and 66A on the upper and lower surfaces are patterned by using well-known photolithography, and further, layers of solder resists 81 and 82 are formed, as shown in FIG. Such a capacitive element-equipped wiring board can be obtained.

  5 and 6 is an example, and various known multilayering methods can be employed by using the capacitive element-equipped wiring board 10 as a core board.

  DESCRIPTION OF SYMBOLS 10,10A ... Wiring board with a capacitive element, 11 ... Insulating layer, 21 ... Wiring layer (wiring pattern), 21A ... Metal foil (copper foil), 22 ... Wiring layer (metal foil pattern, wiring pattern), 22A ... Metal foil (Copper foil), 31 ... inner wall conductor layer (through-hole conductor), 32 ... inner wall conductor layer, 32a ... electrode, 32b ... electrode, 41 ... hole filling resin part, 42 ... dielectric, 51, 52, 54 55 ... insulating layer, 52A, 54A ... prepreg, 61, 62, 65, 66 ... wiring layer (wiring pattern), 61A, 66A ... metal foil (copper foil), 71, 72, 74, 75 ... interlayer connector ( Conductive composition printed conductive bumps), 81, 82 ... solder resist, 310 ... through hole, 320 ... through opening, 321 ... additionally processed hole.

Claims (5)

A first insulating layer having a first surface and a second surface facing the first surface, extending in a direction perpendicular to the thickness direction;
A first electrode formed through the first insulating layer and having a linear shape in a cross section of the first insulating layer;
A dielectric material embedded in the first insulating layer so as to face the first electrode and having a relative dielectric constant greater than that of the first insulating layer;
The dielectric is formed and provided with the same material as the first electrode through the first insulating layer so as to be opposed to the side opposite to the side facing the first electrode. A second electrode having a linear shape in a cross section of the first insulating layer;
A first metal foil pattern provided on the first surface of the first insulating layer so as to be electrically connected to the first electrode side, and surrounded by the first metal foil pattern And a second metal foil pattern provided on the first surface of the first insulating layer so as to be electrically connected to the second electrode side. With patterns,
A second wiring pattern provided on the second surface of the first insulating layer;
The first wiring pattern and the second wiring pattern, which are formed of the same material as the first and second electrodes on the inner wall surface of the hole penetrating the first insulating layer, are electrically connected. A conductor layer that conducts to
A hole filling resin portion provided so as to fill an inside of the hole penetrating the first insulating layer and surrounded by the conductor layer;
A second insulating layer laminated on the first surface of the first insulating layer;
A third wiring pattern provided on a surface of the second insulating layer opposite to the surface facing the first insulating layer;
A first interlayer connection body penetrating through the second insulating layer and sandwiched between the surface of the first wiring pattern and the surface of the third pattern;
A third insulating layer laminated on the second surface of the first insulating layer;
A fourth wiring pattern provided on the surface of the third insulating layer opposite to the surface facing the first insulating layer;
And a second interlayer connector sandwiched between the surface of the second wiring pattern and the surface of the fourth pattern through the third insulating layer. Capacitor-equipped wiring board.   2. The wiring board with a capacitor element according to claim 1, wherein the dielectric and the hole filling resin portion are made of the same material.   The first interlayer connection body and the second interlayer connection body are made of a conductive composition and have a shape that has an axis that coincides with the stacking direction and has a diameter that changes in the direction of the axis. The wiring board with a capacitive element according to claim 1. A laminated body having a first insulating layer and a copper foil stretched on each of the first and second surfaces which are both surfaces of the first insulating layer, a through hole and a through opening having an elongated cross-sectional shape Forming a process; and
Forming a first conductor layer on the inner wall surface of the through-hole and a second conductor layer on the inner wall surface so as to face each other on the inner wall surface of the through-opening;
The copper foil on the first surface of the first insulating layer is patterned, and a first solid on the first surface is connected to one side of the second conductor layer facing each other. A second copper foil pattern on the first surface so that the copper foil pattern is connected to the other side of the second conductor layer that is surrounded by the first copper foil pattern. A third copper foil pattern is formed as a part of the first wiring pattern on the first surface so as to be electrically connected to the first conductor layer, and the first copper layer Patterning the copper foil on the second surface of the insulating layer to form a second wiring pattern on the second surface so as to be electrically connected to the first conductor layer When,
The first insulating layer and the second insulating layer are formed such that the second conductor layer formed on the inner wall surface of the through-opening portion faces two electrically independent conductor layers. Processing the conductor layer;
After the processing, the through hole penetrating the first insulating layer has a relative dielectric constant larger than that of the first insulating layer inside the first conductor layer. The paste-like dielectric composition is filled, and the paste-like dielectric composition having the same composition as the paste-like dielectric composition is filled in the through-opening through the second conductor layer. And a process of
Curing both of the paste-like dielectric composition;
After both of the paste-like dielectric composition is cured, a second interlayer connection body is formed through the first insulating layer on the side where the first wiring pattern is formed. Laminating an insulating layer so that the first interlayer connector contacts the first wiring pattern;
After both of the paste-like dielectric composition is cured, a third interlayer connection body is formed on the first insulating layer on the side where the second wiring pattern is formed. And a step of laminating an insulating layer so that the second interlayer connection body abuts against the second wiring pattern. A method of manufacturing a wiring board with a capacitive element. A laminated body having a first insulating layer and a copper foil stretched on each of the first and second surfaces which are both surfaces of the first insulating layer, a through hole and a through opening having an elongated cross-sectional shape Forming a process; and
Forming a first conductor layer on the inner wall surface of the through-hole and a second conductor layer on the inner wall surface so as to face each other on the inner wall surface of the through-opening;
Etching the second conductor layer so that the second conductor layer formed on the inner wall surface of the through-opening portion faces two electrically independent conductor layers; and The copper foils on the first and second surfaces of the first insulating layer are patterned by etching at the same time as the etching of the second conductor layer, and face each other in the second conductor layer. The first copper foil pattern is solid on the first surface of the first insulating layer so as to be electrically connected to one side, and the second conductive is surrounded by the first copper foil pattern A second copper foil pattern on the first surface for conduction to the opposite side of the body layer, and a second copper foil pattern on the first surface for electrical conduction to the first conductor layer. Forming a third copper foil pattern as a part of each first wiring pattern And forming a second wiring pattern on the first conductive layer electrically connected to as the first on the second surface of the insulation layer,
After the etching, the through hole penetrating the first insulating layer has a relative dielectric constant larger than that of the first insulating layer inside the first conductor layer. The paste-like dielectric composition is filled, and the paste-like dielectric composition having the same composition as the paste-like dielectric composition is filled in the through-opening through the second conductor layer. And a process of
Curing both of the paste-like dielectric composition;
After both of the paste-like dielectric composition is cured, a second interlayer connection body is formed through the first insulating layer on the side where the first wiring pattern is formed. Laminating an insulating layer so that the first interlayer connector contacts the first wiring pattern;
After both of the paste-like dielectric composition is cured, a third interlayer connection body is formed on the first insulating layer on the side where the second wiring pattern is formed. And a step of laminating an insulating layer so that the second interlayer connection body abuts against the second wiring pattern. A method of manufacturing a wiring board with a capacitive element.

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