JP5621021B2 - Semiconductor device and manufacturing method thereof - Google Patents

Description

  The present invention relates to a semiconductor device and a manufacturing method thereof, and more particularly to a semiconductor device using a flip chip bonding (hereinafter referred to as FCB) mounting technique and a manufacturing method thereof.

  In recent years, with the progress of the information society, semiconductor devices are required to be downsized and highly functional. One of the methods for realizing these is FCB mounting technology.

  The FCB has a bonding terminal (hereinafter, solder bump) formed on an electrode of a mounting portion such as a semiconductor chip (hereinafter referred to as a first semiconductor chip), and is mounted on a substrate or another semiconductor chip (hereinafter, as an example). In this technique, the solder bump surface is mounted on the second semiconductor chip. Solder bumps melted by heating cover the electrode surface on the substrate, and an alloy layer is formed by the metal constituting the electrode and the solder, so that the electrode on the first semiconductor chip and the electrode on the second semiconductor chip are Be joined.

  In order to obtain bonding, it is necessary to ensure good wettability between the metal constituting the electrode and the solder bump. For this purpose, a method using a flux has been adopted. This is because the electrodes of the first semiconductor chip and the electrodes of the second semiconductor chip are temporarily bonded with solder bumps by thermocompression bonding, and then the oxide film of the solder bumps is removed using a flux, and the wettability with the metal constituting the electrodes. This is a method in which the main bonding is performed with solder bumps.

Further, as a method not using a flux, Patent Document 1 discloses a method in which a mixed gas of N ₂ gas and H ₂ gas is used as a reducing gas, and an oxide film between the electrode surface and the solder bump surface is removed. Yes.

JP-A-6-268028

  In the method using flux, when a residue of flux remains, the active component in the residue causes corrosion of the alloy layer of the metal and solder constituting the electrode, and causes the strength of the joint between the electrodes to decrease. Obtaining was an issue. Moreover, the process of the washing | cleaning liquid used for the washing | cleaning of a flux was made into the subject.

  In the method using a reducing gas, heating is performed at the time of temporary bonding, and the temperature is raised to the solder melting point or higher. When the solder bump is held at a high temperature near the solder melting point, the oxidation of the solder bump is promoted, and the wettability between the metal constituting the electrode and the solder is deteriorated. This can be a cause of reducing the strength of the joint between the electrodes. In addition, the heating time in the temporary bonding step and the time required for the reduction reaction are relatively long, which has been a factor in increasing costs.

  In view of the above, an object of the present invention is to provide a semiconductor device capable of bonding with high strength between electrodes and capable of reducing the cost, and a manufacturing method thereof.

  The present invention includes a mounting portion, a first electrode provided on the mounting portion, a mounted portion on which the mounting portion is mounted, a second electrode having a protrusion provided on the mounted portion, A bonding terminal including solder that joins the first electrode and the second electrode and covers at least a part of a side surface of the protrusion; and at least one of the mounting portion and the mounted portion includes a semiconductor chip This is a semiconductor device. According to the present invention, it is possible to obtain a semiconductor device capable of bonding with high strength between electrodes and reducing the cost.

  The said structure WHEREIN: The said junction terminal can be set as the structure which consists of solder.

  The said structure WHEREIN: The said junction terminal can be set as the structure which consists of a solder layer provided in the surface facing the said 2nd electrode of the metal post and the said metal post.

  In the above configuration, the mounted portion may have a material layer having a lower thermal conductivity than the surface of the second electrode at a lower portion in the protrusion. According to this configuration, it is difficult for heat to escape from the tip of the protrusion, so that the heating time in the temporary bonding step can be shortened, and the growth of the solder oxide film can be suppressed. For this reason, a joint part with high strength is obtained. In addition, the processing time can be shortened.

  In the present invention, the first electrode provided in the mounting portion is provided in the second electrode having the protrusion provided in the mounted portion, the tip end portion of the protrusion, and the first electrode. A step of temporarily joining the contact terminals by contacting, a step of exposing the first electrode, the second electrode, and the solder contained in the joint terminals in a reducing gas; The first electrode is connected to the second electrode, and at least a part of the side surface of the protrusion is covered with the solder included in the bonding terminal, and the step of performing the main bonding includes: At least one of the semiconductor devices includes a semiconductor chip. According to the present invention, it is possible to obtain a semiconductor device capable of bonding with high strength between electrodes and reducing the cost.

  In the above configuration, the step of temporarily bonding includes a step of temporarily bonding so that a side surface of the second electrode and a surface other than a contact surface with the tip of the protrusion of the solder are exposed. be able to. According to this configuration, since the reduction reaction proceeds efficiently and stably, high-strength bonding is possible, and the cost can be reduced.

  In the above configuration, in the temporary bonding step, the temperature of the tip of the protrusion is equal to or higher than the melting point of the solder, and the temperature of the portion of the second electrode excluding the tip of the protrusion is lower than the melting point of the solder. It can be set as the structure including the process heated so that it may become. According to this structure, the alloy layer of the metal and the solder constituting the electrode is formed only at the tip of the protrusion.

  In the above configuration, the step of temporarily joining includes a step of applying ultrasonic vibration to at least one of the mounting portion and the mounted portion, and rubbing the surface of the metal post and the tip portion of the protrusion. can do. According to this configuration, the oxide film at the tip of the protrusion is removed, and the wettability with the solder is ensured. For this reason, the alloy layer of the metal and solder which comprise an electrode is formed only in the front-end | tip part of protrusion.

  In the above-described configuration, the step of temporarily joining includes a step of exposing a side surface of the protrusion and a surface other than the contact surface of the solder with the metal post and a contact surface of the solder with the tip of the protrusion. It can be set as the structure containing. According to this configuration, the reduction reaction proceeds efficiently and stably. For this reason, a joint part with high strength is obtained. In addition, the processing time can be shortened.

  In the above configuration, the main joining step moves in a direction in which the first electrode and the second electrode that are temporarily joined so as not to face each other at least one of the mounting portion and the mounted portion face each other. It can be set as the structure including the process to make. With this configuration, entrainment voids inside the solder can be suppressed. For this reason, the intensity | strength of the mechanical joining between electrodes can be made high.

  According to the present invention, since the protrusions are provided on the electrodes of the mounted portion, the heating time at the time of temporary bonding can be shortened and the growth of the oxide film of the bonding terminal can be suppressed. In addition, since the reducing gas is allowed to flow in a state where the distance between the mounting portion and the mounted portion is wide, the reduction reaction proceeds stably and efficiently. As a result, the strength of the joint can be improved and the cost can be reduced.

FIG. 1A is a top view of the semiconductor device 100 according to the first embodiment, and FIG. 1B is a cross-sectional view taken along line A-A1. FIG. 2A is a bottom view of the first semiconductor chip 10 according to the first embodiment, and FIG. 2B is a cross-sectional view taken along the line B-B1. FIG. 3A is a top view of the second semiconductor chip 20 according to the first embodiment, and FIG. 3B is a cross-sectional view taken along C-C1. FIG. 4A to FIG. 4C are cross-sectional views illustrating manufacturing steps of the semiconductor device 100 according to the first embodiment. FIG. 5A is a top view of the second semiconductor chip 20 according to the second embodiment, and FIG. 5B is a cross-sectional view taken along the line D-D1. FIG. 6A to FIG. 6C are cross-sectional views illustrating the manufacturing steps of the semiconductor device according to the second embodiment. FIG. 7A is a bottom view of the first semiconductor chip 10 according to the third embodiment, and FIG. 7B is a cross-sectional view taken along line E-E1. FIG. 8A to FIG. 8D are cross-sectional views illustrating the manufacturing steps of the semiconductor device according to the third embodiment.

  Embodiments relating to the present invention will be described below with reference to the drawings.

  In the first embodiment, a semiconductor chip made of, for example, silicon is used for both the mounting portion and the mounted portion, and solder bumps are used for the junction terminals.

  A semiconductor device 100 according to the first embodiment will be described with reference to FIGS. FIG. 1A is a top view of the semiconductor device 100, and FIG. 1B is a cross-sectional view taken along A-A1. In FIG. 1A, the first electrode 12 is shown through the first semiconductor chip 10. The lower surface of the first semiconductor chip 10 is covered with an insulating layer 16 made of polyimide having a thickness of 5 μm, for example. For example, a first electrode 12 made of a metal such as Cu is formed in an opening having a width of, for example, 40 μm provided in the insulating layer 16. The upper surface of the second semiconductor chip 20 is covered with an insulating layer 26 made of polyimide having a thickness of 5 μm, for example. A second electrode 22 made of a metal such as Cu is formed in an opening having a width of, for example, 40 μm provided in the insulating layer 26. A projection 24 having a width of 10 μm, for example, is provided at the center of the second electrode 22, and a material layer 26 a having a lower thermal conductivity than the metal forming the second electrode 22 is provided in the lower portion of the projection 24. From the viewpoint of simplifying the manufacturing process, the insulating layer 26 and the material layer 26a are preferably formed in the same process. That is, the insulating layer 26 and the material layer 26a are preferably made of the same material. The first electrode 12 and the second electrode 22 are joined by a solder bump 14. Although the shape of the first electrode 12 and the second electrode 22 is not specified, the solder bump 14 becomes spherical due to surface tension when melted, and therefore the planar shape seen from the top view is preferably circular.

  A method for manufacturing the semiconductor device 100 will be described with reference to FIGS.

  2A is a bottom view of the first semiconductor chip 10, and FIG. 2B is a cross-sectional view taken along B-B1. As shown in FIG. 2B, solder bumps 14 are provided below the first electrode 12. FIG. 3A is a top view of the second semiconductor chip 20, and FIG. 3B is a cross-sectional view taken along C-C1. As shown in FIG. 3B, the second electrode 22 is not provided with solder bumps. A method of mounting the first semiconductor chip 10 on the second semiconductor chip 20 using FCB will be described with reference to FIGS.

  A process of temporarily joining the first electrode 12 and the second electrode 22 through the solder bumps 14 will be described with reference to FIGS. As shown in FIG. 4A, the first semiconductor chip 10 is attracted to the flip chip bonder tool 18 and the second semiconductor chip 22 is fixed on the stage 28 of the flip chip bonder. The tool 18 has a built-in heater. Positioning is performed so that the first electrode 12 and the second electrode 22 face each other, and the first semiconductor chip 10 is moved in the direction of the arrow 110. As shown in FIG. 4B, the solder bump 14 and the tip of the protrusion 24 provided on the second electrode 22 are brought into contact with each other and heated by a heater in the tool 18 on the first semiconductor chip 10. Heat generated from the tool 18 is transmitted to the protrusions 24 through the solder bumps 14. At this time, since the material layer 26 a having a low thermal conductivity is provided in the lower portion of the protrusion 24, it is difficult for heat to be transmitted from the tip portion of the protrusion 24 to the other portion of the second electrode 22. As a result, the tip portion of the protrusion 24 can be selectively set to a temperature equal to or higher than the solder melting point. The solder bump 14 and the tip of the protrusion 24 form an alloy layer of a metal and solder constituting the second electrode 22, and the first electrode 12 and the second electrode 22 are temporarily joined. In the temporarily joined state, an electrical check of the joined state between the first electrode 12 and the second electrode 22 and an electrical operation check of the first semiconductor chip 10 are performed. If it is non-defective, proceed to the next step.

After the temporary bonding, for example, a mixed gas of N ₂ gas and H ₂ gas or a reducing gas such as formic acid is caused to flow between the first semiconductor chip 10 and the second semiconductor chip 20 to cause a reduction reaction, thereby causing the solder bumps 14. The oxide film on the surface is removed.

  With reference to FIG. 4B to FIG. 4C, the step of main joining the first electrode 12 and the second electrode 22 will be described. After the reduction reaction, the first semiconductor chip 10 is moved in the direction of the arrow 110. Since the oxide film on the surface of the solder bump 14 is removed, wettability is obtained between the solder bump 14 and the second electrode 22, and the solder bump 14 extends from the tip of the protrusion 24 to the side surface of the protrusion 24 and to the bottom surface of the second electrode 22. And spread wet. An alloy layer is formed of the metal constituting the second electrode 22 and solder, and the first electrode 12 and the second electrode 22 are finally joined. At this time, if the solder bump 14 covers a part of the side surface of the protrusion 24, the bonding is achieved, but it is preferable to cover the entire side surface of the protrusion 24 from the viewpoint of bonding strength. In order to obtain higher bonding strength, it is preferable that the solder bump 14 covers the entire surface of the second electrode 22.

  According to the first embodiment, since the material layer 26 a having a low thermal conductivity is provided in the lower portion of the protrusion 24, the heat transmitted from the solder bump 14 is transmitted from the tip of the protrusion 24 to the second semiconductor chip 20. Hateful. Further, the width of the protrusion 24 is 10 μm, which is narrower than 40 μm, which is the width of the entire second electrode 22. Therefore, the heating time at the time of temporary bonding can be shortened, and the growth of the oxide film on the solder bump 14 can be suppressed. Thereby, since the wettability between the metal constituting the second electrode 22 and the solder is obtained, the strength of the joint portion between the first electrode 12 and the second electrode 22 is increased.

  As shown in FIG. 4B, in the temporarily bonded state, the distance between the first semiconductor chip 10 and the second semiconductor chip 20 is 40 μm, which is larger than when the protrusions 24 are not provided on the electrodes. Further, the exposed area of the solder bump 14 and the second electrode 22 is large. Therefore, the reducing gas is sufficiently distributed to the surface of the solder bump 14 and the surface of the second electrode 22, and the reduction reaction is stable and efficient. For this reason, the time required for the reduction reaction is shortened, and the strength of the joint between the first electrode 12 and the second electrode 22 is increased.

  According to Example 1, as described above, the heating time in the temporary bonding step and the time required for the reduction reaction are shortened. Therefore, the time required for FCB mounting can be shortened to 1/10, for example, when there is no protrusion on the electrode. Accordingly, the time required to occupy the flip chip bonder per semiconductor device (package) can be shortened, so that the manufacturing cost of the semiconductor device can be reduced to 1/10.

  In the temporarily bonded state, only the tip of the protrusion 24 is in contact with the solder bump 14, so that the first semiconductor chip 10 can be easily removed when a defective product occurs.

  As shown in FIG. 4C, in the main bonding process, wettability is obtained between the solder bump 14 and the second electrode 22, and therefore, the solder bump 14 has a surface tension on the surface of the second electrode 22 due to surface tension. Spread while passing on. At this time, the solder bump 14 pushes air from the tip of the protrusion 24 to the outside of the second electrode 22, so that the entanglement void inside the solder bump 14 can be suppressed. Thereby, the joining area of the 1st electrode 12 and the 2nd electrode 22 can be enlarged, and the intensity | strength of mechanical joining can be made high.

  Example 2 is an example in which the protrusion is provided at the end of the second electrode. A method for manufacturing a semiconductor device according to the second embodiment will be described with reference to FIGS. Since the first semiconductor chip 10 is the same as that of the first embodiment, the description thereof is omitted.

  FIG. 5A is a top view of the second semiconductor chip 20 according to the second embodiment, and FIG. 5B is a cross-sectional view taken along the line D-D1 in FIG. The protrusion 34 is provided on the upper surface of the portion adjacent to the opening 33 where the second electrode 32 is exposed on the insulating layer 26. The insulating layer 26 is a material having a lower thermal conductivity than that of the metal constituting the second electrode, for example, polyimide. Further, as shown in FIG. 5A, in each of the one or more second electrodes 32 provided on the second semiconductor chip 20, the relative positional relationship between the opening 33 and the protrusion 34 is the same.

  A method of mounting the first semiconductor chip 10 on the second semiconductor chip 20 using FCB will be described with reference to FIGS. 6A to 6C.

  A method of temporarily joining the first electrode 12 and the second electrode 32 via the solder bumps 14 will be described with reference to FIGS. As shown in FIG. 6A, alignment is performed so that the solder bumps 14 and the protrusions 34 face each other, and the first semiconductor chip 10 is moved in the direction of the arrow 110. As shown in FIG. 6B, the solder bump 14 and the tip of the projection 34 provided on the second electrode 32 are brought into contact with each other and heated by a heater in the tool 18 provided on the upper portion of the first semiconductor chip 10. To do. Heat generated from the tool 18 is transmitted to the protrusion 34 through the solder bump 14. At this time, since the insulating layer 26 under the protrusion 34 has low thermal conductivity, it is difficult for heat transfer from the tip of the protrusion 34 to the other part of the second electrode 32. As a result, the tip of the protrusion 34 can be selectively set to a temperature equal to or higher than the solder melting point. An alloy layer of metal and solder constituting the second electrode 32 is formed at the tip of the solder bump 14 and the protrusion 34, and the first electrode 12 and the second electrode 32 are temporarily joined. In the temporarily joined state, an electrical check of the joined state between the first electrode 12 and the second electrode 32 and an electrical operation check of the first semiconductor chip 10 are performed. If it is non-defective, proceed to the next step.

  After the temporary bonding, a reducing gas is caused to flow between the first semiconductor chip 10 and the second semiconductor chip 20 to cause a reduction reaction, thereby removing the oxide film on the surface of the solder bump 14.

  With reference to FIG. 6B to FIG. 6C, a method of main joining the first electrode 12 and the second electrode 32 will be described. After the reduction reaction, the first semiconductor chip 10 is moved in the direction of the arrow 120 in FIG. 6B so that the first electrode 12 and the second electrode 32 face each other. Since the oxide film on the surface of the solder bump 14 is removed, wettability with the second electrode 32 is obtained. Therefore, as shown in FIG. 6C, the solder bump 14 spreads wet from the tip of the protrusion 34 to the side surface of the protrusion 34 and further to the bottom surface of the second electrode 32. An alloy layer is formed of the metal constituting the second electrode 32 and the solder, and the first electrode 12 and the second electrode 32 are finally joined. At this time, bonding is achieved if the solder bump 14 covers a part of the side surface of the protrusion 34, but it is preferable to cover the entire side surface of the protrusion 34 on the opening 33 side from the viewpoint of bonding strength. In order to obtain higher bonding strength, it is preferable that the solder bump 14 covers the entire surface of the second electrode 32.

  According to the second embodiment, wettability is obtained between the solder bump 14 and the second electrode 34 in the main bonding process, and therefore the solder bump 14 spreads while being transmitted along the surface of the second electrode 32 due to surface tension. . At this time, the solder bump 14 pushes air from one end of the second electrode 32 to the other end. Therefore, the effect of suppressing the voids inside the solder bumps 14 is greater than that of the first embodiment, and the strength of mechanical bonding can be further increased.

  In the second embodiment, in the main bonding process, the first semiconductor chip 10 is moved and the first electrode 12 and the second electrode 32 are opposed to each other. However, the second semiconductor chip 20 may be moved. .

  Example 3 is an example in which the joining terminal is configured by a metal post made of a metal such as Cu and a solder layer plated on a surface facing the second electrode of the metal post. A method for manufacturing the semiconductor device according to the third embodiment will be described with reference to FIGS. Note that the second semiconductor chip 20 is the same as that of the first embodiment, and thus the description thereof is omitted.

  FIG. 7A is a bottom view of the first semiconductor chip 10, and FIG. 7B is a cross-sectional view taken along the line E-E1 of FIG. A metal post 42 is provided below the first electrode 12, and the lower surface of the metal post 42 is covered with a solder layer 44.

  A method for mounting the first semiconductor chip 10 on the second semiconductor chip 20 using FCB will be described with reference to FIGS.

  With reference to FIG. 8A to FIG. 8C, the first electrode 12 and the second electrode 22 are temporarily joined through the metal post 42 and the solder layer 44. As shown in FIG. 8A, alignment is performed so that the first electrode 12 and the second electrode 22 face each other, and the first semiconductor chip 10 is moved in the direction of the arrow 110. As shown in FIG. 8B, the surface of the solder 44 and the tip of the protrusion 24 provided on the second electrode 22 are brought into contact with each other, and a heater in the tool 18 disposed on the first semiconductor chip 10 is used. Heat. Heat generated from the tool 18 is transferred to the protrusion 24 through the solder layer 44. At the same time, ultrasonic vibration in the direction of arrow 130 is applied to the first semiconductor chip 10 to rub the metal post 42 and the tip of the protrusion 24. As a result, the oxide film at the tip of the protrusion 24 is removed.

  As shown in FIG. 8C, the ultrasonic vibration is stopped. The first semiconductor chip 10 is lifted in the direction of the arrow 140, and the first semiconductor chip 10 and the second semiconductor chip 20 are separated until the solder layer 44 and the tip of the protrusion 24 come into contact with each other. Since the oxide film is removed from the tip portion of the protrusion 24 and the wettability between the metal on the surface and the solder layer 44 is ensured, the solder layer 44 spreads wet on the tip portion of the protrusion 24. For this reason, an alloy layer of metal and solder constituting the second electrode 22 is formed at the tip of the protrusion 24. On the other hand, since the oxide film is not removed in the other part of the second electrode 22, the wettability between the metal on the surface and the solder layer 44 cannot be obtained. For this reason, the alloy layer of the metal and solder which comprise the 2nd electrode 22 is not formed. As a result, an alloy layer of metal and solder constituting the second electrode 22 is formed only at the tip of the protrusion 24, and the first electrode 12 and the second electrode 22 are temporarily joined. In the temporarily joined state, an electrical check of the joined state between the first electrode 12 and the second electrode 22 and an electrical operation check of the first semiconductor chip 10 are performed. If it is non-defective, proceed to the next step.

  After the temporary bonding, a reducing gas is caused to flow between the first semiconductor chip 10 and the second semiconductor chip 20 to cause a reduction reaction, thereby removing the oxide film on the surface of the second electrode 22 and the surface of the solder layer 44.

  With reference to FIG. 8 (d), the step of main joining the first electrode 12 and the second electrode 22 will be described. The first semiconductor chip 10 is moved in the direction of arrow 110. Since the oxide film on the surface of the second electrode 22 and the surface of the solder layer 44 is removed, wettability is obtained. Therefore, the solder layer 44 spreads wet from the tip of the protrusion 24 to the side surface of the protrusion 24 and further to the bottom surface of the second electrode 22. An alloy layer is formed of the metal constituting the second electrode 22 and solder, and the first electrode 12 and the second electrode 22 are finally joined. At this time, the solder layer 44 can be bonded if it covers a part of the side surface of the protrusion 24, but it is preferable to cover the entire side surface of the protrusion 24 from the viewpoint of bonding strength. In order to obtain higher bonding strength, it is preferable that the solder layer 44 covers the entire surface of the second electrode 22.

  According to the third embodiment, as shown in FIG. 8B, the oxide film can be removed by rubbing the tip of the protrusion 24 and the metal post 42. Since the protrusion 24 is smaller than the entire second electrode 22, the oxide film can be removed more efficiently than when the entire second electrode 22 is rubbed together, and the processing time can be shortened.

  Further, since the joining terminal is constituted by the metal post 42 and the solder layer 44 plated on the lower surface thereof, the joining terminal is constituted only by the solder bump as in the first and second embodiments. However, the amount of solder can be reduced.

  In the third embodiment, the material layer 26a is provided in the lower part of the protrusion 24. However, the material layer 26a may not be provided. Moreover, although the example heated from the upper part of the 1st semiconductor chip 10 was shown, you may heat from the lower part of the 2nd semiconductor chip 20. FIG.

  In the third embodiment, an example in which ultrasonic vibration is applied to the first semiconductor chip 10 has been shown. However, the ultrasonic vibration may be added to the second semiconductor chip 20 or to both the first semiconductor chip 10 and the second semiconductor chip 20. Also good.

  In the first to third embodiments, an example in which both the mounting portion and the mounted portion are semiconductor chips has been described, but an insulating substrate such as a wiring substrate on which a semiconductor chip is mounted may be used instead of the semiconductor chip. Further, either one of the substrates may not be mounted with a semiconductor chip. That is, it is only necessary that at least one of the mounting portion and the mounted portion includes a semiconductor chip.

DESCRIPTION OF SYMBOLS 10 1st semiconductor chip 12 1st electrode 14 Solder bump 16 Insulating layer 18 Tool 20 2nd semiconductor chip 22 2nd electrode 24 Protrusion 26 Insulating layer 26a Material layer 28 Stage 34 Protrusion 42 Metal post 44 Solder layer 100 Semiconductor device

Claims (9)

An implementation section;
A first electrode provided in the mounting portion;
A mounted part on which the mounting part is mounted;
An electrode having a protrusion provided on the mounted portion, wherein a lower surface of a material layer formed in the protrusion is the same surface as a surface in contact with the upper surface of the mounted portion in the protrusion . When,
Joining the first electrode and the second electrode, and comprising a joining terminal including solder covering at least a part of a side surface of the protrusion,
At least one of the mounting part and the mounted part includes a semiconductor chip, and the mounted part has a material layer having a lower thermal conductivity than the surface of the second electrode in the lower part of the protrusion. ,
A semiconductor device, wherein an alloy layer of a metal constituting the second electrode and the solder is formed only at a tip portion of the protrusion.   The semiconductor device according to claim 1, wherein the joining terminal is made of solder.   2. The semiconductor device according to claim 1, wherein the joining terminal includes a metal post and a solder layer provided on a surface of the metal post facing the second electrode. A method for manufacturing a semiconductor device, comprising:
The semiconductor device includes:
An implementation section;
A first electrode provided in the mounting portion;
A mounted part on which the mounting part is mounted;
An electrode having a protrusion provided on the mounted portion, wherein a lower surface of a material layer formed in the protrusion is the same surface as a surface in contact with the upper surface of the mounted portion in the protrusion . When,
A bonding terminal including solder for bonding the first electrode and the second electrode and covering at least a part of a side surface of the protrusion;
Comprising
At least one of the mounting portion and the mounting portion includes a semiconductor chip, the joining terminal is made of solder, and the mounting portion has a lower thermal conductivity than the surface of the second electrode in the lower portion of the protrusion. Having a material layer,
The manufacturing method is
The first electrode provided in the mounting portion, the second electrode having the protrusion provided in the mounted portion, the tip portion of the protrusion, and the joining terminal provided in the first electrode , And temporarily bonding by contacting,
Exposing the first electrode, the second electrode, and the solder contained in the junction terminal in a reducing gas;
A step of performing main bonding by covering the first electrode with the second electrode and covering at least a part of a side surface of the protrusion with the solder included in the bonding terminal,
At least one of the mounting part and the mounted part includes a semiconductor chip,
The temporary bonding step is performed so that the temperature of the tip of the protrusion is equal to or higher than the melting point of the solder, and the temperature of the portion of the second electrode excluding the tip of the protrusion is lower than the melting point of the solder. The manufacturing method of the semiconductor device characterized by including the process of heating. The step of temporarily bonding is a step of temporarily bonding so that a side surface of the second electrode and a surface other than a contact surface of the tip of the protrusion of the solder are exposed. Item 5. A method for manufacturing a semiconductor device according to Item 4 . The temporary bonding step is performed so that the temperature of the tip of the protrusion is equal to or higher than the melting point of the solder, and the temperature of the portion of the second electrode excluding the tip of the protrusion is lower than the melting point of the solder. 6. The method of manufacturing a semiconductor device according to claim 4 , further comprising a heating step. The temporary bonding step includes a step of applying ultrasonic vibration to at least one of the mounting portion and the mounted portion and rubbing the surface of the metal post included in the bonding terminal and the tip of the protrusion. 6. A method of manufacturing a semiconductor device according to claim 4 , wherein The step of temporarily joining includes a step of exposing a side surface of the protrusion and a surface other than a contact surface of the solder with the metal post and a contact surface of the solder with the tip of the protrusion. 8. The method of manufacturing a semiconductor device according to claim 7 , wherein The main joining step includes a step of moving at least one of the mounting portion and the mounted portion in a direction in which the first electrode and the second electrode temporarily joined so as not to face each other. 9. A method of manufacturing a semiconductor device according to claim 4 , wherein the method is a semiconductor device manufacturing method.

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