JP5609250B2 - Viterbi decoding apparatus, decoding method thereof, and communication system - Google Patents

Description

  The present invention relates to a Viterbi decoding device, a decoding method thereof, and a communication system, and more particularly, to a Viterbi decoding device used for wireless communication such as satellite communication, a decoding method thereof, and a communication system.

  Viterbi decoding devices used for wireless communication such as satellite communication are known. In the Viterbi decoding device related to the present invention, when a burst error (concentrated error) occurs due to the fading of the communication channel, the burst error after Viterbi decoding tends to continue. Further, even when a random error occurs in a low C / N (Carrier to Noise ratio) communication channel, there is a tendency that a burst error occurs after Viterbi decoding.

  These burst errors that occur continuously after Viterbi decoding are also called Viterbi decoding residual errors. Non-Patent Document 1 describes Viterbi decoding residual errors. In order to deal with this, in the related art, a concatenated code that uses a convolutional code as an inner code and connects a Reed-Solomon code to an outer code is often used. This makes it possible to use Reed Solomon's excellent burst error correction capability. In the concatenated code, an interleaver that randomizes burst errors is often inserted between the inner code and the outer code.

  Next, a problem in the Viterbi decoding apparatus related to the present invention will be described in detail with reference to FIG. FIG. 7 is a schematic diagram for explaining a problem in the Viterbi decoding apparatus related to the present invention. Viterbi decoding, which is one of error correction methods used in wireless communication such as satellite communication, is a random error correction method and uses a convolutional code having a generator polynomial for Viterbi for encoding.

  Referring to the figure, in the Viterbi decoding in the related art, when a burst error occurs in the communication path, the decoded data after the burst error continues to become a burst error and may not return to a normal decoding operation for a while. This is because Viterbi decoding selects the wrong path as a result of the minimum metric path calculation due to a burst error, and therefore starts the next minimum metric path calculation from the wrong transmission side shift register state. is there.

  This state will be specifically described with reference to FIGS. FIG. 8 is a block diagram of an example of a transmission side apparatus related to the present invention, and FIG. 9 is a block diagram of an example of a reception side apparatus related to the present invention. Referring to FIG. 8, an example of a related transmission-side apparatus includes a convolutional code unit 2 and a modulation unit 3 that modulates the I and Q codes output from the convolutional code unit 2. Data 1 is input to the convolutional code unit 2.

  The convolutional code unit 2 includes a plurality of shift registers (hereinafter referred to as “transmission side shift registers”) and a plurality of exclusive OR circuits. The modulation unit 3 performs QPSK (Quadrature Phase Shift Keying) modulation.

  Referring to FIG. 9, an example of a related reception-side apparatus includes a demodulation unit 4 and a Viterbi decoding unit 5 in which the I and Q codes demodulated by the demodulation unit 4 are Viterbi-decoded. Then, the decoded data 6 is output from the Viterbi decoding unit 5. The demodulator 4 receives and demodulates data transmitted from the transmission side device. The Viterbi decoding unit 5 includes a transmission side shift register initial state calculation unit 7, minimum metric path calculation units 8 and 9, and a path memory 10.

  8 and FIG. 9 are known devices, and thus description of their operations is omitted.

  Referring to FIG. 8, in the transmission side device, data 1 is converted into code (I, Q) by convolutional coding unit 2 and transmitted as an output of modulation unit 3. The convolutional code 2 is composed of a shift register and an exclusive OR circuit, and forms a generator polynomial. This example is a convolutional code with a constraint length of 7 and a coding rate of ½, and the modulation method is QPSK, so the codes correspond to “I” and “Q”.

  Referring to FIG. 9, in the receiving side device, even if there is a random error in codes “I” and “Q” obtained by demodulation, error correction can be performed by Viterbi decoding 5 and data 6 can be restored. In the Viterbi decoding unit 5, the minimum metric path calculation unit 8 first performs the minimum metric path calculation by assuming the state of the shift register of the convolutional code 2 on the transmission side by the transmission side shift register initial state calculation unit 7. This is repeated while changing the state of the shift register.

  As a result, the state of the shift register from which the minimum metric path is obtained becomes the correct transmission side shift register initial state. The obtained minimum metric path starting from the initial state of the shift register is recorded in the path memory 10. Next, starting from the last state of the shift register recorded in the path memory 10, the minimum metric path calculation is performed by the minimum metric path calculation unit 9, the result is recorded in the path memory 10, and this operation is repeated. Thereby, the data 6 after error correction can be obtained continuously.

  FIG. 10 is a schematic diagram illustrating an example of state transition of the transmission side shift register in the related art. For simplicity, the convolutional code has a constraint length of 4 and an encoding rate of 1/2. If the initial state of the transmission side shift register is “000” and data = 1 is input to the shift register at time 1, the state of the shift register becomes “100”. Similarly, when data = 1 is input at time 2, the state becomes “110”. As shown in the figure, the data input to the shift register changes to different states depending on “1” or “0”.

  FIG. 11 is a schematic diagram showing an example of state transition of the shift register of the transmission side device in the related art, and FIG. 12 is an example of a trellis diagram of the Viterbi decoding of the reception side device in the related technology (the initial state of the transmission side shift register is shown). FIG. 13 is a schematic diagram showing an example of a trellis diagram of Viterbi decoding of the receiving side device in the related art (when the initial state of the transmitting side shift register is assumed by mistake).

  Referring to FIG. 11, there is shown an example in which the initial state of the shift register of the transmission side device is “000”. On the other hand, referring to FIG. 12, when the initial state is correctly assumed, the value of the path metric on the receiving side is “2”, which is the smallest value. On the other hand, referring to FIG. 13, if the initial state is assumed incorrectly, the path metric value is “4” even at the smallest value.

  When the minimum metric path is calculated assuming the erroneous initial state of the transmission side shift register in this way, the value of the path metric becomes larger than when the initial state is correctly assumed. If this function is used to calculate the minimum metric path by changing the initial state of the transmission side shift register, the path indicating the minimum path metric becomes the correct state transition of the transmission side shift register, and the initial state of the transmission side shift register Can be confirmed.

  Next, in the example of FIG. 12, the minimum metric path calculation is started with the last state “101” of path metric = 2 as the first state. By repeating this calculation, Viterbi-decoded data is continuously obtained. If a burst error occurs in the communication path, the minimum metric path calculation causes an error, and as a result, the first state used for the next minimum metric path calculation is assumed to be in an incorrect state. It may not return to operation.

  FIG. 14 is a schematic diagram showing an example of the generator polynomial used in the examples of FIGS. In the figure, as an example, an example of a generator polynomial having a constraint length of “4” is shown. FIG. 15 is a diagram illustrating an example of the relationship between the state of the transmission side shift register and the code. In the figure, as an example, the values of the symbols “I” and “Q” when the input data corresponding to the state of the transmission side shift register is “0” and “1” are shown. FIG. 16 is a schematic diagram showing an example of a metric. In the figure, the Hamming distance is shown as an example of the metric.

  On the other hand, Patent Document 1 discloses an example of an error correction method using the Viterbi decoding method. This is a hard decision as to whether the received signal point is one of the expected signal points in the state transition diagram of the convolutional code, and from the hard decision result and the square or absolute value of the Euclidean distance of the expected signal point The branch metric to the final state immediately before the termination is obtained.

  An example of a combined error interleaving method that performs interleaving adapted to the line state is disclosed in Patent Document 2. The transmission unit obtains the relationship between the circuit state and the optimal interleave size for the circuit state, and transmits information related to the interleave size together. The reception unit changes the interleave size based on the information about the interleave size. The second error control is performed after the temporal order of the data sequence decoded by the error control is restored.

  An example of a data transmission method in which double Reed-Solomon encoding is performed is disclosed in Patent Document 3. This is because the transmission side performs double Reed-Solomon coding on the input information in different directions, reads in the direction different from the double coding direction, performs convolutional coding, and transmits the information. The maximum likelihood decoding is performed on the bit string that has been convolutionally encoded in step S2, and the original information is restored by decoding the Reed-Solomon code that has been doubly encoded.

  An example of an error correction concatenated encoding method used for digital wireless communication is disclosed in Patent Document 4. This means that the Reed-Solomon encoder / decoder and the interleaver / deinterleaver are bypassed and the bit rate of the PSK modulator / demodulator is changed when the audio signal is used.

  Also, Patent Document 5 discloses an example of a Viterbi decoding device that performs the minimum reverse metric operation by going back in time. This is an invention relating to traceback for obtaining maximum likelihood decoded data.

  Further, Patent Document 6 discloses an example of a Viterbi decoder that prevents an error from propagating after completion of a defect when a burst error occurs due to a disk defect or the like. This is because when the defect period detected by the defect detector is longer than a certain length, the branch metric arithmetic unit and the addition comparison arithmetic unit of the Viterbi decoder are reset to propagate the error at the time of the occurrence of the defect. Is to prevent this.

  Further, Patent Document 7 discloses an example of a data transmission device that protects data from bursty code errors and suppresses an increase in redundancy. This is because the transmission side apparatus performs addition of code error detection information by a CRC coder and error correction coding at a coding rate of 1/2 by a convolutional coder on the original data, and converts the coded data into Divide into two and send each encoded data to the communication path. The receiving side apparatus performs error correction decoding on each encoded data and encoded data obtained by synthesizing each encoded data. Then, a code error of each decoded data obtained as a result is detected, and decoded data in which no code error is detected is selected.

JP 2000-049625 A JP-A-63-204937 JP-A-01-228327 Japanese Patent Laid-Open No. 02-195732 Japanese Patent Laid-Open No. 07-288478 JP-A-10-145243 JP-A-10-190632

"Experimental examination of characteristics of Viterbi decoding residual error", IEICE Transactions B, Vol. J71-B, no. 2, pp. 229-237, February 1988

  However, in the related inventions described in FIG. 7 to FIG. 16, when the condition of the channel fading is large and the condition is bad such as low C / N, a Viterbi decoding residual error occurs over a long period of time. There is a problem that the error may not be corrected.

  On the other hand, in Patent Documents 1 to 7 and Non-Patent Document 1, the initial state calculation of the transmission-side shift register is performed again after the burst error is completed to determine the correct initial state, and the time is further reversed from the correct initial state to the minimum reverse. There is no description regarding the characteristic configuration of the present invention to execute the metric path calculation. Therefore, the above problems cannot be solved by the inventions described in these documents.

  Accordingly, an object of the present invention is to provide a Viterbi decoding apparatus, a decoding method thereof, and a communication system capable of preventing a burst error from remaining.

  In order to solve the above-mentioned problem, a Viterbi decoding device according to the present invention inputs a demodulated code and performs an initial state calculation of a transmission side shift register, and a transmission side shift register initial stage A first minimum metric path calculation unit that calculates a minimum metric path based on the initial state of the transmission side shift register calculated by the state calculation unit, and a demodulated code are input to determine the initial state of the transmission side shift register A second minimum metric path calculation unit that continuously calculates from the maximum likelihood path, a minimum reverse metric path calculation unit that calculates a minimum reverse metric path, and a code memory that stores a demodulated code When the burst error is detected by the first minimum metric path calculation unit, the transmission side shift register initial state calculation unit After the burst error ends, the initial state calculation of the transmission side shift register is executed again to determine the correct initial state, and the minimum reverse metric path calculation unit refers to the code stored in the code memory. The minimum reverse metric path operation is performed by going back from the correct initial state, and the correct metric path after the burst error is re-decoded.

  Further, the Viterbi decoding method according to the present invention is calculated by a transmission side shift register initial state calculation step for inputting a demodulated code and calculating an initial state of the transmission side shift register, and the transmission side shift register initial state calculation step. A first minimum metric path calculating step for calculating a minimum metric path based on an initial state of the transmission side shift register, and a demodulated code, and an initial state of the transmission side shift register is determined; A second minimum metric path calculation step for continuously calculating from the minimum reverse metric path calculation step for calculating the minimum reverse metric path, and a code memory storage step for storing the demodulated code in the code memory, When a burst error is detected by the first minimum metric path calculation step After the burst error is completed by the transmission side shift register initial state calculation step, the initial state calculation of the transmission side shift register is executed again to determine a correct initial state, and further, the code memory is calculated by the minimum reverse metric path calculation step. The minimum reverse metric path calculation is performed by going back from the correct initial state with reference to the code stored in, and the correct metric path after the burst error is re-decoded.

  In addition, the communication system according to the present invention is characterized in that it includes a transmission side apparatus that convolutionally encodes data, further modulates and transmits the encoded data, and the Viterbi decoding apparatus.

  Further, the program according to the present invention includes a transmission side shift register initial state calculating step for inputting a demodulated code to the computer of the Viterbi decoding apparatus and calculating an initial state of the transmission side shift register, and the transmission side shift register initial state A first minimum metric path calculation step for calculating a minimum metric path based on the initial state of the transmission side shift register calculated in the calculation step, and a demodulated code are input to determine the initial state of the transmission side shift register A second minimum metric path calculation step for performing calculation after the maximum likelihood path later, a minimum reverse metric path calculation step for calculating the minimum reverse metric path, and a code memory storage for storing the demodulated code in the code memory A program for executing the first minimum metric When a burst error is detected by the Kupas calculation step, an initial state calculation of the transmission side shift register is performed again after the burst error is completed by the transmission side shift register initial state calculation step, and a correct initial state is determined. The minimum reverse metric path calculation step refers to the code stored in the code memory, performs a minimum reverse metric path calculation from the correct initial state, and re-decodes the correct metric path after the burst error. It is characterized by that.

  According to the present invention, residual burst errors can be prevented.

It is a schematic diagram which shows the operation principle of the Viterbi decoding device according to the present invention. It is a block diagram of an example of the Viterbi decoding apparatus (receiving side apparatus) which concerns on this invention. It is a flowchart which shows operation | movement of 1st Embodiment. It is a schematic diagram which shows an example of the state transition of the transmission side shift register which concerns on this invention. It is a schematic diagram which shows an example of the trellis diagram of the receiving side Viterbi decoding which concerns on this invention. It is a schematic diagram which shows operation | movement of 1st Embodiment. It is a schematic diagram for demonstrating the subject in the Viterbi decoding apparatus relevant to this invention. It is a block diagram of an example of the transmission side apparatus relevant to this invention. It is a block diagram of an example of the receiving side apparatus relevant to this invention. It is a schematic diagram which shows an example of the state transition of the transmission side shift register in related technology. It is a schematic diagram which shows an example of the state transition of the shift register of the transmission side apparatus in related technology. It is a schematic diagram which shows an example (when correctly assuming the initial state of a transmission side shift register) of the trellis diagram of the Viterbi decoding of the receiving side apparatus in related technology. It is a schematic diagram which shows an example (when the initial state of a transmission side shift register is mistakenly assumed) of the trellis diagram of Viterbi decoding of the receiving side device in the related art. It is a schematic diagram which shows an example of the generator polynomial used for the example of FIGS. It is a figure which shows an example of the relationship between the state of a transmission side shift register, and a code | symbol. It is a schematic diagram which shows an example of a metric.

  First, the operation principle of the present invention will be described before the description of the embodiment. FIG. 1 is a schematic diagram showing the operation principle of the Viterbi decoding apparatus according to the present invention. Referring to the figure, the receiving side device (Viterbi decoding device) according to the present invention is configured to include a Viterbi decoding unit 5a. The Viterbi decoding unit 5a includes a transmission side shift register initial state calculation unit 7, a first minimum metric path calculation unit 8, a second minimum metric path calculation unit 9, a minimum reverse metric path calculation unit 12, a code memory 11, It is comprised including.

  The transmission side shift register initial state calculation unit 7 receives the demodulated code and performs the initial state calculation of the transmission side shift register. The first minimum metric path calculation unit 8 calculates a minimum metric path based on the initial state of the transmission side shift register calculated by the transmission side shift register initial state calculation unit 7. The second minimum metric path calculation unit 9 receives the demodulated code, and after the initial state of the transmission side shift register is determined, continues calculation from the maximum likelihood path. The minimum reverse metric path calculation unit 12 calculates the minimum reverse metric path. The code memory 11 stores the code after demodulation.

  Next, the operation of the Viterbi decoding unit 5a will be described. When a burst error is detected by the first minimum metric path calculation unit 8, the transmission-side shift register initial state calculation unit 7 executes the initial state calculation of the transmission-side shift register again after the burst error is completed, thereby determining the correct initial state. Further, the minimum reverse metric path calculation unit 12 refers to the code stored in the code memory 11 and executes the minimum reverse metric path calculation by going back from the correct initial state to re-decode the correct metric path after the burst error. Is done.

  Therefore, the Viterbi decoding apparatus according to the present invention can prevent the burst error from remaining.

  Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. First, a first embodiment of the present invention will be described. FIG. 2 is a block diagram of an example of a Viterbi decoding device (receiving device) according to the present invention. Note that the communication system according to the present invention includes the transmission side device shown in FIG. 8 and the Viterbi decoding device (reception side device) shown in FIG. Further, since the configuration of the transmission side apparatus shown in FIG. 8 has already been described, the description thereof will be omitted.

  Referring to FIG. 2, the Viterbi decoding device (receiving device) according to the present invention includes a demodulator 4, a Viterbi decoder 5 a, and a controller 21. Further, the Viterbi decoding unit 5a includes a transmission-side shift register initial state calculation unit 7, a first minimum metric path calculation unit 8, a second minimum metric path calculation unit 9, a path memory 10, and a minimum reverse metric path calculation unit 12. And a code memory 11. Then, the data 6a is output from the path memory 10.

  On the other hand, the control unit 21 includes a transmission side shift register initial state calculation unit 7, a first minimum metric path calculation unit 8, a second minimum metric path calculation unit 9, a path memory 10, a minimum reverse metric path calculation unit 12, and a code memory 11. Control each part.

  The receiving-side apparatus includes a demodulating unit 4 that demodulates a received signal and a Viterbi decoding unit 5a that performs error correction. Data 6a that is data after error correction is output from the Viterbi decoding unit 5a.

  Among them, the Viterbi decoding unit 5a includes a transmission side shift register initial state calculation unit 7 for determining the initial state of the shift register after the first and burst error detection, a minimum metric path calculation unit 8 for calculating the minimum metric path, and a shift A minimum metric path calculation unit 9 for calculating a path metric after determining the initial state of the register to obtain a minimum metric path, a code (I, Q) memory unit 11 for performing error correction by going back in time, and a minimum reverse metric A minimum reverse metric path calculation unit 12 for calculating a path and a path memory unit 10 for recording a metric path are included.

  The demodulator 4 demodulates the received signal and outputs “I” and “Q” code data. In this embodiment, since the coding rate of the convolutional code is 1/2 and the modulation method is QPSK, IQ data is a code. IQ data is 1-bit data if Viterbi decoding is a hard decision using a Hamming distance, and 3 or 4-bit data if a soft decision is performed using a Euclidean distance.

  The transmission-side shift register initial state calculation unit 7 calculates the initial state of the transmission-side shift register, but initially assumes an all-zero state, and the minimum metric path calculation unit 8 calculates the minimum metric path and its metric value. And recorded in the path memory unit 10. Next, assuming that the initial state is a value other than all zeros, similarly, the minimum metric path and the value of the metric are recorded in the path memory unit 10. Similarly, the minimum metric path and the value of the metric are recorded in the path memory unit 10 for all combinations in the initial state. The path showing the minimum value among all the calculated metric values is the maximum likelihood path, and the initial state of this path is the initial state of the transmission side shift register to be obtained.

  The minimum metric path calculation unit 9 performs the calculation continuously from the maximum likelihood path recorded in the path memory unit 10 after the initial state of the transmission side shift register is determined. 10 is recorded. The data 1 on the transmission side can be determined from the maximum likelihood path recorded in the path memory unit 10, and the data 6a after Viterbi decoding can be obtained continuously. The steps so far are the same as the conventional Viterbi decoding method.

  Next, when a burst error occurs in the communication path, the value of the metric that is the calculation result of the minimum metric path calculation unit 9 becomes larger than when no burst error occurs. When this value is large, the transmission side shift register initial state calculation unit 7 performs the calculation of the initial state after the burst error again and records the result in the path memory unit 10. As a result, the Viterbi decoding path that has selected an incorrect path due to a burst error can be returned to the correct path, and a residual burst error can be prevented.

  In addition, since the correct initial state can be determined, the minimum reverse metric path calculation unit 12 goes back in time to re-decode the correct metric path after the burst error, thereby preventing the burst error from remaining after the burst error. The code data is temporarily recorded in the code (I, Q) memory unit 11 in order to calculate backward.

  Next, the operation of this embodiment will be described in detail with reference to FIG. FIG. 3 is a flowchart showing the operation of the first embodiment. Referring to the figure, first, the demodulator 4 demodulates the input received signal to obtain a code (I, Q), and gives the code (I, Q) to steps 2 and 8 (step S1). ).

  Next, the code (I, Q) output from the demodulation unit 4 is input to the transmission side shift register initial state calculation unit 7, and the transmission side shift register initial state calculation unit 7 performs transmission side shift register initial state calculation. (Step 2). Initially, the initial state is set to the all-zero state, the transmission side shift register initial state calculation unit 7 performs calculation (step S2), and then the first minimum metric path calculation unit 8 performs minimum metric path calculation (step S2). S3) Further, the first minimum metric path calculation unit 8 records the minimum metric path and the value of the metric in the path memory (step 4).

  Next, the transmission side shift register initial state calculation unit 7 performs calculation by changing the initial state in the transmission side shift register initial state calculation (step 2), and then the first minimum metric path calculation unit 8 performs the minimum metric. The path calculation is performed (step S3), and the first minimum metric path calculation unit 8 records the minimum metric path and the value of the metric in the path memory (step 4). The same calculation is repeated for the initial states of all combinations, and the minimum metric path and the value of the metric are recorded in the path memory.

  The control unit 21 compares the metric with the minimum metric path for the initial state of all the combinations recorded in the path memory in step 4, and selects the path having the minimum metric. This metric path is a correct path, and the initial state of this path can be determined as the initial state of the transmission side shift register.

  Next, the first minimum metric path calculation unit 8 continuously calculates the next minimum metric path from the metric path started from the determined initial state of the transmission side shift register (step 5). Then, the first minimum metric path calculation unit 8 records the calculated minimum metric path and the value of the metric in the path memory (step 6).

After step 6, the control unit 21 checks whether or not a burst error has occurred, and if no burst error is detected (“NO” in step S 7), the control unit 21 sets the transmission side shift register initial state calculation unit 7 to the minimum. The metric path calculation (step 5) and the first minimum metric path calculation unit 8 are repeatedly recorded in the path memory (step 6), and the Viterbi decoded data obtained as a result is transferred from the path memory 10 to the data. Output (step S11).

  Note that a burst error is detected as a burst error when the value of the minimum metric of the path memory recorded in step 6 exceeds a certain value.

  Next, when a burst error is detected (in the case of “YES” in step S7), the transmission side shift register initial state calculation is performed again (step S2), and the minimum metric for the initial state of all combinations is similarly performed. Compare the path and its metric value and determine the path with the smallest metric as the correct metric path.

  The initial state after the burst error is determined from the determined correct metric path, and the next minimum metric path is continuously calculated from the metric path started from the determined initial state of the transmission side shift register and recorded in the path memory ( Step S6).

  Further, the minimum reverse metric path calculation unit 12 performs a minimum reverse metric path calculation by going back from the initial state of the transmission side shift register determined after the burst error is detected in step 7 (step 9). For this purpose, the control unit 21 uses the correct initial state value from the result of the transmission side shift register initial state calculation in step 2 to trace the time, and the control unit 21 encodes the demodulated data in step 1 in the code memory 11 for a necessary period. (I, Q) Record in memory (step 8).

  Next, the minimum reverse metric path calculation unit 12 records the minimum reverse metric path obtained as a result of the calculation in the path memory 10 (step 10). Then, the control unit 21 outputs Viterbi decoded data obtained from the determined minimum metric path recorded in the path memory 10 as data 6a (step 11).

  Next, details of the minimum reverse metric path calculation (step 9) will be described with reference to FIGS. FIG. 4 is a schematic diagram illustrating an example of state transition of the transmission side shift register according to the present invention, and FIG. 5 is a schematic diagram illustrating an example of a trellis diagram of reception-side Viterbi decoding according to the present invention.

  FIG. 4 shows an example in which the initial state of the transmission side shift register is “101”. For simplicity, the generator polynomial of the Viterbi decoding shows a trellis diagram of the reverse metric path when the constraint length is 4. The transmission side in FIG. 4 shows the state transition of the transmission side shift register.

  The receiving side of FIG. 5 shows a trellis diagram of Viterbi decoding, which is a reverse path metric calculation for determining a path metric by going back in time. Since the initial state of the transmission side shift register is fixed at “101”, when the minimum reverse metric path is obtained therefrom, it is found that the path with the path metric value “2” is the correct path. This coincides with the state transition of the transmission side shift register.

  Next, the operation of the present invention will be described with reference to FIG. FIG. 6 is a schematic diagram showing the operation of the first embodiment. Referring to the figure, in the present invention, in Viterbi decoding at the receiving side apparatus, a burst error is detected by a minimum metric path calculation (see “burst error” in the figure and “minimum metric path calculation” below), and burst. After the error ends, execute the transmission side shift register initial state calculation to determine the correct initial state (see “Minimum metric path calculation” on the left side of “Minimum metric path calculation” and “Transmission side shift register initial state calculation” below) ).

  Furthermore, the minimum reverse metric path calculation is performed by going back from the correct initial state (see “Minimum reverse metric path calculation” on the right side of the “transmission side shift register initial state calculation”), and the correct metric path after the burst error is re-executed. By decoding, it is possible to prevent an error from remaining after a burst error.

  As described above, according to the first embodiment of the present invention, a burst error is detected, the transmission side shift register initial state calculation is performed again after the burst error ends, and after the correct initial state is determined, the normal state is obtained therefrom. By performing Viterbi decoding, it is possible to prevent an error from remaining after a burst error.

  Further, by performing the minimum reverse metric path calculation by going back from the correct initial state and re-decoding the correct metric path immediately after the burst error, it is possible to prevent the error from remaining after the burst error. Therefore, only a burst error range results in a decoding error, and even if a burst error occurs in the communication path, it can be suppressed to a minimum error.

  Next, a second embodiment of the present invention will be described. In the first embodiment, the Viterbi decoding method for detecting the burst error and preventing the error from remaining by calculating the initial state of the shift register of the convolutional code of the transmission side device has been described. In addition to the case where only Viterbi decoding is used, the same can be done when concatenated codes such as Viterbi decoding and Reed-Solomon decoding are used. In this case, the burst error remaining in the Viterbi decoding of the present invention can be corrected by the interleaver and Reed-Solomon decoding.

  Next, a third embodiment of the present invention will be described. The third embodiment relates to a decoding method program in the Viterbi decoding apparatus. Referring to FIG. 2, the receiving side device (Viterbi decoding device) according to the present invention includes a control unit (“computer”) 21. Further, as described above, the control unit 21 includes the transmission side shift register initial state calculation unit 7, the first minimum metric path calculation unit 8, the second minimum metric path calculation unit 9, the path memory 10, the minimum reverse metric path calculation unit 12, and Each part of the code memory 11 is controlled.

  On the other hand, the receiving apparatus (Viterbi decoding apparatus) according to the present invention includes a program storage memory (not shown), and the program storage memory stores a program of the decoding method shown in the flowchart of FIG. The control unit 21 reads the program from the program storage memory, and according to the program, the transmission side shift register initial state calculation unit 7, the first minimum metric path calculation unit 8, the second minimum metric path calculation unit 9, the path memory 10, the minimum The respective units of the reverse metric path calculation unit 12 and the code memory 11 are controlled. Since the contents of the control have already been described, description thereof is omitted here.

  As described above, according to the third embodiment of the present invention, it is possible to obtain a program capable of preventing a burst error from remaining. In the present invention, an apparatus, a method, and a communication system using a QPSK signal have been described. However, the present invention is not limited to this, and an apparatus using a BPSK (Binary Phase Shift Keying) signal and a 16QAM (Quadrature Amplitude Modulation) signal. The present invention can be applied to a method and a communication system.

  A part or all of the above-described embodiment can be described as in the following supplementary notes, but is not limited thereto.

(Supplementary note 1) A Viterbi decoding method characterized in that a burst error is detected when the value of the minimum metric stored in the path memory exceeds a certain value.

(Supplementary note 2) The Viterbi decoding method according to supplementary note 1, which is applied when a concatenated code of Viterbi decoding and Reed-Solomon decoding is used.

(Supplementary Note 3) A program including a Viterbi decoding apparatus including a minimum metric path output from the first and second minimum metric path calculation steps and a minimum reverse metric path calculation step and a path memory for storing the metrics.

(Supplementary Note 4) A demodulating step including demodulating a signal including any one of QPSK (Quadrature Phase Shift Keying), BPSK (Binary Phase Shift Keying), and 16QAM (Quadrature Amplitude Modulation) from the transmission side device as a characteristic step including demodulation. The listed program.

(Additional remark 5) The program of Additional remark 3 or 4 characterized by detecting as a burst error, when the value of the minimum metric stored in the said path memory becomes large exceeding a fixed value.

(Supplementary note 6) The program according to any one of supplementary notes 3 to 5, which is applied when a concatenated code of Viterbi decoding and Reed-Solomon decoding is used.

  The present invention can be applied to the field of Viterbi decoding, which is one of error correction methods used in wireless communication such as satellite communication.

4 Demodulation Unit 5a Viterbi Decoding Unit 6a Data 7 Transmission Side Shift Register Initial State Calculation Unit 8 First Minimum Metric Path Calculation Unit 9 Second Minimum Metric Path Calculation Unit 10 Path Memory 11 Code Memory 12 Minimum Reverse Metric Path Calculation Unit 21 Control Unit

Claims (10)

A transmission side shift register initial state calculation unit that inputs a demodulated code and performs an initial state calculation of the transmission side shift register;
A first minimum metric path calculation unit that calculates a minimum metric path based on an initial state of the transmission side shift register calculated by the transmission side shift register initial state calculation unit;
A second minimum metric path calculation unit that inputs a post-demodulation code and performs an operation continuously from the maximum likelihood path after the initial state of the transmission side shift register is determined;
A minimum reverse metric path calculation unit for calculating a minimum reverse metric path;
A code memory for storing the demodulated code,
If a burst error is detected by the first minimum metric path calculation unit, the transmission-side shift register initial state wherein the transmission shift register initial state operation is correct initial state is executed again after the end of the burst error by computing unit Further, the minimum reverse metric path calculation unit refers to the code stored in the code memory, and performs the minimum reverse metric path calculation from the correct initial state by going back in time, and correct metric after the burst error. A Viterbi decoding device characterized in that a path is re-decoded. A demodulator including a demodulator for demodulating any one of QPSK (Quadrature Phase Shift Keying), BPSK (Binary Phase Shift Keying), and 16QAM (Quadrature Amplitude Modulation) signals from a transmission side device. apparatus. 3. The Viterbi decoding according to claim 1, further comprising: a first memory metric path computing unit, a minimum metric path output from the minimum reverse metric path computing unit, and a path memory storing the metric. apparatus. 4. The Viterbi decoding apparatus according to claim 3 , wherein a burst error is detected when a value of a minimum metric stored in the path memory exceeds a certain value. 5. The Viterbi decoding apparatus according to claim 1, which is applied when a concatenated code of Viterbi decoding and Reed-Solomon decoding is used. A transmission side shift register initial state calculation step for inputting a demodulated code and performing an initial state calculation of the transmission side shift register;
A first minimum metric path calculation step for calculating a minimum metric path based on an initial state of the transmission side shift register calculated in the transmission side shift register initial state calculation step;
A second minimum metric path calculation step of inputting a demodulated code and performing an operation continuously from the maximum likelihood path after the initial state of the transmission side shift register is determined;
A minimum reverse metric path calculation step for calculating a minimum reverse metric path;
A code memory storing step of storing the demodulated code in a code memory,
When a burst error is detected in the first minimum metric path calculation step, the initial state calculation of the transmission side shift register is performed again after the burst error is completed in the transmission side shift register initial state calculation step, so that a correct initial state is obtained. Further, the minimum reverse metric path calculation step refers to the code stored in the code memory, and the minimum reverse metric path calculation is performed by going back in time from the correct initial state, and the correct metric path after the burst error is determined. The Viterbi decoding method of the Viterbi decoding apparatus, wherein 7. The Viterbi decoding device includes a minimum metric path output from the first and second minimum metric path calculation steps and a minimum reverse metric path calculation step and a path memory storing the metrics. Viterbi decoding method. 8. A demodulating step comprising demodulating any one of QPSK (Quadrature Phase Shift Keying), BPSK (Binary Phase Shift Keying), and 16QAM (Quadrature Amplitude Modulation) signals from a transmitting side device, or 7 comprising: Viterbi decoding method. A transmission side apparatus that performs convolutional encoding of data, further modulates and transmits the encoded data, and a Viterbi decoding apparatus according to any one of claims 1 to 5, Communications system. In the computer of the Viterbi decoding device,
A transmission side shift register initial state calculation step for inputting a demodulated code and performing an initial state calculation of the transmission side shift register;
A first minimum metric path calculation step for calculating a minimum metric path based on an initial state of the transmission side shift register calculated in the transmission side shift register initial state calculation step;
A second minimum metric path calculation step of inputting a demodulated code and performing an operation continuously from the maximum likelihood path after the initial state of the transmission side shift register is determined;
A minimum reverse metric path calculation step for calculating a minimum reverse metric path;
A code memory storing step of storing a code after demodulation in a code memory,
When a burst error is detected in the first minimum metric path calculation step, the initial state calculation of the transmission side shift register is performed again after the burst error is completed in the transmission side shift register initial state calculation step, so that a correct initial state is obtained. Further, the minimum reverse metric path calculation step refers to the code stored in the code memory, and the minimum reverse metric path calculation is performed by going back in time from the correct initial state, and the correct metric path after the burst error is determined. Is re-decoded.

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