JP5592634B2 - Semiconductor chip intermediate, semiconductor wafer processing apparatus and processing method - Google Patents

Description

  The present invention relates to a semiconductor chip intermediate, a semiconductor wafer processing apparatus, and a processing method. More specifically, in the process of forming a large number of semiconductor chips constituting an electronic component from a semiconductor wafer, a circuit of the semiconductor wafer is formed. Of the semiconductor chip that can prevent the chip from being damaged due to the dropping of the irregular shaped chip attached to the adhesive sheet onto the regular chip when the adhesive sheet attached to the surface is peeled off The present invention relates to an intermediate body, a semiconductor wafer processing apparatus, and a processing method.

  A semiconductor wafer having a circuit formed on its surface (hereinafter simply referred to as “wafer”) is divided into individual semiconductor chips (hereinafter simply referred to as “chip”) that can be used as electronic components by dicing. The As an example of the process up to obtaining chips from the wafer, a circuit is formed on the wafer surface, a cutting groove with a predetermined depth (bottomed) extending in a direction crossing each other from the surface side is formed, and then the circuit forming surface is protected. A first adhesive sheet is attached, and then, grinding is performed from the back surface side until reaching the cutting groove to divide into individual chips. Then, by sticking the second adhesive sheet to the ground back side, and peeling the first adhesive sheet while holding the wafer via the second adhesive sheet, individual chips can be picked up. Such a wafer processing method is disclosed in Patent Document 1, for example.

JP 2003-229384 A

However, the wafer processing method described in Patent Document 1 has the following disadvantages. That is, as shown in FIG. 6, the wafer W after the cutting grooves G extending in the directions intersecting each other is formed with the regular chip C1 formed in the inner region and the irregular chip C2 formed in the outer region. The When the first adhesive sheet S1 (protective sheet) affixed to the circuit forming surface is peeled from the wafer W in such a state, the amorphous chip C2 is attached and lifted to the first adhesive sheet S1, and the peel-off is performed. In the middle of the process, the chip may fall on the standard chip C1 and damage the standard chip C1, thereby reducing the chip formation yield.
The reason why the irregular chip C2 is lifted by the first adhesive sheet S1 is that the regular chip C1 is peeled off from the corner of the regular chip C1 so as not to be lifted by the first adhesive sheet S1. Although the peeling direction is determined, the irregular chip C2 is not necessarily peeled off from the corner. That is, there is a region through which the peeling edge of the first adhesive sheet S1 passes substantially parallel to one side which is the outer peripheral edge of the wafer W constituting the irregular chip C2. In this way, the irregular chip C2 from which the first adhesive sheet S1 is peeled off from the side instead of from the corner tends to adhere to the first adhesive sheet S1 and be lifted. The same phenomenon occurs in the peeling end region of the first adhesive sheet S1. In addition, in the peeling intermediate area between the peeling start area and the peeling end area, the amorphous chip C2 is rarely attached to the first adhesive sheet S1 and lifted. This is because, as is apparent from FIG. 6, in the peeling intermediate region, the irregular chip C2 is also peeled off from the corner.

[Object of the invention]
SUMMARY OF THE INVENTION An object of the present invention is to provide an intermediate for semiconductor chips in which an amorphous chip does not adhere to the adhesive sheet when peeling an adhesive sheet affixed to the circuit forming surface side of a wafer containing a large number of chips, and a semiconductor wafer processing apparatus And providing a processing method.

In order to achieve the above object, the present invention provides an intermediate for a semiconductor chip in which a plurality of bottomed cutting grooves extending in directions intersecting each other are formed on the surface side of a semiconductor wafer having a circuit formed on the surface. And
While the end of the cutting groove located in the region corresponding to at least one of the peeling start region and the peeling end region on both radial sides of the semiconductor wafer 1 is provided so as not to reach the outer peripheral edge of the semiconductor wafer, other than that The end of the cutting groove located in the region is provided so as to reach the outer peripheral edge, and when the grinding is performed from the back surface side of the semiconductor wafer to the position reaching the cutting groove, the peeling start region and the peeling end region are A configuration is adopted in which a continuous chip body can be formed in a region corresponding to at least one of the regions .

Furthermore, the present invention provides a supporting means for supporting a semiconductor wafer having a circuit formed on the front surface from the back surface side, a cutting means for forming a plurality of bottomed cutting grooves extending in a direction intersecting with each other from the front surface side, In a semiconductor wafer processing apparatus comprising a control means for controlling the support means and the cutting means to form the cutting grooves by predetermined control,
The cutting means is formed so that an end of a cutting groove located in a region corresponding to at least one of a separation start region and a separation end region on both radial sides of the semiconductor wafer does not reach the outer peripheral edge of the semiconductor wafer. On the other hand, a configuration is adopted in which the end of the cutting groove located in the other region is formed so as to reach the outer peripheral edge.

The processing method according to the present invention extends from the surface side of a semiconductor wafer having a circuit formed on the surface thereof in a direction intersecting with each other, and also includes a peeling start region and a peeling end region on both radial sides of the semiconductor wafer. The end of the cutting groove located in the region corresponding to at least one of the regions is formed so as not to reach the outer peripheral edge of the semiconductor wafer, while the end of the cutting groove located in the other region is made to reach the outer peripheral edge Forming, and
Attaching a first adhesive sheet to the surface side of the semiconductor wafer;
A plurality of semiconductor chips are formed by grinding from the back surface side of the semiconductor wafer to a position reaching the cutting groove, and in a region corresponding to at least one of the separation start region and the separation end region of the semiconductor wafer. Forming a chip continuum;
And a step of peeling the first adhesive sheet with the chip continuum as a peeling start end side in a state where the semiconductor wafer is held.

According to the present invention, a chip continuum extending at least for a certain length is formed in the outer peripheral edge region of a wafer including a large number of singulated chips. The supporting force (adhesive force) of the sheet or the like can be received over a wide area, and when the adhesive sheet is peeled from the circuit forming surface of the wafer, the peeling force of the adhesive sheet can be withstood. Therefore, the adhesive sheet can be prevented amorphous chips will lifted attached, amorphous chips Ru can avoid damage avoidance to shaped chips that fall onto the fixed form chips.
Contact name the chip continuum, a wafer portion other than the standard sizes chip, when performing the ground from the rear surface side of the wafer to a position reaching the cutting groove, it refers to a plurality of states amorphous chips led .

1 is a schematic configuration diagram of a wafer processing apparatus according to an embodiment. (A)-(G) is process explanatory drawing until it obtains a chip | tip from a wafer, Comprising: (A) is a schematic perspective view of the wafer in which the cutting groove was formed, (B) is the a arrow cross section of (A). (C) is a schematic perspective view of a wafer to which a first adhesive sheet is attached, (D) is a cross-sectional view taken along arrow b in (C), and (E) is a cross-sectional view showing a state in which the back surface of the wafer is ground. (F) is sectional drawing which shows the state which affixed the 2nd adhesive sheet on the grinding surface, (G) is sectional drawing which shows the state which peels a 1st adhesive sheet. The schematic plan view which shows the intermediate body of a semiconductor chip. The schematic front view of the sheet peeling apparatus which peels a 1st adhesive sheet. The principal part schematic front view which shows the state which has peeled the 1st adhesive sheet. The schematic perspective view which shows the conventional inconvenience.

Hereinafter, after describing the referential embodiment, a description about the implementation of the embodiment of the present invention.

(Reference embodiment)
As shown in FIG. 1, a wafer processing apparatus 10 includes a cutting unit 11 and a control unit 12 including a sequencer, a personal computer, and the like that operate the cutting unit 11 in a predetermined manner. The cutting means 11 can form a table 13 as a support means for supporting the wafer W and a cutting groove G having a depth (bottomed) that does not reach the back surface Wb from the front surface Wa on which the circuit of the wafer W is formed. It is comprised with the cutter 15 to perform. The table 13 is connected to decompression means (not shown), and the upper surface is configured as a suction surface for the wafer W.

  The cutter 15 includes a rotary blade 16 and a motor 17 that rotates the rotary blade 16, and the cutter 15 is supported by a moving device (not shown) so as to be movable in three orthogonal axes. In addition to the configuration in which the table 13 is moved in the three orthogonal directions to keep the cutter 15 at a fixed position, the cutter 15 and the table 13 can be provided so as to be movable.

  The control means 12 outputs an operation signal to the cutter 15 and the table 13 so as to form the cutting groove G in the wafer W, and outputs an operation signal to the table 13 so as to attract the wafer W. ing.

  Next, a semiconductor wafer processing process using the cutting means 11 will be described with reference to FIGS.

  As shown in FIG. 1, when the wafer W is supported and sucked and held by the table 13, a bottomed cutting groove G is formed from the front surface Wa to the back surface Wb of the wafer W via the cutter 15. As shown in FIGS. 2A and 2B, the cutting grooves G extend in parallel straight lines and form a lattice shape orthogonal to each other, and all ends reach the outer peripheral edge Wc of the wafer W. In order to prevent this, the length Ge is formed such that the end Ge is located inside the outer peripheral edge Wc. As a result, the closed-loop chip continuous body 20 can be formed in the entire outer edge region of the wafer W. The wafer W to be processed is not particularly limited, but the diameter is 300 mm, the thickness is 775 μm, and the depth of the cutting groove G is about 150 μm.

  When the cutting groove G is formed, as shown in FIGS. 2C and 2D, the first adhesive sheet S1 is pasted on the surface Wa side using a sheet pasting device (not shown).

  Next, as shown in FIG. 2E, the wafer W is held by the grinder 21 from the back surface Wb side in a state where the wafer W is sucked and held on a table (not shown) so that the first adhesive sheet S1 is on the lower surface side. Grind. The grinding is performed until the cutting groove G is reached. For example, the grinding is performed until the wafer W has a thickness of 50 μm. As a result, as shown in FIG. 3, a large number of singulated chips C1 are formed in the inner area of the wafer W, and a closed loop chip in which all the irregular chips C2 are connected in the outer area. A continuous body 20 (halftone dot portion in FIG. 3) is formed.

  When the entire surface of the wafer W is ground, as shown in FIG. 2 (F), the second adhesive sheet S2 is pasted to the back surface Wb through a sheet pasting device (not shown) and integrated with the ring frame RF. The

  After applying the second adhesive sheet S2, the adhesive sheet S1 is peeled off as shown in FIG. As shown in FIG. 4, the peeling is performed in a state where the second adhesive sheet S <b> 2 is on the lower surface side and the wafer W is sucked and held on the table 31 of the sheet peeling device 30. The sheet peeling apparatus 30 is equivalent to the apparatus disclosed in Japanese Patent Application No. 2008-271792 already filed by the applicant, and detailed description of each part of the apparatus is omitted.

  The sheet peeling device 30 unwinds the peeling tape PT and holds the peeling tape PT on the chuck 32, and then adheres a part of the peeling tape PT to the outer peripheral portion of the first adhesive sheet S1 by the adhering means 35 and adheres to it. The peeling tape PT is cut by the tape cutting means 36 on the upstream side of the position in the feeding direction. Next, as shown in FIG. 5, the first adhesive sheet S1 is moved to the wafer direction by moving the chuck 32 and the table 31 in the direction of the arrow so as to press the first adhesive sheet S in the reverse direction by the peeling roller 39. Peel from W.

  When peeling off the first adhesive sheet S, the peeling direction is preferably the direction indicated by the symbol A in FIG. 3, whereby the adhesive sheet S1 can be peeled off from the corner of the fixed chip C1, It is possible to prevent the fixed chip C1 from being peeled off from a position where the peeling force with the fixed chip C1 is as small as possible and attached to the first adhesive sheet S1 and lifted. Further, since the chip continuum 20 is formed in the outer edge region of the wafer W, the entire chip continuum 20 is bonded to the second adhesive sheet S2 even if the peeling force of the first adhesive sheet S1 is large. There is no inconvenience that the first adhesive sheet S1 is attached and lifted.

  The wafer W from which the first adhesive sheet S1 has been completely peeled is transferred to a pickup process or the like.

Therefore, according to such a reference embodiment, cutting is performed so that the end Ge of the cutting groove G is positioned inside the outer peripheral edge Wc of the wafer W, and the closed loop chip continuum 20 is formed in the outer edge region of the wafer W. Thus, when the first adhesive sheet S1 is peeled off, the irregular chip C2 does not adhere to the first adhesive sheet S1 and is lifted, and the irregular chip C2 falls to remove the regular chip C1. The damage factor can be effectively avoided.

(Embodiment)
This embodiment, as shown in FIG. 3, the chip continuously peeling initiation region A 1 of the first adhesive sheet S1, both the peeling completion area A 2 of the first adhesive sheet S1, or any only one region The body 20 is formed, and the other peripheral edge region is an intermediate body of the semiconductor chip in which the end Ge of the cutting groove G reaches the outer peripheral edge Wc of the wafer W. This is because the amorphous chip C2 is also peeled from the corner in the peeling intermediate area between the peeling start area A1 and the peeling end area A2, so that the amorphous chip C2 is peeled off along with the peeling of the first adhesive sheet S1. This is because there are very few cases where they adhere and are lifted.

  As described above, the best configuration, method and the like for carrying out the present invention have been disclosed in the above description, but the present invention is not limited to this.
  In other words, the present invention has been illustrated and described mainly with respect to specific embodiments, but without departing from the scope of the technical idea and object of the present invention, the shape, position, or With respect to the arrangement and the like, those skilled in the art can make various changes as necessary.
  For example, the semiconductor wafer may be a silicon wafer or a compound wafer.

DESCRIPTION OF SYMBOLS 10 Wafer processing apparatus 11 Cutting means 12 Control means 13 Table (support means)
20 chip continuum C semiconductor chip G cutting groove Ge edge of cutting groove S1 first adhesive sheet S2 second adhesive sheet W semiconductor wafer Wa surface Wb back surface

Claims (3)

An intermediate of a semiconductor chip in which a plurality of bottomed cutting grooves extending in a direction intersecting each other are formed on the surface side of a semiconductor wafer having a circuit formed on the surface,
While the end of the cutting groove located in the region corresponding to at least one of the peeling start region and the peeling end region on both radial sides of the semiconductor wafer 1 is provided so as not to reach the outer peripheral edge of the semiconductor wafer, other than that The end of the cutting groove located in the region is provided so as to reach the outer peripheral edge, and when the grinding is performed from the back surface side of the semiconductor wafer to the position reaching the cutting groove, the peeling start region and the peeling end region are An intermediate of a semiconductor chip, characterized in that a chip continuum can be formed in a region corresponding to at least one region . Support means for supporting a semiconductor wafer having a circuit formed on the front surface from the back surface side, cutting means for forming a plurality of bottomed cutting grooves extending in a direction intersecting with each other from the front surface side, the support means and the cutting means In a semiconductor wafer processing apparatus provided with a control means for forming the cutting groove by predetermined control of
The cutting means is formed so that an end of a cutting groove located in a region corresponding to at least one of a separation start region and a separation end region on both radial sides of the semiconductor wafer does not reach the outer peripheral edge of the semiconductor wafer. On the other hand, the semiconductor wafer processing apparatus is characterized in that the end of the cutting groove located in the other region is formed so as to reach the outer peripheral edge. Extending in a direction crossing each other from the surface side of the semiconductor wafer having a circuit formed on the surface, and in a region corresponding to at least one of a peeling start region and a peeling end region on both radial sides of the semiconductor wafer Forming the end of the cutting groove located so as not to reach the outer peripheral edge of the semiconductor wafer, while forming the end of the cutting groove located in the other region so as to reach the outer peripheral edge;
Attaching a first adhesive sheet to the surface side of the semiconductor wafer;
A plurality of semiconductor chips are formed by grinding from the back surface side of the semiconductor wafer to a position reaching the cutting groove, and in a region corresponding to at least one of the separation start region and the separation end region of the semiconductor wafer. Forming a chip continuum;
And a step of peeling the first adhesive sheet with the chip continuum as a peeling start end side in a state where the semiconductor wafer is held.

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