JP5571594B2 - Switching power supply - Google Patents

Description

  The present invention relates to a single-ended forward type switching power supply device having an overcurrent protection function and having a synchronous rectifier circuit.

  A general switching power supply device has an overcurrent protection function that limits the output current that can be output to the load to a certain level or less in order to protect a load that has failed during energization (for example, prevention of burning accidents, etc.). Yes. Conventionally, there are various methods for overcurrent protection. Among them, the pulse-by-pulse method is used, in which the pulsed switching current flowing in the main switching element is observed for each switching period and the peak value is limited. There are many.

  The pulse-by-pulse overcurrent protection limits the peak value of the switching current for each pulse, so excessive electric power is generated in the internal elements of the switching power supply device (for example, semiconductor elements such as main switching elements and rectifying elements). Can be prevented from being stressed. Therefore, not only when the output current becomes large, but also, for example, when the input voltage is input to the switching power supply device and the output smoothing capacitor is rapidly charged to increase the output voltage, the internal element is protected. is there. In the case of a single-ended forward type switching power supply device, the peak value of the switching current flowing through the main switching element is approximately proportional to the output current, so that the upper limit value of the output current can be accurately defined. There is also an advantage of being able to do it.

  For example, the switching power supply disclosed in Patent Document 1 is a single-ended forward switching power supply including a pulse-by-pulse overcurrent protection circuit. This switching power supply device includes a current detection resistor that converts a switching current flowing through a main switching element into a voltage, an integration circuit that removes a spike component superimposed on the detection voltage, and main switching when the output of the integration circuit reaches a reference value. A PWM circuit that turns on a transistor provided between the gate and source terminals of the element to forcibly turn off the main switching element and shorten the on-time of the main switching element. Furthermore, an oscillation frequency control circuit is provided that lowers the switching frequency when the output of the integration circuit increases. This switching power supply device has the problem that the peak current value of the switching current cannot be limited to a reference value or less due to the operation delay of the integration circuit or the PWM circuit, and the overcurrent drooping characteristic has a bottom. This is solved by lowering the switching frequency.

  In recent years, in order to reduce the loss of the rectifier diode on the secondary side of the transformer, a switching power supply device that performs synchronous rectification using a MOS FET having a small conduction resistance has been proposed. For example, as disclosed in Patent Document 2, a rectifying side and commutation side switching element that has a single-ended forward type converter circuit and is an N-ch (channel) MOS type FET, There is a switching power supply device provided with a predetermined drive circuit for driving. The drive circuit is a winding drive system using a voltage generated in the tertiary winding of the main transformer, and the timing for turning off the commutation side switching element is determined by a timing signal from the signal transmission transformer. In this switching power supply device, the drive circuit for the rectifying side and commutation side switching elements has a simple configuration, but the on / off timing control of the main switching element, the rectifying side and commutation side switching elements can be optimized. it can. In Patent Document 2, the overcurrent protection circuit is not described.

JP 63-35171 A JP 2005-12919 A

  In the case of the switching power supply device of Patent Document 1, it takes a certain time until the switching current suddenly increases and the oscillation frequency control circuit starts to operate and the switching frequency actually decreases. There is a problem that becomes large. For example, when a device that is a load fails during normal operation and the output terminal of the switching power supply device is suddenly shorted, the oscillation frequency control circuit operates to change the time constant of the oscillation circuit. Since the change in frequency is slow, the peak value becomes large at least for about 1 to 3 pulses of the switching current, which causes a large electrical stress to be applied to the circuit elements inside the apparatus. In particular, a semiconductor such as a main switching element is vulnerable to current stress, voltage stress, or thermal stress due to loss, and may be destroyed if excessive stress is applied even for a short time. Therefore, the overcurrent protection circuit of the switching power supply device cannot reliably protect circuit elements inside the switching power supply device. In addition, in order to ensure the safety of the semiconductor such as the main switching element, it is necessary to select an expensive element having a large size and a high current rating and voltage rating.

  Even if the overcurrent protection circuit of Patent Document 1 is added to the switching power supply device of Patent Document 2, the same problem as described above may occur.

  The present invention has been made in view of the above-mentioned background art, has a low-loss synchronous rectifier circuit, and can reliably protect a load and an internal circuit element when an output is short-circuited. An object of the present invention is to provide a forward type switching power supply.

The present invention is an N-ch MOS type FET connected in series with an input power source, wherein the main switching element intermittently generates an AC voltage by turning on and off at a predetermined switching frequency, A main transformer having a primary winding to which an alternating voltage is applied and a secondary winding magnetically coupled thereto, one end of which is connected to one end of the secondary winding, and the main switching element is turned on while the main switching element is on. A rectifying side switching element for rectifying a voltage generated in the secondary winding; a drain terminal and a source terminal connected to the other end of the secondary winding and the other end of the rectifying side switching element; A commutation-side switching element that is an N-ch MOS type FET that is turned on during a period when the transistor is off and flows current from the source terminal to the drain terminal; A parasitic diode formed between the inside of the drain and source terminals of the switching element, the commutation side switching device comprising a circuit for driving on and off, the on-time of the main switching element is shortened to less than a predetermined time, A synchronous rectification drive circuit for holding the commutation side switching element in an off state, and a low-pass filter comprising a smoothing choke and a smoothing capacitor, the input side of which is connected between the drain and source terminals of the commutation side switching element; A smoothing circuit that generates a DC output voltage across the smoothing capacitor and supplies power to a load; a current detection circuit that detects a switching current flowing through the main switching element; and a pulse width based on an error signal of the output voltage Controls on / off of main switching element by outputting modulated rectangular driving pulse In addition, when the peak value of the switching current reaches a first reference value in response to the output signal of the current detection circuit, a pulse-by-pulse type overdrive is performed to set the drive pulse to a low level in order to turn off the main switching element. A PWM control circuit for performing a current protection operation, and when the peak value of the switching current reaches a predetermined value higher than the first reference value, the main switching element is turned on by an overcurrent protection operation performed by the PWM control circuit. This is a single-ended forward type switching power supply apparatus in which the time is equal to or shorter than the predetermined time, and the commutation side switching element is held in the OFF state by the synchronous rectification driving circuit .

And a variable resistance element connected between a gate and a source terminal of the main switching element, and a variable control circuit for changing a resistance value of the variable resistance element based on an output signal of the current detection circuit. The control circuit receives the output signal of the current detection circuit, compares the peak value of the switching current with a second reference value corresponding to the predetermined value for each switching period, and the switching current becomes the second reference value. When it reaches, the resistance value of the variable resistance element is decreased, and the increase of the peak value of the switching current is suppressed by controlling so as not to increase the voltage between the gate and source terminals of the main switching element, and is maintained in the off state. and a switching power supply that limits the peak value of the recovery current of the parasitic diode of the commutation side switching device.

  The variable control circuit sets the resistance value of the variable resistance element during a period until the delay time of the overcurrent protection operation of the PWM control circuit elapses after the peak value of the switching current reaches the second reference value. Continue to reduce.

The variable resistance element is an NPN transistor whose collector terminal is connected to the gate terminal side of the main switching element and whose emitter terminal is connected to the source terminal of the main switching element, and the variable control circuit includes the NPN transistor The conduction resistance between the collector and emitter terminals of the NPN transistor is changed by controlling the base current.

  The current detection circuit converts the switching current into a voltage signal and outputs the voltage signal. The variable control circuit includes a first resistor having both ends connected between a base and an emitter terminal of the NPN transistor, and a cathode terminal. The zener diode is connected to the output terminal of the current detection circuit and the anode terminal is connected to the base terminal of the NPN transistor.

A voltage holding capacitor is connected in parallel with the first resistor, and the variable control circuit delays an overcurrent protection operation of the PWM control circuit after the peak value of the switching current reaches the second reference value. The operation of decreasing the resistance value of the variable resistance element is continued by supplying the base current of the NPN transistor from the voltage holding capacitor until the time elapses.

Further, a tertiary winding is provided in the main transformer, and a voltage generated in the tertiary winding during a period in which the main switching element is off is supplied to the synchronous rectification drive circuit. Preferably, a voltage supply path is provided between the terminals, and the commutation-side switching element is driven to be turned on / off in a state where the on time of the main switching element is longer than the predetermined time.

  According to the switching power supply device of the present invention, when the load fails and the output is short-circuited, the synchronous rectification operation of the commutation side switching element is stopped, and the recovery current flows through the parasitic diode of the commutation side switching element, the switching is performed. The current and the recovery current can be kept small, and an excessive voltage can be prevented from being generated between the drain and source terminals of the commutation side switching element. Therefore, a low breakdown voltage MOS FET having a small conduction resistance can be selected as the commutation side switching element, and a reduction in loss can be achieved.

  In addition, the variable resistance element and the variable control circuit can be simply configured by combining, for example, an NPN transistor, a Zener diode, first and second resistors, a holding capacitor, and the like, and further, a commutation side switching element, a main switching element, etc. Since it is not necessary to select a circuit element having an excessively large outer shape, the apparatus can be reduced in size and cost.

It is a block diagram which shows one Embodiment of the switching power supply device of this invention. It is a circuit diagram which shows the specific circuit structure of this embodiment. 3 is a time chart for explaining a normal operation in the circuit of FIG. 2. 3 is a time chart for explaining the operation at the time of overcurrent in the circuit of FIG. 2. 3 is a time chart for explaining an operation when an output is short-circuited in the circuit of FIG. 2. 3 is a time chart for explaining an operation when an output is short-circuited when a variable resistance element and a variable control circuit are not provided in the circuit of FIG. It is a circuit diagram which shows the 1st modification of this embodiment. It is a circuit diagram which shows the 2nd modification of this embodiment.

  Hereinafter, an embodiment of a switching power supply device of the present invention will be described with reference to the drawings. As shown in FIG. 1, the switching power supply device 10 of this embodiment includes a main switching element 14 that is connected in series to an input power supply 12 and that intermittently inputs an input voltage Vi. The main switching element 14 uses an N-ch MOS FET, is driven by a drive pulse of a fixed period output from a PWM control circuit 16 described later, and is turned on / off at a predetermined time ratio. A primary winding 18 a of the main transformer 18 is connected between the drain terminal of the main switching element 14 and the input power supply 12, and an intermittent voltage generated by turning on and off the main switching element 14 is applied. The main transformer 18 is provided with a secondary winding 18b that generates an AC voltage obtained by transforming an intermittent voltage applied to the primary winding 18a. The dots attached to the windings 18a and 18b represent the magnetic coupling polarity.

  The terminal of the secondary winding 18b without a dot is connected to the drain terminal of the rectifying side switching element 20, which is an N-ch MOS type FET. The rectifying side switching element 20 rectifies the voltage generated in the secondary winding 18b while the main switching element 14 is on. Further, a parasitic diode 22 existing in the chip of the rectifying side switching element 20 is connected in parallel in the direction from the source terminal to the drain terminal of the rectifying side switching element 20. The rectifying side switching element 20 and the parasitic diode 22 which are MOS type FETs may be replaced with a fast recovery diode or the like.

  A terminal of the secondary winding 18b with a dot is connected to the drain terminal of the commutation side switching element 24 which is an N-ch MOS type FET. The source terminal of the commutation side switching element 24 is connected to the source terminal of the rectification side switching element 20. The commutation-side switching element 24 is complementarily turned on when the rectification-side switching element 20 is off, and serves as a current path when a smoothing inductor 26 described later discharges stored energy toward the smoothing capacitor 28. Further, a PN junction type parasitic diode 30 existing in the chip of the commutation side switching element 24 is connected in parallel in the direction from the source terminal to the drain terminal of the commutation side switching element 24.

  The PN-junction type parasitic diode 30 is an element having a so-called forward rectifying action, in which a forward current flows ideally by applying a forward bias and no current flows in the reverse direction even when a reverse bias is applied. However, if the direction of the applied voltage is suddenly reversed while the forward current is flowing, the recovery current temporarily flows in the reverse direction. Unlike a fast recovery diode or the like for high-speed rectification, a normal parasitic diode present in a MOS FET has a property that a recovery current flows for a long time (reverse recovery time). In particular, in the case of the switching power supply device 10 in which the output voltage Vo exceeds 12 to 15 V, a MOS FET having a withstand voltage of 150 to 250 V or more is used as the commutation side switching element 24 and the reverse recovery time of the parasitic diode 30 cannot be ignored. Because it is long, it tends to cause problems in circuit operation. Details will be described later.

  The rectifying side switching element 20 and the commutation side switching element 24 are driven to be turned on / off when a driving pulse generated by the synchronous rectification driving circuit 32 is input to the gate terminal. The synchronous rectification drive circuit 32 determines the on / off timing of the rectifying side switching element 20 and the commutation side switching element 24 based on the timing at which the main switching element 14 is turned on / off, and the on time of the main switching element 14. When the current becomes shorter than a certain value, the commutation side switching element 24 is held in the off state.

  Between the drain and source terminals of the commutation side switching element 24, an input side of a smoothing circuit 34 that is a low-pass filter including a smoothing inductor 26 and a smoothing capacitor 28 is connected, and a load 36 connected to both ends of the smoothing capacitor 28 is connected. An output voltage Vo and a current Io are supplied.

  The current detection circuit 38 generates a voltage obtained by proportionally converting the pulsed switching current flowing through the main switching element 14 and outputs the voltage as a switching current signal.

  The PWM control circuit 16 that drives the main switching element 14 includes a drive pulse generation circuit 40 and a comparator 42. The drive pulse generation circuit 40 receives ΔVo, which is an error signal of the output voltage Vo, generates a rectangular drive pulse that is pulse-width modulated in a direction in which the error signal ΔVo decreases, and the main switching element 14 is connected via the buffer circuit 44. Output to the gate terminal. The comparator 42 compares the switching current signal output from the current detection circuit 38 with the first reference voltage Vr1, and forces the drive pulse output from the drive pulse generation circuit 40 when the switching current signal reaches the first reference voltage Vr1. The drive pulse generation circuit 40 operates to maintain the low level until the next switching period starts. The first reference voltage Vr1 is set so that the switching current signal reaches the first reference voltage Vr1 when the output current Io exceeds the rated current of the switching power supply device 10 (at the time of overcurrent), and is normally stable. During operation (during normal operation), the comparator 42 does not operate because the switching current signal does not reach the first reference voltage Vr1. As described above, the PWM control circuit 16 can perform a pulse-by-pulse overcurrent protection operation, which will be described later, by the drive pulse generation circuit 40 and the comparator 42.

  A variable resistance element 46, which is an NPN transistor, is provided between the gate and source terminals of the main switching element 14, and further, a variable value that changes the resistance value of the variable resistance element 46 based on the switching current signal output from the current detection circuit 38. A control circuit 48 is provided. The variable control circuit 48 compares the peak value of the switching current signal with the second reference voltage Vr2 for each switching period by using the comparator 50. When the switching current signal is less than the second reference voltage Vr2, the variable resistance element The resistance value of 46 is held at a very large value, and when the second reference voltage Vr2 is exceeded, a control signal for decreasing the resistance value of the variable resistance element is instantaneously output. As a result, the gate-source terminal voltage of the main switching element 14 is lowered, the conduction resistance of the main switching element 14 is increased, and an operation in which an increase in switching current is suppressed is performed. Here, the second reference voltage Vr2 is set to a larger value than the first reference voltage Vr1, and when the load 36 has a very low impedance failure (when the output is short-circuited), that is, more than the above-described overcurrent. When the switching current increases, the variable control circuit 48 operates, and a short-circuit protection operation described later can be performed.

  Next, a specific circuit configuration of the switching power supply device 10 will be described with reference to FIG. The synchronous rectification drive circuit 32 transmits a first drive circuit 54 including the tertiary winding 18c of the main transformer 18 and a voltage holding Zener diode 52, and signal transmission for transmitting on / off timing information of the main switching element 14. And a second drive circuit 58 including a transformer 56 and the like. The first and second drive circuits 54 and 58 correspond to the synchronous rectifier driving circuit and the gate discharge circuit included in the switching power supply device of the second embodiment disclosed in Patent Document 2, and perform substantially the same operation. .

  The buffer circuit 44 is configured by combining a DC power supply 44 a that supplies power to the PWM control circuit 16, an NPN transistor, and a PNP transistor in a so-called totem pole type. The drive pulse received by the base terminal and delayed by a plurality of resistors for a predetermined time is output toward the gate terminal of the main switching element 14.

  The current detection circuit 38 has a current transformer 60 having a primary winding 60a and a secondary winding 60b, and dots attached to the windings 60a and 60b represent the polarity of magnetic coupling. The primary winding 60a is inserted at the connection point between the primary winding 18a of the main transformer 18 and the input power supply 12, detects the switching current Id14 of the main switching element 14 flowing therethrough, and detects the dot of the secondary winding 60b. A small current proportional to the current Id14 is output via the rectifier diode 62 from the terminal marked with. A current detection resistor 64 is connected to the output of the rectifier diode and one end of the secondary winding 60b where the dot is not attached, and a switching current signal having a voltage substantially proportional to the switching current Id14 is applied to both ends of the current detection resistor 64. generate.

  In the drive pulse generation circuit 40 of the PMW control circuit 16, the above-described comparator 42 is also used as a comparator for performing pulse width control of the current mode method, and the current detection resistor 64 is connected to the inverting input terminal of the comparator 42. The switching current signal generated in the above is input, and a signal obtained by resistance-dividing the error signal ΔVo obtained by inverting and amplifying the error of the output voltage Vo by the amplifier 65 is input to the non-inverting input terminal. Then, after the main switching element 14 is turned on by the comparator 42, the drive pulse generation circuit 40 detects the timing when the switching current signal rises and reaches the divided value of the error signal ΔVo, and based on the timing. A pulse width modulated drive pulse is generated.

  A Zener diode 66 that generates the first reference voltage Vr1 is connected to the non-inverting input terminal of the comparator 42. During normal operation, since the divided value of the error signal ΔVo is lower than the Zener voltage Vr1, the Zener diode 66 does not operate. However, when the output current Io exceeds the rating and becomes an overcurrent state, the divided value of the error signal ΔVo increases. Thus, the Zener diode 66 becomes conductive, and the non-inverting input terminal voltage is fixed to the first reference voltage Vr1.

  The variable resistance element 46 is an NPN transistor having a collector terminal connected to the gate terminal of the main switching element 14 and an emitter terminal connected to the source terminal of the main switching element 14. The variable control circuit 48 includes a first resistor 68 connected between the base and emitter terminals of the variable resistance element 46, a cathode terminal connected to the output terminal of the current detection circuit 38, and an anode terminal connected to the base terminal of the variable resistance element 46. And a Zener diode 70 connected to the. The above-described second reference voltage Vr2 is a total value of the voltage Va of the Zener diode 70 and the base-emitter forward voltage Vb of the variable resistance element 46. Therefore, when the switching current signal generated in the current detection resistor 64 is small, the base current is not supplied to the variable resistance element 46, so that the variable resistance element 46 is in a large resistance state, and the switching current signal is the second reference voltage Vr2. Since the zener diode 70 is turned on and the base current flows through the variable resistance element 46, the resistance value is small enough to allow the collector current to flow. Thus, when the switching current signal reaches the second reference voltage Vr2, the variable control circuit 48 performs an operation of reducing the resistance value of the variable resistance element 46 by generating the base current.

  The first resistor 68 is a resistor for adjusting the base current output from the variable control circuit 48 to an appropriate value. The resistance value of the first resistor 68 is such that, after the peak value of the switching current signal reaches the second reference voltage Vr2, the variable resistance element 46 maintains a small resistance value for a predetermined period even if the peak value decreases. The resistance value is set as large as possible, and the resistance value is set to such a small value that the resistance value of the variable resistance element 46 can be quickly changed to a large state after the predetermined period has elapsed.

  Next, the operation of the switching power supply device 10 will be described with reference to FIGS. First, a normal operation in which the output current Io is operating below the rating will be described. The operation waveform of each part during normal operation is represented as shown in the time chart of FIG.

  The main switching element 14 is driven by a drive pulse V16 with a fixed period output from the PWM control circuit 16, and repeats a switching operation with a period T11 to t12 as one period T. Here, for convenience of explanation, the delay time from when the commutation side switching element 24 is turned off to when the main switching element 14 is turned on is ignored as being sufficiently short, and the exciting current flowing through the exciting inductance of the main transformer 18 is also ignored. Ignore it as a small one.

  Immediately before entering the period t11, the main switching element 14 is off, the rectifying side switching element 20 is off, and the commutation side switching element 24 is on. When the period t11 is entered, the drive pulse V16 changes to a high level, the voltage Vg14 between the gate and source terminals of the main switching element 14 rises sharply via the buffer circuit 44 and exceeds the gate threshold Vth14, and the main switching element 14 Turns on. In addition, a timing signal indicating that the drive pulse has changed to a high level is transmitted via the signal transmission transformer 56, and the operation of the second drive circuit 58 causes the voltage Vg24 between the gate and source terminals of the commutation side switching element 24 to be changed. The voltage drops steeply below the gate threshold Vth24, and the commutation side switching element 24 turns off. When the main switching element 14 is turned on, the voltage V18a of the primary winding 18a of the main transformer 18 sharply increases to the input voltage Vi, thereby generating a similar voltage in the tertiary winding 18c. The operation of the first drive circuit 54 causes the voltage between the gate and source terminals of the rectifying side switching element 20 to rapidly increase beyond the gate threshold, and the rectifying side switching element 20 is turned on. Further, the parasitic diode 30 in parallel with the commutation side switching element 24 is turned off because the reverse voltage (Vd24) is applied.

  When the main switching element 14 is turned on, the switching current Id14 begins to flow, and as shown in FIG. 3, the current value gradually increases with a predetermined slope over time during the period t11. This current Id14 flows through the path of the input power supply 12, the main transformer 18, the load 36 and the smoothing capacitor 28, the smoothing inductor 26, the rectifying side switching element 20, the main transformer 18, and the main switching element 14, and its peak value is the output current Io. The value is approximately proportional to.

  Here, since the switching power supply device 10 operates with the output current Io below the rated value, the current Id14 is small and the first and second reference values Ir1 and Ir2 for overcurrent protection are not reached. The first reference value Ir1 corresponds to the first reference voltage Vr1 of the PWM control circuit 16, and the current Id14 when the switching current signal (voltage signal) input to the comparator 42 becomes Vr1 is Ir1. . Similarly, the second reference value Ir2 corresponds to the second reference voltage Vr2 of the variable control circuit 48, and the current Id14 when the switching current signal input to the variable control circuit 48 becomes Vr2 is Ir2. . Therefore, during normal operation, the Zener diode 66 of the PWM control circuit 16 does not operate, and the variable resistance element 46 at the subsequent stage of the variable control circuit 48 maintains a high resistance value without changing its state.

  The end of the period t11 is determined by an operation in which the PWM control circuit 16 performs pulse width modulation in a direction to reduce the error signal ΔVo of the output voltage Vo. A period for turning on the main switching element 14 has elapsed, and the drive pulse V16 is low. The period t11 ends when the level is reached.

  When the period t12 is entered, the drive pulse V16 changes to the low level, and the voltage Vg14 between the gate and source terminals of the main switching element 14 sharply decreases via the buffer circuit 44 to become less than the gate threshold Vth14. 14 turns off. Further, when the main switching element 14 is turned off, the voltage V18a of the primary winding 18a of the main transformer 18 sharply decreases to almost zero volts, and then is reset by releasing the excitation energy accumulated in the main transformer 18. A sine wave-like gentle negative voltage is generated. As a result, a similar voltage is generated in the tertiary winding 18c, and the operation of the first drive circuit 54 causes the voltage Vg24 between the gate and source terminals of the commutation side switching element 24 to rise above the gate threshold Vth24, The commutation side switching element 24 turns on. Similarly, due to the operation of the first drive circuit 54 receiving the voltage of the tertiary winding 18c, the voltage between the gate and the source terminal of the rectifying side switching element 20 decreases to become less than the gate threshold value, and the rectifying side switching element 20 Turn off.

  When the main switching element 14 is turned off, the switching current Id14 is cut off and the supply of the output current Io from the input power supply 12 is stopped. Then, a current that discharges the excitation energy of the smoothing inductor 26 as the output current Io flows through the commutation-side switching element 24 that is turned on. This current has a substantially trapezoidal waveform in which the current value gradually decreases with a predetermined slope as time passes, like the waveform of the current Id24 indicating the current flowing through the commutation side switching element 24 and the parasitic diode 30. This current Id24 flows through the path of the smoothing inductor 26, the commutation side switching element 24, the load 36, and the smoothing capacitor 28, and the peak value thereof becomes the output current Io.

  After the voltage V18a of the primary winding 18a shows the peak value in the negative direction, the voltage rises toward zero volts, and the voltage in the direction opposite to the dot of the tertiary winding 18c similarly decreases from the positive voltage toward zero volts. . Then, when the gate voltage Vg24 of the commutation side switching element 24 decreases to the Zener voltage Vz of the voltage holding Zener diode 52, the operation of the Zener diode 52 is stopped, and the voltage Vg24 is held at Vz. Since the Zener voltage Vz is set to a value higher than the gate threshold value Vth24, the commutation side switching element 24 can be kept on until the period t12 ends. Therefore, the forward current hardly flows through the parasitic diode 30 during the period t12, and the reverse current (recovery current) hardly flows even when the period t12 ends and the commutation side switching element 24 turns off. .

  The end of the period t12 is determined by an operation in which the PWM control circuit 16 tries to turn on the main switching element 14 at a constant time interval. A period for turning off the main switching element 14 has elapsed, and the drive pulse V16 becomes high. The period t12 ends when the level is reached.

  When the switching power supply 10 performs a normal operation, the switching operation with the period t11 to t12 as one cycle T is repeated, and the switching current Id14 is not limited by the first and second reference values Ir1 and Ir2. The output voltage Vo is stabilized to a predetermined voltage.

  Next, an operation for performing pulse-by-pulse overcurrent protection based on the first reference value Ir1 when the output current Io is in an overcurrent state exceeding the rating will be described. The operation waveforms of the respective parts during the overcurrent protection operation are represented as shown in the time chart of FIG. 4, and the main switching element 14 repeats the switching operation with the period t21 to t23 as one cycle T.

  Immediately before entering the period t21, the main switching element 14 is off, the rectifying side switching element 20 is off, and the commutation side switching element 24 is on. When the period t21 is entered, an operation substantially similar to that of the period t11 in FIG. 3 is performed. That is, the drive pulse V16 is turned to a high level, the voltage Vg14 between the gate and source terminals of the main switching element 14 is sharply increased through the buffer circuit 44 and exceeds the gate threshold value Vth14, and the main switching element 14 is turned on. . The operation in which the commutation side switching element 24 turns off and the rectification side switching element 20 turns on is the same.

  When the main switching element 14 is turned on, the switching current Id14 starts to flow, and as shown in FIG. 4, during the period t21, the current value gradually increases with a predetermined slope as time elapses. The peak value becomes a value approximately proportional to the output current Io.

  Since the switching power supply device 10 operates in an overcurrent state where the output current Io exceeds the rating, the current Id14 is large, and the peak value reaches the first reference value Ir1 after a while from the start of the period t21. . When the current Id14 rises with a predetermined slope and reaches the first reference value Ir1, the switching current signal output from the current detection circuit 38 also rises and becomes the first reference voltage Vr1. The period t21 ends when the peak value of the switching current signal received by the inverting input terminal of the comparator 42 of the PWM control circuit 16 reaches the first reference voltage Vr1.

  On the other hand, since the switching current Id14 does not rise to the second reference value Ir2 and the switching current signal is in the range below the second reference voltage Vr2, the state of the variable resistance element 46 subsequent to the variable control circuit 48 is high without changing. Holds the resistance value.

  Even during the period t22, the drive pulse Vg is maintained at a high level, and the main switching element 14 is turned on, the commutation side switching element 24 is turned off, and the rectification side switching element 20 is kept on as in the period t21. Originally, when a switching current signal that exceeds Vr1 is input to the inverting input terminal of the comparator 42, the Zener diode 66 operates to hold the non-inverting input terminal at the first reference voltage Vr1. Ideally, the operation of the drive pulse generating circuit 40 inverts the drive pulse V16 to the low level and holds it is instantaneously performed. However, in practice, due to the operation delay of the comparator 42, the drive pulse generation circuit 40, etc., the drive pulse V16 is maintained at a high level during the period t22 without being inverted. For example, when the PWM control circuit 16 is configured using a commercially available IC, the driving pulse V16 is set to the low level after the switching current signal that attempts to exceed Vr1 is input to the inverting input terminal of the comparator 42. In general, the time until inversion (delay time Tm) is about 50 to 300 nsec.

  Here, although the switching current Id14 reaches the first reference value Ir1, but does not reach the second reference value Ir2, the variable resistance element 46 subsequent to the variable control circuit 48 also maintains a high resistance value without changing. To do. The period t22 ends when the period t22 starts and the delay time Tm elapses and the drive pulse V16 is inverted to the low level.

  When the period t23 is entered, an operation substantially similar to the period t12 in FIG. 3 is performed. That is, the drive pulse V16 is changed to a low level, the voltage Vg14 between the gate and the source terminal of the main switching element 14 is sharply reduced via the buffer circuit 44 to become less than the gate threshold Vth14, and the main switching element 14 is turned off. Turn. The operation in which the commutation side switching element 24 turns on and the rectification side switching element 20 turns off is the same. Therefore, the forward current hardly flows through the parasitic diode 30 during the period t23, and the reverse current (recovery current) hardly flows even when the period t23 ends and the commutation side switching element 24 turns off. .

  During the period t23, when the PWM control circuit 16 tries to turn on the main switching element 14 at a constant interval, a period for turning off the main switching element 14 has elapsed, and the drive pulse V16 has turned to a high level. finish.

  When the switching power supply device 10 performs the overcurrent protection operation, the switching operation with the period t21 to t23 as one cycle T is repeated. By such an operation, high-speed control is performed so that the peak value of the switching current Id14 does not exceed the first reference value Ir1, the output current Io is limited, and the on-time of the main switching element 14 is shortened for output. By reducing the voltage Vo, the load 36 and circuit elements inside the apparatus can be protected.

  Next, an operation for performing short-circuit protection based on the second reference value Ir2 when the load 36 has failed in a very low impedance state (when the output is short-circuited) will be described. The operation waveforms of the respective parts during the short-circuit protection operation are represented as shown in the time chart of FIG. 5, and the main switching element 14 repeats the switching operation with the period t31 to t35 as one cycle T.

  During the short-circuit protection operation, the on-time of the main switching element 14 becomes very short, so that the voltage Vg24 between the gate and the source terminal of the commutation side switching element 24 is kept at the gate for the entire period as shown in FIG. The threshold value Vth24 is not reached. Similarly, the voltage between the gate and the source terminal of the rectifying side switching element 20 (not shown) does not reach the gate threshold value. Therefore, during the short-circuit protection operation described below, the commutation side switching element 24 and the rectification side switching element 20 are off for the entire period.

  Immediately before entering the period t31, the main switching element 14 is turned off, the rectifying side parasitic diode 22 is turned off, and the commutating side parasitic diode 30 is turned on by passing a forward current Id24. When the period t31 is entered, the drive pulse V16 changes to a high level, the voltage Vg14 between the gate and source terminals of the main switching element 14 rises sharply via the buffer circuit 44 and exceeds the gate threshold Vth14, and the main switching element 14 Turns on. The parasitic diode 22 on the rectifying side also turns on quickly, and the current in the forward direction can flow. However, since the parasitic diode 30 on the commutation side is a PN junction type diode having a long reverse recovery time as described above, it cannot be quickly turned off, and a reverse recovery current flows (recovery operation).

  This recovery current component flows through the path of the input power supply 12, the main transformer 18, the commutation side parasitic diode 30, the rectification side parasitic diode 22, the main transformer 18, and the main switching element 14, and the currents Id14 and Id24 in FIG. It increases very steeply as shown in the waveform. The path of the recovery current has a very low impedance and is limited only by factors such as a small leakage inductance of the main transformer 18 and the on-speed of the main switching element 14, and the current increase has a very steep slope.

  When the main switching element 14 is turned on, the switching current Id14 instantaneously reaches the first reference value Ir1 due to the influence of the recovery operation. Then, the PWM control circuit 16 starts the overcurrent protection operation described with reference to FIG. 4, but the high level time of the drive pulse V16 cannot be made shorter than the delay time Tm of the PWM control circuit 16. Therefore, since the ON time of the main switching element 14 is not shortened, the switching current Id14 further increases beyond the first reference value Ir1, and reaches the second reference value Ir2 before the delay time Tm elapses.

  When the current Id14 becomes the second reference value Ir2, the switching current signal output from the current detection circuit 38 also rises to become the second reference voltage Vr2. The period t31 ends when the peak value of the switching current signal input to the variable control circuit 48 reaches the second reference voltage Vr2.

  Even during the period t32, the drive pulse V16 of the PWM control circuit 16 continues to be at a high level due to the influence of the delay time Tm, and the buffer circuit 44 gates the voltage Vg14 between the gate and source terminals of the main switching element 14. An attempt is made to maintain the voltage sufficiently higher than the threshold value Vth14.

  On the other hand, in the variable control circuit 48, the switching current signal output from the current detection circuit 38 is a second reference voltage Vr2 in which the voltage Va of the Zener diode 70 and the base-emitter forward voltage Vb of the variable resistance element 46 are the total value. When the zener diode 70 is turned on, a predetermined base current is supplied to the variable resistance element 46 by the conduction of the Zener diode 70, and the variable resistance element 46 causes a collector current to flow, so that the resistance value between the collector and the emitter is equivalent. Decreases, and the voltage Vg14 between the gate and source terminals of the main switching element 14 decreases. At this time, the variable control circuit 48 reduces the resistance value of the variable resistance element 46 and controls the voltage Vg14 to be a voltage close to the gate threshold value Vth14 within a range that does not fall below the gate threshold value Vth14. Accordingly, the main switching element 14 which is a MOS FET is turned on with a predetermined large conduction resistance.

  As described above, in the period t32, the operation of suppressing the peak values of the currents Id14 and Id24 is performed by increasing the conduction resistance of the main switching element 14. At this time, since the base current flowing through the variable resistance element 46 is optimized by adjusting the first resistor 68, the peak values of the currents Id14 and Id24 are lowered, and the switching current signal becomes lower than the second reference voltage Vr2. Even if the supply of the base current from the variable control circuit 48 to the variable resistance element 46 is stopped, the variable resistance element 46 continues the operation of decreasing the resistance value until the delay time Tm elapses.

  The period t32 ends when the delay time Tm elapses after the switching current signal exceeding the first reference voltage Vr1 is input to the PWM control circuit 16, and the drive pulse V16 is inverted to the low level.

  When the period t33 is entered, the drive pulse V16 turns to a low level, the voltage Vg14 between the gate and source terminals of the main switching element 14 decreases via the buffer circuit 44 to become less than the gate threshold Vth14, and the main switching element 14 Turn off. Then, the paths of the currents Id14 and Id24 are switched to a parasitic capacitor (not shown) existing between the drain and source terminals inside the main switching element 14. The parasitic diode 22 on the rectification side continues to be on, and the parasitic diode 30 on the commutation side also continues the recovery operation.

  Thereafter, the recovery operation of the commutation side parasitic diode 30 recovers to some extent, and the period t33 ends when the currents Id14 and Id24 approach zero ampere and the voltage Vd24 starts to rise.

  In the period t34, the main switching element 14 continues to be turned off, the rectifying side parasitic diode 22 continues to be turned on, and recovery of the recovery operation of the commutation side parasitic diode 30 has progressed. A surge-like voltage Vd24 is generated at both ends. The peak value of the surge-like voltage Vd24 greatly depends on the current Id24 at the start of the period t34. However, since the current Id24 is suppressed to be small by the operation in the period t32 described above, the voltage Vd24 reaches the dangerous voltage. There is no worry of rising.

  Thereafter, the recovery operation of the parasitic diode 30 on the commutation side is recovered, and the period t34 ends when the current discharged from the smoothing inductor 26 begins to flow in the forward direction.

  In the period t35, the main switching element 14 continues to be turned off, and the parasitic diode on the rectifying side is biased in the reverse direction and turned off. Then, a current discharged as the output current Io from the exciting energy of the smoothing inductor 26 starts to flow in the parasitic diode 30 on the commutation side in the forward direction, and the voltage Vd24 decreases to almost zero volts. This current has a substantially trapezoidal waveform in which the current value gradually decreases with a predetermined slope as time passes, like the waveform of the current Id24. This current Id24 flows through the path of the smoothing inductor 26, the parasitic diode 30, the load 36, and the smoothing capacitor 28, and its peak value becomes the output current Io.

  During the period t35, the period in which the main switching element 14 is to be turned off has passed due to the operation of the PWM control circuit 16 trying to turn on the main switching element 14 at a constant interval, and the drive pulse V16 has turned to the high level. finish.

  When the switching power supply device 10 performs the short circuit protection operation, the switching operation with the period t31 to t35 as one cycle T is repeated. By such an operation, high-speed control is performed to limit the peak value of the switching current Id14 so as not to exceed the second reference value Ir2, the recovery current flowing in the reverse direction to the parasitic diode 30 on the commutation side is limited, and commutation is performed. The voltage Vd24 between the drain and source terminals of the side switching element 24 is prevented from rising to a dangerous voltage. Further, it is possible to protect other circuit elements from being applied with excessive electrical stress, and at the same time, the output current Io is also limited, thereby preventing an accident in which the failed load 36 is burned out. .

  For example, in the case of an incomplete switching power supply device in which the variable power element 46 and the variable control circuit 48 are not provided in the switching power supply device 10 of the above embodiment, appropriate short-circuit protection is not performed when the output is short-circuited.

  Since this incomplete switching power supply device does not have a function of limiting the switching current Id14 based on the second reference value Vr2, as shown in FIG. 6, the current Id14, which starts to flow when the period t41 starts, Id24 continues to increase until the delay time Tm elapses. The increase in the currents Id14 and Id24 is suppressed only when the main switching element 14 is turned off in the period t42, and the currents Id14 and Id24 immediately before entering the period t43 become the current Id14 immediately before entering the period t34 in FIG. , Id24. As a result, the surge voltage Vd24 generated at both ends of the parasitic diode 30 in the period t43 becomes very high, and a large electrical stress is applied to the commutation side switching element 24.

  In this case, it is necessary to select a MOS FET having a high rated voltage so that the commutation side switching element 24 does not fail. However, MOS type FETs tend to have higher conduction resistance as their rated voltage is higher, so selecting a MOS type FET with higher rated voltage increases rectification loss during normal operation, resulting in a larger outer shape and higher cost. A MOS type FET must be selected.

  As described above, the switching power supply device 10 includes the overcurrent protection function that limits the switching current Id14 flowing through the main switching element 14 based on the first reference value Ir1, and the second reference value that is larger than the first reference value Ir1. It has a short-circuit protection function that restricts at high speed based on Ir2. Therefore, when the load 36 fails and the output is short-circuited, the synchronous rectification operation of the commutation side switching element 24 is stopped and the recovery current Id24 flows through the parasitic diode 30 on the commutation side, the switching current Id14 and the recovery current Id24 Can be suppressed, and generation of an excessive voltage Vd24 between the drain and source terminals of the commutation side switching element 24 can be prevented. Therefore, a MOS type FET having a low rated voltage and a small conduction resistance can be selected as the commutation side switching element 24, and a reduction in loss can be achieved.

  In addition, the variable resistance element 46 and the variable control circuit 48 can be simply configured by combining three parts such as an NPN transistor, a Zener diode, and a resistor, and can be easily mounted in a narrow space.

  Next, a first modification of the switching power supply device 10 will be described with reference to FIG. Here, the same components as those in the above embodiment are denoted by the same reference numerals and description thereof is omitted. In the first modification, a PWM control circuit 82 having a slope correction circuit 80 is provided in place of the PWM control circuit 16, and the current detection resistor 64 is replaced with the main switching element 14 in place of the current detection circuit 38. A current detection circuit 84 is provided in which the current transformer 60 and the like are omitted by being inserted into the source terminal side of the. Further, the buffer circuit 44 is omitted, a resistor 46a is inserted on the collector terminal side of the variable resistance element 46, and a voltage holding capacitor 90 is connected in parallel with the first resistor 68 of the variable control circuit 48. Yes. Other configurations are the same as those in the above embodiment.

  For example, in the case of a switching power supply device with low output power or a switching power supply device with high input voltage specifications, since the switching current Id14 flowing through the main switching element 14 is small, a large loss is caused even if the switching current Id14 flows directly through the current detection resistor 64. Does not occur. Therefore, the configuration can be simplified by using the current detection circuit 84. Further, as the main switching element 14, a MOS FET with a small rated current that can be easily driven between the gate and the source terminal can be selected, so that the buffer circuit 44 can be omitted.

  The slope correction circuit 80 of the PWM control circuit 82 is provided to prevent a current oscillation phenomenon that becomes a problem when performing current mode type pulse width modulation based on the error signal ΔVo, as shown in FIG. When the switch 86 is turned on / off in synchronization with the switching period, a sawtooth correction voltage Vd is generated across the resistor 88 inserted between the inverting input terminal of the comparator 42 and the output of the current detection circuit 84. To perform the operation.

  By providing the slope correction circuit 80, the following differences occur with respect to the overcurrent protection operation and the short circuit protection operation. In the case of the above embodiment, the first reference voltage Vr1 is a constant voltage determined by the Zener voltage when the Zener diode 66 is turned on. In the first modification, the first reference voltage Vr1 is the Zener voltage. A voltage obtained by subtracting the correction voltage Vd from the Zener voltage Vc when the diode 66 is turned on (a voltage that changes in the range of the correction voltage Vd with time). However, by setting the first reference voltage Vr1 within a range not exceeding the second reference voltage Vr2, the same operation as that of the above-described embodiment described with reference to FIGS. 5 and 6 is performed, and the switching current Id14 is limited. can do.

  In the embodiment, when the output is short-circuited, the variable resistance element 46 maintains a small resistance value until the delay time Tm elapses after the peak value of the switching current signal reaches the second reference voltage Vr2. In addition, after the delay time Tm has elapsed, the operation of rapidly changing the resistance value of the variable resistance element 46 is realized by adjusting the first resistor 68. However, when adjustment is difficult with only the first resistor 68, a predetermined resistor 46 a is inserted on the collector terminal side of the variable resistance element 46 or in parallel with the first resistor 68, as in the first modification of FIG. 7. The adjustment can be facilitated by connecting a voltage holding capacitor 90 to the other.

  Next, a second modification of the switching power supply device 10 will be described with reference to FIG. Here, the same components as those in the above embodiment are denoted by the same reference numerals and description thereof is omitted. In the second modification, instead of the PWM control circuit 16 described above, a drive pulse generation circuit 91 that performs voltage mode pulse width modulation based on the error signal ΔVo, and a switching current signal of the current detection circuit 96 at the inverting input terminal are provided. There is provided a PWM control circuit 92 composed of a comparator 42 which is inputted and the negative first reference voltage Vr1 is inputted to the non-inverting input terminal. Further, the Zener diode 70 of the variable control circuit 48 is replaced with a second resistor 94, and a voltage holding capacitor 90 is connected in parallel with the first resistor 68. Further, a current detection circuit 84 of a first modification is provided in place of the current detection circuit 38 of the above embodiment, and a negative switching current signal is generated in series with the current detection circuit 84 and is supplied to the inverting input terminal of the comparator 42. A current detection circuit 96 for output is newly provided. Other configurations are the same as those in the above embodiment.

  Since the negative first reference voltage Vr1 is input to the non-inverting input terminal of the comparator 42, the PWM control circuit 92 of the second modification must input a negative switching current signal to the inverting input terminal. . Therefore, separately from the current detection circuit 84, a current detection circuit 96 that outputs a negative switching current signal proportional to the switching current Id14 is provided. The current detection circuit 96 includes a current detection resistor 98 through which a switching current Id14 flows and generates a negative voltage, voltage dividing resistors 100a and 100b that divide the negative voltage, and a negative switching current signal generated in the voltage dividing resistor 100b. It is comprised with the capacitor | condenser 102 which removes a spike component from. The capacitor 102 does not affect the operation of changing the resistance value of the variable resistance element 46 at high speed. In consideration of ease of adjustment of resistance value control of the variable resistance element 46, the variable control circuit 48 is provided with a second resistor 94.

  Even in the second modified example in which a part of the configuration is changed in this way, the same operation as that of the above-described embodiment described with reference to FIGS. 5 and 6 is performed for the overcurrent protection operation and the short circuit protection operation. The switching current Id14 can be limited.

  In addition, the switching power supply device of this invention is not limited to the said embodiment and modification. For example, in the embodiment and the modified example, when the output short circuit occurs, the variable resistance element 46 has a small resistance value until the delay time Tm elapses after the peak value of the switching current signal reaches the second reference voltage Vr2. The operation is such that the state is maintained and the resistance value of the variable resistance element 46 is rapidly changed greatly after the delay time Tm elapses. However, before the delay time Tm elapses, the variable resistance element The resistance value of 46 may be set so as to change greatly. In this case, the main switching element may be turned on / off a plurality of times during the delay time Tm, and the cross loss of the main switching element 14 may increase. However, the operation is only for a very short period of the delay time Tm, and the loss increase of the main switching element 14 is not so large. Therefore, such an operation can be allowed if there is no concern that the main switching element 14 will fail.

  In addition, the synchronous rectification drive circuit is not limited to the winding drive system using the voltage generated in the winding of the main transformer as in the above embodiment, but the on-time of the main switching element is less than a certain value such as when the output is short-circuited If it has a function of holding the commutation side switching element in the OFF state, for example, a method of driving the commutation side switching element using a dedicated IC provided on the secondary side of the main transformer Alternatively, a method may be used in which the drive pulse of the PWM control circuit is transmitted to the commutation-side switching element via a drive transformer.

DESCRIPTION OF SYMBOLS 10 Switching power supply device 14 Main switching element 16, 82, 92 PWM control circuit 18 Main transformer 20 Commutation side switching element 24 Commutation side switching element 22, 30 Parasitic diode 32 Synchronous rectification drive circuit 34 Smoothing circuit 38, 84, 96 Current detection Circuit 46 Variable resistance element 48 Variable control circuit 68 First resistor 70 Zener diode 90 Voltage holding capacitor 94 Second resistor Ir1 First reference value Ir2 Second reference value Vr1 First reference voltage Vr2 Second reference voltage

Claims (6)

An N-ch MOS type FET connected in series with an input power source, and a main switching element that intermittently generates an AC voltage by turning on and off at a predetermined switching frequency;
A main transformer having a primary winding to which the AC voltage is applied and a secondary winding magnetically coupled thereto;
A rectifying side switching element that has one end connected to one end of the secondary winding and rectifies a voltage generated in the secondary winding during a period in which the main switching element is on;
A drain terminal and a source terminal are connected to the other end of the secondary winding and the other end of the rectifying side switching element, respectively, and the main switching element is turned on while the main switching element is turned off. A commutation-side switching element that is an N-channel MOS type FET that allows current to flow in the direction of
A parasitic diode formed between the drain and source terminals inside the commutation side switching element;
A circuit for driving the commutation-side switching element on / off, and when the on-time of the main switching element is reduced to a predetermined time or less, a synchronous rectification drive circuit that holds the commutation-side switching element in an off state;
A low-pass filter comprising a smoothing choke and a smoothing capacitor, the input side of which is connected between the drain and source terminals of the commutation side switching element, generates a DC output voltage across the smoothing capacitor, and supplies power to the load A smoothing circuit to
A current detection circuit for detecting a switching current flowing through the main switching element;
A rectangular drive pulse that is pulse-width modulated based on the error signal of the output voltage is output to control on / off of the main switching element, and an output signal of the current detection circuit is received to obtain a peak value of the switching current. and a PWM control circuit reaches the first reference value result by said drive pulse to the low level perform overcurrent protection operation of the pulse-by-pulse type to shorten the on-time of the main switching element,
When the peak value of the switching current reaches a predetermined value higher than the first reference value, the on-time of the main switching element becomes less than the predetermined time by the overcurrent protection operation performed by the PWM control circuit, and the synchronous rectification In a single-ended forward type switching power supply in which the commutation-side switching element is held in an off state by a drive circuit ,
A variable resistance element connected between the gate and source terminals of the main switching element, and a variable control circuit that changes a resistance value of the variable resistance element based on an output signal of the current detection circuit;
The variable control circuit receives an output signal of the current detection circuit, compares a peak value of the switching current with a second reference value corresponding to the predetermined value for each switching period, and the switching current is the second reference value. to reach the value to lower the resistance value of the variable resistance element to suppress the increase of the peak value of the switching current by controlling so as not to increase the voltage between the gate and source terminals of the main switching element, in the off state switching power supply device and limits the peak value of the recovery current of the parasitic diode of the held the commutation side switching device.   The variable control circuit sets the resistance value of the variable resistance element during a period until the delay time of the overcurrent protection operation of the PWM control circuit elapses after the peak value of the switching current reaches the second reference value. The switching power supply device according to claim 1, wherein the operation of lowering is continued. The variable resistance element is an NPN transistor having a collector terminal connected to the gate terminal side of the main switching element and an emitter terminal connected to the source terminal of the main switching element,
3. The switching power supply device according to claim 1, wherein the variable control circuit changes a conduction resistance between a collector and an emitter terminal of the NPN transistor by controlling a base current of the NPN transistor. The current detection circuit converts the switching current into a voltage signal and outputs the voltage signal,
The variable control circuit has a first resistor connected at both ends between the base and emitter terminals of the NPN transistor, a cathode terminal connected to the output terminal of the current detection circuit, and an anode terminal connected to the base terminal of the NPN transistor. 4. The switching power supply device according to claim 3, comprising a connected Zener diode. A voltage holding capacitor is connected in parallel with the first resistor;
The variable control circuit sets the base current of the NPN transistor during a period until the delay time of the overcurrent protection operation of the PWM control circuit elapses after the peak value of the switching current reaches the second reference value. The switching power supply device according to claim 4, wherein the operation of reducing the resistance value of the variable resistance element is continued by supplying the voltage holding capacitor. A tertiary winding is provided in the main transformer,
The synchronous rectification drive circuit is provided with a voltage supply path for supplying a voltage generated in the tertiary winding between the gate and source terminals of the commutation side switching element while the main switching element is off, 6. The switching power supply device according to claim 1, wherein the commutation-side switching element is driven to be turned on / off in a state where an on-time of the switching element is longer than the predetermined time .

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