CN102005731A - Controller, power converter and method for providing over-temperature protection - Google Patents

Controller, power converter and method for providing over-temperature protection Download PDF

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CN102005731A
CN102005731A CN2010105438160A CN201010543816A CN102005731A CN 102005731 A CN102005731 A CN 102005731A CN 2010105438160 A CN2010105438160 A CN 2010105438160A CN 201010543816 A CN201010543816 A CN 201010543816A CN 102005731 A CN102005731 A CN 102005731A
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signal
circuit
drive signal
thermistor
power converter
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CN102005731B (en
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黄伟轩
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Fairchild Taiwan Corp
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System General Corp Taiwan
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Abstract

The invention provides a controller, a power converter and a method for providing over-temperature protection. The power converter comprises a transformer, a power switch and a controller, wherein the transformer is provided with a primary winding, a secondary winding and an auxiliary winding; the power switch is coupled with the primary winding of the transformer to adjust the power converter; the controller is provided with an output end so as to generate a driving signal according to a switching signal for switching the power switch; a thermosensitive resistor is coupled with the output end of the controller; and when the switching signal is switched off, the driving signal which spans the thermosensitive resistor is adjusted.

Description

Controller, power converter and the method thereof of over-temperature protection are provided
Technical field
(pulse width modulation, PWM) controller particularly relate to a kind of PWM controller, and it is provided for the over-temperature protection of power converter to the present invention relates to a kind of pulse width modulation.
Background technology
Fig. 1 shows the existing power converter that utilizes the controller 60 with over-temperature protection.Power converter comprises transformer 10, power transistor 20, resistor 25, controller 60, thermistor 36, rectifier 11 and 21, capacitor 12 and 22 and secondary feedback circuit 16.Controller 60 has feeder ear VCC, output GATE, sense terminals CS, feedback end FB, temperature detection end RT and earth terminal GND.Transformer 10 comprises elementary winding N P, auxiliary winding N AAnd secondary winding N SAuxiliary winding N ABy 22 chargings of 21 pairs of resistors of rectifier, to generate supply power voltage V CCCome controller 60 power supplies.Secondary winding N SGenerate across the output voltage V of the power converter of capacitor 12 by rectifier 11 O Secondary feedback circuit 16 comprises resistor 13, silicon reference diode 14 and optical coupler 15.Resistor 13 is coupled between the cathode terminal of the output of power converter and silicon reference diode 14.The input of optical coupler 15 couples the anode tap of silicon reference diode 14.Output voltage V on the output of secondary feedback circuit 16 received power transducers OTo generate feedback signal V FBResistor 25 is coupled to the source electrode of power transistor 20 and with reference between the ground connection.When the output GATE of power transistor 20 controlled devices 60 connected, resistor 25 will be the switch current I of the power transistor 20 of flowing through PBe converted to sensing voltage V CS
Controller 60 comprises thermal-shutdown circuit, circuit overcurrent protection, regulating circuit and pulse width modulation, and (pulse width modulation, PWM) circuit 30.Thermal-shutdown circuit comprises current source 34, comparator 33 and delay circuit 35.Current source 34 is coupled to the temperature detection end RT of controller 60 and the negative terminal of comparator 33.Thermistor 36 is coupled to the temperature detection end RT of controller 60 and with reference between the ground connection.The anode receive threshold voltage V of comparator 33 TThe output of comparator 33 generates excess temperature signal S by delay circuit 35 OTCircuit overcurrent protection comprises comparator 31.Comparator 31 has the deboost of reception V LMTAnode and receive sensing voltage V CSNegative terminal.The output of comparator 31 generates overcurrent signal S OCRegulating circuit comprises comparator 32 and resistor 37.The anode receiving feedback signals V of comparator 32 FB, and by resistor 37 by on draw.The negative terminal of comparator 32 receives sensing voltage V CSThe output of comparator 32 generates conditioning signal S RGPwm circuit 30 receives overcurrent signal S OC, conditioning signal S RGAnd excess temperature signal S OT, on the output GATE of controller 60, to generate drive signal V G
Fig. 2 shows the embodiment of the pwm circuit of controller 60.Pwm circuit 30 comprise oscillator 301, inverter 302, trigger 303, with door 304, NAND gate 305 and 306, blanking circuit (blanking circuit) 307 and buffer 308.The oscillator signal PLS that the input reception oscillator 301 of inverter 302 is generated.The output of inverter 302 couples the frequency input ck of trigger 303, to enable trigger 303.The output of inverter 302 also couples the first input end with door 304.The input D of trigger 303 receives excess temperature signal S OTThe output Q of trigger 303 couples second input with door 304.Generate switching signal S with the output of door 304 PWMOvercurrent signal S OCWith conditioning signal S RGTwo inputs to NAND gate 305 are provided.The output of NAND gate 305 couples the first input end of NAND gate 306.Blanking circuit 307 is coupled to and the output of door 304 and second input of NAND gate 306.The output of NAND gate 306 couples the replacement input R of trigger 303, with replacement trigger 303.Buffer 308 receives switching signal S PWMGenerate drive signal V G
In existing controller,, need the encapsulation pin of a special use usually in order to realize the over-temperature protection function.Therefore, need a scheme not destroy its original function simultaneously, reach cost-effective purpose in order to the pin count that reduces controller.
Summary of the invention
The invention provides a kind of controller that over-temperature protection is provided, be applicable to power converter.This controller comprises commutation circuit, drive circuit, thermal-shutdown circuit and signal generator.Commutation circuit generates switching signal.Drive circuit is made up of high-pressure side transistor and low-pressure side transistor, to generate drive signal.Drive signal is used for the regulatory work rate converter.Thermal-shutdown circuit couples drive circuit.Thermistor couples drive circuit, and in the down periods of switching signal, adjusts the drive signal across thermistor.Signal generator control thermal-shutdown circuit.Signal generator also couples drive circuit, to drive high-pressure side transistor and low-pressure side transistor.
Thermal-shutdown circuit comprises current source circuit and comparator.Current source circuit is enabled providing current to thermistor, to adjust drive signal across thermistor in down periods of switching signal according to first signal that signal generator was generated.Comparator is in the down periods of switching signal comparative threshold voltage and drive signal, to generate the excess temperature signal.The excess temperature signal in order to the forbidden energy drive signal to close power converter.
Signal generator comprises serrated signal, first comparison circuit, enable circuits and second comparison circuit.The sawtooth circuit generates first drive signal and serrated signal according to switching signal.First drive signal is used for driving the high-pressure side transistor.First comparison circuit is the serrated signal and first reference voltage relatively, with forbidden energy second drive signal.Second drive signal is enabled according to the falling edge of first drive signal, to drive the low-pressure side transistor.Enable circuits generates first signal according to the falling edge of second drive signal.First signal is used for enabling thermal-shutdown circuit.Second comparison circuit is the serrated signal and second reference voltage relatively, to enable secondary signal.Secondary signal is used for the forbidden energy thermal-shutdown circuit.Thermistor is a thermistor.When the ambient temperature at the down periods of switching signal power converter raise, the level of switching signal reduced.
Controller also comprises clamped circuit.This clamped circuit is enabled and is coupled to thermistor, with the boundary level in the down periods of switching signal strangulation drive signal.
The present invention also provides a kind of power converter that over-temperature protection is provided, and comprises transformer, power switch and controller.Transformer has elementary winding, secondary winding and auxiliary winding.Power switch couples the elementary winding of transformer with the regulatory work rate converter.Controller has output, comes the power switched switch to generate drive signal according to switching signal.Thermistor is coupled to the output of controller.In the down periods of switching signal, adjust drive signal across thermistor.
Controller comprises commutation circuit, thermal-shutdown circuit and clamped circuit.Commutation circuit generates switching signal.Thermal-shutdown circuit is coupled to thermistor, with in the down periods of switching signal, adjusts the drive signal across thermistor.Clamped circuit is enabled and is coupled to thermistor, with the boundary level in the down periods of switching signal strangulation drive signal.Thermistor is a thermistor.
The present invention also provides a kind of method that over-temperature protection is provided, and is applicable to power converter.The method comprises: switching signal is provided; Generate drive signal with the power switched switch according to switching signal, use the regulatory work rate converter; In the down periods of switching signal, generate serrated signal; When serrated signal surpasses first reference voltage, enable thermal-shutdown circuit; Ambient temperature according to power converter is adjusted drive signal; Relatively drive signal and threshold voltage are used and generate the excess temperature signal after time of delays to enable inhibit signal; And when serrated signal surpasses second reference voltage, the forbidden energy thermal-shutdown circuit.In the down periods of switching signal, drive signal is adjusted to and is lower than a boundary level.This boundary level is used for avoiding power switch to be switched in the down periods of switching signal.The excess temperature signal is used for disconnecting power switch.Second reference voltage level is greater than first reference voltage level.
A purpose of the present invention is to provide over-temperature protection to power converter.
Another object of the present invention is to reduce the pin count of the controller of power converter, simultaneously original defencive function of breakdown power transducer not.
Description of drawings
Fig. 1 shows existing power converter;
Fig. 2 shows the pwm circuit of existing power converter internal controller among Fig. 1;
Fig. 3 shows the power converter according to the embodiment of the invention;
Fig. 4 shows the pwm circuit according to the controller of the embodiment of the invention;
Fig. 5 shows the signal generator according to the controller of the embodiment of the invention;
Fig. 6 shows the various waveforms according to the controller of the embodiment of the invention;
Fig. 7 shows the delay circuit according to the pwm circuit of the embodiment of the invention; And
Fig. 8 shows the method that offers the power converter over-temperature protection according to the embodiment of the invention.
The reference numeral explanation
Fig. 1:
10～transformer; 11～rectifier;
12～capacitor; 13～resistor;
14～silicon reference diode; 15～optical coupler;
16～secondary feedback circuit; 20～power transistor;
21～rectifier; 22～capacitor;
25～resistor;
30～pulse width modulation (PWM) circuit;
31,32,33～comparator; 34～current source;
35～delay circuit; 36～thermistor;
37～resistor; 60～controller;
CS～sense terminals; FB～feedback end;
GATE～output; GND～earth terminal;
I P～switch current; N A～auxiliary winding;
N P～elementary winding; N S～secondary winding;
RT～temperature detection end; S OC～overcurrent signal;
S OT～excess temperature signal; S RG～conditioning signal;
V CC～supply power voltage; V CS～sensing voltage;
V FB～feedback signal; V G～drive signal;
V LMT～deboost; V O～output voltage;
V T～threshold voltage; VCC～feeder ear.
Fig. 2:
30～pulse width modulation (PWM) circuit;
301～oscillator; 302～inverter;
303～trigger; 304～with the door;
305,306～NAND gate; 307～blanking circuit;
308～buffer; The frequency input of ck～trigger;
The input of D～trigger 303; PLS～oscillator signal;
The output of Q～trigger 303;
The replacement input of R～trigger 303;
S OC～overcurrent signal; S OT～excess temperature signal;
S PWM～switching signal; S RG～conditioning signal;
V G～drive signal.
Fig. 3
10～transformer; 11～rectifier;
12～capacitor; 13～resistor;
14～silicon reference diode; 15～optical coupler;
16～secondary feedback circuit; 20～power transistor;
21～rectifier; 22～capacitor;
25～resistor; 31,32～comparator
36～thermistor; 37～resistor;
50～pulse width modulation (PWM) circuit;
100～controller; CS～sense terminals;
FB～feedback end; GATE～output;
GND～earth terminal; I P～switch current;
N A～auxiliary winding; N P～elementary winding;
N S～secondary winding; S OC～overcurrent signal;
S RG～conditioning signal; V CC～supply power voltage;
V CS～sensing voltage; V FB～feedback signal;
V G～drive signal; V LMT～deboost;
V O～output voltage; VCC～feeder ear.
Fig. 4
50～pulse width modulation (PWM) circuit;
70～signal generator; 301～oscillator;
302～inverter; 303～trigger;
304～with the door; 305,306～NAND gate;
307～blanking circuit; 309～NAND gate;
310～comparator; 311～current source;
312,313～switch; 314～diode;
315～buffer; 316～transistor;
317～buffer; 318～transistor;
319～delay circuit; The input end of clock of ck～trigger 303;
The input of D～trigger 303; GATE～output;
PLS～oscillator signal; The output of Q～trigger 303;
The replacement input of R～trigger 303;
S 1～the first signal; S 2～secondary signal;
S D～inhibit signal; S H～the first drive signal;
S L～the second drive signal; S OC～overcurrent signal;
S PWM～switching signal; S RG～conditioning signal;
S OT～excess temperature signal; V CC～supply power voltage;
V G～drive signal; V T～threshold voltage.
Fig. 5
70～signal generator; 711,712～inverter;
713～current source; 714,715～switch;
716～capacitor; 717,718～comparator;
720,721,722～NOR gate;
S 1～the first signal; S 2～secondary signal;
S H～the first drive signal; S L～the second drive signal;
S PWM～switching signal; V CC～supply power voltage;
V R1～the first reference signal; V R2～the second reference signal;
V RMP～ramp signal.
Fig. 6:
A～time point; S 1～the first signal;
S 2～secondary signal; S H～the first drive signal;
S L～the second drive signal; S PWM～switching signal;
V FThe forward voltage of～diode 314; V G～drive signal;
V R1～the first reference signal; V R2～the second reference signal;
V RMP～ramp signal; V T～threshold voltage.
Fig. 7:
319～delay circuit; 321,322,326～trigger;
The input end of clock of ck～trigger;
The input of D～trigger; GATE～output;
PLS～oscillator signal; The output of Q～trigger;
Figure BSA00000345404200071
The reversed-phase output of～trigger;
The replacement input of R～trigger;
S OT～excess temperature signal; S D～inhibit signal;
V CC～supply power voltage.
Fig. 8:
1001...1007～method step.
Embodiment
For above-mentioned purpose of the present invention, feature and advantage can be become apparent, a preferred embodiment cited below particularly, and be described with reference to the accompanying drawings as follows.
Fig. 3 shows the power converter according to the embodiment of the invention.This power converter comprises transformer 10, power switch 20, resistor 25, controller 100, thermistor 36, rectifier 11 and 21, capacitor 12 and 22 and secondary feedback circuit 16.In this embodiment, power switch 20 is a power transistor.Controller 100 has feeder ear VCC, output GATE, sense terminals CS, feedback end FB and earth terminal GND.Transformer 10 comprises elementary winding N P, auxiliary winding N AAnd secondary winding N SAuxiliary winding N ABy 22 chargings of 21 pairs of capacitors of rectifier, to generate supply power voltage V CCCome controller 60 power supplies.Secondary winding N SGenerate across the output voltage V of the power converter of capacitor 12 by rectifier 11 OSecondary feedback circuit 16 comprises resistor 13, silicon reference diode 14 and optical coupler 15.Resistor 13 is coupled between the cathode terminal of the output of power converter and silicon reference diode 14.The input of optical coupler 15 couples the anode tap of silicon reference diode 14.Output voltage V on the output of secondary feedback circuit 16 received power transducers OTo generate a feedback signal V FBResistor 25 is coupled to the source electrode of power transistor 20 and with reference between the ground connection.When connecting when the output GATE of power transistor 20 controlled devices 60 control, resistor 25 will be converted to sensing voltage V to the switch current IP of the power transistor 20 of flowing through CS
Controller 100 comprises circuit overcurrent protection, regulating circuit and pulse width modulation, and (pulse width modulation, PWM) circuit 50.According to one embodiment of the invention, the thermistor 36 with negative temperature coefficient feature is coupled to the output GATE of controller 100.When ambient temperature raises, the resistance value of thermistor 36 will reduce, and vice versa.Circuit overcurrent protection comprises comparator 31.The anode of comparator 31 receives deboost V LMT, its negative terminal receives sensing voltage V CSThe output of comparator 31 generates overcurrent signal S OCRegulating circuit comprises comparator 32 and resistor 37.The anode of comparator 32 receives feedback voltage V FB, and by drawing on the resistor 37.The negative terminal of comparator 32 receives sensing voltage V CSThe output of comparator 32 generates conditioning signal S RGOvercurrent signal S OCWith conditioning signal S RGBe provided to pwm circuit 50 to generate drive signal V G
Fig. 4 shows the pwm circuit 50 according to the controller 100 of the embodiment of the invention.Pwm circuit 50 comprises commutation circuit, thermal-shutdown circuit, clamped circuit, signal generator 70 and drive circuit.Commutation circuit comprise oscillator 301, inverter 302, trigger 303, with door 304, NAND gate 305 and 306 and blanking circuit (blanking circuit) 307.Thermal-shutdown circuit comprises current source 311, switch 312, comparator 310, NAND gate 309 and delay circuit 319, and wherein, current source 311 forms current source circuit with switch 312.Drive circuit comprises buffer 315 and 317 and transistor 316 and 318.In this embodiment, clamped circuit is realized by switch 313 and diode 314.
Oscillator 301 generates oscillator signal PLS.The input end of clock ck that oscillator signal PLS is provided to trigger 303 by inverter 302 with the first input end of door 304.The output Q of trigger 303 couples second input with door 304.Generate switching signal S with the output of door 304 PWMOvercurrent signal S OCWith conditioning signal S RGBe provided to two inputs of NAND gate 305.The output of NAND gate 305 couples the first input end of NAND gate 306.Second input of NAND gate 306 receives switching signal S by blanking circuit 307 PWMThe output of NAND gate 306 couples the replacement input R of trigger 303, with replacement trigger 303.
Switching signal S PWMBe provided to signal generator 70 to generate the first drive signal S H, the second drive signal S L, the first signal S 1And secondary signal S 2First end of current source 311 couples supply power voltage V CCSwitch 312 and switch 313 coupled in series are between the anode of second end of current source 311 and diode 314.The negative electrode of diode 314 couples with reference to ground connection.Switch 312 and 313 is all by the first signal S 1Control.Transistor 316 and transistor 318 coupled in series are in supply power voltage V CCAnd between the reference ground connection, wherein, couple supply power voltage V CCTransistor 316 be called the high-pressure side transistor, and the transistor 318 that couples with reference to ground connection is called the low-pressure side transistor.The first drive signal S HBy buffer 315 oxide-semiconductor control transistors 316.The second drive signal S LBy buffer 317 oxide-semiconductor control transistors 318.Transistor 316 and 318 common tie point couple the output GATE of controller 100, to generate drive signal V GThe common tie point of switch 312 and switch 313 also couples the output GATE of controller 100.The output GATE of controller 100 couples the positive input terminal of comparator 310.The negative input end receive threshold voltage V of comparator 310 TThe output of comparator 310 couples the first input end of NAND gate 309.Second input of NAND gate 309 receives secondary signal S 2The output of NAND gate 309 provides inhibit signal S DInput to delay circuit 319.The output of delay circuit 319 generates excess temperature signal S OTInput D to trigger 303.
Fig. 5 shows the signal generator 70 according to the controller 100 of the embodiment of the invention.Signal generator 70 comprises sawtooth circuit, first comparison circuit, second comparison circuit and enable circuits.The sawtooth circuit comprises inverter 711 and 712, current source 713, switch 714 and 715 and capacitor 716.First comparison circuit comprises comparator 717 and NOR gate 720.Second comparison circuit comprises comparator 718 and NOR gate 722.In this embodiment, enable circuits is realized by NOR gate 721.First end of current source 713 couples supply power voltage V CCSwitch 714 and 715 coupled in series in second end of current source 713 and with reference to ground connection between.Switch 715 is controlled by switching signal S PWMThe input of inverter 712 receives switching signal S PWMThe output of inverter 712 couples the input of inverter 711.
The output of inverter 711 generates the first drive signal S HSwitching signal S PWMBy inverter 712 control switchs 714.Capacitor 716 is in parallel with switch 715.By on capacitor 716, obtaining ramp voltage V RMPRamp voltage V RMPBe provided to the anode of comparator 717 and the negative terminal of comparator 718.The anode of the negative terminal of comparator 717 and comparator 718 receives the first reference signal V respectively R1With the second reference signal V R2Second reference signal level is greater than first reference signal level.NOR gate 720,721, and 722 first input end all receive the first drive signal S HSecond input of NOR gate 720 couples the output of comparator 717.Second input of NOR gate 722 couples the output of comparator 718.The output of NOR gate 720 generates the second drive signal S LThe second drive signal S LBe provided to second input of NOR gate 721.The output of the output of NOR gate 721 and NOR gate 722 generates the first signal S respectively 1And secondary signal S 2
Fig. 6 shows the various waveforms according to the controller 100 of the embodiment of the invention.Consult Fig. 5 simultaneously, as switching signal S PWMDuring by forbidden energy (disabled), switch 714 will be connected, and switch 715 will disconnect.Current source 713 will be by 716 chargings of 714 pairs of capacitors of switch, to generate the ramp voltage V across capacitor 716 RMPConsult Fig. 6, ramp voltage V RMPBe considered as serrated signal.In case switching signal S PWMBy forbidden energy, the first drive signal S HWill be by forbidden energy.The second drive signal S LWill be according to the first drive signal S HFalling edge and be enabled (enabled).Consult Fig. 4 again, transistor 318 is by buffer 317 and by the second drive signal S LConnect.Drive signal V GTherefore will be pulled down to level (for example 0V) with reference to ground connection.In case ramp voltage V RMPContinue to increase and surpass the first reference voltage V R1Level the time, the second drive signal S LWill be by forbidden energy.The first signal S 1Will be according to the second drive signal S LFalling edge and be enabled.This will disconnect transistor 318, and connect switch 312 and 313.
Consult Fig. 3, thermistor 36 is coupled to the output GATE of controller 100 and with reference between the ground connection.When switch 312 and 313 by the first signal S 1During connection, a series connection parasitic resistor (not shown) of diode 314 will be in parallel with thermistor 36 by the output GATE of controller 100.Because relatively less than the resistance value of thermistor 36, therefore the most of electric current that is provided by current source 311 will flow to diode 314 to the resistance value of the parasitic resistor of diode 314.At this moment, drive signal V GLevel then will be pulled to the forward voltage V of diode 314 FLevel.The forward voltage V of diode 314 FGuaranteed drive signal V this moment GBoundary level, to avoid power transistor 20 at switching signal S PWMDown periods in be switched on.Be provided to the threshold voltage V of the negative terminal of comparator 310 TDefinition excess temperature condition, and threshold voltage V TBe lower than the forward voltage V of diode 314 FBecause thermistor 36 has negative temperature coefficient feature, thus the voltage level of thermistor 36 (it also equals drive signal V GLevel) will raise and reduce along with ambient temperature.As drive signal V GLevel become the forward voltage V that is lower than diode 314 FThe time, most of electric current that current source 311 is provided will flow to thermistor 36.As drive signal V GLevel raise along with ambient temperature constantly and reduce and become and be lower than threshold voltage V TThe time (for example in Fig. 6 by " A " time point of indication), comparator 310 will enable inhibit signal S by NAND gate 306 DIn case inhibit signal S DThe time that is enabled is longer than the time of delay that delay circuit 319 is provided, and delay circuit 319 will generate low logic excess temperature signal S OTGive the input D of trigger 303, with forbidden energy switching signal S PWM, this will forbidden energy drive signal V GShift to cut off energy, and the protection power converter avoids being subjected to the damage of excess temperature state.
In case ramp signal V RMPIncrease constantly and surpass the second reference voltage V R2Level the time, secondary signal S 2To be enabled.The secondary signal S that is enabled 2To come forbidden energy inhibit signal S by NAND gate 309 DAs long as second input of NAND gate 309 receives by the secondary signal S of forbidden energy 2, thermal-shutdown circuit will be by forbidden energy.Therefore, thermal-shutdown circuit is by the first signal S 1Institute enables, and by secondary signal S 2Institute's forbidden energy.
Fig. 7 shows the delay circuit 319 according to the pwm circuit 50 of the embodiment of the invention.Delay circuit 319 is essentially a counter, and it comprises the trigger 321,322, and 326 of series connection.The input end of clock ck of the trigger of these series connection receives oscillator signal PLS.The replacement input R receive delay signal S of the trigger of these series connection DAs inhibit signal S DWhen being enabled, oscillator signal PLS will drive these trigger devices to generate time of delay.In one embodiment of this invention, be 10 μ s between transfer period, and it then is 10ms time of delay.After time of delay, the reversed-phase output of trigger 326
Figure BSA00000345404200111
To generate low logic excess temperature signal S OTAs inhibit signal S DDuring by forbidden energy, these triggers will be reset, and excess temperature signal S OTTo become high logic once more.
Fig. 8 shows the method that offers the power converter over-temperature protection according to the embodiment of the invention.At first, generate switching signal (step 1001).Then, generate drive signal with the power switched switch, use regulatory work rate converter (step 1002) according to described switching signal.Then, generate serrated signal (step 1003) in the down periods of described switching signal.Then, when described serrated signal surpasses first reference voltage, enable thermal-shutdown circuit (step 1004).Then, adjust drive signal (step 1005) according to the ambient temperature of described power converter.Then, by more described drive signal and threshold voltage, after time of delay, generate excess temperature signal (step 1006) to enable inhibit signal.At last, when described serrated signal surpasses second reference voltage, forbidden energy thermal-shutdown circuit (step 1007).In the switching signal down periods, drive signal is adjusted to and is lower than a boundary level.The excess temperature signal is used for closing power converter.Described boundary level then is used for avoiding power switch to be switched in the down periods of switching signal.Second reference signal level is greater than first reference signal level.
Though the present invention discloses as above with preferred embodiment; right its is not in order to limiting scope of the present invention, those skilled in the art, under the premise without departing from the spirit and scope of the present invention; can do some changes and retouching, so protection scope of the present invention is to be as the criterion with claim of the present invention.

Claims (14)

1. the controller that over-temperature protection is provided is applicable to power converter, comprising:
Commutation circuit generates switching signal;
Drive circuit is made up of high-pressure side transistor and low-pressure side transistor, and to generate drive signal, wherein, described drive signal is used for regulating described power converter;
Thermal-shutdown circuit couples described drive circuit, and wherein, thermistor couples described drive circuit, and in the down periods of described switching signal, adjusts the described drive signal across described thermistor; And
Signal generator is controlled described thermal-shutdown circuit; Wherein, described signal generator also couples described drive circuit, to drive described high-pressure side transistor and described low-pressure side transistor.
2. controller as claimed in claim 1, wherein, described thermal-shutdown circuit comprises:
Current source circuit is enabled providing current to described thermistor, to adjust described drive signal across described thermistor in described down periods of described switching signal according to first signal that described signal generator was generated; And
Comparator, in the described down periods comparative threshold voltage and the described drive signal of described switching signal, to generate the excess temperature signal, wherein, described excess temperature signal in order to the described drive signal of forbidden energy to close described power converter.
3. controller as claimed in claim 2, wherein, described signal generator comprises:
The sawtooth circuit generates first drive signal and serrated signal according to described switching signal, and wherein, described first drive signal is used for driving described high-pressure side transistor;
First comparison circuit, the more described serrated signal and first reference voltage, with forbidden energy second drive signal, wherein, described second drive signal is enabled according to the falling edge of described first drive signal, to drive described low-pressure side transistor;
Enable circuits generates described first signal according to the falling edge of described second drive signal, and wherein, described first signal is used for enabling described thermal-shutdown circuit; And
Second comparison circuit, the more described serrated signal and second reference voltage, to enable secondary signal, wherein, described secondary signal is used for the described thermal-shutdown circuit of forbidden energy.
4. controller as claimed in claim 1, wherein, described thermistor is a thermistor, and when the ambient temperature at the described described power converter of down periods of described switching signal raise, the level of described switching signal reduced.
5. controller as claimed in claim 1 also comprises:
One clamped circuit, being enabled is coupled to described thermistor, with the boundary level in the described drive signal of described down periods strangulation of described switching signal.
6. power converter that over-temperature protection is provided comprises:
Transformer has elementary winding, secondary winding and auxiliary winding;
Power switch, the described elementary winding that couples described transformer is to regulate described power converter; And
Controller has output, switches described power switch to generate drive signal according to switching signal, and wherein, thermistor is coupled to the described output of described controller.
7. power converter as claimed in claim 6 wherein, in the down periods of described switching signal, is adjusted the described drive signal across described thermistor.
8. power converter as claimed in claim 7, wherein, described controller comprises:
Commutation circuit generates described switching signal;
Thermal-shutdown circuit is coupled to described thermistor, with in the described down periods of described switching signal, adjusts the described drive signal across described thermistor; And
Clamped circuit, being enabled is coupled to described thermistor, with the boundary level in the described drive signal of described down periods strangulation of described switching signal.
9. power converter as claimed in claim 6, wherein, described thermistor is a thermistor.
10. the method that over-temperature protection is provided is applicable to power converter, comprising:
Generate switching signal;
Generate drive signal with the power switched switch according to described switching signal, use and regulate described power converter;
In the down periods of described switching signal, generate serrated signal;
When described serrated signal surpasses first reference voltage, enable thermal-shutdown circuit;
Adjust described drive signal according to the ambient temperature of described power converter;
More described drive signal and threshold voltage are used and generate the excess temperature signal after time of delays to enable inhibit signal; And
When described serrated signal surpasses second reference voltage, the described thermal-shutdown circuit of forbidden energy.
11. method as claimed in claim 10, wherein, in the described down periods of described switching signal, described drive signal is adjusted to and is lower than boundary level.
12. method as claimed in claim 11, wherein, described boundary level is used for avoiding described power switch to be switched in the described down periods of described switching signal.
13. method as claimed in claim 10, wherein, described excess temperature signal is used for disconnecting described power switch.
14. method as claimed in claim 10, wherein, the level of described second reference voltage is greater than the level of described first reference voltage.
CN201010543816.0A 2010-11-15 2010-11-15 Controller, power converter and method for providing over-temperature protection Expired - Fee Related CN102005731B (en)

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