JP5510862B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP5510862B2 JP5510862B2 JP2009056761A JP2009056761A JP5510862B2 JP 5510862 B2 JP5510862 B2 JP 5510862B2 JP 2009056761 A JP2009056761 A JP 2009056761A JP 2009056761 A JP2009056761 A JP 2009056761A JP 5510862 B2 JP5510862 B2 JP 5510862B2
- Authority
- JP
- Japan
- Prior art keywords
- fuse
- metal
- wiring
- metal wiring
- power supply
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
- H01L23/5256—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
- G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
- G11C17/18—Auxiliary circuits, e.g. for writing into memory
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3011—Impedance
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Semiconductor Integrated Circuits (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2009056761A JP5510862B2 (ja) | 2009-03-10 | 2009-03-10 | 半導体装置 |
| US12/718,593 US8558343B2 (en) | 2009-03-10 | 2010-03-05 | Semiconductor device having a fuse element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2009056761A JP5510862B2 (ja) | 2009-03-10 | 2009-03-10 | 半導体装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2010212445A JP2010212445A (ja) | 2010-09-24 |
| JP2010212445A5 JP2010212445A5 (enExample) | 2012-03-22 |
| JP5510862B2 true JP5510862B2 (ja) | 2014-06-04 |
Family
ID=42729995
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2009056761A Expired - Fee Related JP5510862B2 (ja) | 2009-03-10 | 2009-03-10 | 半導体装置 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US8558343B2 (enExample) |
| JP (1) | JP5510862B2 (enExample) |
Families Citing this family (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20090121470A (ko) * | 2008-05-22 | 2009-11-26 | 주식회사 하이닉스반도체 | 임피던스 교정 회로를 포함하는 반도체 메모리 장치 |
| JP5372578B2 (ja) * | 2009-04-09 | 2013-12-18 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| JP5561668B2 (ja) * | 2009-11-16 | 2014-07-30 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| US8970190B2 (en) * | 2011-03-10 | 2015-03-03 | Microchip Technology Incorporated | Using low voltage regulator to supply power to a source-biased power domain |
| US8633707B2 (en) * | 2011-03-29 | 2014-01-21 | International Business Machines Corporation | Stacked via structure for metal fuse applications |
| US8421186B2 (en) * | 2011-05-31 | 2013-04-16 | International Business Machines Corporation | Electrically programmable metal fuse |
| US8610243B2 (en) * | 2011-12-09 | 2013-12-17 | Globalfoundries Inc. | Metal e-fuse with intermetallic compound programming mechanism and methods of making same |
| KR102127178B1 (ko) * | 2014-01-23 | 2020-06-26 | 삼성전자 주식회사 | 반도체 장치의 이-퓨즈 구조체 |
| US9666587B1 (en) | 2016-01-29 | 2017-05-30 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor device and method |
| KR102471641B1 (ko) * | 2016-02-04 | 2022-11-29 | 에스케이하이닉스 주식회사 | 퓨즈구조 및 그를 포함하는 반도체장치 |
| US10020252B2 (en) | 2016-11-04 | 2018-07-10 | Micron Technology, Inc. | Wiring with external terminal |
| US10141932B1 (en) | 2017-08-04 | 2018-11-27 | Micron Technology, Inc. | Wiring with external terminal |
| US10304497B2 (en) | 2017-08-17 | 2019-05-28 | Micron Technology, Inc. | Power supply wiring in a semiconductor memory device |
| US10163783B1 (en) * | 2018-03-15 | 2018-12-25 | Taiwan Semiconductor Manufacturing Co., Ltd. | Reduced area efuse cell structure |
| US10593619B1 (en) * | 2018-08-28 | 2020-03-17 | Nsp Usa, Inc. | Transistor shield structure, packaged device, and method of manufacture |
| US11164825B2 (en) | 2018-10-31 | 2021-11-02 | Taiwan Semiconductor Manufacturing Co., Ltd. | CoWos interposer with selectable/programmable capacitance arrays |
| US10971447B2 (en) * | 2019-06-24 | 2021-04-06 | International Business Machines Corporation | BEOL electrical fuse |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4959267B2 (ja) * | 2006-03-07 | 2012-06-20 | ルネサスエレクトロニクス株式会社 | 半導体装置および電気ヒューズの抵抗値の増加方法 |
| JP4884077B2 (ja) | 2006-05-25 | 2012-02-22 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| JP4995512B2 (ja) * | 2006-08-23 | 2012-08-08 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
-
2009
- 2009-03-10 JP JP2009056761A patent/JP5510862B2/ja not_active Expired - Fee Related
-
2010
- 2010-03-05 US US12/718,593 patent/US8558343B2/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| US8558343B2 (en) | 2013-10-15 |
| US20100230780A1 (en) | 2010-09-16 |
| JP2010212445A (ja) | 2010-09-24 |
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