JP5506643B2 - Wiring board and manufacturing method thereof - Google Patents

Description

  The present invention relates to a wiring board for mounting a semiconductor element and a manufacturing method thereof.

  5A and 5B schematically show a conventional wiring substrate 20 for mounting, for example, an optical semiconductor element S as a semiconductor element. Conventionally, the wiring substrate 20 for mounting the optical semiconductor element S is formed by, for example, forming a wiring conductor layer 26 on the inside and surface of an insulating substrate 21 in which an insulating layer 27 is laminated on the upper and lower surfaces of an insulating plate 25. A plurality of semiconductor element connection pads 22 to which the electrodes T of the optical semiconductor element S are connected are formed on a part of the wiring conductor layer 26 on the upper surface of the insulating substrate 21. Further, these semiconductor element connection pads 22 are covered with a solder resist layer 23 deposited on the upper surface of the insulating substrate 21, and an opening 24 provided in the solder resist layer 23 at the center. It is exposed inside. As shown in FIG. 6, the electrode T of the optical semiconductor element S and the exposed portion of the semiconductor element connection pad 22 are electrically connected by flip chip connection via solder bumps.

  Further, a light receiving or light emitting portion L is formed on the upper surface of the optical semiconductor element S. An optical fiber F for transmitting and receiving light to and from the optical semiconductor element S is fixed above the optical semiconductor element S so as to face the light receiving or light emitting portion L. The optical fiber F is supported by a guide G for fixing the optical fiber F to the wiring board 20, and the guide G and the wiring board 20 are in a state where the positioning reference surface of the guide G is abutted against the outer peripheral side surface of the wiring board 20. And the optical fiber F is positioned with respect to the optical semiconductor element S.

  By the way, conventionally, the wiring board 20 is manufactured in a multi-cavity form. Specifically, as shown in FIG. 7, a product region 30A to be a wiring substrate 20 is integrally formed in a panel-like large substrate 30 in the form of several tens to several hundreds vertically and horizontally with a cutting margin 30B interposed therebetween. At the same time, the cutting allowance 30B is cut using a cutting device such as a dicing device or a router device, so that a large number of the wiring boards 20 are divided and manufactured simultaneously. In FIG. 7, only four product regions 30A are representatively shown for simplicity.

  By the way, the outer side dimension accuracy of the wiring board 20 cut by the dicing device or the router device is about ± 10 to 80 μm. The exposed portion of the semiconductor element connection pad 22 to which the electrode T of the optical semiconductor element S is connected is defined by the opening 24 of the solder resist layer 23 coated on the insulating substrate 21. The solder resist layer 23 is usually formed by applying or pasting a photosensitive solder-resist paste or film-like resin composition on the insulating substrate 21 on which the semiconductor element connection pads 22 are formed, and then using a well-known photo resist. It is formed by exposing and developing a pattern having an opening 24 using a lithography technique and then thermally curing. At this time, the positional accuracy of the opening 24 is about ± 10 μm. Therefore, the positional accuracy between the optical semiconductor element S connected to the semiconductor element connection pad 22 and the optical fiber F positioned and mounted on the basis of the outer dimension of the wiring board 20 is such that they overlap each other. It will exceed 20 μm. As described above, in the conventional wiring substrate 20, since the positional accuracy between the optical semiconductor element S and the optical fiber F is low, the light reception or light emitting portion L of the optical semiconductor element S and the optical fiber F can transmit light. It was easy to happen that the transfer could not be performed accurately. Further, not only the optical semiconductor element S but also a wiring board on which other types of semiconductor elements are mounted, when positioning other members such as semiconductor elements and connectors on the basis of the outer periphery of the wiring board, the positioning is performed. The accuracy is low and it is difficult to perform accurate positioning.

JP 2009-135463 A

  An object of the present invention is to accurately position and fix a semiconductor element and a member such as an optical fiber or a connector connected to the semiconductor element on a wiring board on which the semiconductor element is mounted. It is an object of the present invention to provide a wiring board and a method for manufacturing the wiring board, which can always accurately transmit and receive light and electric signals between an element and an optical fiber or a connector connected to the element.

  The wiring board according to the present invention comprises a connection pad used for connection to the outside formed on the upper surface of the insulating substrate, and a solder resist layer having an opening that is deposited on the upper surface of the insulating substrate and exposes the connection pad. The solder resist layer covers at least a part of the outer peripheral side surface of the insulating substrate, and the surface of the portion covering the outer peripheral side surface is simultaneously formed by the photolithography technique with the opening. It is a flat surface formed.

  According to the method for manufacturing a wiring board in the present invention, a plurality of product areas to be wiring boards having connection pads used for connection to the outside on the upper surface are integrally provided around the product area with a cutting margin interposed therebetween. A step of providing a slit extending between the product region and the cutting allowance along each outer periphery of the region, and depositing a photosensitive resin for the solder resist layer in the upper surface and the slit of the product region, and in the upper surface and the slit Forming a solder resist layer having a flat surface covering the side surface of the product area in the opening and the slit exposing the connection pad by simultaneously applying the photolithography technique to the photosensitive resin of each, and cutting the cutting allowance for each product And a step of obtaining a plurality of wiring boards by making the regions independent.

  According to the wiring board of the present invention, the solder resist layer covering the outer peripheral side surface of the insulating substrate has a flat surface formed by photolithography technology simultaneously with the opening exposing the central portion of the semiconductor element connection pad. The flat surface is formed with extremely high positional accuracy with respect to the opening exposing the semiconductor element connection pad. Therefore, it is possible to position and fix the semiconductor element and members such as an optical fiber and a connector connected to the semiconductor element with a very high accuracy on the basis of the flat surface. It is possible to provide a wiring board capable of always accurately exchanging light and electric signals with optical fibers and connectors to be connected.

  In addition, according to the method for manufacturing a wiring board of the present invention, a plurality of product regions to be a wiring board having connection pads used for connection to the outside on the upper surface are provided integrally with a cutting margin around the periphery, A slit extending between the product region and the cutting allowance is provided along each outer periphery of the product region, and then a photosensitive resin for solder resist is deposited on the upper surface and the slit of the product region and those photosensitive resins In order to form a flat surface on the side surface of the product region in the slit, the flat surface covering the side surface of the product region in the slit is formed on the upper surface. Can be formed with extremely high positional accuracy with respect to the opening that exposes. Therefore, it is possible to position and fix the semiconductor element and members such as an optical fiber and a connector connected to the semiconductor element with a very high accuracy on the basis of the flat surface. It is possible to provide a wiring board capable of always accurately exchanging light and electric signals with optical fibers and connectors to be connected.

1A and 1B are schematic views showing an example of an embodiment of a wiring board according to the present invention. FIG. 2 is a schematic sectional view showing an example of use of the wiring board of the present invention. 3A and 3B are schematic diagrams showing an example of a method for manufacturing a wiring board according to the present invention. 4 (c) and 4 (d) are schematic views showing an example of a method for manufacturing a wiring board according to the present invention. 5A and 5B are schematic views showing a conventional wiring board. FIG. 6 is a schematic cross-sectional view showing an example of use of a conventional wiring board. FIG. 7 is a schematic view showing a conventional method for manufacturing a wiring board.

  Next, an example of an embodiment in which the present invention is applied to a wiring board on which an optical semiconductor element is mounted will be described with reference to FIGS. The wiring board 10 of this example is formed by forming a wiring conductor layer 6 inside and on the surface of an insulating substrate 1 in which insulating layers 7 are laminated on the upper and lower surfaces of an insulating plate 5, for example. On the upper surface of the insulating substrate 1, for example, a plurality of semiconductor element connection pads 2 to which the electrodes T of the optical semiconductor element S are connected are provided. The semiconductor element connection pad 2 is covered with a solder resist layer 3 deposited on the upper surface of the insulating substrate 1, and its central portion is exposed in an opening 4 provided in the solder resist layer 3. ing. Furthermore, a part of the outer peripheral side surface of the insulating substrate 1 is covered with the solder resist layer 3, and the side surface of the solder resist layer 3 in the covering portion is formed flat. As shown in FIG. 2, the electrode T of the optical semiconductor element S and the exposed portion of the semiconductor element connection pad 2 are electrically connected by flip chip connection via solder bumps. In addition, the optical fiber F for transmitting and receiving light to and from the optical semiconductor element S is fixedly disposed so as to face the light receiving or light emitting portion L. The optical fiber F is supported by a guide G for fixing the optical fiber F to the wiring substrate 10, and the positioning reference surface of the guide G is projected to the flat surface of the solder resist layer 3 that covers the outer peripheral side surface of the insulating substrate 1. The optical fiber F is positioned with respect to the optical semiconductor element S by fixing the guide G and the wiring board 10 in the applied state.

  The insulating substrate 1 is made of an electrically insulating material obtained by impregnating a glass cloth with a thermosetting resin such as an epoxy resin or a bismaleimide triazine resin and curing it. The thickness of the insulating substrate 1 is, for example, about 40 to 1500 μm. The insulating substrate 1 may be a single layer or a multilayer.

  The semiconductor element connection pad 2 is made of, for example, a copper foil or a copper plating layer. The semiconductor element connection pad 2 is usually circular and has a diameter of about 30 to 700 μm. The thickness of the semiconductor element connection pad 2 is about 5 to 50 μm. Such a semiconductor element connection pad 2 is formed by a known pattern forming method such as a subtractive method or a semi-additive method.

  The solder resist layer 3 is made of an electrically insulating material obtained by curing a photosensitive thermosetting resin such as an acrylic-modified epoxy resin. The thickness of the solder resist layer 3 is about 5 to 50 μm. The opening 4 provided in the solder resist layer 3 is a circle smaller than the semiconductor element connection pad 2 and has a diameter of about 20 to 650 μm. Such a solder resist layer 3 is formed by a photolithography technique. Specifically, it is formed by sticking a photosensitive thermosetting resin film on the upper surface of the insulating substrate 1 and exposing and developing it in a predetermined pattern, followed by ultraviolet curing and thermosetting.

  In the wiring substrate 10 of this example, the solder resist layer 3 covers a part of the outer peripheral side surface of the insulating substrate 1 and the side surface of the covering portion is formed on a flat surface. The flat surface of the solder resist layer 3 is formed by photolithography simultaneously with the opening 4. Therefore, the flat surface is formed with extremely high positional accuracy of ± 10 μm or less with respect to the exposed portion of the semiconductor element connection pad 2 to which the electrode T of the optical semiconductor element S is flip-chip connected.

  As a result, as shown in FIG. 2, the guide G and the wiring in a state where the positioning reference surface of the guide G to which the optical fiber F is attached is abutted against the flat surface of the solder resist layer 3 covering the outer peripheral side surface of the wiring substrate 10. By fixing the substrate 10, it is possible to position and fix the optical fiber F with high positional accuracy with respect to the mounted optical semiconductor element S. Therefore, according to the present example, it is possible to provide the wiring board 10 that can always exchange light accurately between the optical semiconductor element S and the optical fiber F.

  Next, a case where an example of the method for manufacturing a wiring board according to the present invention is applied to the manufacturing of the above-described wiring board 10 will be described with reference to FIGS. 3 (a), (b) and FIGS. 4 (c), (d). explain. In these drawings, for the sake of simplicity, four product regions 11A to be the wiring substrate 10 are shown, but actually, several tens to several hundreds of product regions 11A are arranged vertically and horizontally.

  First, as shown in FIG. 3A, a plurality of product regions 11A to be a wiring substrate 10 having a plurality of semiconductor element connection pads 2 to which the electrodes T of the optical semiconductor element S are connected on the upper surface are cut around the periphery. The insulating substrate 11 formed integrally with 11B interposed therebetween is produced. Such an insulating substrate 11 is produced by alternately laminating the wiring conductor layers 6 and the insulating layers 7 on a panel-like large insulating plate by, for example, a well-known build-up method. At this time, the solder resist layer 3 is not formed on the insulating substrate 11.

  Next, as illustrated in FIG. 3B, the slit 11 </ b> C is formed so as to straddle between the product region 11 </ b> A and the cutting allowance 11 </ b> B along each outer periphery of the product region 11 </ b> A in the insulating substrate 11. The slit 11C is formed by a router device, for example. The width of the slit 11C is preferably in the range of 0.5 to 3 mm. If the width of the slit 11C is smaller than 0.5 mm, it is difficult to process the slit 11C, and if it exceeds 3 mm, it becomes difficult to satisfactorily form the necessary solder resist layer 3 in the slit 11C, as will be described later. Therefore, the width of the slit 11C is preferably approximately 0.5 to 3 mm. It is important that the slit 11C is formed on the insulating substrate 11 after the formation process of the wiring conductor layer 6 and the insulating layer 7 is completed. If the slit 11C is formed before the wiring conductor 6 and the insulating layer 7 are formed on the insulating plate, the process of forming the wiring conductor layer 6 and the insulating layer 7 on the insulating plate becomes difficult.

  Next, as shown in FIG. 4C, the photosensitive resin 3A for the solder resist layer 3 is deposited on the upper surface of the insulating substrate 11 on which the slit 11C is formed and the slit 11C. At this time, the side surface of the slit 11C is attached so as to be covered with the photosensitive resin 3A. Then, the applied photosensitive resin 3A is subjected to a photolithography technique, and as shown in FIG. 4D, the opening 4 exposing the semiconductor element connection pad 2 and the slit 11C portion on the product region 11A side A flat surface covering the side surface is formed at the same time.

  Finally, the insulating substrate 11 on which the solder resist layer 3 is formed is cut into a cutting allowance 11B by using, for example, a dicing device to make each product region 11A independent, as shown in FIG. At the same time, the wiring substrate 10 is coated with a part of the solder resist layer 3 and the side surface of the solder resist layer 3 covering the side surface of the insulating substrate 1 is a flat surface formed by the photolithography technique simultaneously with the opening 4. It becomes possible to manufacture a plurality of pieces collectively.

  As described above, the flat surface of the solder resist layer 3 covering the side surface of the insulating substrate 1 is formed simultaneously with the semiconductor element connection pad 2 to which the electrode T of the optical semiconductor element S is flip-chip connected. It is formed with extremely high positional accuracy of ± 10 μm or less with respect to the pad 2. Thus, the guide G and the wiring substrate 10 are fixed in a state where the positioning reference surface of the guide G to which the optical fiber F is attached is abutted against the flat surface of the solder resist layer 3 that covers the outer peripheral side surface of the wiring substrate 10. Accordingly, the optical fiber F can be positioned and fixed with high positional accuracy with respect to the mounted optical semiconductor element S. Therefore, according to this example, it is possible to provide the wiring substrate 10 capable of always accurately transmitting and receiving light between the optical semiconductor element S and the optical fiber F.

  The present invention is not limited to an example of the above-described embodiment, and various modifications can be made without departing from the gist of the present invention. For example, in the above-described example of the embodiment, an optical semiconductor Although an example in which the present invention is applied to a wiring board on which elements are mounted is shown, the present invention may be applied to a wiring board on which other types of semiconductor elements other than optical semiconductor elements are mounted. In this case, the semiconductor element and a member such as a connector connected to the semiconductor element can be positioned and fixed with extremely high accuracy on the basis of the flat surface of the solder resist layer covering the outer peripheral side surface of the insulating substrate. In addition, it is possible to provide a wiring board capable of always accurately transmitting and receiving electrical signals between a semiconductor element and a semiconductor element and a connector connected thereto.

DESCRIPTION OF SYMBOLS 1 Insulation board 2 Connection pad 3 Solder resist layer 4 Opening part 10 Wiring board 11A Product area 11B Cutting allowance 11C Slit

Claims (2)

  A wiring board comprising a connection pad used for connection to the outside formed on the upper surface of the insulating substrate, and a solder resist layer having an opening that is deposited on the upper surface of the insulating substrate and exposes the connection pad. The solder resist layer covers at least a part of the outer peripheral side surface of the insulating substrate, and the surface of the portion covering the outer peripheral side surface is a flat surface formed by a photolithography technique simultaneously with the opening. A wiring board characterized by that.   A plurality of product regions to be wiring boards having connection pads used for connection to the outside on the upper surface are provided integrally with a cutting margin around the product region, and along the outer periphery of the product region. A step of providing a slit extending between the product region and the cutting allowance; and a photosensitive resin for a solder resist layer is deposited on the upper surface of the product region and the slit, and the photosensitive resin in the upper surface and the slit A step of forming a solder resist layer having a flat surface covering the side surface on the product region side in the slit and the opening that exposes the connection pad by simultaneously performing a photolithography technique, and cutting each cutting margin And a step of obtaining a plurality of wiring boards by making a product region independent.

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