JP5440427B2 - Semiconductor device and manufacturing method thereof - Google Patents

Description

  The present invention relates to a semiconductor device in which a semiconductor chip is electrically and thermally connected between a first heat radiating member and a second heat radiating member and sealed with a mold resin, and a manufacturing method thereof.

  Conventionally, for example, Patent Document 1 proposes a semiconductor device having a double-sided heat dissipation structure in which heat dissipation members are provided on both sides of a semiconductor chip and heat is released from both sides. Specifically, in Patent Document 1, the semiconductor chip is sandwiched and bonded to the heat dissipation member via the bonding member, and the heat dissipation surface opposite to the mounting surface to which the semiconductor chip is bonded is exposed in each heat dissipation member. In this way, a semiconductor chip and a pair of heat radiating members sealed with a mold resin have been proposed.

  The semiconductor device described above is manufactured as follows. First, a semiconductor chip is bonded onto one heat radiating member, and the other heat radiating member is bonded to the semiconductor chip so that the one heat radiating member and the other heat radiating member are spaced apart from each other. Next, the semiconductor chip sandwiched between the heat radiating members is placed in the mold such that the heat radiating surface of one heat radiating member is in contact with the mold. At this time, a gap is provided so that the heat radiating surface of the other heat radiating member does not contact the mold. This is because, when each heat radiating member is sandwiched and pressed with a mold, the force for pressing each heat radiating surface with the mold is directly transmitted to the semiconductor chip, and the elements of the semiconductor chip are destroyed. Thereafter, a mold resin is poured into the mold and cured.

  Subsequently, the resin burr of the mold resin formed in the gap between the heat radiation surface of the other heat radiation member and the mold is removed. In addition, the shape tolerance of the heat dissipating surface of each heat dissipating member, that is, the flatness of the heat dissipating surface, the parallelism of each heat dissipating surface, the positional relationship of each heat dissipating member, and the dimension control so that the thickness of the other heat dissipating member has the desired accuracy. I do. Thus, the semiconductor device is completed.

Japanese Patent No. 3525832

  However, in the above conventional technology, the heat radiation member is not sandwiched between the molds so that the semiconductor chip is not destroyed. Therefore, the resin burr of the mold resin formed on the heat radiation surface of the other heat radiation member is removed. Otherwise, a semiconductor device having a double-sided heat dissipation structure cannot be obtained.

  Further, when removing the resin burrs, a process for obtaining the shape tolerance of the heat radiating surface of each heat radiating member is required. For this reason, not only the assembly management of each heat radiating member to the semiconductor chip but also the shape tolerance for each heat radiating member must be managed with high accuracy.

  In view of the above points, the present invention provides a double-sided heat dissipation structure and a high-accuracy shape tolerance for the heat-dissipating member, even if the step of removing the resin burr of the mold resin and the step of obtaining a high-accuracy shape tolerance are unnecessary. The purpose is to obtain.

In order to achieve the above object, according to the first aspect of the present invention, a semiconductor device having a first surface (3) and a second surface (4) located on the opposite side of the first surface (3). The semiconductor chip (5, 6), the first heat dissipation member (9) electrically and thermally connected to the back surfaces (5a, 6a) of the semiconductor chip (5, 6), and the semiconductor chip (5 , 6) the second heat radiating member (10) electrically and thermally connected to the surface (5b, 6b), the first heat radiating member (9) and the second heat radiating member (10 ) are connected to the first surface ( 3) Mold resin (11) sealing the semiconductor chip (5, 6), the first heat radiating member (9), and the second heat radiating member (10) so as to be exposed on both the second surface (4) and the second surface (4). ).

The first heat radiating member (9) includes a first heat radiating surface (9a) exposed on the first surface (3), a second heat radiating surface (9b) exposed on the second surface (4), and a first The first mounting surface (9c) has an angle with respect to the heat radiating surface (9a) and the second heat radiating surface (9b), and the second heat radiating member (10) is exposed to the first surface (3). The fourth heat radiating surface (10b) exposed on the third heat radiating surface (10a) and the second surface (4), and the third heat radiating surface (10a) and the fourth heat radiating surface (10b) are angled with respect to each other. The back surface (5a, 6a) of the semiconductor chip (5, 6) is electrically and thermally connected to the first mounting surface (9c) of the first heat radiating member (9). , the surface (5b, 6b) of the semiconductor chip (5, 6), the second mounting surface of the second heat radiating member (10) (10c) are electrically and thermally connected, the first heat radiating part (9) and the second heat radiating member (10) are formed of the mold resin (10a) except for the first heat radiating surface (9a), the second heat radiating surface (9b), the heat radiating surface (10a), and the fourth heat radiating surface (10b). It is covered by 11) .

Thus, when manufacturing the semiconductor device, the first die (14) presses the portion where the first heat radiating member (9) and the second heat radiating member (10 ) are exposed to the first surface (3), The portion exposed to the second surface (4) can be pressed by the second mold (15). Therefore, it can be set as the structure which can apply the clamping force of each metal mold | die (14,15) only to each heat radiating member (9,10). Therefore, after pouring the mold resin (11) into the space formed by the molds (14, 15), the heat radiating members (9, 9) are placed on the first surface (3) and the second surface (4), respectively. Since the double-sided heat dissipation structure 10) is exposed, it is possible to eliminate the need to remove the resin burrs from the mold resin (11). Moreover, since the clamping force of each metal mold | die (14, 15) is not directly transmitted to a semiconductor chip (5, 6), destruction of a semiconductor chip (5, 6) can also be prevented.

  Furthermore, since the process of removing the resin burr is not required, the accuracy of the thickness dimension of the semiconductor device is such that the heat dissipating members (9, 10) exposed on both the first surface (3) and the second surface (4). It is determined by its dimensional accuracy. Accordingly, it is possible to manage the dimensions of the semiconductor device only by assembling and managing the heat dissipating members (9, 10) with respect to the semiconductor chip (5, 6). That is, for the dimension management of the shape tolerance, before assembling each heat radiating member (9, 10) and the semiconductor chip (5, 6), the thickness of each heat radiating member (9, 10), It is only necessary to manage the positional relationship of 10) and the flatness / parallelism accuracy of the heat dissipating members (9, 10). Therefore, even if a process for obtaining a highly accurate shape tolerance is not required, a semiconductor device having a structure with a highly accurate shape tolerance can be obtained for the heat dissipating members (9, 10).

  And even if each mounting surface (9c, 10c) is inclined with respect to each heat radiation surface (9a, 9b, 10a, 10b), a double-sided heat radiation structure can be obtained.

  In the invention described in claim 2, the first mounting surface (9c) is perpendicular to the first heat radiating surface (9a) and the second heat radiating surface (9b), and the second mounting surface (10c) is It is characterized by being perpendicular to the third heat radiating surface (10a) and the fourth heat radiating surface (10b).

Thereby, since a rectangular parallelepiped or a cubic thing can be used as each heat radiating member (9, 10), the dimension management of the shape tolerance of each heat radiating member (9, 10) can be performed easily.
According to a third aspect of the present invention, there is provided a semiconductor device having a first surface (3) and a second surface (4) located on the opposite side of the first surface (3). A chip (5, 6), a first heat dissipating member (9) electrically and thermally connected to the back surface (5a, 6a) of the semiconductor chip (5, 6), and a surface of the semiconductor chip (5, 6) The second heat radiating member (10) electrically and thermally connected to (5b, 6b), the first heat radiating member (9), and the second heat radiating member (10) are the first surface (3) and the second A mold resin (11) encapsulating the semiconductor chip (5, 6), the first heat dissipating member (9), and the second heat dissipating member (10) so as to be exposed on both surfaces (4) of The first heat radiating member (9) includes a first heat radiating surface (9a) exposed at the first surface (3) and a second heat radiating surface (9b) exposed at the second surface (4). The first heat dissipating surface (9a) and the second heat dissipating surface (9b) have a first mounting surface (9c) having an angle, and the second heat dissipating member (10) is formed on the first surface (3). The exposed third heat radiation surface (10a), the fourth heat radiation surface (10b) exposed on the second surface (4), and the third heat radiation surface (10a) and the fourth heat radiation surface (10b) have an angle. The back surface (5a, 6a) of the semiconductor chip (5, 6) is electrically and thermally connected to the first mounting surface (9c) of the first heat radiating member (9). The surfaces (5b, 6b) of the connected semiconductor chips (5, 6) are electrically and thermally connected to the second mounting surface (10c) of the second heat radiating member (10). 6) and a terminal (2) for electrically connecting the outside and the first surface (3) and the second surface (4) are connected to the terminal (2). Characterized in that it is a parallel direction parallel to the plane.

According to a fourth aspect of the present invention, in the method for manufacturing a semiconductor device according to the first or second aspect, the semiconductor chip (5, 6) is used as the first heat radiating member (9) and the second heat radiating member (10). Prepare the mounted one, and contact the surfaces (9a, 10a) exposed on the first surface (3) with the bottom of the recess (14a) in the first mold (14) having the recess (14a). Each of the molds (9b, 10b) exposed to the second surface (4) is brought into contact with the bottom of the recess (15a) at the bottom of the second mold (15) having the recess (15a). 14, 15), and mold resin (11) is poured into each mold (14, 15).

  Thereby, either of each heat radiating member (9, 10) can be clamped by pinching with each metal mold | die (14, 15). Thus, after molding the mold resin (11), it is possible to obtain a double-sided heat dissipation structure in which any of the heat dissipation members (9, 10) is exposed on the first surface (3) and the second surface (4). it can. Therefore, the resin burr removal process can be eliminated. Further, it is only necessary to manage the size tolerance of the heat radiation members (9, 10) exposed on the first surface (3) and the second surface (4), and after the molding resin (11) is molded, the heat radiation member ( 9 and 10), the process for obtaining the accuracy of the shape tolerance dimension can be eliminated. As described above, a semiconductor device having a double-sided heat dissipation structure having a highly accurate shape tolerance can be obtained.

Moreover, in invention of Claim 4 , as an 1st metal mold | die (14), the outer edge part of the surface (9a, 10a) exposed to the 1st surface (3) among each heat radiating member (9, 10). (9h, 10j) is used in such a manner that a recess (14b) is further provided at the bottom of the recess (14a), and each of the heat dissipating members (9, 10) is used as a second mold (15). Of these, use the one provided with a recess (15b) at the bottom of the recess (15a) so as to be in contact with the outer edges (9i, 10h) of the surfaces (9b, 10b) exposed on the second surface (4). It is characterized by.

  Thus, by reducing the contact area of each mold (14, 15) to the heat radiating member (9, 10), the load on each mold (14, 15) applied to the heat radiating member (9, 10) is reduced. Can be reduced. Moreover, the deformation | transformation of the heat radiating member (9, 10) by clamp force can be absorbed because a metal mold | die (14, 15) contacts the outer edge part (9h, 9i, 10j, 10h) of a heat radiating member (9, 10). it can.

In the invention according to claim 5 , as one or both of the first heat radiating member (9) and the second heat radiating member (10), the surface (9a, 10a) exposed to the first surface (3) and the first The surfaces (9b, 10b) exposed on the second surface (4) are the first surface (3) and the second surface (4) in the center of the first heat radiating member (9) and the second heat radiating member (10). ) That is larger than the cross-section parallel to ().

  Thereby, it is possible to prevent the clamping force from being applied to the central portions of the first heat radiating member (9) and the second heat radiating member (10), and to the heat radiating members (9, 10) and the semiconductor chip (5, 6). Can be reduced.

In the invention according to claim 6 , the first heat radiating member (9) has a first heat radiating surface (9a) exposed on the first surface (3) and a second surface smaller than the first heat radiating surface (9a). The second heat radiation member (10) has an L-shape having a second heat radiation surface (9b) exposed at (4), and the second heat radiation member (10) is exposed at the third heat radiation surface (10a). And a fourth heat dissipating surface (10b) exposed on the second surface (4) larger than the third heat dissipating surface (10a), and a semiconductor chip (5, 6, 16, 17) The first mounting surface (9e) on the opposite side of the first heat radiating surface (9a) of the first heat radiating member (9) is one back surface of the plurality of semiconductor chips (5, 6, 16, 17). Electrically and thermally connected to the second mounting surface (10) of the second heat dissipation member (10) opposite to the fourth heat dissipation surface (10b). Characterized in that it is electrically and thermally connected to).

  Thus, it can be set as the structure where both each heat radiating member (9,10) is exposed to a 1st surface (3) and a 2nd surface (4). Further, the position where the terminal (2) is arranged in the semiconductor device can be arranged on the mating surface of each mold (14, 15).

Furthermore, in the invention described in claim 6 , one of the plurality of semiconductor chips (5, 6 , 16 , 17) is at least relative to the second heat radiation surface (9b) of the first heat radiation member (9). Between the third mounting surface (9f) having an angle and the fourth mounting surface (10e) having an angle with respect to the fourth heat radiating surface (10b) of the second heat radiating member (10), and the first The fifth mounting surface (9g) having an angle with respect to the first heat radiating surface (9a) in the heat radiating member (9) and the angle with respect to the third heat radiating surface (10a) in the second heat radiating member (10). It is characterized by being electrically and thermally connected to any of the sixth mounting surfaces (10f).

  According to this, the third mounting surface that is not parallel to the first and fourth heat radiating surfaces (9a, 10b) of the semiconductor chip (16, 17) on which a diode element or the like that does not require connection of the terminal (2) is formed. (9f) or the sixth mounting surface (10f). In addition, since a plurality of semiconductor chips (5, 6, 16, 17) can be arranged at intervals, heat does not concentrate on each heat radiating member (9, 10), and heat dissipation is improved. Can do.

As in the invention described in claim 7 , the third mounting surface (9f) is the second heat radiating surface (9b), and the fourth mounting surface (10e) is the second heat radiating surface (10b). The fifth mounting surface (9g) may be perpendicular to the first heat dissipation surface (9a) and the sixth mounting surface (10f) may be perpendicular to the third heat dissipation surface (10a).

In the invention according to claim 8 , the semiconductor device has two semiconductor chips (5, 6), further has a third heat radiating member (18), and the second heat radiating member (10) is provided on the second mounting surface. The third mounting surface (10g) is provided on the opposite side of (10c), and the third heat radiating member (18) includes a fifth heat radiating surface (18a) exposed on the first surface (3) and a second surface. A fourth heat dissipating surface (18b) exposed in (4), a fourth heat dissipating surface (18a), and a fourth heat dissipating surface (18b) having a fourth mounting surface (18c), The heat radiating member (9), the second heat radiating member (10), and the third heat radiating member (18) are arranged in a straight line, and one back surface (5a) of the two semiconductor chips (5, 6) is the first. Electrically and thermally connected to the mounting surface (9c), and the surface (5b) is electrically and thermally connected to the second mounting surface (10c) The other back surface (6a) of the conductor chips (5, 6) is electrically and thermally connected to the third mounting surface (10g), and the surface (6b) is electrically and thermally connected to the fourth mounting surface (18c). It is characterized by being connected.

  Thereby, for example, it is possible to provide a semiconductor device in which semiconductor chips (5, 6) on which the same semiconductor elements are formed are connected in series. Further, the thickness of the semiconductor device can be the thickness of each heat dissipating member (9, 10, 18). Therefore, compared with the case where the front surface (5b, 6b) or the back surface (5a, 6a) of the semiconductor chip (5, 6) is arranged in parallel to each heat radiating surface (9a, 9b, 10a, 10b, 18a, 18b). In addition, the thickness of the semiconductor device can be reduced, and the semiconductor device can be reduced in size.

As in the ninth aspect of the invention, the fourth mounting surface (18c) can be provided perpendicular to the fifth heat radiating surface (18a) and the sixth heat radiating surface (18b). Thereby, a rectangular parallelepiped or a cube can be used as each heat radiating member (9, 10, 18), and management of shape tolerance can be facilitated.

In invention of Claim 10, it has two semiconductor chips (5, 6), and also has the 3rd heat dissipation member (18), and the 1st heat dissipation member (9) is the 1st surface. The first heat radiating surface (9a) exposed on (3), the second heat radiating surface (9b) exposed on the second surface (4), the first heat radiating surface (9a) and the second heat radiating surface (9b) The second heat dissipating member (10) has a third heat dissipating surface (10a) exposed on the first surface (3) and a third heat dissipating surface (10a). ) Having a second mounting surface (10c) having an angle with respect to the third heat radiating member (18), a fourth heat radiating surface (18b) exposed on the second surface (4), and a fourth heat radiating surface. A third mounting surface (18c) having an angle with respect to the surface (18b) is provided, and one back surface (5a) of the two semiconductor chips (5, 6) is electrically connected to the first mounting surface (9c). Oh The front surface (5b) is electrically and thermally connected to the second mounting surface (10c), and the other back surface (6a) of the two semiconductor chips (5, 6) is connected to the second mounting surface (10c). The third mounting surface (18c) is electrically and thermally connected, and the surface (6b) is electrically and thermally connected to the first mounting surface (9c).

  Thereby, a structure in which two semiconductor chips (5, 6) are connected in series can be obtained. In addition, the first heat radiating member (9) and the second heat radiating member (10) can be disposed close to each other, and the first heat radiating member (9) and the third heat radiating member (18) can be disposed close to each other. . For this reason, it can be set as a low inductance structure and a surge voltage can be reduced.

As in the invention described in claim 11 , the third heat radiating member (18) may have a structure having a fifth heat radiating surface (18a) exposed on the first surface (3). Thereby, since the clamping force by each metal mold | die (14, 15) can be supported by the 3rd heat radiating member (18), transmission of this clamping force to a semiconductor chip (5, 6) can be reduced.

The invention according to claim 12 is characterized in that the second heat radiating member (10) has a sixth heat radiating surface (10b) exposed on the second surface (4).

  Thereby, since each heat radiating surface (9a, 9b, 10a, 10b, 18a, 18b) of each heat radiating member (9, 10, 18) can be made parallel to the mating surface of each metal mold (14, 15), The thickness of the semiconductor device can be the thickness of each heat dissipation member (9, 10, 18). Therefore, the semiconductor device can be reduced in size.

In the invention described in claim 13 , the first mounting surface (9c) is perpendicular to the first heat radiating surface (9a) and the second heat radiating surface (9b), and the second mounting surface (10c) is The third mounting surface (18c) is perpendicular to the third heat radiating surface (10a), and the third mounting surface (18c) is perpendicular to the fourth heat radiating surface (18b).

  Thereby, a rectangular parallelepiped or a cube can be used as each heat radiating member (9, 10, 18), and management of shape tolerance can be facilitated.

In the invention described in claim 14 , the first heat radiating member (9) and the second heat radiating member (10) are exposed on both the first surface (3) and the second surface (4), and the semiconductor chip (5, 6) and a terminal (2) that electrically connects the outside, and the first heat radiating member (9) includes a surface (9c) on which the semiconductor chip (5, 6) is mounted and the surface The terminal (2) has an insulating layer (2a) in which a part of the terminal (2) is provided on the side surface of the terminal (2). The one end side (2b) is electrically connected to the semiconductor chip (5, 6) and the other end side (2c) is exposed from the mold resin (11). It is characterized by being electrically connected to the outside.

  Thereby, it is not necessary to have a structure in which the terminal (2) is complicatedly bent so that the terminal (2) is arranged on the mating surface of each mold (14, 15).

  In the invention according to claim 15, the elastic sheet (19) is disposed between the molds (14, 15), and the elastic sheet (19) is sandwiched between the molds (14, 15). The surface (9a, 10a) exposed on the surface (3) and the surface (9b, 10b) exposed on the second surface (4) are sandwiched.

  In the invention according to claim 16, an elastic sheet (9a, 10a) is provided between the bottom of the recess (14a) of the first mold (14) and the surface (9a, 10a) exposed on the first surface (3). 19) and an elastic sheet (19) is arranged between the bottom of the recess (15b) of the second mold (15) and the surfaces (9b, 10b) exposed on the second surface (4). It is characterized by that.

  According to the inventions of the fifteenth and sixteenth aspects, the clamping force of the mold (14, 15) can be absorbed by the elastic sheet (19), and the heat radiating member (9, 10) or the semiconductor chip (5, 6) can be reduced.

  In addition, the code | symbol in the bracket | parenthesis of each said means shows the correspondence with the specific means as described in embodiment mentioned later.

1 is an external view of a semiconductor device according to a first embodiment of the present invention. (A) is AA sectional drawing shown by FIG. 1, (b) is BB sectional drawing of (a). FIG. 2 is a diagram showing a process for manufacturing the semiconductor device shown in FIG. 1. It is the figure which showed the manufacturing process following FIG. (A) is a top view of the semiconductor device which concerns on 2nd Embodiment of this invention, (b) is CC sectional drawing of (a). (A) is a top view of the semiconductor device which concerns on 3rd Embodiment of this invention, (b) is DD sectional drawing of (a). (A) is a top view of the semiconductor device which concerns on 4th Embodiment of this invention, (b) is EE sectional drawing of (a). (A) is a top view of the semiconductor device which concerns on 5th Embodiment of this invention, (b) is FF sectional drawing of (a). (A) is a top view of the semiconductor device which concerns on 6th Embodiment of this invention, (b) is GG sectional drawing of (a). (A) is a top view of the semiconductor device which concerns on 7th Embodiment of this invention, (b) is HH sectional drawing of (a). (A) is a top view of the semiconductor device which concerns on 8th Embodiment of this invention, (b) is II sectional drawing of (a), (c) is JJ sectional drawing of (a). is there. (A) is the figure which showed the manufacturing process of the semiconductor device which concerns on 9th Embodiment of this invention, (b) is the top view which showed the part pressed down by the metal mold | die among each heat radiating member. It is a figure showing a manufacturing process of a semiconductor device concerning a 10th embodiment of the present invention. It is a figure showing a manufacturing process of a semiconductor device concerning an 11th embodiment of the present invention. It is a figure showing a manufacturing process of a semiconductor device concerning a 12th embodiment of the present invention. It is the figure which showed the manufacturing process of the semiconductor device which concerns on other embodiment. It is sectional drawing of the semiconductor device which concerns on other embodiment. It is sectional drawing of the semiconductor device which concerns on other embodiment. It is sectional drawing of the semiconductor device which concerns on other embodiment. It is sectional drawing of the semiconductor device which concerns on other embodiment. It is sectional drawing of the semiconductor device which concerns on other embodiment.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the following embodiments, the same or equivalent parts are denoted by the same reference numerals in the drawings. In addition, the second embodiment, the third embodiment, and the sixth embodiment among the following embodiments from the first embodiment to the other embodiments are used as reference examples.

(First embodiment)
Hereinafter, a first embodiment of the present invention will be described with reference to the drawings. The semiconductor device shown in this embodiment is used for inverter control of a hybrid vehicle, for example.

  FIG. 1 is an external view of a semiconductor device according to the first embodiment of the present invention. 2A is a cross-sectional view taken along the line AA in FIG. 1, and FIG. 2B is a cross-sectional view taken along the line BB in FIG. 2A.

  As shown in FIG. 1, the external appearance of the semiconductor device 1 has a chip shape, and the semiconductor device 1 has a terminal 2 for electrical connection to the outside. Further, as shown in FIG. 2A, the semiconductor device 1 has a first surface 3 and a second surface 4 located on the opposite side of the first surface 3.

  As shown in FIGS. 2A and 2B, the semiconductor device 1 includes a first semiconductor chip 5, a second semiconductor chip 6, a first terminal 7, a second terminal 8, a first heat dissipation member 9, A second heat radiating member 10 and a mold resin 11 are provided.

  Each of the semiconductor chips 5 and 6 is formed with semiconductor elements such as IGBTs, MOS transistors, and diodes, and is formed with electrodes to be soldered on the front and back of the chip.

  The terminals 7 and 8 are for electrically and thermally connecting the second heat radiating member 10 and the semiconductor chips 5 and 6. Therefore, each terminal 7 and 8 has a function as wiring and a function as a heat dissipation block. Such terminals 7 and 8 are formed by pressing a metal plate such as Cu (pure copper).

  Each heat radiating member 9, 10 serves as a heat sink that releases heat generated in each semiconductor chip 5, 6 to the outside of the semiconductor device 1, and an electrode for electrically connecting each semiconductor chip 5, 6 to the outside. As a role.

  The first heat radiating member 9 includes a first heat radiating surface 9 a exposed on the first surface 3 of the semiconductor device 1, a second heat radiating surface 9 b exposed on the second surface 4, a first heat radiating surface 9 a and a second heat radiating surface. The first mounting surface 9c is perpendicular to 9b. The second heat radiating member 10 has a third heat radiating surface 10a exposed on the first surface 3, a fourth heat radiating surface 10b exposed on the second surface 4, and the third heat radiating surface 10a and the fourth heat radiating surface 10b. It has a vertical second mounting surface 10c.

  Each heat radiating member 9 and 10 is obtained by, for example, pressing a metal plate, and is pressed into a plate shape or a block shape. That is, as each heat radiating member 9, 10, a rectangular parallelepiped or a cube can be used. Thereby, as each heat radiating member 9,10, a thing with high shape accuracy is obtained, and management of dimensional accuracy becomes easy. That is, the thickness of each heat radiating member 9, 10 in the semiconductor device 1, the positional relationship between each heat radiating member 9, 10, and the flatness / parallelism accuracy of each heat radiating member 9, 10 are the same as each heat radiating member 9, 10 itself. It is almost determined by accuracy.

  Moreover, the material of each heat radiating member 9 and 10 and each terminal 7 and 8 should just be the material excellent in electroconductivity at least, and Cu, Al, or those alloy systems are employ | adopted. Of the heat dissipating members 9, 10, the mounting surfaces 9c, 10c may be Ni-plated or Au-plated if necessary as a surface treatment such as soldering.

  The semiconductor chips 5 and 6, the terminals 7 and 8, and the heat dissipating members 9 and 10 are electrically and thermally connected by a joining member 12 such as solder. Specifically, the back surface 5 a of the first semiconductor chip 5 is bonded to the first mounting surface 9 c of the first heat dissipation member 9 via the bonding member 12, and the front surface 5 b of the first semiconductor chip 5 is bonded via the bonding member 12. The first terminal 7 is joined. The first terminal 7 is joined to the second mounting surface 10 c of the second heat radiating member 10 via the joining member 12. A silver paste or the like may be used as the joining member 12.

  On the other hand, the back surface 6a of the second semiconductor chip 6 is bonded to the first mounting surface 9c of the first heat dissipation member 9 via the bonding member 12, and the front surface 6b of the second semiconductor chip 6 is bonded to the second terminal via the bonding member 12. 8 is joined. The second terminal 8 is joined to the second mounting surface 10 c of the second heat radiating member 10 via the joining member 12.

  The mold resin 11 is an appearance of the semiconductor device 1. In the mold resin 11, the first heat radiating surface 9 a of the first heat radiating member 9 and the third heat radiating surface 10 a of the second heat radiating member 10 are exposed from the first surface 3 of the semiconductor device 1. Each of the semiconductor chips 5 and 6, each of the terminals 7 and 8, and each of the heat dissipation so that the second heat dissipation surface 9 b and the fourth heat dissipation surface 10 b of the second heat dissipation member 10 are exposed from the second surface 4 of the semiconductor device 1. The members 9 and 10 are sealed. As a material of the mold resin 11, for example, an epoxy resin is employed. The above is the overall configuration of the semiconductor device 1 according to the present embodiment.

  Next, a method for manufacturing the semiconductor device 1 shown in FIG. 1 will be described with reference to FIGS. The left side of FIG. 3 is a cross-sectional view corresponding to the BB cross section, and the right side of FIG. 3 is a view of the left side as viewed from the right.

  First, the semiconductor chips 5 and 6, the terminals 7 and 8, the heat dissipating members 9, 10 and the terminal 2 for external connection are prepared. About each heat radiating member 9, 10, the thing with the high precision of the dimension tolerance dimension is prepared. That is, the thickness of each heat radiating member 9, 10 in the semiconductor device 1, the positional relationship between each heat radiating member 9, 10, and the flatness / parallelism accuracy of each heat radiating member 9, 10 are prepared by pressing or the like. To do.

  3A, the first semiconductor chip 5 and the second semiconductor chip 6 are mounted on the first mounting surface 9c of the first heat radiation member 9 via the bonding member 12, and each of the semiconductor chips 5, Each terminal 7 and 8 is mounted on 6 respectively. A joining member 12 for connecting to the second heat radiation member 10 is provided on each terminal 7, 8. This mounted product is fixed to a jig (not shown) together with the terminal 2 for external connection.

  In the step shown in FIG. 3B, the semiconductor chips 5 and 6 and the terminal 2 are connected by bonding wires 13.

  Subsequently, in the step shown in FIG. 3C, the second heat radiating member 10 is joined to the terminals 7 and 8 via the joining members 12 using a jig (not shown). At this time, the first heat radiating surface 9a of the first heat radiating member 9 and the third heat radiating surface 10a of the second heat radiating member 10 are aligned on one plane, and the second heat radiating surface 9b of the first heat radiating member 9 The assembly management is performed so that the fourth heat radiating surface 10b of the second heat radiating member 10 is aligned on one plane.

  As the assembly management, the distance between the first and third heat radiating surfaces 9a and 10a exposed on the first surface 3 of the semiconductor device 1 and the second and fourth heat radiating surfaces 9b and 10b exposed on the second surface 4, That is, the thickness management of the semiconductor device 1 and the flatness management of the heat radiation surfaces 9a, 9b, 10a, and 10b are also performed. This assembly management is the accuracy of the shape tolerance of the semiconductor device 1.

  Thereafter, in the step shown in FIG. 4, the mold resin 11 is formed. First, a first mold 14 having a recess 14a and a second mold 15 having a recess 15a are prepared. And what was obtained at the process shown in FIG.3 (c) is arrange | positioned in the bottom part of the recessed part 14a of the 1st metal mold | die 14 in contact with each heat radiating surface 9a, 10a exposed to the 1st surface 3. FIG. . Next, the heat radiating surfaces 9 b and 10 b exposed to the second surface 4 are brought into contact with the bottom of the concave portion 15 a of the second mold 15 and sandwiched between the molds 14 and 15. The external connection terminal 2 is sandwiched between the mating surfaces of the molds 14 and 15.

  Subsequently, as shown in FIG. 4, the second mold 15 is clamped to the first mold 14 in the direction of the arrow. At this time, the clamping force of the molds 14 and 15 is directly applied to the heat radiating members 9 and 10, but is not directly transmitted to the semiconductor chips 5 and 6, so that the semiconductor chips 5 and 6 are destroyed by the clamping force. It will never be done.

  Then, the mold resin 11 is poured into the internal spaces of the molds 14 and 15, and the mold resin 11 is cured, thereby completing the semiconductor device 1 shown in FIG.

  As described above, in the present embodiment, the heat radiating surfaces 9a, 9b, 10a, and 10b of the heat radiating members 9 and 10 are exposed on the first surface 3 and the second surface 4 of the semiconductor device 1, and each heat radiated. The semiconductor chips 5 and 6 are mounted on mounting surfaces 9c and 10c perpendicular to the surfaces 9a, 9b, 10a, and 10b.

  According to this, when the semiconductor device 1 is manufactured, the clamping force of the molds 14 and 15 is applied only to the heat radiating members 9 and 10, so that the compressive force of the heat radiating members 9 and 10 is applied to the semiconductor chips 5 and 6. You can avoid joining. Moreover, since a double-sided heat dissipation structure is obtained after molding the mold resin 11, resin burr processing can be eliminated.

  Furthermore, the thickness dimension of the semiconductor device 1 is determined only by the thickness dimension of the heat dissipating members 9 and 10. Therefore, for dimensional management, before assembling the heat radiating members 9, 10 and the semiconductor chips 5, 6, the thickness of each heat radiating member 9, 10 as the shape tolerance, the positional relationship between the heat radiating members 9, 10; It is only necessary to manage the accuracy of the flatness / parallelism of the heat dissipating members 9, 10 and the dimensional management becomes easy. That is, it is possible to eliminate a step for obtaining accuracy of shape tolerance after the molding resin 11 is molded.

  Therefore, the semiconductor device 1 having a double-sided heat dissipation structure can be obtained without the need for the process of removing the resin burr of the mold resin 11 and the process of obtaining a high-accuracy shape tolerance. Accurate shape tolerances can be obtained.

  As described above, since the step of removing the resin burr is unnecessary, when molding the mold resin 11, the extra mold resin 11 is not necessary. In addition, the process of grinding the excess mold resin 11 to ensure the accuracy of the shape tolerance becomes unnecessary. As described above, the manufacturing cost can be reduced.

(Second Embodiment)
FIG. 5A is a plan view of the semiconductor device 1 according to this embodiment, and FIG. 5B is a cross-sectional view taken along the line CC in FIG. As shown in FIG. 5B, the first heat radiating member 9 includes a first heat radiating surface 9a exposed on the first surface 3 and a second heat radiating surface 9b exposed on the second surface 4. Further, the second heat radiating surface 9b has two concave portions 9d recessed on the first heat radiating surface 9a side. The semiconductor device 1 includes third and fourth semiconductor chips 16 and 17.

  Surfaces 5b and 6b of the first and second semiconductor chips 5 and 6 are electrically and thermally connected to the bottom of one recess 9d in the same manner as in the first embodiment. The back surfaces 5a and 6a of the first and second semiconductor chips 5 and 6 are electrically and thermally connected to the second heat radiating member 10 disposed in the recess 9d in the same manner as in the first embodiment. .

  The back surfaces 16a and 17a of the third and fourth semiconductor chips 16 and 17 are electrically and thermally connected to the bottom of the other concave portion 9d as in the first embodiment. Further, the second heat radiating member 10 disposed in the recess 9d is electrically and thermally connected to the surfaces 16b and 17b of the third and fourth semiconductor chips 16 and 17 in the same manner as in the first embodiment. .

  A part of the second heat radiating member 10 disposed in each recess 9 d is exposed on the second surface 4. Thus, it is sufficient that at least one of the first heat radiating member 9 and the second heat radiating member 10 is exposed on both the first surface 3 and the second surface 4, and the first heat radiating member 9 is the first heat radiating member 9. Since it is exposed to both the surface 3 and the second surface 4, the second heat radiating member 10 may not be exposed to both the first surface 3 and the second surface 4.

  In the semiconductor device 1 configured as described above, since the first heat radiating member 9 is exposed on both the first surface 3 and the second surface 4 of the semiconductor device 1, the first heat radiating member 9 is attached to each mold 14, 15, the mold resin 11 can be molded. That is, only the shape accuracy of the first heat radiating member 9 is required for dimensional management of the semiconductor device 1. For this reason, it is possible to eliminate the process of removing the resin burr and the process of obtaining the dimensional accuracy of the shape tolerance of the semiconductor device 1 after the molding resin 11 is molded.

  In addition, the front and back surfaces of the semiconductor chips 5, 6, 16, and 17 can be arranged in parallel to the heat dissipation surfaces 9 a and 9 b of the first heat dissipation member 9. Thereby, the external connection terminal 2 connected to each semiconductor chip 5, 6, 16, 17 can be arranged on the mating surface of each mold 14, 15. For this reason, it is not necessary to perform a complicated bending process as shown in FIG. 3 on the terminal 2, and the installation of the terminal 2 becomes easy.

  Further, the heat dissipation is superior to the conventional technique (Japanese Patent Laid-Open No. 2004-296663). Since each semiconductor chip 5, 6, 16, and 17 can be disposed at substantially the center in the thickness direction of the semiconductor device 1, the first surface 3 or the second surface is formed from each semiconductor chip 5, 6, 16, 17. It can arrange | position so that the distance to the surface 4 may become the shortest, and can shorten a thermal radiation path | route. Further, the heat generated in each of the semiconductor chips 5, 6, 16, and 17 can be linearly transmitted to the first surface 3 and the second surface 4. On the other hand, in the prior art, a relay member that serves both as heat dissipation and an electrode is sandwiched between the elements, and heat resistance rises due to the inflow of heat from the front and back of the relay member. Further, the relay member heat dissipation path (distance from the element to the heat dissipation surface) is longer than that of the present plan. Therefore, the present plan can further improve the heat dissipation compared with the prior art.

(Third embodiment)
6A is a plan view of the semiconductor device 1 according to the present embodiment, and FIG. 6B is a cross-sectional view taken along the line DD of FIG. 6A. In this embodiment, the 1st heat radiating member 9 has the 1st heat radiating surface 9a exposed to the 1st surface 3, and the 2nd heat radiating surface 9b exposed to the 2nd surface 4 smaller than the 1st heat radiating surface 9a. It is L-shaped. Similarly, the 2nd heat radiating member 10 has L shape which has the 3rd heat radiating surface 10a exposed to the 1st surface 3, and the 4th heat radiating surface 10b exposed to the 2nd surface 4 larger than the 3rd heat radiating surface 10a. It has a shape.

  The back surfaces 5a and 6a of the first and second semiconductor chips 5 and 6 are electrically and thermally connected to the first mounting surface 9e on the opposite side of the first heat radiating surface 9a of the first heat radiating member 9, The surfaces 5b and 6b are electrically and thermally connected to the second mounting surface 10d of the second heat radiating member 10 opposite to the fourth heat radiating surface 10b.

  In such a structure, as in the second embodiment, the position of the terminal 2 for external connection in the semiconductor device 1 can be arranged on the mating surfaces of the molds 14 and 15. Of course, since each heat radiating member 9 and 10 is exposed to both the 1st surface 3 and the 2nd surface 4 of the semiconductor device 1, the dimension control of the semiconductor device 1 can be performed only with the accuracy of each heat radiating member 9 and 10. It becomes possible to manage.

(Fourth embodiment)
In the present embodiment, only different parts from the third embodiment will be described. FIG. 7A is a plan view of the semiconductor device 1 according to this embodiment, and FIG. 7B is a cross-sectional view taken along line EE of FIG. 7A.

  In the present embodiment, third and fourth semiconductor chips 16 and 17 are provided in addition to the first and second semiconductor chips 5 and 6. The back surface 16 a of the third semiconductor chip 16 is electrically and thermally connected to the third mounting surface 9 f perpendicular to the second heat radiating surface 9 b of the first heat radiating member 9, and the front surface 16 b is the second of the second heat radiating member 10. Electrically and thermally connected to a fourth mounting surface 10e perpendicular to the four heat radiating surfaces 10b.

  The back surface 17a of the fourth semiconductor chip 17 is electrically and thermally connected to the fifth mounting surface 9g perpendicular to the first heat radiating surface 9a of the first heat radiating member 9, and the front surface 17b is the second heat radiating member. 10 is electrically and thermally connected to a sixth mounting surface 10f perpendicular to the third heat radiating surface 10a.

  As described above, the third and fourth semiconductor chips 16 and 17 are used for external connection between the third and fourth mounting surfaces 9f and 10e and between the fifth and sixth mounting surfaces 9g and 10f. A device in which a diode element or the like that does not require connection of the terminal 2 is formed can be disposed. On the other hand, for the first and second semiconductor chips 5 and 6 formed with semiconductor elements such as IGBTs that need to be connected to the terminal 2 for external connection, the first and second parallel to the mating surfaces of the molds 14 and 15 are provided. If it mounts on the 2nd mounting surface 9e, 10d, arrangement | positioning of the terminal 2 will become easy.

  Further, since the semiconductor chips 5, 6, 16, and 17 can be arranged with a space therebetween, heat does not concentrate on the heat radiating members 9 and 10. Therefore, the heat dissipation of the semiconductor device 1 can be improved.

(Fifth embodiment)
FIG. 8A is a plan view of the semiconductor device 1 according to this embodiment, and FIG. 8B is a cross-sectional view taken along line FF in FIG. 8A. As shown in FIG. 8B, the semiconductor device 1 includes three heat radiating members 9, 10, 18 and two semiconductor chips 5, 6.

  Each heat radiating member 9,10,18 is arrange | positioned on the straight line. The first heat radiating surface 9 a of the first heat radiating member 9, the third heat radiating surface 10 a of the second heat radiating member 10, and the fifth heat radiating surface 18 a of the third heat radiating member 18 are exposed on the first surface 3 of the semiconductor device 1. ing. Further, the second heat radiating surface 9 b of the first heat radiating member 9, the fourth heat radiating surface 10 b of the second heat radiating member 10, and the sixth heat radiating surface 18 b of the third heat radiating member 18 are formed on the second surface 4 of the semiconductor device 1. Exposed.

  The back surface 5 a of the first semiconductor chip 5 is electrically and thermally connected to the first mounting surface 9 c perpendicular to the first heat radiating surface 9 a of the first heat radiating member 9, and the surface 5 b is the second of the second heat radiating member 10. The first mounting surface 9c is electrically and thermally connected to the second mounting surface 10c.

  On the other hand, the back surface 6a of the second semiconductor chip 6 is electrically and thermally connected to the third mounting surface 10g on the opposite side of the second mounting surface 10c of the second heat radiating member 10, and the front surface 6b is the third heat radiating member 18. Among these, it is electrically and thermally connected to the fourth mounting surface 18c facing the third mounting surface 10g.

  In such a structure, the semiconductor chips 5 and 6 on which the same semiconductor element is formed can be connected in series. Moreover, since the thickness of each heat radiating member 9, 10, 18 becomes the thickness of the semiconductor device 1, the semiconductor device 1 can be downsized.

(Sixth embodiment)
FIG. 9A is a plan view of the semiconductor device 1 according to the present embodiment, and FIG. 9B is a cross-sectional view taken along line GG in FIG. 9A.

  In the present embodiment, the semiconductor device 1 includes two semiconductor chips 5 and 6, and includes a third heat dissipation member 18 in addition to the first and second heat dissipation members 9 and 10.

  The first heat dissipating member 9 includes a first heat dissipating surface 9a exposed on the first surface 3 of the semiconductor device 1, a second heat dissipating surface 9b exposed on the second surface 4 of the semiconductor device 1, and a first heat dissipating surface 9a. The first mounting surface 9c is perpendicular to the second heat radiating surface 9b. The second heat radiating member 10 has a third heat radiating surface 10a exposed on the first surface 3 of the semiconductor device 1 and a second mounting surface 10c perpendicular to the third heat radiating surface 10a. The third heat radiating member 18 has a fourth heat radiating surface 18b exposed on the second surface 4 of the semiconductor device 1 and a third mounting surface 18c perpendicular to the fourth heat radiating surface 18b.

  The back surface 5a of the first semiconductor chip 5 is electrically and thermally connected to the first mounting surface 9c, and the front surface 5b is electrically and thermally connected to the second mounting surface 10c. 6 is electrically and thermally connected to the third mounting surface 18c, and the front surface 6b is electrically and thermally connected to the first mounting surface 9c.

  Thereby, the current paths of the third heat radiating member 18, the second semiconductor chip 6, the first heat radiating member 9, the first semiconductor chip 5, and the second heat radiating member 10 can be formed. That is, as in the fifth embodiment, it is possible to configure the semiconductor device 1 in which a plurality of semiconductor elements are arranged in series. Moreover, since the 2nd, 3rd heat radiating members 10 and 18 and the 1st heat radiating member 9 can be arrange | positioned closely, it can be set as a low inductance structure and a surge voltage can be reduced.

(Seventh embodiment)
In the present embodiment, only parts different from the sixth embodiment will be described. FIG. 10A is a plan view of the semiconductor device 1 according to the present embodiment, and FIG. 10B is a cross-sectional view taken along line HH in FIG.

  In the present embodiment, as shown in FIG. 10B, the third heat radiating member 18 has a fifth heat radiating surface 18 a that is exposed on the first surface 3 of the semiconductor device 1. Therefore, the semiconductor device 1 shown in FIG. 10 has a structure in which the first and third heat radiation members 9 and 18 are both exposed on the first surface 3 and the second surface 4 of the semiconductor device 1. Thereby, since the clamping force by each metal mold | die 14 and 15 can be supported by the 1st, 3rd heat radiating members 9 and 18, transmission of this clamping force to each semiconductor chip 5 and 6 can be reduced.

(Eighth embodiment)
In the present embodiment, only parts different from the sixth and seventh embodiments will be described. 11A is a plan view of the semiconductor device 1 according to the present embodiment, FIG. 11B is a cross-sectional view taken along the line II in FIG. 11A, and FIG. 11C is J in FIG. -J sectional drawing.

  In the present embodiment, the second heat radiating member 10 further has a sixth heat radiating surface 10 b exposed on the second surface 4 of the semiconductor device 1. In addition, the connection form with respect to each heat radiating member 9,10,18 of each semiconductor chip 5 and 6 is the same as 6th, 7th embodiment.

  According to this, as shown in FIG. 11A, all of the first to third heat radiating members 9, 10, 18 are arranged in one plane. For this reason, since the thickness of the semiconductor device 1 can be made into the thickness of each heat radiating member 9,10,18, the semiconductor device 1 can be reduced in size.

(Ninth embodiment)
In the present embodiment, only parts different from the first to eighth embodiments will be described. FIG. 12A is a view showing a manufacturing process of the semiconductor device 1 according to this embodiment, and FIG. 12B shows a portion of each heat dissipating member 9, 10 that is pressed against the second mold 15. It is the top view shown by the oblique line. Hereinafter, the semiconductor device 1 shown in FIG. 2 will be described as an example.

  As shown in FIG. 12A, the first mold 14 is arranged so that the first die 14 is in contact with the outer edge portions 9 h and 10 j of the heat radiating surfaces 9 a and 10 a exposed on the first surface 3 of the semiconductor device 1. A recess 14 b is further provided at the bottom of the recess 14 a of the mold 14. The second mold 15 further has a recess 15b at the bottom of the recess 15a so as to be in contact with the outer edge portions 9i and 10h of the heat radiation surfaces 9b and 10b exposed on the second surface 4 of the semiconductor device 1. .

  Thereby, for example, outer edge portions 9i and 10h as shown by hatched portions in FIG. According to this, since the contact area of the molds 14 and 15 to the heat dissipation members 9 and 10 is reduced, the load on the molds 14 and 15 applied to the heat dissipation members 9 and 10 and the semiconductor chips 5 and 6 is reduced. It becomes possible to do. Moreover, since each metal mold | die 14 and 15 contacts each outer edge part 9h, 9i, 10j, 10h instead of each heat radiating member 9,10, each metal mold | die 14,15 deform | transforms the heat radiating member 9,10 by clamp force. Can be absorbed.

(10th Embodiment)
In the present embodiment, only parts different from the ninth embodiment will be described. FIG. 13 is a diagram illustrating a manufacturing process of the semiconductor device 1 according to the present embodiment. Hereinafter, the semiconductor device 1 shown in FIG. 2 will be described as an example.

  The first mold 14 shown in FIG. 4 is used, and the second mold 15 shown in FIG. 12 is used.

  When the semiconductor device 1 shown in FIG. 2 is manufactured, the heat radiating members 9 and 10 are exposed to the heat radiating surfaces 9a and 10a and the second surface 4 exposed to the first surface 3 of the semiconductor device 1. The heat radiation surfaces 9b and 10b to be used are made larger than the cross section parallel to the first surface 3 and the second surface 4 at the center of each heat radiation member 9 and 10.

  According to this, as shown in FIG. 13, the cross section of each heat radiation member 9, 10 perpendicular to the bottom surface of each mold 14, 15 is H-shaped, and each heat radiation surface 9 b, 10 b The outer edge portions 9i and 10h are protruded from the central portions of the heat dissipating members 9 and 10, respectively.

  Therefore, the bottom of the second mold 15 contacts the heat radiating surfaces 9 b and 10 b protruding from the main body of the heat radiating members 9 and 10 among the heat radiating members 9 and 10. For this reason, the clamping force applied to each heat radiating member 9, 10 can be further reduced as compared with the case shown in FIG. Thereby, the burden to each heat radiating member 9,10 and the semiconductor chips 5 and 6 can further be reduced.

  In FIG. 13, only the second mold 15 is provided with the recess 15 b, but the first mold 14 may be provided with the recess 14 b.

(Eleventh embodiment)
FIG. 14 is a diagram showing a manufacturing process of the semiconductor device 1 according to the present embodiment. Hereinafter, the semiconductor device 1 shown in FIG. 2 will be described as an example.

  As shown in FIG. 14, when the semiconductor chips 5 and 6 are mounted on the heat radiating members 9 and 10 and then placed on the molds 14 and 15, an elastic sheet 19 is interposed between the molds 14 and 15. Deploy. Accordingly, the heat radiating surfaces 9 a and 10 a exposed on the first surface 3 and the heat radiating surfaces 9 b and 10 b exposed on the second surface 4 are sandwiched between the molds 14 and 15 while sandwiching the elastic sheet 19.

  At this time, the elastic sheet 19 is elastically deformed by being sandwiched between the molds 14 and 15, and the end 19 a is projected into the recesses 14 a and 15 a of the molds 14 and 15. After molding the mold resin 11, the semiconductor device 1 is completed by removing the end 19a of the elastic sheet 19 embedded in the mold resin 11.

  As described above, by disposing the elastic sheet 19 between the molds 14 and 15 and absorbing the clamping force of the molds 14 and 15, the heat radiating members 9 and 10 and the semiconductor chips 5 and 6 can be obtained. Can reduce the load.

(Twelfth embodiment)
In the present embodiment, only parts different from the eleventh embodiment will be described. FIG. 15 is a diagram illustrating a manufacturing process of the semiconductor device 1 according to the present embodiment. As shown in FIG. 15, an elastic sheet 19 is disposed between the bottom of the recess 14 a of the first mold 14 and the heat radiating surfaces 9 a and 10 a exposed on the first surface 3, and the second mold 15 The elastic sheet 19 is disposed between the bottom of the recess 15b and the heat radiating surfaces 9b and 10b exposed on the second surface 4.

  Thereby, the heat radiating members 9 and 10 are sandwiched between the elastic sheets 19. In this state, the molds 14 and 15 are clamped to mold the mold resin 11.

  As described above, since the elastic sheet 19 absorbs the clamping force by directly sandwiching the heat radiating members 9 and 10 with the elastic sheet 19, the load on the heat radiating members 9 and 10 and the semiconductor chips 5 and 6 is reduced. can do.

(Other embodiments)
About each said embodiment, you may implement combining each.

  In the first embodiment, the two semiconductor chips 5 and 6 are mounted on the semiconductor device 1, but only one or three or more may be mounted.

  In the second embodiment, two recesses 9d are provided in the first heat dissipation member 9, but only one recess 9d may be provided, or three or more recesses 9d may be provided. Also, the front and back orientation of the first semiconductor chip 5 mounted in the recess 9d can be freely set according to the design.

  In the ninth embodiment, both molds 14 and 15 are provided with recesses 14b and 15b in which the bottoms of the recesses 14a and 15a are further recessed. Only one of them may be provided.

  In the ninth to thirteenth embodiments, the semiconductor device 1 shown in FIG. 2 is described, but the same applies to the manufacture of each semiconductor device 1 shown in FIGS.

  In the eleventh embodiment, the end portion 19a of the elastic sheet 19 is buried in the mold resin 11. However, as shown in FIG. 16, the end portion 19a of the elastic sheet 19 is the recess 14a of each mold 14, 15. , 15a, the end 19a of the elastic sheet 19 can be prevented from being buried in the mold resin 11.

  In each of the above embodiments, the case where the heat dissipation surface and the mounting surface are perpendicular to each other or the case where the heat dissipation surface and the mounting surface are parallel to each other has been described. However, the mounting surface is inclined to the heat dissipation surface. May be. FIG. 17 is a cross-sectional view of the semiconductor device 1 in which the mounting surface is inclined with respect to the heat dissipation surface. As shown in FIG. 17, the first heat radiating member 9 has a first mounting surface 9c having an angle with respect to the first heat radiating surface 9a and the second heat radiating surface 9b. It has the 2nd mounting surface 10c with an angle with respect to the 3 heat radiating surface 10a and the 4th heat radiating surface 10b.

  The back surface 5 a of the first semiconductor chip 5 is electrically and thermally connected to the first mounting surface 9 c of the first heat dissipation member 9, and the front surface 5 b of the first semiconductor chip 5 is the second heat dissipation member 10. 2 It is electrically and thermally connected to the mounting surface 10c. Thus, even if each mounting surface 9c, 10c inclines with respect to each heat radiating surface 9a, 9b, 10a, 10b, it can be set as a double-sided heat radiating structure.

  In each of the above embodiments, for example, in the semiconductor device 1 shown in FIG. 2 and FIG. 8 and the like, since the heat radiation surface and the mounting surface are vertical, the mounting of the terminal 2 is complicated. Therefore, as shown in FIG. 18, in the first heat radiating member 9, a through hole 9k that penetrates the mounting surface 9c on which the first semiconductor chip 5 is mounted and the surface 9j on the opposite side of the mounting surface 9c is provided. Pass Terminal 2 through 9k. By providing the insulating layer 2a on the side surface of the terminal 2 disposed in the through hole 9k, the first heat radiating member 9 and the terminal 2 are insulated and fixed by the insulating layer 2a. The one end side 2b of the terminal 2 is electrically connected to the first semiconductor chip 5 by the wire 13, and the other end side 2c is exposed from the mold resin 11 and is electrically connected to the outside. Yes. Thereby, it is not necessary to have a structure in which the terminal 2 is complicatedly bent so that the terminal 2 is arranged on the mating surfaces of the molds 14 and 15.

  As shown in FIG. 19, through holes 9 m and 10 i can be provided in the heat radiating members 9 and 10 in a direction parallel to the surface 5 b of the first semiconductor chip 5. A refrigerant such as air, oil, or cooling water can be passed through each of the through holes 9m and 10i, and the cooling efficiency of the semiconductor device 1 can be improved.

  On the other hand, as shown in FIG. 20, an insulating pipe 20 extending in a direction perpendicular to the surface 5b of the first semiconductor chip 5 and extending through each heat radiating member 9, 10 is provided in each heat radiating member 9, 10. A refrigerant can also be passed through 20.

  FIG. 21 is a cross-sectional view parallel to the first surface 3 and the second surface 4 of the semiconductor device 1. As shown in this figure, the semiconductor device 1 has a plurality of block-shaped heat radiation members 21. The semiconductor chip 5 is electrically and thermally connected between the heat radiating members 21. This is the same as the configuration in which, for example, the semiconductor device 1 shown in FIG. 8 is expanded in the surface direction of the first surface 3. As described above, the semiconductor device 1 may be configured by arranging a plurality of heat dissipating members 21 in the surface direction.

DESCRIPTION OF SYMBOLS 1 Semiconductor device 3 1st surface 4 2nd surface 5 1st semiconductor chip 5a Back surface of 1st semiconductor chip 5b Front surface of 1st semiconductor chip 6 2nd semiconductor chip 6a Back surface of 2nd semiconductor chip 6b 2nd semiconductor chip Surface 9 First heat radiating member 10 Second heat radiating member 11 Mold resin

Claims (16)

A semiconductor device having a first surface (3) and a second surface (4) located on the opposite side of the first surface (3),
A semiconductor chip (5, 6);
A first heat dissipating member (9) electrically and thermally connected to the back surface (5a, 6a) of the semiconductor chip (5, 6);
A second heat dissipating member (10) electrically and thermally connected to the surface (5b, 6b) of the semiconductor chip (5, 6);
The semiconductor chip (5, 6) so that the first heat radiating member (9) and the second heat radiating member (10 ) are exposed on both the first surface (3) and the second surface (4). ), The first heat radiating member (9), and the mold resin (11) sealing the second heat radiating member (10),
The first heat dissipation member (9) includes a first heat dissipation surface (9a) exposed on the first surface (3), a second heat dissipation surface (9b) exposed on the second surface (4), and A first mounting surface (9c) having an angle with respect to the first heat dissipation surface (9a) and the second heat dissipation surface (9b);
The second heat radiation member (10) includes a third heat radiation surface (10a) exposed on the first surface (3), a fourth heat radiation surface (10b) exposed on the second surface (4), and A second mounting surface (10c) having an angle with respect to the third heat dissipation surface (10a) and the fourth heat dissipation surface (10b);
The back surface (5a, 6a) of the semiconductor chip (5, 6) is electrically and thermally connected to the first mounting surface (9c) of the first heat radiating member (9), and the semiconductor chip (5, 6) The surface (5b, 6b) of 6) is electrically and thermally connected to the second mounting surface (10c) of the second heat radiating member (10) ,
The first heat radiating member (9) and the second heat radiating member (10) include the first heat radiating surface (9a), the second heat radiating surface (9b), the third heat radiating surface (10a), and the fourth heat radiating surface. A semiconductor device, wherein the semiconductor device is covered with the mold resin (11) except for the surface (10b) . The first mounting surface (9c) is perpendicular to the first heat dissipation surface (9a) and the second heat dissipation surface (9b),
The semiconductor device according to claim 1, wherein the second mounting surface (10c) is perpendicular to the third heat radiating surface (10a) and the fourth heat radiating surface (10b). A semiconductor device having a first surface (3) and a second surface (4) located on the opposite side of the first surface (3),
A semiconductor chip (5, 6);
A first heat dissipating member (9) electrically and thermally connected to the back surface (5a, 6a) of the semiconductor chip (5, 6);
A second heat dissipating member (10) electrically and thermally connected to the surface (5b, 6b) of the semiconductor chip (5, 6);
The semiconductor chip (5, 6) so that the first heat radiating member (9) and the second heat radiating member (10) are exposed on both the first surface (3) and the second surface (4). ), The first heat radiating member (9), and the mold resin (11) sealing the second heat radiating member (10),
The first heat dissipation member (9) includes a first heat dissipation surface (9a) exposed on the first surface (3), a second heat dissipation surface (9b) exposed on the second surface (4), and A first mounting surface (9c) having an angle with respect to the first heat dissipation surface (9a) and the second heat dissipation surface (9b);
The second heat radiation member (10) includes a third heat radiation surface (10a) exposed on the first surface (3), a fourth heat radiation surface (10b) exposed on the second surface (4), and A second mounting surface (10c) having an angle with respect to the third heat dissipation surface (10a) and the fourth heat dissipation surface (10b);
The back surface (5a, 6a) of the semiconductor chip (5, 6) is electrically and thermally connected to the first mounting surface (9c) of the first heat radiating member (9), and the semiconductor chip (5, 6) The surface (5b, 6b) of 6) is electrically and thermally connected to the second mounting surface (10c) of the second heat radiating member (10),
A terminal (2) for electrically connecting the semiconductor chip (5, 6) and the outside; and the first surface (3) and the second surface (4) of the terminal (2) semi conductor arrangement you being a parallel direction parallel to the plane. A method of manufacturing a semiconductor device according to claim 1 or 2,
In a first mold (14) having a recess (14a) prepared by mounting the semiconductor chip (5, 6) on the first heat radiating member (9) and the second heat radiating member (10). Surfaces (9a, 10a) exposed on the first surface (3) are brought into contact with the bottom of the recess (14a), and the recess (15a) is formed at the bottom of the second mold (15) having the recess (15a). The surface (9b, 10b) exposed to the second surface (4) is brought into contact with the bottom of 15a) and is sandwiched between the molds (14, 15), and is inserted into the molds (14, 15). The mold resin (11) is poured in,
As said 1st metal mold | die (14), it contacts with the outer edge part (9h, 10j) of the surface (9a, 10a) exposed to the said 1st surface (3) among each said heat radiating member (9, 10). In addition, the bottom of the concave portion (14a) is further provided with a concave portion (14b), and the second mold (15) is used as the second radiating member (9, 10). It is characterized in that a concave portion (15b) is further provided at the bottom of the concave portion (15a) so as to contact the outer edge portions (9i, 10h) of the surfaces (9b, 10b) exposed on the surface (4). A method for manufacturing a semiconductor device. As one or both of the first heat radiating member (9) and the second heat radiating member (10), the surfaces (9a, 10a) exposed to the first surface (3) and the second surface (4) The surfaces (9b, 10b) exposed to the first surface (3) and the second surface (4) at the center of the first heat radiating member (9) and the second heat radiating member (10). 5. The method of manufacturing a semiconductor device according to claim 4 , wherein a semiconductor device having a larger cross section than that of the semiconductor device is used. The first heat radiating member (9) is exposed on the first heat radiating surface (9a) exposed on the first surface (3) and on the second surface (4) smaller than the first heat radiating surface (9a). An L-shape having a second heat radiating surface (9b)
The second heat radiating member (10) is exposed on the third heat radiating surface (10a) exposed on the first surface (3) and on the second surface (4) larger than the third heat radiating surface (10a). An L-shape having a fourth heat dissipating surface (10b),
A plurality of the semiconductor chips (5, 6, 16, 17);
One back surface of the plurality of semiconductor chips (5, 6, 16, 17) is electrically connected to the first mounting surface (9e) opposite to the first heat radiating surface (9a) of the first heat radiating member (9). The surface of the semiconductor chip is electrically and thermally connected to the second mounting surface (10d) on the opposite side of the fourth heat radiating surface (10b) of the second heat radiating member (10). Connected,
One of the plurality of semiconductor chips (5, 6, 16, 17) is at least a third mounting surface having an angle with respect to the second heat radiating surface (9b) of the first heat radiating member (9). (9f) and a second mounting surface (10e) having an angle with respect to the fourth heat radiating surface (10b) of the second heat radiating member (10) and the first heat radiating member (9). The fifth mounting surface (9g) having an angle with respect to the first heat radiating surface (9a) and the second heat radiating member (10) having an angle with respect to the third heat radiating surface (10a). 3. The semiconductor device according to claim 1, wherein the semiconductor device is electrically and thermally connected to any one of the sixth mounting surfaces. The third mounting surface (9f) is with respect to the second heat dissipation surface (9b), and the fourth mounting surface (10e) is with respect to the fourth heat dissipation surface (10b), and the fifth mounting surface (9g). for the first heat radiating surface (9a), the sixth mounting surface (10f) is set forth in claim 6, characterized in that respectively become perpendicular to the third heat radiation surface (10a) Semiconductor device. Having two semiconductor chips (5, 6), and further having a third heat dissipating member (18);
The second heat radiating member (10) has a third mounting surface (10g) on the opposite side of the second mounting surface (10c),
The third heat dissipation member (18) includes a fifth heat dissipation surface (18a) exposed on the first surface (3), a sixth heat dissipation surface (18b) exposed on the second surface (4), and A fourth mounting surface (18c) having an angle with respect to the fifth heat radiating surface (18a) and the sixth heat radiating surface (18b);
The first heat radiating member (9), the second heat radiating member (10), and the third heat radiating member (18) are arranged on a straight line,
One back surface (5a) of the two semiconductor chips (5, 6) is electrically and thermally connected to the first mounting surface (9c), and a front surface (5b) is the second mounting surface (10c). Is electrically and thermally connected to the
The other back surface (6a) of the two semiconductor chips (5, 6) is electrically and thermally connected to the third mounting surface (10g), and the surface (6b) is the fourth mounting surface (18c). The semiconductor device according to claim 1, wherein the semiconductor device is electrically and thermally connected to the semiconductor device. The semiconductor device according to claim 8 , wherein the fourth mounting surface (18c) is perpendicular to the fifth heat radiating surface (18a) and the sixth heat radiating surface (18b). Having two semiconductor chips (5, 6), and further having a third heat dissipating member (18);
The first heat dissipation member (9) includes a first heat dissipation surface (9a) exposed on the first surface (3), a second heat dissipation surface (9b) exposed on the second surface (4), and A first mounting surface (9c) having an angle with respect to the first heat dissipation surface (9a) and the second heat dissipation surface (9b);
The second heat dissipating member (10) includes a third heat dissipating surface (10a) exposed on the first surface (3) and a second mounting surface (angled with respect to the third heat dissipating surface (10a)). 10c)
The third heat radiating member (18) has a fourth heat radiating surface (18b) exposed on the second surface (4) and a third mounting surface (angled with respect to the fourth heat radiating surface (18b)). 18c)
One back surface (5a) of the two semiconductor chips (5, 6) is electrically and thermally connected to the first mounting surface (9c), and a front surface (5b) is the second mounting surface (10c). Is electrically and thermally connected to the
The other back surface (6a) of the two semiconductor chips (5, 6) is electrically and thermally connected to the third mounting surface (18c), and the surface (6b) is the first mounting surface (9c). The semiconductor device according to claim 1, wherein the semiconductor device is electrically and thermally connected to the semiconductor device. 11. The semiconductor device according to claim 10 , wherein the third heat radiating member (18) has a fifth heat radiating surface (18a) exposed on the first surface (3). 12. The semiconductor device according to claim 11 , wherein the second heat radiating member (10) has a sixth heat radiating surface (10b) exposed on the second surface (4). The first mounting surface (9c) is perpendicular to the first heat dissipation surface (9a) and the second heat dissipation surface (9b),
The second mounting surface (10c) is perpendicular to the third heat dissipation surface (10a),
The semiconductor device according to any one of claims 10 to 12 , wherein the third mounting surface (18c) is perpendicular to the fourth heat radiation surface (18b). The first heat radiating member (9) and the second heat radiating member (10) are exposed on both the first surface (3) and the second surface (4);
A terminal (2) for electrically connecting the semiconductor chip (5, 6) and the outside;
The first heat radiating member (9) has a surface (9c) on which the semiconductor chip (5, 6) is mounted and a through hole (9k) that penetrates a surface (9j) opposite to the surface. ,
The terminal (2) has a part of the terminal (2) disposed in the through hole (9k) through an insulating layer (2a) provided on a side surface of the terminal (2), and one end side (2b) Is electrically connected to the semiconductor chip (5, 6), and the other end (2c) is exposed from the mold resin (11) and is electrically connected to the outside. The semiconductor device according to claim 1, wherein the semiconductor device is characterized. An elastic sheet (19) is disposed between the molds (14, 15), and the elastic sheet (19) is sandwiched between the molds (14, 15), and the first surface (3). 6. The method of manufacturing a semiconductor device according to claim 4 , wherein the exposed surface (9a, 10a) and the surface (9b, 10b) exposed on the second surface (4) are sandwiched. An elastic sheet (19) is disposed between the bottom of the recess (14a) of the first mold (14) and the surfaces (9a, 10a) exposed on the first surface (3), An elastic sheet (19) is disposed between the bottom of the recess (15b) of the second mold (15) and the surface (9b, 10b) exposed to the second surface (4). A method for manufacturing a semiconductor device according to claim 4 or 5 .

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